More stabilization.

This commit is contained in:
giomba 2022-10-17 16:52:15 +02:00
parent fc3ed64e9e
commit 0b751fd1c0
2 changed files with 13 additions and 12 deletions

View File

@ -23,7 +23,7 @@
#define FRAMES 2
#define HPIXEL 640
#define VPIXEL 500
#define VPIXEL 480
#define BPP 1
typedef struct Frame
@ -152,18 +152,18 @@ int main()
memset(&frames[0].data[0], 0, sizeof(frames[0].data));
// draw a cross
// horizontal lines
for (uint16_t x = 0; x < 640; ++x)
for (uint16_t x = 0; x < 639; ++x) // last pixel high -> bad
{
set_pixel(x, 4);
set_pixel(x, 244);
set_pixel(x, 484);
set_pixel(x, 0);
set_pixel(x, 239);
set_pixel(x, 479);
}
// vertical lines
for (uint16_t y = 3; y < 483; ++y)
for (uint16_t y = 0; y < 480; ++y)
{
set_pixel(0, y);
set_pixel(480, y);
set_pixel(640, y);
set_pixel(239, y);
set_pixel(638, y);
}
// Running programs on PIO
@ -224,7 +224,7 @@ int main()
irq_set_exclusive_handler(DMA_IRQ_0, dma_handler);
irq_set_enabled(DMA_IRQ_0, true);
dma_channel_configure(dma_channel, &dma_config, &pio0_hw->txf[2], &frames[0].data[0], 10000,
dma_channel_configure(dma_channel, &dma_config, &pio0_hw->txf[2], &frames[0].data[0], 9600,
false);
dma_ready = true;

View File

@ -5,9 +5,9 @@ entrypoint_vga_free_run:
mov y, osr
loope:
mov x, y
wait irq 0
wait irq 7
loop:
out pins, 1
out pins, 1 [3]
jmp x-- loop
jmp loope
@ -26,11 +26,12 @@ loop:
hsync_pulse:
jmp x-- hsync_pulse
irq set 7
mov x, osr
set pins, 1
hsync_idle:
jmp x-- hsync_idle
jmp loop [1]
jmp loop
.program vga_vsync