149 lines
4.5 KiB
C
149 lines
4.5 KiB
C
#include "crtc.h"
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#include <stdio.h>
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#include "hardware/pio.h"
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#include "hardware/structs/pio.h"
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#include "hardware/dma.h"
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#include "framebuffer.h"
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#include "crtc.pio.h"
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typedef struct PIORun
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{
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PIO pio; //< executing PIO
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uint offset; //< PIO memory offset for program
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uint sm; //< executing SM
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} PIORun;
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static PIORun crtc_vsync, crtc_hsync, crtc_pixel;
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static int dma_channel;
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bool dma_ready = false;
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static void crtc_pixel_program_init(PIO pio, uint sm, uint offset)
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{
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pio_sm_config config = crtc_pixel_program_get_default_config(offset);
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pio_gpio_init(pio, 11);
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sm_config_set_in_pins(&config, 11);
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sm_config_set_in_shift(&config, true, true, 0);
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pio_sm_set_consecutive_pindirs(pio, sm, 11, 1, false);
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sm_config_set_wrap(&config, offset + crtc_pixel_wrap_target, offset + crtc_pixel_wrap);
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pio_sm_init(pio, sm, offset, &config);
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// not quite 4x pixel clock (2.1 = 2,25.6)
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pio_sm_set_clkdiv_int_frac(pio, sm, 2, 26);
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pio_sm_set_enabled(pio, sm, true);
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}
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static void crtc_hsync_program_init(PIO pio, uint sm, uint offset)
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{
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pio_sm_config config = crtc_hsync_program_get_default_config(offset);
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sm_config_set_wrap(&config, offset + crtc_hsync_wrap_target, offset + crtc_hsync_wrap);
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pio_sm_init(pio, sm, offset, &config);
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pio_sm_set_clkdiv_int_frac(pio, sm, 2, 26);
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pio_sm_set_enabled(pio, sm, true);
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}
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static void crtc_vsync_program_init(PIO pio, uint sm, uint offset)
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{
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pio_sm_config config = crtc_vsync_program_get_default_config(offset);
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pio_gpio_init(pio, 15);
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sm_config_set_wrap(&config, offset + crtc_vsync_wrap_target, offset + crtc_vsync_wrap);
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pio_sm_init(pio, sm, offset, &config);
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pio_sm_set_clkdiv_int_frac(pio, sm, 2, 26);
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pio_sm_set_enabled(pio, sm, true);
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}
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int dma_counter = 0;
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static void dma_handler(void)
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{
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dma_counter++;
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// reset DMA
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dma_channel_set_write_addr(dma_channel, &frame[2560], true);
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// acknoweledge DMA
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dma_hw->ints1 = 1 << dma_channel;
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}
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int crtc_frame_counter = 0;
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static void new_frame_handler(void)
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{
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pio_sm_clear_fifos(crtc_pixel.pio, crtc_pixel.sm);
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crtc_frame_counter++;
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pio_interrupt_clear(pio1_hw, 1);
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}
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void crtc_machines_init(void)
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{
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crtc_hsync.pio = crtc_vsync.pio = crtc_pixel.pio = pio1;
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printf("Starting CRTC pixel machine... ");
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if (!pio_can_add_program(crtc_pixel.pio, &crtc_pixel_program))
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panic("cannot add program");
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crtc_pixel.offset = pio_add_program(crtc_pixel.pio, &crtc_pixel_program);
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crtc_pixel.sm = pio_claim_unused_sm(crtc_pixel.pio, true);
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crtc_pixel_program_init(crtc_pixel.pio, crtc_pixel.sm, crtc_pixel.offset);
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pio_sm_put_blocking(crtc_pixel.pio, crtc_pixel.sm, 640 - 1);
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printf("OK\n");
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printf("Starting CRTC vsync machine... ");
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if (!pio_can_add_program(crtc_vsync.pio, &crtc_vsync_program))
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panic("cannot add program");
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crtc_vsync.offset = pio_add_program(crtc_vsync.pio, &crtc_vsync_program);
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crtc_vsync.sm = pio_claim_unused_sm(crtc_vsync.pio, true);
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crtc_vsync_program_init(crtc_vsync.pio, crtc_vsync.sm, crtc_vsync.offset);
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printf("OK\n");
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printf("Starting CRTC hsync machine... ");
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if (!pio_can_add_program(crtc_hsync.pio, &crtc_hsync_program))
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panic("cannot add program");
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crtc_hsync.offset = pio_add_program(crtc_hsync.pio, &crtc_hsync_program);
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crtc_hsync.sm = pio_claim_unused_sm(crtc_hsync.pio, true);
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crtc_hsync_program_init(crtc_hsync.pio, crtc_hsync.sm, crtc_hsync.offset);
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pio_sm_put_blocking(crtc_hsync.pio, crtc_hsync.sm, 128 - 1);
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printf("OK\n");
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printf("Setting up new frame interrupt... ");
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// Frame interrupt is asserted on PIO1 interrupt 1 by SM1
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pio_set_irq1_source_enabled(crtc_vsync.pio, pis_interrupt1,
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true); // allow SM1 of PIO to fire the interrupt
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irq_set_exclusive_handler(PIO1_IRQ_1, new_frame_handler); // set handler for IRQ1 of PIO
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irq_set_enabled(PIO1_IRQ_1, true); // enable interrupt
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printf("OK\n");
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printf("Setting up CRTC DMA... ");
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dma_channel = dma_claim_unused_channel(true);
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printf("channel %d... ", dma_channel);
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dma_channel_config dma_config = dma_channel_get_default_config(dma_channel);
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channel_config_set_transfer_data_size(&dma_config, DMA_SIZE_32);
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channel_config_set_read_increment(&dma_config, false);
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channel_config_set_write_increment(&dma_config, true);
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channel_config_set_dreq(&dma_config, DREQ_PIO1_RX0);
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// setup transfer acknowledge interrupt
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dma_channel_set_irq1_enabled(dma_channel, true);
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irq_set_exclusive_handler(DMA_IRQ_1, dma_handler);
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irq_set_enabled(DMA_IRQ_1, true);
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dma_channel_configure(dma_channel, &dma_config, &frame[2560], &pio1_hw->rxf[0], 640 * 128 / 32,
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true);
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dma_ready = true;
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printf("OK\n");
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}
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