diff --git a/.gitignore b/.gitignore index 1641ceb39..2f8a3d89e 100644 --- a/.gitignore +++ b/.gitignore @@ -84,3 +84,7 @@ contiki-cc2530dk.lib #regression tests artifacts *.testlog + +# rl78 build artifacts +*.eval-adf7xxxmb4z +*.eval-adf7xxxmb4z.srec diff --git a/.travis.yml b/.travis.yml index 9e4112ad4..c6de5449d 100644 --- a/.travis.yml +++ b/.travis.yml @@ -16,12 +16,17 @@ before_script: https://raw.github.com/wiki/malvira/libmc1322x/files/arm-2008q3-66-arm-none-eabi-i686-pc-linux-gnu.tar.bz2 \ | tar xjf - -C /tmp/ && sudo cp -f -r /tmp/arm-2008q3/* /usr/ && rm -rf /tmp/arm-2008q3 && arm-none-eabi-gcc --version || true" + ## Install RL78 GCC chain (following the instructions in platform/eval-adf7xxxmb4z/README.md) + - "sudo apt-get install git make gcc libc-dev multiarch-support libncurses5:i386 zlib1g:i386" + - "wget https://dl.dropboxusercontent.com/u/60522916/gnurl78-v13.02-elf_1-2_i386.deb" + - "sudo dpkg -i gnurl78*.deb" + ## Install SDCC from a purpose-built bundle - "[ ${BUILD_ARCH:-0} = 8051 ] && curl -s \ https://raw.github.com/wiki/g-oikonomou/contiki-sensinode/files/sdcc.tar.gz \ | tar xzf - -C /tmp/ && sudo cp -f -r /tmp/sdcc/* /usr/local/ && rm -rf /tmp/sdcc && sdcc --version || true" - "[ ${BUILD_ARCH:-0} = 8051 ] && sudo apt-get -qq install srecord || true" - + ## Clone and build cc65 when testing 6502 ports - "[ ${BUILD_ARCH:-0} = 6502 ] && git clone \ https://github.com/oliverschmidt/cc65 /tmp/cc65 && \ diff --git a/cpu/rl78/Communication.c b/cpu/rl78/Communication.c new file mode 100644 index 000000000..a33140ffe --- /dev/null +++ b/cpu/rl78/Communication.c @@ -0,0 +1,705 @@ +/* + * Copyright (c) 2014, Analog Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** + * \author Dragos Bogdan , Ian Martin + */ + +/******************************************************************************/ +/***************************** Include Files **********************************/ +/******************************************************************************/ + +#include + +#include "rl78.h" + +#include "Communication.h" /* Communication definitions */ + +#ifndef NOP +#define NOP asm ("nop") +#endif + +/* Enable interrupts: */ +#ifndef EI +#ifdef __GNUC__ +#define EI asm ("ei"); +#else +#define EI __enable_interrupt(); +#endif +#endif + +#undef BIT +#define BIT(n) (1 << (n)) + +#define CLK_SCALER (0x4) +#define SCALED_CLK (f_CLK / (1 << CLK_SCALER)) +#define BITBANG_SPI 1 + +char IICA0_Flag; + +/******************************************************************************/ +/************************ Functions Definitions *******************************/ +/******************************************************************************/ + +/***************************************************************************//** + * @brief I2C interrupt service routine. + * + * @return None. + *******************************************************************************/ +/*__interrupt */ static void +IICA0_Interrupt(void) +{ + IICA0_Flag = 1; +} +/***************************************************************************//** + * @brief Initializes the SPI communication peripheral. + * + * @param lsbFirst - Transfer format (0 or 1). + * Example: 0x0 - MSB first. + * 0x1 - LSB first. + * @param clockFreq - SPI clock frequency (Hz). + * Example: 1000 - SPI clock frequency is 1 kHz. + * @param clockPol - SPI clock polarity (0 or 1). + * Example: 0x0 - Idle state for clock is a low level; active + * state is a high level; + * 0x1 - Idle state for clock is a high level; active + * state is a low level. + * @param clockEdg - SPI clock edge (0 or 1). + * Example: 0x0 - Serial output data changes on transition + * from idle clock state to active clock state; + * 0x1 - Serial output data changes on transition + * from active clock state to idle clock state. + * + * @return status - Result of the initialization procedure. + * Example: 0 - if initialization was successful; + * -1 - if initialization was unsuccessful. + *******************************************************************************/ +char +SPI_Init(enum CSI_Bus bus, + char lsbFirst, + long clockFreq, + char clockPol, + char clockEdg) +{ +#if BITBANG_SPI + PIOR5 = 1; /* Move SPI/I2C/UART functions from Port 0 pins 2-4 to Port 8. */ + + /* Configure SCLK as an output. */ + PM0 &= ~BIT(4); + POM0 &= ~BIT(4); + + /* Configure MOSI as an output: */ + PM0 &= ~BIT(2); + POM0 &= ~BIT(2); + PMC0 &= ~BIT(2); + + /* Configure MISO as an input: */ + PM0 |= BIT(3); + PMC0 &= ~BIT(3); +#else + char sdrValue = 0; + char delay = 0; + uint16_t scr; + uint8_t shift; + + PIOR5 = 0; /* Keep SPI functions on Port 0 pins 2-4. */ + + /* Enable input clock supply. */ + if(bus <= CSI11) { + SAU0EN = 1; + } else { SAU1EN = 1; + } + + /* After setting the SAUmEN bit to 1, be sure to set serial clock select + register m (SPSm) after 4 or more fCLK clocks have elapsed. */ + NOP; + NOP; + NOP; + NOP; + + /* Select the fCLK as input clock. */ + if(bus <= CSI11) { + SPS0 = (CLK_SCALER << 4) | CLK_SCALER; /* TODO: kludge */ + } else { SPS1 = (CLK_SCALER << 4) | CLK_SCALER; /* TODO: kludge */ + } + /* Select the CSI operation mode. */ + switch(bus) { + case CSI00: SMR00 = 0x0020; + break; + case CSI01: SMR01 = 0x0020; + break; + case CSI10: SMR02 = 0x0020; + break; + case CSI11: SMR03 = 0x0020; + break; + case CSI20: SMR10 = 0x0020; + break; + case CSI21: SMR11 = 0x0020; + break; + case CSI30: SMR12 = 0x0020; + break; + case CSI31: SMR13 = 0x0020; + break; + } + + clockPol = 1 - clockPol; + scr = (clockEdg << 13) | + (clockPol << 12) | + 0xC000 | /* Operation mode: Transmission/reception. */ + 0x0007; /* 8-bit data length. */ + switch(bus) { + case CSI00: SCR00 = scr; + break; + case CSI01: SCR01 = scr; + break; + case CSI10: SCR02 = scr; + break; + case CSI11: SCR03 = scr; + break; + case CSI20: SCR10 = scr; + break; + case CSI21: SCR11 = scr; + break; + case CSI30: SCR12 = scr; + break; + case CSI31: SCR13 = scr; + break; + } + + /* clockFreq = mckFreq / (sdrValue * 2 + 2) */ + sdrValue = SCALED_CLK / (2 * clockFreq) - 1; + sdrValue <<= 9; + switch(bus) { + case CSI00: SDR00 = sdrValue; + break; + case CSI01: SDR01 = sdrValue; + break; + case CSI10: SDR02 = sdrValue; + break; + case CSI11: SDR03 = sdrValue; + break; + case CSI20: SDR10 = sdrValue; + break; + case CSI21: SDR11 = sdrValue; + break; + case CSI30: SDR12 = sdrValue; + break; + case CSI31: SDR13 = sdrValue; + break; + } + + /* Set the clock and data initial level. */ + clockPol = 1 - clockPol; + shift = bus & 0x3; + if(bus <= CSI11) { + SO0 &= ~(0x0101 << shift); + SO0 |= ((clockPol << 8) | clockPol) << shift; + } else { + SO1 &= ~(0x0101 << shift); + SO1 |= ((clockPol << 8) | clockPol) << shift; + } + + /* Enable output for serial communication operation. */ + switch(bus) { + case CSI00: SOE0 |= BIT(0); + break; + case CSI01: SOE0 |= BIT(1); + break; + case CSI10: SOE0 |= BIT(2); + break; + case CSI11: SOE0 |= BIT(3); + break; + case CSI20: SOE1 |= BIT(0); + break; + case CSI21: SOE1 |= BIT(1); + break; + case CSI30: SOE1 |= BIT(2); + break; + case CSI31: SOE1 |= BIT(3); + break; + } + + switch(bus) { + case CSI00: + /* SO00 output: */ + P1 |= BIT(2); + PM1 &= ~BIT(2); + + /* SI00 input: */ + PM1 |= BIT(1); + + /* SCK00N output: */ + P1 |= BIT(0); + PM1 &= ~BIT(0); + break; + + case CSI01: + /* SO01 output: */ + P7 |= BIT(3); + PM7 &= ~BIT(3); + + /* SI01 input: */ + PM7 |= BIT(4); + + /* SCK01 output: */ + P7 |= BIT(5); + PM7 &= ~BIT(5); + break; + + case CSI10: + PMC0 &= ~BIT(2); /* Disable analog input on SO10. */ + + /* SO10 output: */ + P0 |= BIT(2); + PM0 &= ~BIT(2); + + /* SI10 input: */ + PM0 |= BIT(3); + + /* SCK10N output: */ + P0 |= BIT(4); + PM0 &= ~BIT(4); + break; + + case CSI11: + /* SO11 output: */ + P5 |= BIT(1); + PM5 &= ~BIT(1); + + /* SI11 input: */ + PM5 |= BIT(0); + + /* SCK11 output: */ + P3 |= BIT(0); + PM3 &= ~BIT(0); + break; + + case CSI20: + /* SO20 output: */ + P1 |= BIT(3); + PM1 &= ~BIT(3); + + /* SI20 input: */ + PM1 |= BIT(4); + + /* SCK20 output: */ + P1 |= BIT(5); + PM1 &= ~BIT(5); + break; + + case CSI21: + /* SO21 output: */ + P7 |= BIT(2); + PM7 &= ~BIT(2); + + /* SI21 input: */ + PM7 |= BIT(1); + + /* SCK21 output: */ + P7 |= BIT(0); + PM7 &= ~BIT(0); + break; + + case CSI30: + /* TODO: not supported */ + break; + case CSI31: + /* TODO: not supported */ + break; + } + + /* Wait for the changes to take place. */ + for(delay = 0; delay < 50; delay++) { + NOP; + } + + /* Set the SEmn bit to 1 and enter the communication wait status */ + switch(bus) { + case CSI00: SS0 = BIT(0); + break; + case CSI01: SS0 = BIT(1); + break; + case CSI10: SS0 = BIT(2); + break; + case CSI11: SS0 = BIT(3); + break; + case CSI20: SS1 = BIT(0); + break; + case CSI21: SS1 = BIT(1); + break; + case CSI30: SS1 = BIT(2); + break; + case CSI31: SS1 = BIT(3); + break; + } + + /* Sanity check: */ + if(bus == CSI10) { + /* MOSI: */ + PIOR5 = 0; + PMC02 = 0; + PM02 = 0; + P02 = 1; + + /* MISO: */ + PIOR5 = 0; + PMC03 = 0; + PM03 = 1; + + /* SCLK: */ + PIOR5 = 0; + PM04 = 0; + P04 = 1; + } +#endif + + return 0; +} +/***************************************************************************//** + * @brief Writes data to SPI. + * + * @param slaveDeviceId - The ID of the selected slave device. + * @param data - Data represents the write buffer. + * @param bytesNumber - Number of bytes to write. + * + * @return Number of written bytes. + *******************************************************************************/ +#if 0 +char +SPI_Write(enum CSI_Bus bus, + char slaveDeviceId, + unsigned char *data, + char bytesNumber) +{ + char byte = 0; + unsigned char read = 0; + unsigned short originalSCR = 0; + unsigned short originalSO1 = 0; + + volatile uint8_t *sio; + volatile uint16_t *ssr; + + switch(bus) { + default: + case CSI00: sio = &SIO00; + ssr = &SSR00; + break; + case CSI01: sio = &SIO01; + ssr = &SSR01; + break; + case CSI10: sio = &SIO10; + ssr = &SSR02; + break; + case CSI11: sio = &SIO11; + ssr = &SSR03; + break; + case CSI20: sio = &SIO20; + ssr = &SSR10; + break; + case CSI21: sio = &SIO21; + ssr = &SSR11; + break; + case CSI30: sio = &SIO30; + ssr = &SSR12; + break; + case CSI31: sio = &SIO31; + ssr = &SSR13; + break; + } + + for(byte = 0; byte < bytesNumber; byte++) { + *sio = data[byte]; + NOP; + while(*ssr & 0x0040) ; + read = *sio; + } + + return bytesNumber; +} +#endif + +#if BITBANG_SPI +#define sclk_low() (P0 &= ~BIT(4)) +#define sclk_high() (P0 |= BIT(4)) +#define mosi_low() (P0 &= ~BIT(2)) +#define mosi_high() (P0 |= BIT(2)) +#define read_miso() (P0bits.bit3) + +static unsigned char +spi_byte_exchange(unsigned char tx) +{ + unsigned char rx = 0, n = 0; + + sclk_low(); + + for(n = 0; n < 8; n++) { + if(tx & 0x80) { + mosi_high(); + } else { mosi_low(); + } + + /* The slave samples MOSI at the rising-edge of SCLK. */ + sclk_high(); + + rx <<= 1; + rx |= read_miso(); + + tx <<= 1; + + /* The slave changes the value of MISO at the falling-edge of SCLK. */ + sclk_low(); + } + + return rx; +} +#endif + +/***************************************************************************//** + * @brief Reads data from SPI. + * + * @param slaveDeviceId - The ID of the selected slave device. + * @param data - Data represents the write buffer as an input parameter + * and the read buffer as an output parameter. + * @param bytesNumber - Number of bytes to read. + * + * @return Number of read bytes. + *******************************************************************************/ +char +SPI_Read(enum CSI_Bus bus, + char slaveDeviceId, + unsigned char *data, + char bytesNumber) +{ +#if BITBANG_SPI + unsigned char n = 0; + for(n = 0; n < bytesNumber; n++) { + data[n] = spi_byte_exchange(data[n]); + } +#else + char byte = 0; + unsigned short originalSCR = 0; + unsigned short originalSO1 = 0; + + volatile uint8_t *sio; + volatile uint16_t *ssr; + char dummy; + + switch(bus) { + default: + case CSI00: sio = &SIO00; + ssr = &SSR00; + break; + case CSI01: sio = &SIO01; + ssr = &SSR01; + break; + case CSI10: sio = &SIO10; + ssr = &SSR02; + break; + case CSI11: sio = &SIO11; + ssr = &SSR03; + break; + case CSI20: sio = &SIO20; + ssr = &SSR10; + break; + case CSI21: sio = &SIO21; + ssr = &SSR11; + break; + case CSI30: sio = &SIO30; + ssr = &SSR12; + break; + case CSI31: sio = &SIO31; + ssr = &SSR13; + break; + } + + /* Flush the receive buffer: */ + while(*ssr & 0x0020) dummy = *sio; + (void)dummy; + + for(byte = 0; byte < bytesNumber; byte++) { + *sio = data[byte]; + NOP; + while(*ssr & 0x0040) ; + data[byte] = *sio; + } +#endif + + return bytesNumber; +} +/***************************************************************************//** + * @brief Initializes the I2C communication peripheral. + * + * @param clockFreq - I2C clock frequency (Hz). + * Example: 100000 - SPI clock frequency is 100 kHz. + * @return status - Result of the initialization procedure. + * Example: 0 - if initialization was successful; + * -1 - if initialization was unsuccessful. + *******************************************************************************/ +char +I2C_Init(long clockFreq) +{ + long fckFreq = 32000000; + unsigned char wlValue = 0; + unsigned char whValue = 0; + + (void)IICA0_Interrupt; /* Prevent an unused-function warning. */ + + /* Enable interrupts */ + EI; + + /* Enable input clock supply. */ + IICA0EN = 1; + + /* Set the fast mode plus operation. */ + SMC0 = 1; + + /* Set transfer rate. */ + wlValue = (unsigned char)((0.5 * fckFreq) / clockFreq); + whValue = (unsigned char)(wlValue - (fckFreq / (10 * clockFreq))); + IICWL0 = wlValue; + IICWH0 = whValue; + + STCEN0 = 1; /* After operation is enabled, enable generation of a start */ + /* condition without detecting a stop condition. */ + WTIM0 = 1; /* Interrupt request is generated at the ninth clock’s */ + /* falling edge. */ + + /* Enable I2C operation. */ + IICE0 = 1; + + /* Configure SCLA0 and SDAA0 pins as digital output. */ + P6 &= ~0x03; + PM6 &= ~0x03; + + return 0; +} +/***************************************************************************//** + * @brief Writes data to a slave device. + * + * @param slaveAddress - Adress of the slave device. + * @param dataBuffer - Pointer to a buffer storing the transmission data. + * @param bytesNumber - Number of bytes to write. + * @param stopBit - Stop condition control. + * Example: 0 - A stop condition will not be sent; + * 1 - A stop condition will be sent. + * + * @return status - Number of read bytes or 0xFF if the slave address was + * not acknowledged by the device. + *******************************************************************************/ +char +I2C_Write(char slaveAddress, + unsigned char *dataBuffer, + char bytesNumber, + char stopBit) +{ + char byte = 0; + char status = 0; + + IICAMK0 = 1; /* Interrupt servicing disabled. */ + STT0 = 1; /* Generate a start condition. */ + IICAMK0 = 0; /* Interrupt servicing enabled. */ + + /* Send the first byte. */ + IICA0_Flag = 0; + IICA0 = (slaveAddress << 1); + while(IICA0_Flag == 0) ; + + if(ACKD0) { /* Acknowledge was detected. */ + for(byte = 0; byte < bytesNumber; byte++) { + IICA0_Flag = 0; + IICA0 = *dataBuffer; + while(IICA0_Flag == 0) ; + dataBuffer++; + } + status = bytesNumber; + } else { /* Acknowledge was not detected. */ + status = 0xFF; + } + if(stopBit) { + SPT0 = 1; /* Generate a stop condition. */ + while(IICBSY0) ; /* Wait until the I2C bus status flag is cleared. */ + } + + return status; +} +/***************************************************************************//** + * @brief Reads data from a slave device. + * + * @param slaveAddress - Adress of the slave device. + * @param dataBuffer - Pointer to a buffer that will store the received data. + * @param bytesNumber - Number of bytes to read. + * @param stopBit - Stop condition control. + * Example: 0 - A stop condition will not be sent; + * 1 - A stop condition will be sent. + * + * @return status - Number of read bytes or 0xFF if the slave address was + * not acknowledged by the device. + *******************************************************************************/ +char +I2C_Read(char slaveAddress, + unsigned char *dataBuffer, + char bytesNumber, + char stopBit) +{ + char byte = 0; + char status = 0; + + IICAMK0 = 1; /* Interrupt servicing disabled. */ + STT0 = 1; /* Generate a start condition. */ + IICAMK0 = 0; /* Interrupt servicing enabled. */ + + /* Send the first byte. */ + IICA0_Flag = 0; + IICA0 = (slaveAddress << 1) + 1; + while(IICA0_Flag == 0) ; + + if(ACKD0) { /* Acknowledge was detected. */ + ACKE0 = 1; /* Enable acknowledgment. */ + for(byte = 0; byte < bytesNumber; byte++) { + if(byte == (bytesNumber - 1)) { + ACKE0 = 0U; /* Disable acknowledgment. */ + } + WREL0 = 1U; /* Cancel wait. */ + IICA0_Flag = 0; + while(IICA0_Flag == 0) ; + *dataBuffer = IICA0; + dataBuffer++; + } + status = bytesNumber; + } else { /* Acknowledge was not detected. */ + status = 0xFF; + } + if(stopBit) { + SPT0 = 1; /* Generate a stop condition. */ + while(IICBSY0) ; /* Wait until the I2C bus status flag is cleared. */ + } + + return status; +} diff --git a/cpu/rl78/Communication.h b/cpu/rl78/Communication.h new file mode 100644 index 000000000..9e3141d50 --- /dev/null +++ b/cpu/rl78/Communication.h @@ -0,0 +1,108 @@ +/* + * Copyright (c) 2014, Analog Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** + * \author Dragos Bogdan + */ + +#ifndef __COMMUNICATION_H__ +#define __COMMUNICATION_H__ + +/******************************************************************************/ +/*************************** Macros Definitions *******************************/ +/******************************************************************************/ +#define SPI_MISO PMOD1_MISO + +#define GPIO1_PIN_OUT PMOD1_GPIO1_PIN_OUT +#define GPIO1_LOW PMOD1_GPIO1_LOW +#define GPIO1_HIGH PMOD1_GPIO1_HIGH + +#define GPIO2_PIN_OUT PMOD1_GPIO2_PIN_OUT +#define GPIO2_LOW PMOD1_GPIO2_LOW +#define GPIO2_HIGH PMOD1_GPIO2_HIGH + +#define GPIO3_PIN_OUT PMOD1_GPIO3_PIN_OUT +#define GPIO3_LOW PMOD1_GPIO3_LOW +#define GPIO3_HIGH PMOD1_GPIO3_HIGH + +#define GPIO4_PIN_OUT PMOD1_GPIO4_PIN_OUT +#define GPIO4_LOW PMOD1_GPIO4_LOW +#define GPIO4_HIGH PMOD1_GPIO4_HIGH + +/******************************************************************************/ +/************************ Functions Declarations ******************************/ +/******************************************************************************/ + +enum CSI_Bus { + CSI00, + CSI01, + CSI10, + CSI11, + CSI20, + CSI21, + CSI30, + CSI31, +}; + +/*! Initializes the SPI communication peripheral. */ +char SPI_Init(enum CSI_Bus bus, + char lsbFirst, + long clockFreq, + char clockPol, + char clockEdg); + +/*! Writes data to SPI. */ +char SPI_Write(enum CSI_Bus bus, + char slaveDeviceId, + unsigned char *data, + char bytesNumber); + +/*! Reads data from SPI. */ +char SPI_Read(enum CSI_Bus bus, + char slaveDeviceId, + unsigned char *data, + char bytesNumber); + +/*! Initializes the I2C communication peripheral. */ +char I2C_Init(long clockFreq); + +/*! Writes data to a slave device. */ +char I2C_Write(char slaveAddress, + unsigned char *dataBuffer, + char bytesNumber, + char stopBit); + +/*! Reads data from a slave device. */ +char I2C_Read(char slaveAddress, + unsigned char *dataBuffer, + char bytesNumber, + char stopBit); + +#endif /* __COMMUNICATION_H__ */ diff --git a/cpu/rl78/Makefile.rl78 b/cpu/rl78/Makefile.rl78 new file mode 100755 index 000000000..62853e42d --- /dev/null +++ b/cpu/rl78/Makefile.rl78 @@ -0,0 +1,190 @@ +# Copyright (c) 2014, Analog Devices, Inc. +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# +# 3. Neither the name of the copyright holder nor the names of its +# contributors may be used to endorse or promote products derived +# from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, +# STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED +# OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Author: Ian Martin + +CONTIKI_CPU=$(CONTIKI)/cpu/rl78 + +### Compiler definitions +ifdef IAR + # Use IAR compiler. + + # Default code and data models (n = near, f = far): + CODE_MODEL ?= n + DATA_MODEL ?= n + + DEVICE ?= r5f100ll + + # According to "rl78/config/devices/RL78 - G13/r5f100ll.menu", the R5F100LLA has core 1. + CORE ?= 1 + + # Default library configuration (n = normal, f = full): + LIB_CONFIG ?= n + + IAR_PATH ?= C:\\Program\ Files\\IAR\ Systems\\Embedded\ Workbench\ 6.5\\rl78 + + CC = $(IAR_PATH)\\bin\\iccrl78 + LD = $(IAR_PATH)\\bin\\xlink + AR = $(IAR_PATH)\\bin\\xar + + CFLAGS += --silent + CFLAGS += --debug + CFLAGS += --core rl78_$(CORE) + CFLAGS += --code_model $(CODE_MODEL) + CFLAGS += --data_model $(DATA_MODEL) + CFLAGS += -I$(IAR_PATH)\\lib + + LDFLAGS += -S + LDFLAGS += -D_NEAR_CONST_LOCATION=0 + LDFLAGS += -D_NEAR_CONST_LOCATION_START=03000 + LDFLAGS += -D_NEAR_CONST_LOCATION_END=07EFF + LDFLAGS += -D_NEAR_HEAP_SIZE=400 + LDFLAGS += -D_FAR_HEAP_SIZE=4000 + LDFLAGS += -D_CSTACK_SIZE=400 + LDFLAGS += -s __program_start + LDFLAGS += -f $(IAR_PATH)\\config\\lnk$(DEVICE).xcl + LDFLAGS += -Felf + + AROPTS ?= -S + + TARGET_LIBFILES += $(IAR_PATH)\\lib\\dlrl78$(CODE_MODEL)$(DATA_MODEL)$(CORE)$(LIB_CONFIG).r87 + +CUSTOM_RULE_C_TO_O = 1 +%.o: %.c + $(TRACE_CC) + $(Q)$(CC) $(CFLAGS) $< -o $@ + +CUSTOM_RULE_C_TO_OBJECTDIR_O = 1 +$(OBJECTDIR)/%.o: %.c | $(OBJECTDIR) + $(TRACE_CC) + $(Q)$(CC) $(CFLAGS) $< --dependencies=m $(@:.o=.P) -o $@ + +CUSTOM_RULE_C_TO_CO = 1 +%.co: %.c + $(TRACE_CC) + $(Q)$(CC) $(CFLAGS) -DAUTOSTART_ENABLE $< -o $@ + +# The only reason we use a custom link rule here is to simultaneously produce an srec file. +CUSTOM_RULE_LINK = 1 +%.$(TARGET) %.$(TARGET).srec: %.co $(PROJECT_OBJECTFILES) $(PROJECT_LIBRARIES) contiki-$(TARGET).a + $(TRACE_LD) + $(Q)$(LD) $(LDFLAGS) $(TARGET_STARTFILES) ${filter-out %.a,$^} \ + ${filter %.a,$^} $(TARGET_LIBFILES) -o $@ -Omotorola=$@.srec +else + # Use the GNU RL78 toolchain. + + ifndef CROSS_COMPILE + ifeq ($(shell which rl78-elf-gcc),) + # The RL78 toolchain is not in the path. Try finding it in /usr/share: + CROSS_COMPILE := $(shell echo /usr/share/*rl78*/bin | tail -1)/rl78-elf- + else + # The RL78 toolchain is in the path. Use it directly: + CROSS_COMPILE := rl78-elf- + endif + endif + + CC = $(CROSS_COMPILE)gcc + LD = $(CROSS_COMPILE)gcc + AS = $(CROSS_COMPILE)gcc + AR = $(CROSS_COMPILE)ar + NM = $(CROSS_COMPILE)nm + OBJCOPY = $(CROSS_COMPILE)objcopy + OBJDUMP = $(CROSS_COMPILE)objdump + STRIP = $(CROSS_COMPILE)strip + + ifdef WERROR + CFLAGSWERROR ?= -Werror -pedantic -std=c99 -Werror + endif + + CFLAGSNO ?= -Wall -g $(CFLAGSWERROR) + CFLAGS += $(CFLAGSNO) -O + + CFLAGS += -mmul=g13 + CFLAGS += -Os -ggdb -ffunction-sections -fdata-sections + CFLAGS += -fno-strict-aliasing + + # Enable override of write() function: + CFLAGS += -fno-builtin + LDFLAGS += -fno-builtin + + LDFLAGS += -Wl,--gc-sections -T $(CONTIKI_CPU)/R5F100xL.ld -nostartfiles + + ASFLAGS += -c + + # C runtime assembly: + CONTIKI_ASMFILES += crt0.S + CONTIKI_OBJECTFILES += $(OBJECTDIR)/crt0.o +endif + +ifdef SERIAL_ID + CFLAGS += -DSERIAL_ID='$(SERIAL_ID)' +endif + +### CPU-dependent directories +CONTIKI_CPU_DIRS += . +CONTIKI_CPU_DIRS += sys +CONTIKI_CPU_DIRS += adf7023 + +### CPU-dependent source files +CONTIKI_SOURCEFILES += uart0.c +CONTIKI_SOURCEFILES += clock.c +CONTIKI_SOURCEFILES += write.c + +CONTIKI_SOURCEFILES += Communication.c +CONTIKI_SOURCEFILES += ADF7023.c +CONTIKI_SOURCEFILES += assert.c +CONTIKI_SOURCEFILES += slip-arch.c +CONTIKI_SOURCEFILES += contiki-uart.c +CONTIKI_SOURCEFILES += watchdog.c + +### Compilation rules + +%.so: $(OBJECTDIR)/%.o + $(LD) -shared -o $@ $^ + +ifdef CORE +.PHONY: symbols.c symbols.h +symbols.c symbols.h: + $(NM) -C $(CORE) | grep -v @ | grep -v dll_crt0 | awk -f $(CONTIKI)/tools/mknmlist > symbols.c +else +symbols.c symbols.h: + cp ${CONTIKI}/tools/empty-symbols.c symbols.c + cp ${CONTIKI}/tools/empty-symbols.h symbols.h +endif + +contiki-$(TARGET).a: ${addprefix $(OBJECTDIR)/,symbols.o} + +%.srec: % + $(OBJCOPY) -O srec $^ $@ + +%.lst: %.elf + $(OBJDUMP) -DS $^ > $@ + +%.lst: % + $(OBJDUMP) -DS $^ > $@ diff --git a/cpu/rl78/R5F100xL.ld b/cpu/rl78/R5F100xL.ld new file mode 100644 index 000000000..f643faed6 --- /dev/null +++ b/cpu/rl78/R5F100xL.ld @@ -0,0 +1,228 @@ +/* + +Copyright (c) 2005,2008,2009,2011 Red Hat Incorporated. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + + Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + + The name of Red Hat Incorporated may not be used to endorse + or promote products derived from this software without specific + prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL RED HAT INCORPORATED BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ +/** + * \author DJ Delorie , Ian Martin + */ + +/* Default linker script, for normal executables */ +OUTPUT_ARCH(rl78) +ENTRY(_start) + +/* Do we need any of these for elf? + __DYNAMIC = 0; */ + +/* This is for an R5F100xL, 512k flash, 32k ram, 8k data flash */ +MEMORY { + VEC (r) : ORIGIN = 0x00000, LENGTH = 0x00002 + IVEC (r) : ORIGIN = 0x00004, LENGTH = 0x0007c + OPT (r) : ORIGIN = 0x000c0, LENGTH = 0x00004 + MIRROR (r): ORIGIN = 0x03000, LENGTH = 0x04f00 + ROM (r) : ORIGIN = 0x07F00, LENGTH = 0x78100 + RAM (w) : ORIGIN = 0xf8000, LENGTH = 0x07ee0 + STACK (w) : ORIGIN = 0xffee0, LENGTH = 0x00002 +} + +SECTIONS +{ + .vec : + { + KEEP(*(.vec)) + } > VEC + .ivec : + { + KEEP(*(.ivec)) + } > IVEC + .opt : + { + KEEP(*(.opt)) + } > OPT + + /* CubeSuite always starts at 0xd8. */ + .csstart : { + *(.csstart) + } > ROM + + /* For code that must be in the first 64k, or could fill unused + space below .rodata. */ + .lowtext : { + *(.plt) + *(.lowtext) + } > ROM + + .data : { + . = ALIGN(2); + PROVIDE (__datastart = .); + + KEEP (*(.jcr)) + *(.data.rel.ro.local) *(.data.rel.ro*) + *(.dynamic) + + *(.data D .data.* .gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + SORT(CONSTRUCTORS) + *(.data1) + *(.got.plt) *(.got) + + /* We want the small data sections together, so single-instruction offsets + can access them all, and initialized data all before uninitialized, so + we can shorten the on-disk segment size. */ + . = ALIGN(2); + *(.sdata .sdata.* .gnu.linkonce.s.* D_2 D_1) + + . = ALIGN(2); + _edata = .; + PROVIDE (edata = .); + PROVIDE (__dataend = .); + } > RAM AT> MIRROR + + /* Note that crt0 assumes this is a multiple of two; all the + start/stop symbols are also assumed word-aligned. */ + PROVIDE(__romdatastart = LOADADDR(.data)); + PROVIDE (__romdatacopysize = SIZEOF(.data)); + + .bss : { + . = ALIGN(2); + PROVIDE (__bssstart = .); + *(.dynbss) + *(.sbss .sbss.*) + *(.bss B B_2 B_1 .bss.* .gnu.linkonce.b.*) + . = ALIGN(2); + *(COMMON) + . = ALIGN(2); + PROVIDE (__bssend = .); + _end = .; + PROVIDE (end = .); + } > RAM + PROVIDE (__bsssize = SIZEOF(.bss)); + + .stack (ORIGIN (STACK)) : + { + PROVIDE (__stack = .); + *(.stack) + } + + .rodata (MAX(__romdatastart + __romdatacopysize, 0x2000)) : { + . = ALIGN(2); + *(.plt) + *(.rodata C C_2 C_1 .rodata.* .gnu.linkonce.r.*) + *(.rodata1) + *(.eh_frame_hdr) + KEEP (*(.eh_frame)) + KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) + PROVIDE (__preinit_array_start = .); + KEEP (*(.preinit_array)) + PROVIDE (__preinit_array_end = .); + PROVIDE (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + PROVIDE (__init_array_end = .); + PROVIDE (__fini_array_start = .); + KEEP (*(.fini_array)) + KEEP (*(SORT(.fini_array.*))) + PROVIDE (__fini_array_end = .); + LONG(0); /* Sentinel. */ + + /* gcc uses crtbegin.o to find the start of the constructors, so + we make sure it is first. Because this is a wildcard, it + doesn't matter if the user does not actually link against + crtbegin.o; the linker won't look for a file to match a + wildcard. The wildcard also means that it doesn't matter which + directory crtbegin.o is in. */ + KEEP (*crtbegin*.o(.ctors)) + + /* We don't want to include the .ctor section from from the + crtend.o file until after the sorted ctors. The .ctor section + from the crtend file contains the end of ctors marker and it + must be last */ + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + + KEEP (*crtbegin*.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + } > MIRROR + + .text : + { + PROVIDE (_start = .); + *(.text P .stub .text.* .gnu.linkonce.t.*) + KEEP (*(.text.*personality*)) + /* .gnu.warning sections are handled specially by elf32.em. */ + *(.gnu.warning) + *(.interp .hash .dynsym .dynstr .gnu.version*) + PROVIDE (__etext = .); + PROVIDE (_etext = .); + PROVIDE (etext = .); + . = ALIGN(2); + KEEP (*(.init)) + KEEP (*(.fini)) + } > ROM + + /* The rest are all not normally part of the runtime image. */ + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/cpu/rl78/adf7023/ADF7023.c b/cpu/rl78/adf7023/ADF7023.c new file mode 100644 index 000000000..c8f30be38 --- /dev/null +++ b/cpu/rl78/adf7023/ADF7023.c @@ -0,0 +1,733 @@ +/* + * Copyright (c) 2014, Analog Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** + * \author Dragos Bogdan , Ian Martin + */ + +#include +#include +#include /* for memcmp(). */ +#include + +#include "ADF7023.h" +#include "ADF7023_Config.h" +#include "Communication.h" + +#include "sfrs.h" +#include "sfrs-ext.h" + +#include "contiki.h" /* for clock_wait() and CLOCK_SECOND. */ + +/******************************************************************************/ +/*************************** Macros Definitions *******************************/ +/******************************************************************************/ +/* + #define ADF7023_CS_ASSERT CS_PIN_LOW + #define ADF7023_CS_DEASSERT CS_PIN_HIGH + #define ADF7023_MISO MISO_PIN + */ + +#ifndef ARRAY_SIZE +#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) +#endif + +#undef BIT +#define BIT(n) (1 << (n)) + +#define ADF7023_CS_ASSERT (P2 &= ~BIT(2)) +#define ADF7023_CS_DEASSERT (P2 |= BIT(2)) +#define ADF7023_MISO (P0 & BIT(3)) + +#define ADF7023_SPI_BUS (CSI10) + +#define LOOP_LIMIT 100 + +#ifndef ADF7023_VERBOSE +/* ADF7023_VERBOSE Values: */ +/* 2 = Inidicate when breaking stuck while loops. */ +/* 5 = Dump all received and transmitted packets. */ +/* 7 = Dump the ADF7023 commands, interrupt and status words. */ +/* 10 = Dump all SPI transactions. */ + +#define ADF7023_VERBOSE 0 +#endif + +#if (ADF7023_VERBOSE >= 2) +#define break_loop() if(++counter >= LOOP_LIMIT) { printf("Breaking stuck while loop at %s line %u." NEWLINE, __FILE__, __LINE__); break; } +#else +#define break_loop() if(++counter >= LOOP_LIMIT) break +#endif + +#define ADF7023_While(condition, body) do { \ + int counter = 0; \ + while(condition) { body; break_loop(); } \ +} while(0) + +#undef MIN +#define MIN(x, y) (((x) < (y)) ? (x) : (y)) + +/******************************************************************************/ +/************************ Variables Definitions *******************************/ +/******************************************************************************/ +struct ADF7023_BBRAM ADF7023_BBRAMCurrent; + +#if (ADF7023_VERBOSE >= 7) +static unsigned char status_old = 0xff; +static unsigned char int0_old = 0xff; +#endif + +const char *ADF7023_state_lookup[] = { + /* 0x00 */ "Busy, performing a state transition", + /* 0x01 */ "(unknown)", + /* 0x02 */ "(unknown)", + /* 0x03 */ "(unknown)", + /* 0x04 */ "(unknown)", + /* 0x05 */ "Performing CMD_GET_RSSI", + /* 0x06 */ "PHY_SLEEP", + /* 0x07 */ "Performing CMD_IR_CAL", + /* 0x08 */ "Performing CMD_AES_DECRYPT_INIT", + /* 0x09 */ "Performing CMD_AES_DECRYPT", + /* 0x0A */ "Performing CMD_AES_ENCRYPT", + /* 0x0B */ "(unknown)", + /* 0x0C */ "(unknown)", + /* 0x0D */ "(unknown)", + /* 0x0E */ "(unknown)", + /* 0x0F */ "Initializing", + /* 0x10 */ "(unknown)", + /* 0x11 */ "PHY_OFF", + /* 0x12 */ "PHY_ON", + /* 0x13 */ "PHY_RX", + /* 0x14 */ "PHY_TX", +}; + +const char *ADF7023_cmd_lookup[] = { + [CMD_SYNC] = "CMD_SYNC", + [CMD_PHY_OFF] = "CMD_PHY_OFF", + [CMD_PHY_ON] = "CMD_PHY_ON", + [CMD_PHY_RX] = "CMD_PHY_RX", + [CMD_PHY_TX] = "CMD_PHY_TX", + [CMD_PHY_SLEEP] = "CMD_PHY_SLEEP", + [CMD_CONFIG_DEV] = "CMD_CONFIG_DEV", + [CMD_GET_RSSI] = "CMD_GET_RSSI", + [CMD_BB_CAL] = "CMD_BB_CAL", + [CMD_HW_RESET] = "CMD_HW_RESET", + [CMD_RAM_LOAD_INIT] = "CMD_RAM_LOAD_INIT", + [CMD_RAM_LOAD_DONE] = "CMD_RAM_LOAD_DONE", + [CMD_IR_CAL] = "CMD_IR_CAL", + [CMD_AES_ENCRYPT] = "CMD_AES_ENCRYPT", + [CMD_AES_DECRYPT] = "CMD_AES_DECRYPT", + [CMD_AES_DECRYPT_INIT] = "CMD_AES_DECRYPT_INIT", + [CMD_RS_ENCODE_INIT] = "CMD_RS_ENCODE_INIT", + [CMD_RS_ENCODE] = "CMD_RS_ENCODE", + [CMD_RS_DECODE] = "CMD_RS_DECODE", +}; + +static int spi_busy = 0; +static uint8_t tx_rec[255]; +static uint8_t rx_rec[255]; +static uint8_t tx_pos; +static uint8_t rx_pos; + +static void ADF7023_SetCommand_Assume_CMD_READY(unsigned char command); + +void +hexdump(const void *data, size_t len) +{ + size_t n; + if(len <= 0) { + return; + } + printf("%02x", ((const unsigned char *)data)[0]); + for(n = 1; n < len; n++) { + printf(" %02x", ((const unsigned char *)data)[n]); + } +} +void +ADF7023_SPI_Begin(void) +{ + assert(spi_busy == 0); + spi_busy++; + + tx_pos = 0; + rx_pos = 0; + + ADF7023_CS_ASSERT; +} +void +ADF7023_SPI_End(void) +{ + assert(spi_busy > 0); + spi_busy--; + ADF7023_CS_DEASSERT; + +#if (ADF7023_VERBOSE >= 10) + printf("ADF7023_SPI_End(): wrote \""); + hexdump(tx_rec, tx_pos); + printf("\", read \""); + hexdump(rx_rec, rx_pos); + printf("\"." NEWLINE); +#endif +} +/***************************************************************************//** + * @brief Transfers one byte of data. + * + * @param writeByte - Write data. + * @param readByte - Read data. + * + * @return None. + *******************************************************************************/ +void +ADF7023_WriteReadByte(unsigned char writeByte, + unsigned char *readByte) +{ + unsigned char data = 0; + + data = writeByte; + SPI_Read(ADF7023_SPI_BUS, 0, &data, 1); + if(readByte) { + *readByte = data; + } + + assert(tx_pos < ARRAY_SIZE(tx_rec)); + tx_rec[tx_pos] = writeByte; + tx_pos++; + + assert(rx_pos < ARRAY_SIZE(rx_rec)); + rx_rec[rx_pos] = data; + rx_pos++; +} +void +ADF7023_Wait_for_CMD_READY(void) +{ + unsigned char status; + int counter = 0; + + for(;;) { + break_loop(); + + ADF7023_GetStatus(&status); + + if((status & STATUS_SPI_READY) == 0) { + /* The SPI bus is not ready. Continue polling the status word. */ + continue; + } + + if(status & STATUS_CMD_READY) { + /* The SPI bus is ready and CMD_READY == 1. This is the state we want. */ + break; + } + + if((status & STATUS_FW_STATE) == FW_STATE_PHY_OFF) { + /* SPI is ready, but CMD_READY == 0 and the radio is in state PHY_OFF. */ + /* It seems that the ADF7023 gets stuck in this state sometimes (errata?), so transition to PHY_ON: */ + ADF7023_SetCommand_Assume_CMD_READY(CMD_PHY_ON); + } + } +} +static void +ADF7023_Init_Procedure(void) +{ + ADF7023_SPI_Begin(); + ADF7023_While(!ADF7023_MISO, (void)0); + ADF7023_SPI_End(); + ADF7023_Wait_for_CMD_READY(); +} +/***************************************************************************//** + * @brief Initializes the ADF7023. + * + * @return retVal - Result of the initialization procedure. + * Example: 0 - if initialization was successful; + * -1 - if initialization was unsuccessful. + *******************************************************************************/ +char +ADF7023_Init(void) +{ + char retVal = 0; + + ADF7023_CS_DEASSERT; + PM2 &= ~BIT(2); /* Configure ADF7023_CS as an output. */ + + ADF7023_BBRAMCurrent = ADF7023_BBRAMDefault; + SPI_Init(ADF7023_SPI_BUS, + 0, /* MSB first. */ + 1000000, /* Clock frequency. */ + 0, /* Idle state for clock is a high level; active state is a low level. */ + 1); /* Serial output data changes on transition from idle clock state to active clock state. */ + + ADF7023_Init_Procedure(); + + ADF7023_SetCommand(CMD_HW_RESET); + clock_wait(MIN(CLOCK_SECOND / 1000, 1)); + ADF7023_Init_Procedure(); + + ADF7023_SetRAM_And_Verify(0x100, 64, (unsigned char *)&ADF7023_BBRAMCurrent); + ADF7023_SetCommand(CMD_CONFIG_DEV); + + return retVal; +} +/***************************************************************************//** + * @brief Reads the status word of the ADF7023. + * + * @param status - Status word. + * + * @return None. + *******************************************************************************/ +void +ADF7023_GetStatus(unsigned char *status) +{ + ADF7023_SPI_Begin(); + ADF7023_WriteReadByte(SPI_NOP, 0); + ADF7023_WriteReadByte(SPI_NOP, status); + ADF7023_SPI_End(); + +#if (ADF7023_VERBOSE >= 7) + if(*status != status_old) { + printf("ADF7023_GetStatus: SPI_READY=%u, IRQ_STATUS=%u, CMD_READY=%u, FW_STATE=0x%02x", + (*status >> 7) & 1, + (*status >> 6) & 1, + (*status >> 5) & 1, + *status & STATUS_FW_STATE + ); + if((*status & STATUS_FW_STATE) < ARRAY_SIZE(ADF7023_state_lookup)) { + printf("=\"%s\"", ADF7023_state_lookup[*status & STATUS_FW_STATE]); + } + printf("." NEWLINE); + status_old = *status; + } +#endif +} +static void +ADF7023_SetCommand_Assume_CMD_READY(unsigned char command) +{ +#if (ADF7023_VERBOSE >= 7) + assert(ADF7023_cmd_lookup[command] != NULL); + printf("Sending command 0x%02x = \"%s\"." NEWLINE, command, ADF7023_cmd_lookup[command]); +#endif + ADF7023_SPI_Begin(); + ADF7023_WriteReadByte(command, 0); + ADF7023_SPI_End(); +} +/***************************************************************************//** + * @brief Initiates a command. + * + * @param command - Command. + * + * @return None. + *******************************************************************************/ +void +ADF7023_SetCommand(unsigned char command) +{ + ADF7023_Wait_for_CMD_READY(); + ADF7023_SetCommand_Assume_CMD_READY(command); +} +void +ADF7023_SetFwState_NoWait(unsigned char fwState) +{ + switch(fwState) { + case FW_STATE_PHY_OFF: + ADF7023_SetCommand(CMD_PHY_OFF); + break; + case FW_STATE_PHY_ON: + ADF7023_SetCommand(CMD_PHY_ON); + break; + case FW_STATE_PHY_RX: + ADF7023_SetCommand(CMD_PHY_RX); + break; + case FW_STATE_PHY_TX: + ADF7023_SetCommand(CMD_PHY_TX); + break; + default: + ADF7023_SetCommand(CMD_PHY_SLEEP); + } +} +/***************************************************************************//** + * @brief Sets a FW state and waits until the device enters in that state. + * + * @param fwState - FW state. + * + * @return None. + *******************************************************************************/ +void +ADF7023_SetFwState(unsigned char fwState) +{ + unsigned char status = 0; + ADF7023_SetFwState_NoWait(fwState); + ADF7023_While((status & STATUS_FW_STATE) != fwState, ADF7023_GetStatus(&status)); +} +/***************************************************************************//** + * @brief Reads data from the RAM. + * + * @param address - Start address. + * @param length - Number of bytes to write. + * @param data - Read buffer. + * + * @return None. + *******************************************************************************/ +void +ADF7023_GetRAM(unsigned long address, + unsigned long length, + unsigned char *data) +{ + ADF7023_SPI_Begin(); + ADF7023_WriteReadByte(SPI_MEM_RD | ((address & 0x700) >> 8), 0); + ADF7023_WriteReadByte(address & 0xFF, 0); + ADF7023_WriteReadByte(SPI_NOP, 0); + while(length--) { + ADF7023_WriteReadByte(SPI_NOP, data++); + } + ADF7023_SPI_End(); +} +/***************************************************************************//** + * @brief Writes data to RAM. + * + * @param address - Start address. + * @param length - Number of bytes to write. + * @param data - Write buffer. + * + * @return None. + *******************************************************************************/ +void +ADF7023_SetRAM(unsigned long address, + unsigned long length, + unsigned char *data) +{ + ADF7023_Wait_for_CMD_READY(); + + ADF7023_SPI_Begin(); + ADF7023_WriteReadByte(SPI_MEM_WR | ((address & 0x700) >> 8), 0); + ADF7023_WriteReadByte(address & 0xFF, 0); + while(length--) { + ADF7023_WriteReadByte(*(data++), 0); + } + ADF7023_SPI_End(); +} +void +ADF7023_SetRAM_And_Verify(unsigned long address, unsigned long length, unsigned char *data) +{ + unsigned char readback[256]; + + ADF7023_SetRAM(address, length, data); + + assert(length <= sizeof(readback)); + if(length > sizeof(readback)) { + return; + } + ADF7023_GetRAM(address, length, readback); + + if(memcmp(data, readback, length)) { + printf("ADF7023_SetRAM_And_Verify failed. Wrote:" NEWLINE); + hexdump(data, length); + printf(NEWLINE "Read:" NEWLINE); + hexdump(readback, length); + printf(NEWLINE); + } +} +unsigned char +ADF7023_Wait_for_SPI_READY(void) +{ + unsigned char status = 0; + ADF7023_While((status & STATUS_SPI_READY) == 0, ADF7023_GetStatus(&status)); + return status; /* Return the status -- why not? */ +} +void +ADF7023_PHY_ON(void) +{ + unsigned char status; + unsigned int counter = 0; + + for(;;) { + status = ADF7023_Wait_for_SPI_READY(); + + switch(status & STATUS_FW_STATE) { + default: + ADF7023_SetCommand(CMD_PHY_ON); + break; + + case FW_STATE_BUSY: + /* Wait! */ + break; + + case FW_STATE_PHY_ON: + /* This is the desired state. */ + return; + } + + break_loop(); + } +} +void +ADF7023_PHY_RX(void) +{ + unsigned char status; + unsigned int counter = 0; + + for(;;) { + status = ADF7023_Wait_for_SPI_READY(); + + switch(status & STATUS_FW_STATE) { + default: + /* Need to turn the PHY_ON. */ + ADF7023_PHY_ON(); + break; + + case FW_STATE_BUSY: + /* Wait! */ + break; + + case FW_STATE_PHY_ON: + case FW_STATE_PHY_TX: + ADF7023_While((status & STATUS_CMD_READY) == 0, ADF7023_GetStatus(&status)); + ADF7023_SetCommand(CMD_PHY_RX); + return; + + case FW_STATE_PHY_RX: + /* This is the desired state. */ + return; + } + + break_loop(); + } +} +void +ADF7023_PHY_TX(void) +{ + unsigned char status; + unsigned int counter = 0; + + for(;;) { + status = ADF7023_Wait_for_SPI_READY(); + + switch(status & STATUS_FW_STATE) { + default: + /* Need to turn the PHY_ON. */ + ADF7023_PHY_ON(); + break; + + case FW_STATE_BUSY: + /* Wait! */ + break; + + case FW_STATE_PHY_ON: + case FW_STATE_PHY_RX: + ADF7023_While((status & STATUS_CMD_READY) == 0, ADF7023_GetStatus(&status)); + ADF7023_SetCommand(CMD_PHY_TX); + return; + } + + break_loop(); + } +} +static unsigned char +ADF7023_ReadInterruptSource(void) +{ + unsigned char interruptReg; + + ADF7023_GetRAM(MCR_REG_INTERRUPT_SOURCE_0, 0x1, &interruptReg); + +#if (ADF7023_VERBOSE >= 7) + if(interruptReg != int0_old) { + printf("ADF7023_ReadInterruptSource: %u%u%u%u%u%u%u%u." NEWLINE, + (interruptReg >> 7) & 1, + (interruptReg >> 6) & 1, + (interruptReg >> 5) & 1, + (interruptReg >> 4) & 1, + (interruptReg >> 3) & 1, + (interruptReg >> 2) & 1, + (interruptReg >> 1) & 1, + (interruptReg >> 0) & 1 + ); + int0_old = interruptReg; + } +#endif + return interruptReg; +} +unsigned char +ADF7023_ReceivePacketAvailable(void) +{ + unsigned char status; + + ADF7023_GetStatus(&status); + if((status & STATUS_SPI_READY) == 0) { + return false; + } + + if((status & STATUS_FW_STATE) != FW_STATE_PHY_RX) { + ADF7023_PHY_RX(); + return false; + } + + if((status & STATUS_IRQ_STATUS) == 0) { + return false; + } + + return ADF7023_ReadInterruptSource() & BBRAM_INTERRUPT_MASK_0_INTERRUPT_CRC_CORRECT; +} +/***************************************************************************//** + * @brief Receives one packet. + * + * @param packet - Data buffer. + * @param length - Number of received bytes. + * + * @return None. + *******************************************************************************/ +void +ADF7023_ReceivePacket(unsigned char *packet, unsigned char *payload_length) +{ + unsigned char length; + unsigned char interruptReg = 0; + + ADF7023_While(!(interruptReg & BBRAM_INTERRUPT_MASK_0_INTERRUPT_CRC_CORRECT), + interruptReg = ADF7023_ReadInterruptSource()); + + interruptReg = BBRAM_INTERRUPT_MASK_0_INTERRUPT_CRC_CORRECT; + + ADF7023_SetRAM(MCR_REG_INTERRUPT_SOURCE_0, + 0x1, + &interruptReg); + + ADF7023_GetRAM(ADF7023_RX_BASE_ADR, 1, &length); + + *payload_length = length - 1 + LENGTH_OFFSET - 4; + + ADF7023_GetRAM(ADF7023_RX_BASE_ADR + 1, *payload_length, packet); + +#if (ADF7023_VERBOSE >= 5) + do { + unsigned char n; + printf("ADF7023_ReceivePacket, length=%u: ", *payload_length); + hexdump(packet, *payload_length); + printf(NEWLINE); + } while(false); +#endif +} +/***************************************************************************//** + * @brief Transmits one packet. + * + * @param packet - Data buffer. + * @param length - Number of bytes to transmit. + * + * @return None. + *******************************************************************************/ +void +ADF7023_TransmitPacket(unsigned char *packet, unsigned char length) +{ + unsigned char interruptReg = 0; + unsigned char status; + unsigned char length_plus_one; + + for(;;) { + ADF7023_GetStatus(&status); + if((status & STATUS_SPI_READY) == 0) { + continue; + } + if((status & STATUS_CMD_READY) == 0) { + continue; + } + break; + } + + length_plus_one = length + 1; + ADF7023_SetRAM_And_Verify(ADF7023_TX_BASE_ADR, 1, &length_plus_one); + ADF7023_SetRAM_And_Verify(ADF7023_TX_BASE_ADR + 1, length, packet); + +#if (ADF7023_VERBOSE >= 5) + do { + unsigned char n; + printf("ADF7023_TransmitPacket, length=%u: ", length); + hexdump(packet, length); + printf(NEWLINE); + } while(false); +#endif + + ADF7023_PHY_TX(); + + ADF7023_While(!(interruptReg & BBRAM_INTERRUPT_MASK_0_INTERRUPT_TX_EOF), + ADF7023_GetRAM(MCR_REG_INTERRUPT_SOURCE_0, 0x1, &interruptReg)); + + ADF7023_PHY_RX(); +} +/***************************************************************************//** + * @brief Sets the channel frequency. + * + * @param chFreq - Channel frequency. + * + * @return None. + *******************************************************************************/ +void +ADF7023_SetChannelFrequency(unsigned long chFreq) +{ + chFreq = (unsigned long)(((float)chFreq / 26000000) * 65535); + ADF7023_BBRAMCurrent.channelFreq0 = (chFreq & 0x0000FF) >> 0; + ADF7023_BBRAMCurrent.channelFreq1 = (chFreq & 0x00FF00) >> 8; + ADF7023_BBRAMCurrent.channelFreq2 = (chFreq & 0xFF0000) >> 16; + ADF7023_SetRAM_And_Verify(0x100, 64, (unsigned char *)&ADF7023_BBRAMCurrent); +} +/***************************************************************************//** + * @brief Sets the data rate. + * + * @param dataRate - Data rate. + * + * @return None. + *******************************************************************************/ +void +ADF7023_SetDataRate(unsigned long dataRate) +{ + dataRate = (unsigned long)(dataRate / 100); + ADF7023_BBRAMCurrent.radioCfg0 = + BBRAM_RADIO_CFG_0_DATA_RATE_7_0((dataRate & 0x00FF) >> 0); + ADF7023_BBRAMCurrent.radioCfg1 &= ~BBRAM_RADIO_CFG_1_DATA_RATE_11_8(0xF); + ADF7023_BBRAMCurrent.radioCfg1 |= + BBRAM_RADIO_CFG_1_DATA_RATE_11_8((dataRate & 0x0F00) >> 8); + ADF7023_SetRAM_And_Verify(0x100, 64, (unsigned char *)&ADF7023_BBRAMCurrent); + ADF7023_SetFwState(FW_STATE_PHY_OFF); + ADF7023_SetCommand(CMD_CONFIG_DEV); +} +/***************************************************************************//** + * @brief Sets the frequency deviation. + * + * @param freqDev - Frequency deviation. + * + * @return None. + *******************************************************************************/ +void +ADF7023_SetFrequencyDeviation(unsigned long freqDev) +{ + freqDev = (unsigned long)(freqDev / 100); + ADF7023_BBRAMCurrent.radioCfg1 &= + ~BBRAM_RADIO_CFG_1_FREQ_DEVIATION_11_8(0xF); + ADF7023_BBRAMCurrent.radioCfg1 |= + BBRAM_RADIO_CFG_1_FREQ_DEVIATION_11_8((freqDev & 0x0F00) >> 8); + ADF7023_BBRAMCurrent.radioCfg2 = + BBRAM_RADIO_CFG_2_FREQ_DEVIATION_7_0((freqDev & 0x00FF) >> 0); + ADF7023_SetRAM_And_Verify(0x100, 64, (unsigned char *)&ADF7023_BBRAMCurrent); + ADF7023_SetFwState(FW_STATE_PHY_OFF); + ADF7023_SetCommand(CMD_CONFIG_DEV); +} diff --git a/cpu/rl78/adf7023/ADF7023.h b/cpu/rl78/adf7023/ADF7023.h new file mode 100644 index 000000000..d6e0d82e1 --- /dev/null +++ b/cpu/rl78/adf7023/ADF7023.h @@ -0,0 +1,410 @@ +/* + * Copyright (c) 2014, Analog Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** + * \author Dragos Bogdan + * Contributors: Ian Martin + */ + +#ifndef __ADF7023_H__ +#define __ADF7023_H__ + +/* Status Word */ +#define STATUS_SPI_READY (0x1 << 7) +#define STATUS_IRQ_STATUS (0x1 << 6) +#define STATUS_CMD_READY (0x1 << 5) +#define STATUS_FW_STATE (0x1F << 0) + +/* FW_STATE Description */ +#define FW_STATE_INIT 0x0F +#define FW_STATE_BUSY 0x00 +#define FW_STATE_PHY_OFF 0x11 +#define FW_STATE_PHY_ON 0x12 +#define FW_STATE_PHY_RX 0x13 +#define FW_STATE_PHY_TX 0x14 +#define FW_STATE_PHY_SLEEP 0x06 +#define FW_STATE_GET_RSSI 0x05 +#define FW_STATE_IR_CAL 0x07 +#define FW_STATE_AES_DECRYPT_INIT 0x08 +#define FW_STATE_AES_DECRYPT 0x09 +#define FW_STATE_AES_ENCRYPT 0x0A + +/* SPI Memory Access Commands */ +#define SPI_MEM_WR 0x18 /* Write data to packet RAM sequentially. */ +#define SPI_MEM_RD 0x38 /* Read data from packet RAM sequentially. */ +#define SPI_MEMR_WR 0x08 /* Write data to packet RAM nonsequentially. */ +#define SPI_MEMR_RD 0x28 /* Read data from packet RAM nonsequentially. */ +#define SPI_NOP 0xFF /* No operation. */ + +/* Radio Controller Commands */ +#define CMD_SYNC 0xA2 /* This is an optional command. It is not necessary to use it during device initialization */ +#define CMD_PHY_OFF 0xB0 /* Performs a transition of the device into the PHY_OFF state. */ +#define CMD_PHY_ON 0xB1 /* Performs a transition of the device into the PHY_ON state. */ +#define CMD_PHY_RX 0xB2 /* Performs a transition of the device into the PHY_RX state. */ +#define CMD_PHY_TX 0xB5 /* Performs a transition of the device into the PHY_TX state. */ +#define CMD_PHY_SLEEP 0xBA /* Performs a transition of the device into the PHY_SLEEP state. */ +#define CMD_CONFIG_DEV 0xBB /* Configures the radio parameters based on the BBRAM values. */ +#define CMD_GET_RSSI 0xBC /* Performs an RSSI measurement. */ +#define CMD_BB_CAL 0xBE /* Performs a calibration of the IF filter. */ +#define CMD_HW_RESET 0xC8 /* Performs a full hardware reset. The device enters the PHY_SLEEP state. */ +#define CMD_RAM_LOAD_INIT 0xBF /* Prepares the program RAM for a firmware module download. */ +#define CMD_RAM_LOAD_DONE 0xC7 /* Performs a reset of the communications processor after download of a firmware module to program RAM. */ +#define CMD_IR_CAL 0xBD /* Initiates an image rejection calibration routine. */ +#define CMD_AES_ENCRYPT 0xD0 /* Performs an AES encryption on the transmit payload data stored in packet RAM. */ +#define CMD_AES_DECRYPT 0xD2 /* Performs an AES decryption on the received payload data stored in packet RAM. */ +#define CMD_AES_DECRYPT_INIT 0xD1 /* Initializes the internal variables required for AES decryption. */ +#define CMD_RS_ENCODE_INIT 0xD1 /* Initializes the internal variables required for the Reed Solomon encoding. */ +#define CMD_RS_ENCODE 0xD0 /* Calculates and appends the Reed Solomon check bytes to the transmit payload data stored in packet RAM. */ +#define CMD_RS_DECODE 0xD2 /* Performs a Reed Solomon error correction on the received payload data stored in packet RAM. */ + +/* Battery Backup Memory (BBRAM) */ +#define BBRAM_REG_INTERRUPT_MASK_0 0x100 +#define BBRAM_REG_INTERRUPT_MASK_1 0x101 +#define BBRAM_REG_NUMBER_OF_WAKEUPS_0 0x102 +#define BBRAM_REG_NUMBER_OF_WAKEUPS_1 0x103 +#define BBRAM_REG_NUMBER_OF_WAKEUPS_IRQ_THRESHOLD_0 0x104 +#define BBRAM_REG_NUMBER_OF_WAKEUPS_IRQ_THRESHOLD_1 0x105 +#define BBRAM_REG_RX_DWELL_TIME 0x106 +#define BBRAM_REG_PARMTIME_DIVIDER 0x107 +#define BBRAM_REG_SWM_RSSI_THRESH 0x108 +#define BBRAM_REG_CHANNEL_FREQ_0 0x109 +#define BBRAM_REG_CHANNEL_FREQ_1 0x10A +#define BBRAM_REG_CHANNEL_FREQ_2 0x10B +#define BBRAM_REG_RADIO_CFG_0 0x10C +#define BBRAM_REG_RADIO_CFG_1 0x10D +#define BBRAM_REG_RADIO_CFG_2 0x10E +#define BBRAM_REG_RADIO_CFG_3 0x10F +#define BBRAM_REG_RADIO_CFG_4 0x110 +#define BBRAM_REG_RADIO_CFG_5 0x111 +#define BBRAM_REG_RADIO_CFG_6 0x112 +#define BBRAM_REG_RADIO_CFG_7 0x113 +#define BBRAM_REG_RADIO_CFG_8 0x114 +#define BBRAM_REG_RADIO_CFG_9 0x115 +#define BBRAM_REG_RADIO_CFG_10 0x116 +#define BBRAM_REG_RADIO_CFG_11 0x117 +#define BBRAM_REG_IMAGE_REJECT_CAL_PHASE 0x118 +#define BBRAM_REG_IMAGE_REJECT_CAL_AMPLITUDE 0x119 +#define BBRAM_REG_MODE_CONTROL 0x11A +#define BBRAM_REG_PREAMBLE_MATCH 0x11B +#define BBRAM_REG_SYMBOL_MODE 0x11C +#define BBRAM_REG_PREAMBLE_LEN 0x11D +#define BBRAM_REG_CRC_POLY_0 0x11E +#define BBRAM_REG_CRC_POLY_1 0x11F +#define BBRAM_REG_SYNC_CONTROL 0x120 +#define BBRAM_REG_SYNC_BYTE_0 0x121 +#define BBRAM_REG_SYNC_BYTE_1 0x122 +#define BBRAM_REG_SYNC_BYTE_2 0x123 +#define BBRAM_REG_TX_BASE_ADR 0x124 +#define BBRAM_REG_RX_BASE_ADR 0x125 +#define BBRAM_REG_PACKET_LENGTH_CONTROL 0x126 +#define BBRAM_REG_PACKET_LENGTH_MAX 0x127 +#define BBRAM_REG_STATIC_REG_FIX 0x128 +#define BBRAM_REG_ADDRESS_MATCH_OFFSET 0x129 +#define BBRAM_REG_ADDRESS_LENGTH 0x12A +#define BBRAM_REG_ADDRESS_FILTERING_0 0x12B +#define BBRAM_REG_ADDRESS_FILTERING_1 0x12C +#define BBRAM_REG_ADDRESS_FILTERING_2 0x12D +#define BBRAM_REG_ADDRESS_FILTERING_3 0x12E +#define BBRAM_REG_ADDRESS_FILTERING_4 0x12F +#define BBRAM_REG_ADDRESS_FILTERING_5 0x130 +#define BBRAM_REG_ADDRESS_FILTERING_6 0x131 +#define BBRAM_REG_ADDRESS_FILTERING_7 0x132 +#define BBRAM_REG_ADDRESS_FILTERING_8 0x133 +#define BBRAM_REG_ADDRESS_FILTERING_9 0x134 +#define BBRAM_REG_ADDRESS_FILTERING_10 0x135 +#define BBRAM_REG_ADDRESS_FILTERING_11 0x136 +#define BBRAM_REG_ADDRESS_FILTERING_12 0x137 +#define BBRAM_REG_RSSI_WAIT_TIME 0x138 +#define BBRAM_REG_TESTMODES 0x139 +#define BBRAM_REG_TRANSITION_CLOCK_DIV 0x13A +#define BBRAM_REG_RESERVED_0 0x13B +#define BBRAM_REG_RESERVED_1 0x13C +#define BBRAM_REG_RESERVED_2 0x13D +#define BBRAM_REG_RX_SYNTH_LOCK_TIME 0x13E +#define BBRAM_REG_TX_SYNTH_LOCK_TIME 0x13F + +/* BBRAM_REG_INTERRUPT_MASK_0 - 0x100 */ +#define BBRAM_INTERRUPT_MASK_0_INTERRUPT_NUM_WAKEUPS (0x1 << 7) +#define BBRAM_INTERRUPT_MASK_0_INTERRUPT_SWM_RSSI_DET (0x1 << 6) +#define BBRAM_INTERRUPT_MASK_0_INTERRUPT_AES_DONE (0x1 << 5) +#define BBRAM_INTERRUPT_MASK_0_INTERRUPT_TX_EOF (0x1 << 4) +#define BBRAM_INTERRUPT_MASK_0_INTERRUPT_ADDRESS_MATCH (0x1 << 3) +#define BBRAM_INTERRUPT_MASK_0_INTERRUPT_CRC_CORRECT (0x1 << 2) +#define BBRAM_INTERRUPT_MASK_0_INTERRUPT_SYNC_DETECT (0x1 << 1) +#define BBRAM_INTERRUPT_MASK_0_INTERRUPT_PREMABLE_DETECT (0x1 << 0) + +/* BBRAM_REG_INTERRUPT_MASK_1 - 0x101*/ +#define BBRAM_INTERRUPT_MASK_1_BATTERY_ALARM (0x1 << 7) +#define BBRAM_INTERRUPT_MASK_1_CMD_READY (0x1 << 6) +#define BBRAM_INTERRUPT_MASK_1_WUC_TIMEOUT (0x1 << 4) +#define BBRAM_INTERRUPT_MASK_1_SPI_READY (0x1 << 1) +#define BBRAM_INTERRUPT_MASK_1_CMD_FINISHED (0x1 << 0) + +/* BBRAM_REG_RADIO_CFG_0 - 0x10C */ +#define BBRAM_RADIO_CFG_0_DATA_RATE_7_0(x) ((x & 0xFF) << 0) + +/* BBRAM_REG_RADIO_CFG_1 - 0x10D */ +#define BBRAM_RADIO_CFG_1_FREQ_DEVIATION_11_8(x) ((x & 0xF) << 4) +#define BBRAM_RADIO_CFG_1_DATA_RATE_11_8(x) ((x & 0xF) << 0) + +/* BBRAM_REG_RADIO_CFG_2 - 0x10E */ +#define BBRAM_RADIO_CFG_2_FREQ_DEVIATION_7_0(x) ((x & 0xFF) << 0) + +/* BBRAM_REG_RADIO_CFG_6 - 0x112 */ +#define BBRAM_RADIO_CFG_6_SYNTH_LUT_CONFIG_0(x) ((x & 0x3F) << 2) +#define BBRAM_RADIO_CFG_6_DISCRIM_PHASE(x) ((x & 0x3) << 0) + +/* BBRAM_REG_RADIO_CFG_7 - 0x113 */ +#define BBRAM_RADIO_CFG_7_AGC_LOCK_MODE(x) ((x & 0x3) << 6) +#define BBRAM_RADIO_CFG_7_SYNTH_LUT_CONTROL(x) ((x & 0x3) << 4) +#define BBRAM_RADIO_CFG_7_SYNTH_LUT_CONFIG_1(x) ((x & 0xF) << 0) + +/* BBRAM_REG_RADIO_CFG_8 - 0x114 */ +#define BBRAM_RADIO_CFG_8_PA_SINGLE_DIFF_SEL (0x1 << 7) +#define BBRAM_RADIO_CFG_8_PA_LEVEL(x) ((x & 0xF) << 3) +#define BBRAM_RADIO_CFG_8_PA_RAMP(x) ((x & 0x7) << 0) + +/* BBRAM_REG_RADIO_CFG_9 - 0x115 */ +#define BBRAM_RADIO_CFG_9_IFBW(x) ((x & 0x3) << 6) +#define BBRAM_RADIO_CFG_9_MOD_SCHEME(x) ((x & 0x7) << 3) +#define BBRAM_RADIO_CFG_9_DEMOD_SCHEME(x) ((x & 0x7) << 0) + +/* BBRAM_REG_RADIO_CFG_10 - 0x116 */ +#define BBRAM_RADIO_CFG_10_AFC_POLARITY (0x0 << 4) +#define BBRAM_RADIO_CFG_10_AFC_SCHEME(x) ((x & 0x3) << 2) +#define BBRAM_RADIO_CFG_10_AFC_LOCK_MODE(x) ((x & 0x3) << 0) + +/* BBRAM_REG_RADIO_CFG_11 - 0x117 */ +#define BBRAM_RADIO_CFG_11_AFC_KP(x) ((x & 0xF) << 4) +#define BBRAM_RADIO_CFG_11_AFC_KI(x) ((x & 0xF) << 0) + +/* BBRAM_REG_MODE_CONTROL - 0x11A */ +#define BBRAM_MODE_CONTROL_SWM_EN (0x1 << 7) +#define BBRAM_MODE_CONTROL_BB_CAL (0x1 << 6) +#define BBRAM_MODE_CONTROL_SWM_RSSI_QUAL (0x1 << 5) +#define BBRAM_MODE_CONTROL_TX_TO_RX_AUTO_TURNAROUND (0x1 << 4) +#define BBRAM_MODE_CONTROL_RX_TO_TX_AUTO_TURNAROUND (0x1 << 3) +#define BBRAM_MODE_CONTROL_CUSTOM_TRX_SYNTH_LOCK_TIME_EN (0x1 << 2) +#define BBRAM_MODE_CONTROL_EXT_LNA_EN (0x1 << 1) +#define BBRAM_MODE_CONTROL_EXT_PA_EN (0x1 << 0) + +/* BBRAM_REG_SYMBOL_MODE - 0x11C */ +#define BBRAM_SYMBOL_MODE_MANCHESTER_ENC (0x1 << 6) +#define BBRAM_SYMBOL_MODE_PROG_CRC_EN (0x1 << 5) +#define BBRAM_SYMBOL_MODE_EIGHT_TEN_ENC (0x1 << 4) +#define BBRAM_SYMBOL_MODE_DATA_WHITENING (0x1 << 3) +#define BBRAM_SYMBOL_MODE_SYMBOL_LENGTH(x) ((x & 0x7) << 0) + +/* BBRAM_REG_SYNC_CONTROL - 0x120 */ +#define BBRAM_SYNC_CONTROL_SYNC_ERROR_TOL(x) ((x & 0x3) << 6) +#define BBRAM_SYNC_CONTROL_SYNC_WORD_LENGTH(x) ((x & 0x1F) << 0) + +/* BBRAM_REG_PACKET_LENGTH_CONTROL - 0x126 */ +#define BBRAM_PACKET_LENGTH_CONTROL_DATA_BYTE (0x1 << 7) +#define BBRAM_PACKET_LENGTH_CONTROL_PACKET_LEN (0x1 << 6) +#define BBRAM_PACKET_LENGTH_CONTROL_CRC_EN (0x1 << 5) +#define BBRAM_PACKET_LENGTH_CONTROL_DATA_MODE(x) ((x & 0x3) << 3) +#define BBRAM_PACKET_LENGTH_CONTROL_LENGTH_OFFSET(x) ((x & 0x7) << 0) + +/* BBRAM_REG_TESTMODES - 0x139 */ +#define BBRAM_TESTMODES_EXT_PA_LNA_ATB_CONFIG (0x1 << 7) +#define BBRAM_TESTMODES_PER_IRQ_SELF_CLEAR (0x1 << 3) +#define BBRAM_TESTMODES_PER_ENABLE (0x1 << 2) +#define BBRAM_TESTMODES_CONTINUOUS_TX (0x1 << 1) +#define BBRAM_TESTMODES_CONTINUOUS_RX (0x1 << 0) + +/* Modem Configuration Memory (MCR) */ +#define MCR_REG_PA_LEVEL_MCR 0x307 +#define MCR_REG_WUC_CONFIG_HIGH 0x30C +#define MCR_REG_WUC_CONFIG_LOW 0x30D +#define MCR_REG_WUC_VALUE_HIGH 0x30E +#define MCR_REG_WUC_VALUE_LOW 0x30F +#define MCR_REG_WUC_FLAG_RESET 0x310 +#define MCR_REG_WUC_STATUS 0x311 +#define MCR_REG_RSSI_READBACK 0x312 +#define MCR_REG_MAX_AFC_RANGE 0x315 +#define MCR_REG_IMAGE_REJECT_CAL_CONFIG 0x319 +#define MCR_REG_CHIP_SHUTDOWN 0x322 +#define MCR_REG_POWERDOWN_RX 0x324 +#define MCR_REG_POWERDOWN_AUX 0x325 +#define MCR_REG_ADC_READBACK_HIGH 0x327 +#define MCR_REG_ADC_READBACK_LOW 0x328 +#define MCR_REG_BATTERY_MONITOR_THRESHOLD_VOLTAGE 0x32D +#define MCR_REG_EXT_UC_CLK_DIVIDE 0x32E +#define MCR_REG_AGC_CLK_DIVIDE 0x32F +#define MCR_REG_INTERRUPT_SOURCE_0 0x336 +#define MCR_REG_INTERRUPT_SOURCE_1 0x337 +#define MCR_REG_CALIBRATION_CONTROL 0x338 +#define MCR_REG_CALIBRATION_STATUS 0x339 +#define MCR_REG_RXBB_CAL_CALWRD_READBACK 0x345 +#define MCR_REG_RXBB_CAL_CALWRD_OVERWRITE 0x346 +#define MCR_REG_RCOSC_CAL_READBACK_HIGH 0x34F +#define MCR_REG_RCOSC_CAL_READBACK_LOW 0x350 +#define MCR_REG_ADC_CONFIG_LOW 0x359 +#define MCR_REG_ADC_CONFIG_HIGH 0x35A +#define MCR_REG_AGC_OOK_CONTROL 0x35B +#define MCR_REG_AGC_CONFIG 0x35C +#define MCR_REG_AGC_MODE 0x35D +#define MCR_REG_AGC_LOW_THRESHOLD 0x35E +#define MCR_REG_AGC_HIGH_THRESHOLD 0x35F +#define MCR_REG_AGC_GAIN_STATUS 0x360 +#define MCR_REG_AGC_ADC_WORD 0x361 +#define MCR_REG_FREQUENCY_ERROR_READBACK 0x372 +#define MCR_REG_VCO_BAND_OVRW_VAL 0x3CB +#define MCR_REG_VCO_AMPL_OVRW_VAL 0x3CC +#define MCR_REG_VCO_OVRW_EN 0x3CD +#define MCR_REG_VCO_CAL_CFG 0x3D0 +#define MCR_REG_OSC_CONFIG 0x3D2 +#define MCR_REG_VCO_BAND_READBACK 0x3DA +#define MCR_REG_VCO_AMPL_READBACK 0x3DB +#define MCR_REG_ANALOG_TEST_BUS 0x3F8 +#define MCR_REG_RSSI_TSTMUX_SEL 0x3F9 +#define MCR_REG_GPIO_CONFIGURE 0x3FA +#define MCR_REG_TEST_DAC_GAIN 0x3FD + +struct ADF7023_BBRAM { + unsigned char interruptMask0; /* 0x100 */ + unsigned char interruptMask1; /* 0x101 */ + unsigned char numberOfWakeups0; /* 0x102 */ + unsigned char numberOfWakeups1; /* 0x103 */ + unsigned char numberOfWakeupsIrqThreshold0; /* 0x104 */ + unsigned char numberOfWakeupsIrqThreshold1; /* 0x105 */ + unsigned char rxDwellTime; /* 0x106 */ + unsigned char parmtimeDivider; /* 0x107 */ + unsigned char swmRssiThresh; /* 0x108 */ + unsigned char channelFreq0; /* 0x109 */ + unsigned char channelFreq1; /* 0x10A */ + unsigned char channelFreq2; /* 0x10B */ + unsigned char radioCfg0; /* 0x10C */ + unsigned char radioCfg1; /* 0x10D */ + unsigned char radioCfg2; /* 0x10E */ + unsigned char radioCfg3; /* 0x10F */ + unsigned char radioCfg4; /* 0x110 */ + unsigned char radioCfg5; /* 0x111 */ + unsigned char radioCfg6; /* 0x112 */ + unsigned char radioCfg7; /* 0x113 */ + unsigned char radioCfg8; /* 0x114 */ + unsigned char radioCfg9; /* 0x115 */ + unsigned char radioCfg10; /* 0x116 */ + unsigned char radioCfg11; /* 0x117 */ + unsigned char imageRejectCalPhase; /* 0x118 */ + unsigned char imageRejectCalAmplitude; /* 0x119 */ + unsigned char modeControl; /* 0x11A */ + unsigned char preambleMatch; /* 0x11B */ + unsigned char symbolMode; /* 0x11C */ + unsigned char preambleLen; /* 0x11D */ + unsigned char crcPoly0; /* 0x11E */ + unsigned char crcPoly1; /* 0x11F */ + unsigned char syncControl; /* 0x120 */ + unsigned char syncByte0; /* 0x121 */ + unsigned char syncByte1; /* 0x122 */ + unsigned char syncByte2; /* 0x123 */ + unsigned char txBaseAdr; /* 0x124 */ + unsigned char rxBaseAdr; /* 0x125 */ + unsigned char packetLengthControl; /* 0x126 */ + unsigned char packetLengthMax; /* 0x127 */ + unsigned char staticRegFix; /* 0x128 */ + unsigned char addressMatchOffset; /* 0x129 */ + unsigned char addressLength; /* 0x12A */ + unsigned char addressFiltering0; /* 0x12B */ + unsigned char addressFiltering1; /* 0x12C */ + unsigned char addressFiltering2; /* 0x12D */ + unsigned char addressFiltering3; /* 0x12E */ + unsigned char addressFiltering4; /* 0x12F */ + unsigned char addressFiltering5; /* 0x130 */ + unsigned char addressFiltering6; /* 0x131 */ + unsigned char addressFiltering7; /* 0x132 */ + unsigned char addressFiltering8; /* 0x133 */ + unsigned char addressFiltering9; /* 0x134 */ + unsigned char addressFiltering10; /* 0x135 */ + unsigned char addressFiltering11; /* 0x136 */ + unsigned char addressFiltering12; /* 0x137 */ + unsigned char rssiWaitTime; /* 0x138 */ + unsigned char testmodes; /* 0x139 */ + unsigned char transitionClockDiv; /* 0x13A */ + unsigned char reserved0; /* 0x13B */ + unsigned char reserved1; /* 0x13C */ + unsigned char reserved2; /* 0x13D */ + unsigned char rxSynthLockTime; /* 0x13E */ + unsigned char txSynthLockTime; /* 0x13F */ +}; + +#define ADF7023_RAM_SIZE 256 + +#define ADF7023_TX_BASE_ADR 0x10 +#define ADF7023_RX_BASE_ADR ((ADF7023_TX_BASE_ADR + ADF7023_RAM_SIZE) / 2) + +/******************************************************************************/ +/************************ Functions Declarations ******************************/ +/******************************************************************************/ + +/* Initializes the ADF7023. */ +char ADF7023_Init(void); + +/* Reads the status word of the ADF7023. */ +void ADF7023_GetStatus(unsigned char *status); + +/* Initiates a command. */ +void ADF7023_SetCommand(unsigned char command); + +/* Sets a FW state and waits until the device enters in that state. */ +void ADF7023_SetFwState(unsigned char fwState); + +/* Reads data from the RAM. */ +void ADF7023_GetRAM(unsigned long address, + unsigned long length, + unsigned char *data); + +/* Writes data to RAM. */ +void ADF7023_SetRAM(unsigned long address, + unsigned long length, + unsigned char *data); + +void ADF7023_SetRAM_And_Verify(unsigned long address, unsigned long length, unsigned char *data); + +/* Indicates if an incoming packet is available. */ +unsigned char ADF7023_ReceivePacketAvailable(void); + +/* Receives one packet. */ +void ADF7023_ReceivePacket(unsigned char *packet, unsigned char *payload_length); + +/* Transmits one packet. */ +void ADF7023_TransmitPacket(unsigned char *packet, unsigned char length); + +/* Sets the channel frequency. */ +void ADF7023_SetChannelFrequency(unsigned long chFreq); + +/* Sets the data rate. */ +void ADF7023_SetDataRate(unsigned long dataRate); + +/* Sets the frequency deviation. */ +void ADF7023_SetFrequencyDeviation(unsigned long freqDev); + +#endif /* __ADF7023_H__ */ diff --git a/cpu/rl78/adf7023/ADF7023_Config.h b/cpu/rl78/adf7023/ADF7023_Config.h new file mode 100644 index 000000000..1f17bba2b --- /dev/null +++ b/cpu/rl78/adf7023/ADF7023_Config.h @@ -0,0 +1,199 @@ +/* + * Copyright (c) 2014, Analog Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** + * \author Dragos Bogdan + * Contributors: Ian Martin + */ + +#ifndef __ADF7023_CONFIG_H__ +#define __ADF7023_CONFIG_H__ + +/******************************************************************************/ +/***************************** Include Files **********************************/ +/******************************************************************************/ + +#include + +#include "ADF7023.h" + +#define LENGTH_OFFSET 4 +#define PACKET_LENGTH_MAX 240 +#define ADDRESS_MATCH_OFFSET 0 +#define ADDRESS_LENGTH 0 + +#define F_PFD 26 /* MHz */ + +#ifndef CHANNEL_FREQ_MHZ +/* #define CHANNEL_FREQ_MHZ 433 // Wrong antenna (432993072 Hz) */ +/* #define CHANNEL_FREQ_MHZ 868 // Europe */ +#define CHANNEL_FREQ_MHZ 915 /* ISM band center frequency for the Americas, Greenland and some of the eastern Pacific Islands. */ +#endif + +#define CHANNEL_FREQ (((uint32_t)CHANNEL_FREQ_MHZ << 16) / F_PFD) + +/******************************************************************************/ +/************************* Variables Declarations *****************************/ +/******************************************************************************/ +struct ADF7023_BBRAM ADF7023_BBRAMDefault = +{ + /* interruptMask0 - 0x100 */ + BBRAM_INTERRUPT_MASK_0_INTERRUPT_TX_EOF | + BBRAM_INTERRUPT_MASK_0_INTERRUPT_CRC_CORRECT, + /* interruptMask1 - 0x101 */ + 0x00, + /* numberOfWakeups0 - 0x102 */ + 0x00, + /* numberOfWakeups1 - 0x103 */ + 0x00, + /* numberOfWakeupsIrqThreshold0 - 0x104 */ + 0xFF, + /* numberOfWakeupsIrqThreshold1 - 0x105 */ + 0xFF, + /* rxDwellTime - 0x106 */ + 0x00, + /* parmtimeDivider - 0x107 */ + 0x33, + /* swmRssiThresh - 0x108 */ + 0x31, + /* channelFreq0 - 0x109 */ + (CHANNEL_FREQ >> 0) & 0xff, + /* channelFreq1 - 0x10A */ + (CHANNEL_FREQ >> 8) & 0xff, + /* channelFreq2 - 0x10B */ + (CHANNEL_FREQ >> 16) & 0xff, + /* radioCfg0 - 0x10C */ + BBRAM_RADIO_CFG_0_DATA_RATE_7_0(0xE8), /* Data rate: 100 kbps */ + /* radioCfg1 - 0x10D */ + BBRAM_RADIO_CFG_1_FREQ_DEVIATION_11_8(0x00) | /* Frequency deviation: 25 Hz */ + BBRAM_RADIO_CFG_1_DATA_RATE_11_8(0x03), /* Data rate: 100 kbps */ + /* radioCfg2 - 0x10E */ + BBRAM_RADIO_CFG_2_FREQ_DEVIATION_7_0(0xFA), /* Frequency deviation: 25 Hz */ + /* radioCfg3 - 0x10F */ + 0x31, + /* radioCfg4 - 0x110 */ + 0x16, + /* radioCfg5 - 0x111 */ + 0x00, + /* radioCfg6 - 0x112 */ + BBRAM_RADIO_CFG_6_DISCRIM_PHASE(0x2), + /* radioCfg7 - 0x113 */ + BBRAM_RADIO_CFG_7_AGC_LOCK_MODE(3), + /* radioCfg8 - 0x114 */ + BBRAM_RADIO_CFG_8_PA_SINGLE_DIFF_SEL | + BBRAM_RADIO_CFG_8_PA_LEVEL(0xF) | + BBRAM_RADIO_CFG_8_PA_RAMP(1), + /* radioCfg9 - 0x115 */ + BBRAM_RADIO_CFG_9_IFBW(2), + /* radioCfg10 - 0x116 */ + BBRAM_RADIO_CFG_10_AFC_SCHEME(2) | + BBRAM_RADIO_CFG_10_AFC_LOCK_MODE(3), + /* radioCfg11 - 0x117 */ + BBRAM_RADIO_CFG_11_AFC_KP(3) | + BBRAM_RADIO_CFG_11_AFC_KI(7), + /* imageRejectCalPhase - 0x118 */ + 0x00, + /* imageRejectCalAmplitude - 0x119 */ + 0x00, + /* modeControl - 0x11A */ + BBRAM_MODE_CONTROL_BB_CAL, + /* preambleMatch - 0x11B */ + 0x0C, + /* symbolMode - 0x11C */ + BBRAM_SYMBOL_MODE_MANCHESTER_ENC, + /* preambleLen - 0x11D */ + 0x20, + /* crcPoly0 - 0x11E */ + 0x00, + /* crcPoly1 - 0x11F */ + 0x00, + /* syncControl - 0x120 */ + BBRAM_SYNC_CONTROL_SYNC_WORD_LENGTH(8), + /* syncByte0 - 0x121 */ + 0x00, + /* syncByte1 - 0x122 */ + 0x00, + /* syncByte2 - 0x123 */ + 0x12, + /* txBaseAdr - 0x124 */ + ADF7023_TX_BASE_ADR, + /* rxBaseAdr - 0x125 */ + ADF7023_RX_BASE_ADR, + /* 0x126 (PACKET_LENGTH_CONTROL) = */ 0x20 | LENGTH_OFFSET, + /* 0x127 (PACKET_LENGTH_MAX) = */ PACKET_LENGTH_MAX, + /* staticRegFix - 0x128 */ + 0x00, + /* 0x129 (ADDRESS_MATCH_OFFSET) = */ ADDRESS_MATCH_OFFSET, + /* 0x12a (ADDRESS_LENGTH) = */ ADDRESS_LENGTH, + /* addressFiltering0 - 0x12B */ + 0x01, + /* addressFiltering1 - 0x12C */ + 0xFF, + /* addressFiltering2 - 0x12D */ + 0xFF, + /* addressFiltering3 - 0x12E */ + 0xFF, + /* addressFiltering4 - 0x12F */ + 0x02, + /* addressFiltering5 - 0x130 */ + 0x0F, + /* addressFiltering6 - 0x131 */ + 0xFF, + /* addressFiltering7 - 0x132 */ + 0x0F, + /* addressFiltering8 - 0x133 */ + 0xFF, + /* addressFiltering9 - 0x134 */ + 0x00, + /* addressFiltering10 - 0x135 */ + 0x00, + /* addressFiltering11 - 0x136 */ + 0x00, + /* addressFiltering12 - 0x137 */ + 0x00, + /* rssiWaitTime - 0x138 */ + 0x00, + /* testmodes - 0x139 */ + 0x00, + /* transitionClockDiv - 0x13A */ + 0x00, + /* reserved0 - 0x13B */ + 0x00, + /* reserved1 - 0x13C */ + 0x00, + /* reserved2 - 0x13D */ + 0x00, + /* rxSynthLockTime - 0x13E */ + 0x00, + /* txSynthLockTime - 0x13F */ + 0x00, +}; + +#endif /* __ADF7023_CONFIG_H__ */ diff --git a/cpu/rl78/adf7023/adf7023-contiki.c b/cpu/rl78/adf7023/adf7023-contiki.c new file mode 100644 index 000000000..cf9b7d068 --- /dev/null +++ b/cpu/rl78/adf7023/adf7023-contiki.c @@ -0,0 +1,160 @@ +/* + * Copyright (c) 2014, Analog Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** + * \author Ian Martin + */ + +#include /* for memcpy(). */ + +#include "radio.h" + +#include "ADF7023.h" +#include "adf7023-contiki.h" +#include "contiki.h" /* for LED definitions. */ + +#define ADF7023_MAX_PACKET_SIZE 255 + +static unsigned char tx_buf[ADF7023_MAX_PACKET_SIZE]; +static unsigned char rx_buf[ADF7023_MAX_PACKET_SIZE]; + +const struct radio_driver adf7023_driver = { + + .init = adf7023_init, + + /** Prepare the radio with a packet to be sent. */ + .prepare = adf7023_prepare, + + /** Send the packet that has previously been prepared. */ + .transmit = adf7023_transmit, + + /** Prepare & transmit a packet. */ + .send = adf7023_send, + + /** Read a received packet into a buffer. */ + .read = adf7023_read, + + /** Perform a Clear-Channel Assessment (CCA) to find out if there is + a packet in the air or not. */ + .channel_clear = adf7023_channel_clear, + + /** Check if the radio driver is currently receiving a packet */ + .receiving_packet = adf7023_receiving_packet, + + /** Check if the radio driver has just received a packet */ + .pending_packet = adf7023_pending_packet, + + /** Turn the radio on. */ + .on = adf7023_on, + + /** Turn the radio off. */ + .off = adf7023_off, +}; + +int +adf7023_init(void) +{ + ADF7023_Init(); + return 1; +} +int +adf7023_prepare(const void *payload, unsigned short payload_len) +{ + /* Prepare the radio with a packet to be sent. */ + memcpy(tx_buf, payload, (payload_len <= sizeof(tx_buf)) ? payload_len : sizeof(tx_buf)); + return 0; +} +int +adf7023_transmit(unsigned short transmit_len) +{ + /* Send the packet that has previously been prepared. */ + + RADIO_TX_LED = 1; + ADF7023_TransmitPacket(tx_buf, transmit_len); + RADIO_TX_LED = 0; + + /* TODO: Error conditions (RADIO_TX_ERR, RADIO_TX_COLLISION, RADIO_TX_NOACK)? */ + return RADIO_TX_OK; +} +int +adf7023_send(const void *payload, unsigned short payload_len) +{ + /* Prepare & transmit a packet. */ + + RADIO_TX_LED = 1; + ADF7023_TransmitPacket((void *)payload, payload_len); + RADIO_TX_LED = 0; + + /* TODO: Error conditions (RADIO_TX_ERR, RADIO_TX_COLLISION, RADIO_TX_NOACK)? */ + return RADIO_TX_OK; +} +int +adf7023_read(void *buf, unsigned short buf_len) +{ + unsigned char num_bytes; + /* Read a received packet into a buffer. */ + + RADIO_RX_LED = 1; + ADF7023_ReceivePacket(rx_buf, &num_bytes); + RADIO_RX_LED = 0; + + memcpy(buf, rx_buf, (num_bytes <= buf_len) ? num_bytes : buf_len); + return num_bytes; +} +int +adf7023_channel_clear(void) +{ + /* Perform a Clear-Channel Assessment (CCA) to find out if there is a packet in the air or not. */ + return 1; +} +int +adf7023_receiving_packet(void) +{ + /* Check if the radio driver is currently receiving a packet. */ + return 0; +} +int +adf7023_pending_packet(void) +{ + /* Check if the radio driver has just received a packet. */ + return ADF7023_ReceivePacketAvailable(); +} +int +adf7023_on(void) +{ + /* Turn the radio on. */ + return 1; +} +int +adf7023_off(void) +{ + /* Turn the radio off. */ + return 0; +} diff --git a/cpu/rl78/adf7023/adf7023-contiki.h b/cpu/rl78/adf7023/adf7023-contiki.h new file mode 100644 index 000000000..6be893824 --- /dev/null +++ b/cpu/rl78/adf7023/adf7023-contiki.h @@ -0,0 +1,67 @@ +/* + * Copyright (c) 2014, Analog Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** + * \author Ian Martin + */ + +#ifndef __ADF7023_CONTIKI_H__ +#define __ADF7023_CONTIKI_H__ + +int adf7023_init(void); + +/* Prepare the radio with a packet to be sent. */ +int adf7023_prepare(const void *payload, unsigned short payload_len); + +/* Send the packet that has previously been prepared. */ +int adf7023_transmit(unsigned short transmit_len); + +/* Prepare & transmit a packet. */ +int adf7023_send(const void *payload, unsigned short payload_len); + +/* Prepare & transmit a packet. */ +int adf7023_read(void *buf, unsigned short buf_len); + +/* Perform a Clear-Channel Assessment (CCA) to find out if there is a packet in the air or not. */ +int adf7023_channel_clear(void); + +/* Check if the radio driver is currently receiving a packet. */ +int adf7023_receiving_packet(void); + +/* Check if the radio driver has just received a packet. */ +int adf7023_pending_packet(void); + +/* Turn the radio on. */ +int adf7023_on(void); + +/* Turn the radio off. */ +int adf7023_off(void); + +#endif /* __ADF7023_CONTIKI_H__ */ diff --git a/cpu/rl78/contiki-uart.c b/cpu/rl78/contiki-uart.c new file mode 100644 index 000000000..cd96e8725 --- /dev/null +++ b/cpu/rl78/contiki-uart.c @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2014, Analog Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** + * \author Ian Martin + */ + +int (*uart0_input_handler)(unsigned char c) = 0; + +void +uart0_set_input(int (*input)(unsigned char c)) +{ + uart0_input_handler = input; +} diff --git a/cpu/rl78/contiki-uart.h b/cpu/rl78/contiki-uart.h new file mode 100644 index 000000000..8d218d799 --- /dev/null +++ b/cpu/rl78/contiki-uart.h @@ -0,0 +1,40 @@ +/* + * Copyright (c) 2014, Analog Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** + * \author Ian Martin + */ + +#ifndef CONTIKI_UART_H +#define CONTIKI_UART_H + +extern int (*uart0_input_handler)(unsigned char c); + +#endif diff --git a/cpu/rl78/crt0.S b/cpu/rl78/crt0.S new file mode 100644 index 000000000..14d4f680c --- /dev/null +++ b/cpu/rl78/crt0.S @@ -0,0 +1,331 @@ +/* Copyright (c) 2011 Red Hat Incorporated. + All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions + are met: + + Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + + Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + + The name of Red Hat Incorporated may not be used to endorse + or promote products derived from this software without specific + prior written permission. + + This software is provided by the copyright holders and contributors + "AS IS" and any express or implied warranties, including, but not + limited to, the implied warranties of merchantability and fitness for + a particular purpose are disclaimed. In no event shall Red Hat + incorporated be liable for any direct, indirect, incidental, special, + exemplary, or consequential damages (including, but not limited to, + procurement of substitute goods or services; loss of use, data, or + profits; or business interruption) however caused and on any theory of + liability, whether in contract, strict liability, or tort (including + negligence or otherwise) arising in any way out of the use of this + software, even if advised of the possibility of such damage. */ + +#include "rl78-sys.h" + + .section ".vec","a" + .short _start + + .section ".ivec","a" + .macro _iv x + .weak \x + .short \x + .endm +#define IV(x) _iv _##x##_handler +#define IVx() .short 0 + + /* To use a vector, simply define a global function named foo_handler() + for any IV(foo) listed below (i.e. tm05_handler) */ + + .global _interrupt_vector_table +_interrupt_vector_table: + IV(wdti) + IV(lvi) + IV(p0) + IV(p1) + IV(p2) + IV(p3) + IV(p4) + IV(p5) + + IV(st2) + IV(sr2) + IV(sre2) + IV(dma0) + IV(dma1) + IV(st0) + IV(sr0) + IV(tm01h) + + IV(st1) + IV(sr1) + IV(sre1) + IV(iica0) + IV(tm00) + IV(tm01) + IV(tm02) + IV(tm03) + + IV(ad) + IV(rtc) + IV(it) + IV(kr) + IV(st3) + IV(sr3) + IV(tm13) + IV(tm04) + + IV(tm05) + IV(tm06) + IV(tm07) + IV(p6) + IV(p7) + IV(p8) + IV(p9) + IV(p10) + + IV(p11) + IV(tm10) + IV(tm12) + IV(sre3) + IV(tm13h) + IV(md) + IV(iica1) + IV(fl) + + IV(dma2) + IV(dma3) + IV(tm14) + IV(tm15) + IV(tm16) + IV(tm17) + IVx() + IVx() + + IVx() + IVx() + IVx() + IVx() + IVx() + IV(brk) + /* Note: 126 vectors */ + + .section ".csstart", "ax" + .global __csstart +__csstart: + br !!_start + + .weak __rl78_option_byte_0 + .weak __rl78_option_byte_1 + .weak __rl78_option_byte_2 + .weak __rl78_option_byte_3 +__rl78_option_byte_0 = 0x6e +__rl78_option_byte_1 = 0xff +__rl78_option_byte_2 = 0xe8 +__rl78_option_byte_3 = 0x85 + + .section ".opt", "a" + .byte __rl78_option_byte_0 + .byte __rl78_option_byte_1 + .byte __rl78_option_byte_2 + .byte __rl78_option_byte_3 + + .text + + .global _start + .type _start, @function +_start: + movw sp, #__stack + + +;; block move to initialize .data + + ;; we're copying from 00:[_romdatastart] to 0F:[_datastart] + ;; and our data is not in the mirrored area. + mov es, #0 + + sel rb0 ; bank 0 + movw hl, #__datastart + movw de, #__romdatastart + sel rb1 ; bank 1 + movw ax, #__romdatacopysize + shrw ax,1 +1: + cmpw ax, #0 + bz $1f + decw ax + sel rb0 ; bank 0 + movw ax, es:[de] + movw [hl], ax + incw de + incw de + incw hl + incw hl + sel rb1 + br $1b +1: + sel rb0 ; bank 0 + + +;; block fill to .bss + + sel rb0 ; bank 0 + movw hl, #__bssstart + movw ax, #0 + sel rb1 ; bank 1 + movw ax, #__bsssize + shrw ax,1 +1: + cmpw ax, #0 + bz $1f + decw ax + sel rb0 ; bank 0 + movw [hl], ax + incw hl + incw hl + sel rb1 + br $1b +1: + sel rb0 ; bank 0 + + + +; call !!__rl78_init + +#ifdef PROFILE_SUPPORT /* Defined in gcrt0.S. */ + movw ax, # _start + push ax + movw ax, # _etext + push ax + call !!__monstartup +#endif + + movw ax, #0 + push ax /* envp */ + push ax /* argv */ + push ax /* argc */ + call !!_main +.LFE2: + + movw ax, r8 ; Save return code. + push ax + +#ifdef PROFILE_SUPPORT + call !!__mcleanup +#endif + + call !!_exit + + .size _start, . - _start + + .global _rl78_run_preinit_array + .type _rl78_run_preinit_array,@function +_rl78_run_preinit_array: + movw hl, #__preinit_array_start + movw de, #__preinit_array_end + movw bc, #-2 + br $_rl78_run_inilist + + .global _rl78_run_init_array + .type _rl78_run_init_array,@function +_rl78_run_init_array: + movw hl, #__init_array_start + movw de, #__init_array_end + movw bc, #2 + br $_rl78_run_inilist + + .global _rl78_run_fini_array + .type _rl78_run_fini_array,@function +_rl78_run_fini_array: + movw hl, #__fini_array_start + movw de, #__fini_array_end + movw bc, #-2 + /* fall through */ + + ;; HL = start of list + ;; DE = end of list + ;; BC = step direction (+2 or -2) +_rl78_run_inilist: +next_inilist: + movw ax, hl + cmpw ax, de + bz $done_inilist + movw ax, [hl] + cmpw ax, #-1 + bz $skip_inilist + cmpw ax, #0 + bz $skip_inilist + push ax + push bc + push de + push hl + call ax + pop hl + pop de + pop bc + pop ax +skip_inilist: + movw ax, hl + addw ax, bc + movw hl, ax + br $next_inilist +done_inilist: + ret + + .section .init,"ax" + + .global __rl78_init +__rl78_init: + + .section .fini,"ax" + + .global __rl78_fini +__rl78_fini: + call !!_rl78_run_fini_array + + .section .data + .global ___dso_handle + .weak ___dso_handle +___dso_handle: + .long 0 + +;;; Provide Dwarf unwinding information that will help GDB stop +;;; backtraces at the right place. This is stolen from assembly +;;; code generated by GCC with -dA. + .section .debug_frame,"",@progbits +.Lframe0: + .4byte .LECIE0-.LSCIE0 ; Length of Common Information Entry +.LSCIE0: + .4byte 0xffffffff ; CIE Identifier Tag + .byte 0x1 ; CIE Version + .ascii "\0" ; CIE Augmentation + .uleb128 0x1 ; CIE Code Alignment Factor + .sleb128 -1 ; CIE Data Alignment Factor + .byte 0xd ; CIE RA Column + .byte 0xc ; DW_CFA_def_cfa + .uleb128 0xc + .uleb128 0x3 + .byte 0x8d ; DW_CFA_offset, column 0xd + .uleb128 0x3 + .p2align 2 +.LECIE0: +.LSFDE0: + .4byte .LEFDE0-.LASFDE0 ; FDE Length +.LASFDE0: + .4byte .Lframe0 ; FDE CIE offset + .4byte _start ; FDE initial location + .4byte .LFE2 - _start ; FDE address range + .byte 0xf ; DW_CFA_def_cfa_expression + .uleb128 1 ; length of expression + .byte 0x30 ; DW_OP_lit0 + .p2align 2 +.LEFDE0: + + .text diff --git a/cpu/rl78/mtarch.h b/cpu/rl78/mtarch.h new file mode 100644 index 000000000..f0102ee4d --- /dev/null +++ b/cpu/rl78/mtarch.h @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2014, Analog Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** + * \author Ian Martin + */ + +#ifndef __MTARCH_H__ +#define __MTARCH_H__ + +#include "contiki-conf.h" + +#ifdef MTARCH_CONF_STACKSIZE +#define MTARCH_STACKSIZE MTARCH_CONF_STACKSIZE +#else +#define MTARCH_STACKSIZE 128 +#endif + +struct mtarch_thread { + unsigned char stack[MTARCH_STACKSIZE]; + unsigned char *sp; +}; + +#endif /* __MTARCH_H__ */ + diff --git a/cpu/rl78/rl78-sys.h b/cpu/rl78/rl78-sys.h new file mode 100644 index 000000000..537f2f2b9 --- /dev/null +++ b/cpu/rl78/rl78-sys.h @@ -0,0 +1,85 @@ +/* + +Copyright (c) 2011 Red Hat Incorporated. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + + Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + + The name of Red Hat Incorporated may not be used to endorse + or promote products derived from this software without specific + prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL RED HAT INCORPORATED BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ +/** + * \author DJ Delorie + */ + +r8 = 0xffef0 +r9 = 0xffef1 +r10 = 0xffef2 +r11 = 0xffef3 +r12 = 0xffef4 +r13 = 0xffef5 +r14 = 0xffef6 +r15 = 0xffef7 +r16 = 0xffee8 +r17 = 0xffee9 +r18 = 0xffeea +r19 = 0xffeeb +r20 = 0xffeec +r21 = 0xffeed +r22 = 0xffeee +r23 = 0xffeef + +#define SYS__exit SYS_exit + + .macro syscall_body number + /* The RL78 doesn't really have an "interrupt" upcode, just + BRK, which we emulate exactly. We use the STOP opcode, + which is a breakpoint in the simulator. */ + mov A, #\number + stop + ret + .endm + + .macro do_syscall name number +__\name: + .global __\name +_\name: + .weak _\name + syscall_body \number + .endm + + .macro syscall_returns name number +__\name: + .global __\name +_\name: + .weak _\name + mov r8, #\number + ret + .endm + +#define S(name) do_syscall name, SYS_##name +#define SYSCALL(number) syscall_body number +#define ERR(name) syscall_returns name, -1 +#define OK(name) syscall_returns name, 0 +#define RET(name,val) syscall_returns name, val diff --git a/cpu/rl78/rl78.h b/cpu/rl78/rl78.h new file mode 100755 index 000000000..cc496aa66 --- /dev/null +++ b/cpu/rl78/rl78.h @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2014, Analog Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** + * \author Ian Martin + */ + +#ifndef RL78_H +#define RL78_H + +#include + +#include "sfrs.h" +#include "sfrs-ext.h" + +#define f_CLK 32000000 // 32 MHz. +#define CLOCK_CHANNEL 0 +#define CLOCK_SCALER 15 // Use f_CLK / 2^15. + +typedef uint32_t clock_time_t; +typedef unsigned short uip_stats_t; + +#endif // RL78_H diff --git a/cpu/rl78/rtimer-arch.h b/cpu/rl78/rtimer-arch.h new file mode 100644 index 000000000..46a339354 --- /dev/null +++ b/cpu/rl78/rtimer-arch.h @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2014, Analog Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** + * \author Ian Martin + */ + +#ifndef __RTIMER_ARCH_H__ +#define __RTIMER_ARCH_H__ + +#include "contiki-conf.h" +#include "rl78.h" + +#define RTIMER_ARCH_SECOND (15625U) + +/* #define rtimer_arch_now() (TCR00) */ +#define rtimer_arch_now() (0) + +/* void rtimer_isr(void) __interrupt(T1_VECTOR); */ + +#endif /* __RTIMER_ARCH_H__ */ diff --git a/cpu/rl78/sfrs-ext.h b/cpu/rl78/sfrs-ext.h new file mode 100644 index 000000000..b637d7000 --- /dev/null +++ b/cpu/rl78/sfrs-ext.h @@ -0,0 +1,5290 @@ +/* + * Copyright (c) 2014, Analog Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** + * \author Ian Martin + */ + +#ifndef SFRS_EXT_H +#define SFRS_EXT_H + +#define ADM2 (*(volatile unsigned char *)0xF0010) +#define ADUL (*(volatile unsigned char *)0xF0011) +#define ADLL (*(volatile unsigned char *)0xF0012) +#define ADTES (*(volatile unsigned char *)0xF0013) +#define PU0 (*(volatile unsigned char *)0xF0030) +#define PU1 (*(volatile unsigned char *)0xF0031) +#define PU3 (*(volatile unsigned char *)0xF0033) +#define PU4 (*(volatile unsigned char *)0xF0034) +#define PU5 (*(volatile unsigned char *)0xF0035) +#define PU6 (*(volatile unsigned char *)0xF0036) +#define PU7 (*(volatile unsigned char *)0xF0037) +#define PU8 (*(volatile unsigned char *)0xF0038) +#define PU9 (*(volatile unsigned char *)0xF0039) +#define PU10 (*(volatile unsigned char *)0xF003A) +#define PU11 (*(volatile unsigned char *)0xF003B) +#define PU12 (*(volatile unsigned char *)0xF003C) +#define PU14 (*(volatile unsigned char *)0xF003E) +#define PIM0 (*(volatile unsigned char *)0xF0040) +#define PIM1 (*(volatile unsigned char *)0xF0041) +#define PIM4 (*(volatile unsigned char *)0xF0044) +#define PIM5 (*(volatile unsigned char *)0xF0045) +#define PIM8 (*(volatile unsigned char *)0xF0048) +#define PIM14 (*(volatile unsigned char *)0xF004E) +#define POM0 (*(volatile unsigned char *)0xF0050) +#define POM1 (*(volatile unsigned char *)0xF0051) +#define POM4 (*(volatile unsigned char *)0xF0054) +#define POM5 (*(volatile unsigned char *)0xF0055) +#define POM7 (*(volatile unsigned char *)0xF0057) +#define POM8 (*(volatile unsigned char *)0xF0058) +#define POM9 (*(volatile unsigned char *)0xF0059) +#define POM14 (*(volatile unsigned char *)0xF005E) +#define PMC0 (*(volatile unsigned char *)0xF0060) +#define PMC3 (*(volatile unsigned char *)0xF0063) +#define PMC10 (*(volatile unsigned char *)0xF006A) +#define PMC11 (*(volatile unsigned char *)0xF006B) +#define PMC12 (*(volatile unsigned char *)0xF006C) +#define PMC14 (*(volatile unsigned char *)0xF006E) +#define NFEN0 (*(volatile unsigned char *)0xF0070) +#define NFEN1 (*(volatile unsigned char *)0xF0071) +#define NFEN2 (*(volatile unsigned char *)0xF0072) +#define ISC (*(volatile unsigned char *)0xF0073) +#define TIS0 (*(volatile unsigned char *)0xF0074) +#define ADPC (*(volatile unsigned char *)0xF0076) +#define PIOR (*(volatile unsigned char *)0xF0077) +#define IAWCTL (*(volatile unsigned char *)0xF0078) +#define GDIDIS (*(volatile unsigned char *)0xF007D) +#define PRDSEL (*(volatile unsigned short *)0xF007E) +#define TOOLEN (*(volatile unsigned char *)0xF0080) +#define BPAL0 (*(volatile unsigned char *)0xF0081) +#define BPAH0 (*(volatile unsigned char *)0xF0082) +#define BPAS0 (*(volatile unsigned char *)0xF0083) +#define BACDVL0 (*(volatile unsigned char *)0xF0084) +#define BACDVH0 (*(volatile unsigned char *)0xF0085) +#define BACDML0 (*(volatile unsigned char *)0xF0086) +#define BACDMH0 (*(volatile unsigned char *)0xF0087) +#define MONMOD (*(volatile unsigned char *)0xF0088) +#define DFLCTL (*(volatile unsigned char *)0xF0090) +#define HIOTRM (*(volatile unsigned char *)0xF00A0) +#define BECTL (*(volatile unsigned char *)0xF00A1) +#define HOCODIV (*(volatile unsigned char *)0xF00A8) +#define TEMPCAL0 (*(volatile unsigned char *)0xF00AC) +#define TEMPCAL1 (*(volatile unsigned char *)0xF00AD) +#define TEMPCAL2 (*(volatile unsigned char *)0xF00AE) +#define TEMPCAL3 (*(volatile unsigned char *)0xF00AF) +#define FLSEC (*(volatile unsigned short *)0xF00B0) +#define FLFSWS (*(volatile unsigned short *)0xF00B2) +#define FLFSWE (*(volatile unsigned short *)0xF00B4) +#define FSSET (*(volatile unsigned char *)0xF00B6) +#define FSSE (*(volatile unsigned char *)0xF00B7) +#define FLFADL (*(volatile unsigned short *)0xF00B8) +#define FLFADH (*(volatile unsigned char *)0xF00BA) +#define PFCMD (*(volatile unsigned char *)0xF00C0) +#define PFS (*(volatile unsigned char *)0xF00C1) +#define FLRL (*(volatile unsigned short *)0xF00C2) +#define FLRH (*(volatile unsigned short *)0xF00C4) +#define FLWE (*(volatile unsigned char *)0xF00C6) +#define FLRE (*(volatile unsigned char *)0xF00C7) +#define FLTMS (*(volatile unsigned short *)0xF00C8) +#define DFLMC (*(volatile unsigned short *)0xF00CA) +#define FLMCL (*(volatile unsigned short *)0xF00CC) +#define FLMCH (*(volatile unsigned char *)0xF00CE) +#define FSCTL (*(volatile unsigned char *)0xF00CF) +#define ICEADR (*(volatile unsigned short *)0xF00D0) +#define ICEDAT (*(volatile unsigned short *)0xF00D2) +#define MDCL (*(volatile unsigned short *)0xF00E0) +#define MDCH (*(volatile unsigned short *)0xF00E2) +#define MDUC (*(volatile unsigned char *)0xF00E8) +#define PER0 (*(volatile unsigned char *)0xF00F0) +#define OSMC (*(volatile unsigned char *)0xF00F3) +#define RMC (*(volatile unsigned char *)0xF00F4) +#define RPECTL (*(volatile unsigned char *)0xF00F5) +#define BCDADJ (*(volatile unsigned char *)0xF00FE) +#define VECTCTRL (*(volatile unsigned char *)0xF00FF) +#define SSR00 (*(volatile unsigned short *)0xF0100) +#define SSR00L (*(volatile unsigned char *)0xF0100) +#define SSR01 (*(volatile unsigned short *)0xF0102) +#define SSR01L (*(volatile unsigned char *)0xF0102) +#define SSR02 (*(volatile unsigned short *)0xF0104) +#define SSR02L (*(volatile unsigned char *)0xF0104) +#define SSR03 (*(volatile unsigned short *)0xF0106) +#define SSR03L (*(volatile unsigned char *)0xF0106) +#define SIR00 (*(volatile unsigned short *)0xF0108) +#define SIR00L (*(volatile unsigned char *)0xF0108) +#define SIR01 (*(volatile unsigned short *)0xF010A) +#define SIR01L (*(volatile unsigned char *)0xF010A) +#define SIR02 (*(volatile unsigned short *)0xF010C) +#define SIR02L (*(volatile unsigned char *)0xF010C) +#define SIR03 (*(volatile unsigned short *)0xF010E) +#define SIR03L (*(volatile unsigned char *)0xF010E) +#define SMR00 (*(volatile unsigned short *)0xF0110) +#define SMR01 (*(volatile unsigned short *)0xF0112) +#define SMR02 (*(volatile unsigned short *)0xF0114) +#define SMR03 (*(volatile unsigned short *)0xF0116) +#define SCR00 (*(volatile unsigned short *)0xF0118) +#define SCR01 (*(volatile unsigned short *)0xF011A) +#define SCR02 (*(volatile unsigned short *)0xF011C) +#define SCR03 (*(volatile unsigned short *)0xF011E) +#define SE0 (*(volatile unsigned short *)0xF0120) +#define SE0L (*(volatile unsigned char *)0xF0120) +#define SS0 (*(volatile unsigned short *)0xF0122) +#define SS0L (*(volatile unsigned char *)0xF0122) +#define ST0 (*(volatile unsigned short *)0xF0124) +#define ST0L (*(volatile unsigned char *)0xF0124) +#define SPS0 (*(volatile unsigned short *)0xF0126) +#define SPS0L (*(volatile unsigned char *)0xF0126) +#define SO0 (*(volatile unsigned short *)0xF0128) +#define SOE0 (*(volatile unsigned short *)0xF012A) +#define SOE0L (*(volatile unsigned char *)0xF012A) +#define EDR00 (*(volatile unsigned short *)0xF012C) +#define EDR00L (*(volatile unsigned char *)0xF012C) +#define EDR01 (*(volatile unsigned short *)0xF012E) +#define EDR01L (*(volatile unsigned char *)0xF012E) +#define EDR02 (*(volatile unsigned short *)0xF0130) +#define EDR02L (*(volatile unsigned char *)0xF0130) +#define EDR03 (*(volatile unsigned short *)0xF0132) +#define EDR03L (*(volatile unsigned char *)0xF0132) +#define SOL0 (*(volatile unsigned short *)0xF0134) +#define SOL0L (*(volatile unsigned char *)0xF0134) +#define SSC0 (*(volatile unsigned short *)0xF0138) +#define SSC0L (*(volatile unsigned char *)0xF0138) +#define SSR10 (*(volatile unsigned short *)0xF0140) +#define SSR10L (*(volatile unsigned char *)0xF0140) +#define SSR11 (*(volatile unsigned short *)0xF0142) +#define SSR11L (*(volatile unsigned char *)0xF0142) +#define SSR12 (*(volatile unsigned short *)0xF0144) +#define SSR12L (*(volatile unsigned char *)0xF0144) +#define SSR13 (*(volatile unsigned short *)0xF0146) +#define SSR13L (*(volatile unsigned char *)0xF0146) +#define SIR10 (*(volatile unsigned short *)0xF0148) +#define SIR10L (*(volatile unsigned char *)0xF0148) +#define SIR11 (*(volatile unsigned short *)0xF014A) +#define SIR11L (*(volatile unsigned char *)0xF014A) +#define SIR12 (*(volatile unsigned short *)0xF014C) +#define SIR12L (*(volatile unsigned char *)0xF014C) +#define SIR13 (*(volatile unsigned short *)0xF014E) +#define SIR13L (*(volatile unsigned char *)0xF014E) +#define SMR10 (*(volatile unsigned short *)0xF0150) +#define SMR11 (*(volatile unsigned short *)0xF0152) +#define SMR12 (*(volatile unsigned short *)0xF0154) +#define SMR13 (*(volatile unsigned short *)0xF0156) +#define SCR10 (*(volatile unsigned short *)0xF0158) +#define SCR11 (*(volatile unsigned short *)0xF015A) +#define SCR12 (*(volatile unsigned short *)0xF015C) +#define SCR13 (*(volatile unsigned short *)0xF015E) +#define SE1 (*(volatile unsigned short *)0xF0160) +#define SE1L (*(volatile unsigned char *)0xF0160) +#define SS1 (*(volatile unsigned short *)0xF0162) +#define SS1L (*(volatile unsigned char *)0xF0162) +#define ST1 (*(volatile unsigned short *)0xF0164) +#define ST1L (*(volatile unsigned char *)0xF0164) +#define SPS1 (*(volatile unsigned short *)0xF0166) +#define SPS1L (*(volatile unsigned char *)0xF0166) +#define SO1 (*(volatile unsigned short *)0xF0168) +#define SOE1 (*(volatile unsigned short *)0xF016A) +#define SOE1L (*(volatile unsigned char *)0xF016A) +#define EDR10 (*(volatile unsigned short *)0xF016C) +#define EDR10L (*(volatile unsigned char *)0xF016C) +#define EDR11 (*(volatile unsigned short *)0xF016E) +#define EDR11L (*(volatile unsigned char *)0xF016E) +#define EDR12 (*(volatile unsigned short *)0xF0170) +#define EDR12L (*(volatile unsigned char *)0xF0170) +#define EDR13 (*(volatile unsigned short *)0xF0172) +#define EDR13L (*(volatile unsigned char *)0xF0172) +#define SOL1 (*(volatile unsigned short *)0xF0174) +#define SOL1L (*(volatile unsigned char *)0xF0174) +#define SSC1 (*(volatile unsigned short *)0xF0178) +#define SSC1L (*(volatile unsigned char *)0xF0178) +#define TCR00 (*(volatile unsigned short *)0xF0180) +#define TCR01 (*(volatile unsigned short *)0xF0182) +#define TCR02 (*(volatile unsigned short *)0xF0184) +#define TCR03 (*(volatile unsigned short *)0xF0186) +#define TCR04 (*(volatile unsigned short *)0xF0188) +#define TCR05 (*(volatile unsigned short *)0xF018A) +#define TCR06 (*(volatile unsigned short *)0xF018C) +#define TCR07 (*(volatile unsigned short *)0xF018E) +#define TMR00 (*(volatile unsigned short *)0xF0190) +#define TMR01 (*(volatile unsigned short *)0xF0192) +#define TMR02 (*(volatile unsigned short *)0xF0194) +#define TMR03 (*(volatile unsigned short *)0xF0196) +#define TMR04 (*(volatile unsigned short *)0xF0198) +#define TMR05 (*(volatile unsigned short *)0xF019A) +#define TMR06 (*(volatile unsigned short *)0xF019C) +#define TMR07 (*(volatile unsigned short *)0xF019E) +#define TSR00 (*(volatile unsigned short *)0xF01A0) +#define TSR00L (*(volatile unsigned char *)0xF01A0) +#define TSR01 (*(volatile unsigned short *)0xF01A2) +#define TSR01L (*(volatile unsigned char *)0xF01A2) +#define TSR02 (*(volatile unsigned short *)0xF01A4) +#define TSR02L (*(volatile unsigned char *)0xF01A4) +#define TSR03 (*(volatile unsigned short *)0xF01A6) +#define TSR03L (*(volatile unsigned char *)0xF01A6) +#define TSR04 (*(volatile unsigned short *)0xF01A8) +#define TSR04L (*(volatile unsigned char *)0xF01A8) +#define TSR05 (*(volatile unsigned short *)0xF01AA) +#define TSR05L (*(volatile unsigned char *)0xF01AA) +#define TSR06 (*(volatile unsigned short *)0xF01AC) +#define TSR06L (*(volatile unsigned char *)0xF01AC) +#define TSR07 (*(volatile unsigned short *)0xF01AE) +#define TSR07L (*(volatile unsigned char *)0xF01AE) +#define TE0 (*(volatile unsigned short *)0xF01B0) +#define TE0L (*(volatile unsigned char *)0xF01B0) +#define TS0 (*(volatile unsigned short *)0xF01B2) +#define TS0L (*(volatile unsigned char *)0xF01B2) +#define TT0 (*(volatile unsigned short *)0xF01B4) +#define TT0L (*(volatile unsigned char *)0xF01B4) +#define TPS0 (*(volatile unsigned short *)0xF01B6) +#define TO0 (*(volatile unsigned short *)0xF01B8) +#define TO0L (*(volatile unsigned char *)0xF01B8) +#define TOE0 (*(volatile unsigned short *)0xF01BA) +#define TOE0L (*(volatile unsigned char *)0xF01BA) +#define TOL0 (*(volatile unsigned short *)0xF01BC) +#define TOL0L (*(volatile unsigned char *)0xF01BC) +#define TOM0 (*(volatile unsigned short *)0xF01BE) +#define TOM0L (*(volatile unsigned char *)0xF01BE) +#define TCR10 (*(volatile unsigned short *)0xF01C0) +#define TCR11 (*(volatile unsigned short *)0xF01C2) +#define TCR12 (*(volatile unsigned short *)0xF01C4) +#define TCR13 (*(volatile unsigned short *)0xF01C6) +#define TCR14 (*(volatile unsigned short *)0xF01C8) +#define TCR15 (*(volatile unsigned short *)0xF01CA) +#define TCR16 (*(volatile unsigned short *)0xF01CC) +#define TCR17 (*(volatile unsigned short *)0xF01CE) +#define TMR10 (*(volatile unsigned short *)0xF01D0) +#define TMR11 (*(volatile unsigned short *)0xF01D2) +#define TMR12 (*(volatile unsigned short *)0xF01D4) +#define TMR13 (*(volatile unsigned short *)0xF01D6) +#define TMR14 (*(volatile unsigned short *)0xF01D8) +#define TMR15 (*(volatile unsigned short *)0xF01DA) +#define TMR16 (*(volatile unsigned short *)0xF01DC) +#define TMR17 (*(volatile unsigned short *)0xF01DE) +#define TSR10 (*(volatile unsigned short *)0xF01E0) +#define TSR10L (*(volatile unsigned char *)0xF01E0) +#define TSR11 (*(volatile unsigned short *)0xF01E2) +#define TSR11L (*(volatile unsigned char *)0xF01E2) +#define TSR12 (*(volatile unsigned short *)0xF01E4) +#define TSR12L (*(volatile unsigned char *)0xF01E4) +#define TSR13 (*(volatile unsigned short *)0xF01E6) +#define TSR13L (*(volatile unsigned char *)0xF01E6) +#define TSR14 (*(volatile unsigned short *)0xF01E8) +#define TSR14L (*(volatile unsigned char *)0xF01E8) +#define TSR15 (*(volatile unsigned short *)0xF01EA) +#define TSR15L (*(volatile unsigned char *)0xF01EA) +#define TSR16 (*(volatile unsigned short *)0xF01EC) +#define TSR16L (*(volatile unsigned char *)0xF01EC) +#define TSR17 (*(volatile unsigned short *)0xF01EE) +#define TSR17L (*(volatile unsigned char *)0xF01EE) +#define TE1 (*(volatile unsigned short *)0xF01F0) +#define TE1L (*(volatile unsigned char *)0xF01F0) +#define TS1 (*(volatile unsigned short *)0xF01F2) +#define TS1L (*(volatile unsigned char *)0xF01F2) +#define TT1 (*(volatile unsigned short *)0xF01F4) +#define TT1L (*(volatile unsigned char *)0xF01F4) +#define TPS1 (*(volatile unsigned short *)0xF01F6) +#define TO1 (*(volatile unsigned short *)0xF01F8) +#define TO1L (*(volatile unsigned char *)0xF01F8) +#define TOE1 (*(volatile unsigned short *)0xF01FA) +#define TOE1L (*(volatile unsigned char *)0xF01FA) +#define TOL1 (*(volatile unsigned short *)0xF01FC) +#define TOL1L (*(volatile unsigned char *)0xF01FC) +#define TOM1 (*(volatile unsigned short *)0xF01FE) +#define TOM1L (*(volatile unsigned char *)0xF01FE) +#define DSA2 (*(volatile unsigned char *)0xF0200) +#define DSA3 (*(volatile unsigned char *)0xF0201) +#define DRA2 (*(volatile unsigned short *)0xF0202) +#define DRA2L (*(volatile unsigned char *)0xF0202) +#define DRA2H (*(volatile unsigned char *)0xF0203) +#define DRA3 (*(volatile unsigned short *)0xF0204) +#define DRA3L (*(volatile unsigned char *)0xF0204) +#define DRA3H (*(volatile unsigned char *)0xF0205) +#define DBC2 (*(volatile unsigned short *)0xF0206) +#define DBC2L (*(volatile unsigned char *)0xF0206) +#define DBC2H (*(volatile unsigned char *)0xF0207) +#define DBC3 (*(volatile unsigned short *)0xF0208) +#define DBC3L (*(volatile unsigned char *)0xF0208) +#define DBC3H (*(volatile unsigned char *)0xF0209) +#define DMC2 (*(volatile unsigned char *)0xF020A) +#define DMC3 (*(volatile unsigned char *)0xF020B) +#define DRC2 (*(volatile unsigned char *)0xF020C) +#define DRC3 (*(volatile unsigned char *)0xF020D) +#define DWAITALL (*(volatile unsigned char *)0xF020F) +#define IICCTL00 (*(volatile unsigned char *)0xF0230) +#define IICCTL01 (*(volatile unsigned char *)0xF0231) +#define IICWL0 (*(volatile unsigned char *)0xF0232) +#define IICWH0 (*(volatile unsigned char *)0xF0233) +#define SVA0 (*(volatile unsigned char *)0xF0234) +#define IICSE0 (*(volatile unsigned char *)0xF0235) +#define IICCTL10 (*(volatile unsigned char *)0xF0238) +#define IICCTL11 (*(volatile unsigned char *)0xF0239) +#define IICWL1 (*(volatile unsigned char *)0xF023A) +#define IICWH1 (*(volatile unsigned char *)0xF023B) +#define SVA1 (*(volatile unsigned char *)0xF023C) +#define IICSE1 (*(volatile unsigned char *)0xF023D) +#define CRC0CTL (*(volatile unsigned char *)0xF02F0) +#define PGCRCL (*(volatile unsigned short *)0xF02F2) +#define CRCD (*(volatile unsigned short *)0xF02FA) + + +struct ADM2struct { + unsigned char adtyp : 1; + unsigned char : 1; + unsigned char awc : 1; + unsigned char adrck : 1; +}; + +struct ADULstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct ADLLstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct ADTESstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PU0struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PU1struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PU3struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PU4struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PU5struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PU6struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PU7struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PU8struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PU9struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PU10struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PU11struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PU12struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PU14struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PIM0struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PIM1struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PIM4struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PIM5struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PIM8struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PIM14struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct POM0struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct POM1struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct POM4struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct POM5struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct POM7struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct POM8struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct POM9struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct POM14struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PMC0struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PMC3struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PMC10struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PMC11struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PMC12struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PMC14struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct NFEN0struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct NFEN1struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct NFEN2struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct ISCstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TIS0struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct ADPCstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PIORstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct IAWCTLstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct GDIDISstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PRDSELstruct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TOOLENstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct BPAL0struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct BPAH0struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct BPAS0struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct BACDVL0struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct BACDVH0struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct BACDML0struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct BACDMH0struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct MONMODstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct DFLCTLstruct { + unsigned char dflen : 1; +}; + +struct HIOTRMstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct BECTLstruct { + unsigned char brsam : 1; +}; + +struct HOCODIVstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TEMPCAL0struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TEMPCAL1struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TEMPCAL2struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TEMPCAL3struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct FLSECstruct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct FLFSWSstruct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct FLFSWEstruct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct FSSETstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct FSSEstruct { + unsigned char : 1; + unsigned char esqst : 1; +}; + +struct FLFADLstruct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct FLFADHstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PFCMDstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PFSstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct FLRLstruct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct FLRHstruct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct FLWEstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct FLREstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct FLTMSstruct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct DFLMCstruct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct FLMCLstruct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct FLMCHstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct FSCTLstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct ICEADRstruct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct ICEDATstruct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct MDCLstruct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct MDCHstruct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct MDUCstruct { + unsigned char divst : 1; + unsigned char macsf : 1; + unsigned char macof : 1; + unsigned char mdsm : 1; + unsigned char : 1; + unsigned char macmode : 1; + unsigned char divmode : 1; +}; + +struct PER0struct { + unsigned char tau0en : 1; + unsigned char tau1en : 1; + unsigned char sau0en : 1; + unsigned char sau1en : 1; + unsigned char iica0en : 1; + unsigned char adcen : 1; + unsigned char iica1en : 1; + unsigned char rtcen : 1; +}; + +struct OSMCstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct RMCstruct { + unsigned char paenb : 1; + unsigned char : 1; + unsigned char wdvol : 1; +}; + +struct RPECTLstruct { + unsigned char rpef : 1; + unsigned char : 1; + unsigned char rperdis : 1; +}; + +struct BCDADJstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct VECTCTRLstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SSR00struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SSR00Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SSR01struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SSR01Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SSR02struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SSR02Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SSR03struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SSR03Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SIR00struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SIR00Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SIR01struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SIR01Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SIR02struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SIR02Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SIR03struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SIR03Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SMR00struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SMR01struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SMR02struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SMR03struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SCR00struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SCR01struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SCR02struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SCR03struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SE0struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SE0Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SS0struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SS0Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct ST0struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct ST0Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SPS0struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SPS0Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SO0struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SOE0struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SOE0Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct EDR00struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct EDR00Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct EDR01struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct EDR01Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct EDR02struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct EDR02Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct EDR03struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct EDR03Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SOL0struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SOL0Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SSC0struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SSC0Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SSR10struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SSR10Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SSR11struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SSR11Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SSR12struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SSR12Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SSR13struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SSR13Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SIR10struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SIR10Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SIR11struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SIR11Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SIR12struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SIR12Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SIR13struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SIR13Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SMR10struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SMR11struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SMR12struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SMR13struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SCR10struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SCR11struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SCR12struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SCR13struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SE1struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SE1Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SS1struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SS1Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct ST1struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct ST1Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SPS1struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SPS1Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SO1struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SOE1struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SOE1Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct EDR10struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct EDR10Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct EDR11struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct EDR11Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct EDR12struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct EDR12Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct EDR13struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct EDR13Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SOL1struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SOL1Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SSC1struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SSC1Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TCR00struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TCR01struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TCR02struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TCR03struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TCR04struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TCR05struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TCR06struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TCR07struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TMR00struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TMR01struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TMR02struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TMR03struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TMR04struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TMR05struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TMR06struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TMR07struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TSR00struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TSR00Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TSR01struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TSR01Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TSR02struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TSR02Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TSR03struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TSR03Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TSR04struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TSR04Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TSR05struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TSR05Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TSR06struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TSR06Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TSR07struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TSR07Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TE0struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TE0Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TS0struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TS0Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TT0struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TT0Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TPS0struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TO0struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TO0Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TOE0struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TOE0Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TOL0struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TOL0Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TOM0struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TOM0Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TCR10struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TCR11struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TCR12struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TCR13struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TCR14struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TCR15struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TCR16struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TCR17struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TMR10struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TMR11struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TMR12struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TMR13struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TMR14struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TMR15struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TMR16struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TMR17struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TSR10struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TSR10Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TSR11struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TSR11Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TSR12struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TSR12Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TSR13struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TSR13Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TSR14struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TSR14Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TSR15struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TSR15Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TSR16struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TSR16Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TSR17struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TSR17Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TE1struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TE1Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TS1struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TS1Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TT1struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TT1Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TPS1struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TO1struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TO1Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TOE1struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TOE1Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TOL1struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TOL1Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TOM1struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TOM1Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct DSA2struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct DSA3struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct DRA2struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct DRA2Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct DRA2Hstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct DRA3struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct DRA3Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct DRA3Hstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct DBC2struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct DBC2Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct DBC2Hstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct DBC3struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct DBC3Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct DBC3Hstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct DMC2struct { + unsigned char : 1; + unsigned char dwait2 : 1; + unsigned char ds2 : 1; + unsigned char drs2 : 1; + unsigned char stg2 : 1; +}; + +struct DMC3struct { + unsigned char : 1; + unsigned char dwait3 : 1; + unsigned char ds3 : 1; + unsigned char drs3 : 1; + unsigned char stg3 : 1; +}; + +struct DRC2struct { + unsigned char dst2 : 1; + unsigned char : 1; + unsigned char den2 : 1; +}; + +struct DRC3struct { + unsigned char dst3 : 1; + unsigned char : 1; + unsigned char den3 : 1; +}; + +struct DWAITALLstruct { + unsigned char dwaitall0 : 1; + unsigned char : 1; + unsigned char prvari : 1; +}; + +struct IICCTL00struct { + unsigned char spt0 : 1; + unsigned char stt0 : 1; + unsigned char acke0 : 1; + unsigned char wtim0 : 1; + unsigned char spie0 : 1; + unsigned char wrel0 : 1; + unsigned char lrel0 : 1; + unsigned char iice0 : 1; +}; + +struct IICCTL01struct { + unsigned char prs0 : 1; + unsigned char : 1; + unsigned char dfc0 : 1; + unsigned char smc0 : 1; + unsigned char dad0 : 1; + unsigned char cld0 : 1; + unsigned char : 1; + unsigned char wup0 : 1; +}; + +struct IICWL0struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct IICWH0struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SVA0struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct IICSE0struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct IICCTL10struct { + unsigned char spt1 : 1; + unsigned char stt1 : 1; + unsigned char acke1 : 1; + unsigned char wtim1 : 1; + unsigned char spie1 : 1; + unsigned char wrel1 : 1; + unsigned char lrel1 : 1; + unsigned char iice1 : 1; +}; + +struct IICCTL11struct { + unsigned char prs1 : 1; + unsigned char : 1; + unsigned char dfc1 : 1; + unsigned char smc1 : 1; + unsigned char dad1 : 1; + unsigned char cld1 : 1; + unsigned char : 1; + unsigned char wup1 : 1; +}; + +struct IICWL1struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct IICWH1struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SVA1struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct IICSE1struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct CRC0CTLstruct { + unsigned char : 1; + unsigned char crc0en : 1; +}; + +struct PGCRCLstruct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct CRCDstruct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + + + +#define ADM2bits (*(volatile struct ADM2struct *)0xF0010) +#define ADULbits (*(volatile struct ADULstruct *)0xF0011) +#define ADLLbits (*(volatile struct ADLLstruct *)0xF0012) +#define ADTESbits (*(volatile struct ADTESstruct *)0xF0013) +#define PU0bits (*(volatile struct PU0struct *)0xF0030) +#define PU1bits (*(volatile struct PU1struct *)0xF0031) +#define PU3bits (*(volatile struct PU3struct *)0xF0033) +#define PU4bits (*(volatile struct PU4struct *)0xF0034) +#define PU5bits (*(volatile struct PU5struct *)0xF0035) +#define PU6bits (*(volatile struct PU6struct *)0xF0036) +#define PU7bits (*(volatile struct PU7struct *)0xF0037) +#define PU8bits (*(volatile struct PU8struct *)0xF0038) +#define PU9bits (*(volatile struct PU9struct *)0xF0039) +#define PU10bits (*(volatile struct PU10struct *)0xF003A) +#define PU11bits (*(volatile struct PU11struct *)0xF003B) +#define PU12bits (*(volatile struct PU12struct *)0xF003C) +#define PU14bits (*(volatile struct PU14struct *)0xF003E) +#define PIM0bits (*(volatile struct PIM0struct *)0xF0040) +#define PIM1bits (*(volatile struct PIM1struct *)0xF0041) +#define PIM4bits (*(volatile struct PIM4struct *)0xF0044) +#define PIM5bits (*(volatile struct PIM5struct *)0xF0045) +#define PIM8bits (*(volatile struct PIM8struct *)0xF0048) +#define PIM14bits (*(volatile struct PIM14struct *)0xF004E) +#define POM0bits (*(volatile struct POM0struct *)0xF0050) +#define POM1bits (*(volatile struct POM1struct *)0xF0051) +#define POM4bits (*(volatile struct POM4struct *)0xF0054) +#define POM5bits (*(volatile struct POM5struct *)0xF0055) +#define POM7bits (*(volatile struct POM7struct *)0xF0057) +#define POM8bits (*(volatile struct POM8struct *)0xF0058) +#define POM9bits (*(volatile struct POM9struct *)0xF0059) +#define POM14bits (*(volatile struct POM14struct *)0xF005E) +#define PMC0bits (*(volatile struct PMC0struct *)0xF0060) +#define PMC3bits (*(volatile struct PMC3struct *)0xF0063) +#define PMC10bits (*(volatile struct PMC10struct *)0xF006A) +#define PMC11bits (*(volatile struct PMC11struct *)0xF006B) +#define PMC12bits (*(volatile struct PMC12struct *)0xF006C) +#define PMC14bits (*(volatile struct PMC14struct *)0xF006E) +#define NFEN0bits (*(volatile struct NFEN0struct *)0xF0070) +#define NFEN1bits (*(volatile struct NFEN1struct *)0xF0071) +#define NFEN2bits (*(volatile struct NFEN2struct *)0xF0072) +#define ISCbits (*(volatile struct ISCstruct *)0xF0073) +#define TIS0bits (*(volatile struct TIS0struct *)0xF0074) +#define ADPCbits (*(volatile struct ADPCstruct *)0xF0076) +#define PIORbits (*(volatile struct PIORstruct *)0xF0077) +#define IAWCTLbits (*(volatile struct IAWCTLstruct *)0xF0078) +#define GDIDISbits (*(volatile struct GDIDISstruct *)0xF007D) +#define PRDSELbits (*(volatile struct PRDSELstruct *)0xF007E) +#define TOOLENbits (*(volatile struct TOOLENstruct *)0xF0080) +#define BPAL0bits (*(volatile struct BPAL0struct *)0xF0081) +#define BPAH0bits (*(volatile struct BPAH0struct *)0xF0082) +#define BPAS0bits (*(volatile struct BPAS0struct *)0xF0083) +#define BACDVL0bits (*(volatile struct BACDVL0struct *)0xF0084) +#define BACDVH0bits (*(volatile struct BACDVH0struct *)0xF0085) +#define BACDML0bits (*(volatile struct BACDML0struct *)0xF0086) +#define BACDMH0bits (*(volatile struct BACDMH0struct *)0xF0087) +#define MONMODbits (*(volatile struct MONMODstruct *)0xF0088) +#define DFLCTLbits (*(volatile struct DFLCTLstruct *)0xF0090) +#define HIOTRMbits (*(volatile struct HIOTRMstruct *)0xF00A0) +#define BECTLbits (*(volatile struct BECTLstruct *)0xF00A1) +#define HOCODIVbits (*(volatile struct HOCODIVstruct *)0xF00A8) +#define TEMPCAL0bits (*(volatile struct TEMPCAL0struct*)0xF00AC) +#define TEMPCAL1bits (*(volatile struct TEMPCAL1struct*)0xF00AD) +#define TEMPCAL2bits (*(volatile struct TEMPCAL2struct*)0xF00AE) +#define TEMPCAL3bits (*(volatile struct TEMPCAL3struct*)0xF00AF) +#define FLSECbits (*(volatile struct FLSECstruct *)0xF00B0) +#define FLFSWSbits (*(volatile struct FLFSWSstruct *)0xF00B2) +#define FLFSWEbits (*(volatile struct FLFSWEstruct *)0xF00B4) +#define FSSETbits (*(volatile struct FSSETstruct *)0xF00B6) +#define FSSEbits (*(volatile struct FSSEstruct *)0xF00B7) +#define FLFADLbits (*(volatile struct FLFADLstruct *)0xF00B8) +#define FLFADHbits (*(volatile struct FLFADHstruct *)0xF00BA) +#define PFCMDbits (*(volatile struct PFCMDstruct *)0xF00C0) +#define PFSbits (*(volatile struct PFSstruct *)0xF00C1) +#define FLRLbits (*(volatile struct FLRLstruct *)0xF00C2) +#define FLRHbits (*(volatile struct FLRHstruct *)0xF00C4) +#define FLWEbits (*(volatile struct FLWEstruct *)0xF00C6) +#define FLREbits (*(volatile struct FLREstruct *)0xF00C7) +#define FLTMSbits (*(volatile struct FLTMSstruct *)0xF00C8) +#define DFLMCbits (*(volatile struct DFLMCstruct *)0xF00CA) +#define FLMCLbits (*(volatile struct FLMCLstruct *)0xF00CC) +#define FLMCHbits (*(volatile struct FLMCHstruct *)0xF00CE) +#define FSCTLbits (*(volatile struct FSCTLstruct *)0xF00CF) +#define ICEADRbits (*(volatile struct ICEADRstruct *)0xF00D0) +#define ICEDATbits (*(volatile struct ICEDATstruct *)0xF00D2) +#define MDCLbits (*(volatile struct MDCLstruct *)0xF00E0) +#define MDCHbits (*(volatile struct MDCHstruct *)0xF00E2) +#define MDUCbits (*(volatile struct MDUCstruct *)0xF00E8) +#define PER0bits (*(volatile struct PER0struct *)0xF00F0) +#define OSMCbits (*(volatile struct OSMCstruct *)0xF00F3) +#define RMCbits (*(volatile struct RMCstruct *)0xF00F4) +#define RPECTLbits (*(volatile struct RPECTLstruct *)0xF00F5) +#define BCDADJbits (*(volatile struct BCDADJstruct *)0xF00FE) +#define VECTCTRLbits (*(volatile struct VECTCTRLstruct*)0xF00FF) +#define SSR00bits (*(volatile struct SSR00struct *)0xF0100) +#define SSR00Lbits (*(volatile struct SSR00Lstruct *)0xF0100) +#define SSR01bits (*(volatile struct SSR01struct *)0xF0102) +#define SSR01Lbits (*(volatile struct SSR01Lstruct *)0xF0102) +#define SSR02bits (*(volatile struct SSR02struct *)0xF0104) +#define SSR02Lbits (*(volatile struct SSR02Lstruct *)0xF0104) +#define SSR03bits (*(volatile struct SSR03struct *)0xF0106) +#define SSR03Lbits (*(volatile struct SSR03Lstruct *)0xF0106) +#define SIR00bits (*(volatile struct SIR00struct *)0xF0108) +#define SIR00Lbits (*(volatile struct SIR00Lstruct *)0xF0108) +#define SIR01bits (*(volatile struct SIR01struct *)0xF010A) +#define SIR01Lbits (*(volatile struct SIR01Lstruct *)0xF010A) +#define SIR02bits (*(volatile struct SIR02struct *)0xF010C) +#define SIR02Lbits (*(volatile struct SIR02Lstruct *)0xF010C) +#define SIR03bits (*(volatile struct SIR03struct *)0xF010E) +#define SIR03Lbits (*(volatile struct SIR03Lstruct *)0xF010E) +#define SMR00bits (*(volatile struct SMR00struct *)0xF0110) +#define SMR01bits (*(volatile struct SMR01struct *)0xF0112) +#define SMR02bits (*(volatile struct SMR02struct *)0xF0114) +#define SMR03bits (*(volatile struct SMR03struct *)0xF0116) +#define SCR00bits (*(volatile struct SCR00struct *)0xF0118) +#define SCR01bits (*(volatile struct SCR01struct *)0xF011A) +#define SCR02bits (*(volatile struct SCR02struct *)0xF011C) +#define SCR03bits (*(volatile struct SCR03struct *)0xF011E) +#define SE0bits (*(volatile struct SE0struct *)0xF0120) +#define SE0Lbits (*(volatile struct SE0Lstruct *)0xF0120) +#define SS0bits (*(volatile struct SS0struct *)0xF0122) +#define SS0Lbits (*(volatile struct SS0Lstruct *)0xF0122) +#define ST0bits (*(volatile struct ST0struct *)0xF0124) +#define ST0Lbits (*(volatile struct ST0Lstruct *)0xF0124) +#define SPS0bits (*(volatile struct SPS0struct *)0xF0126) +#define SPS0Lbits (*(volatile struct SPS0Lstruct *)0xF0126) +#define SO0bits (*(volatile struct SO0struct *)0xF0128) +#define SOE0bits (*(volatile struct SOE0struct *)0xF012A) +#define SOE0Lbits (*(volatile struct SOE0Lstruct *)0xF012A) +#define EDR00bits (*(volatile struct EDR00struct *)0xF012C) +#define EDR00Lbits (*(volatile struct EDR00Lstruct *)0xF012C) +#define EDR01bits (*(volatile struct EDR01struct *)0xF012E) +#define EDR01Lbits (*(volatile struct EDR01Lstruct *)0xF012E) +#define EDR02bits (*(volatile struct EDR02struct *)0xF0130) +#define EDR02Lbits (*(volatile struct EDR02Lstruct *)0xF0130) +#define EDR03bits (*(volatile struct EDR03struct *)0xF0132) +#define EDR03Lbits (*(volatile struct EDR03Lstruct *)0xF0132) +#define SOL0bits (*(volatile struct SOL0struct *)0xF0134) +#define SOL0Lbits (*(volatile struct SOL0Lstruct *)0xF0134) +#define SSC0bits (*(volatile struct SSC0struct *)0xF0138) +#define SSC0Lbits (*(volatile struct SSC0Lstruct *)0xF0138) +#define SSR10bits (*(volatile struct SSR10struct *)0xF0140) +#define SSR10Lbits (*(volatile struct SSR10Lstruct *)0xF0140) +#define SSR11bits (*(volatile struct SSR11struct *)0xF0142) +#define SSR11Lbits (*(volatile struct SSR11Lstruct *)0xF0142) +#define SSR12bits (*(volatile struct SSR12struct *)0xF0144) +#define SSR12Lbits (*(volatile struct SSR12Lstruct *)0xF0144) +#define SSR13bits (*(volatile struct SSR13struct *)0xF0146) +#define SSR13Lbits (*(volatile struct SSR13Lstruct *)0xF0146) +#define SIR10bits (*(volatile struct SIR10struct *)0xF0148) +#define SIR10Lbits (*(volatile struct SIR10Lstruct *)0xF0148) +#define SIR11bits (*(volatile struct SIR11struct *)0xF014A) +#define SIR11Lbits (*(volatile struct SIR11Lstruct *)0xF014A) +#define SIR12bits (*(volatile struct SIR12struct *)0xF014C) +#define SIR12Lbits (*(volatile struct SIR12Lstruct *)0xF014C) +#define SIR13bits (*(volatile struct SIR13struct *)0xF014E) +#define SIR13Lbits (*(volatile struct SIR13Lstruct *)0xF014E) +#define SMR10bits (*(volatile struct SMR10struct *)0xF0150) +#define SMR11bits (*(volatile struct SMR11struct *)0xF0152) +#define SMR12bits (*(volatile struct SMR12struct *)0xF0154) +#define SMR13bits (*(volatile struct SMR13struct *)0xF0156) +#define SCR10bits (*(volatile struct SCR10struct *)0xF0158) +#define SCR11bits (*(volatile struct SCR11struct *)0xF015A) +#define SCR12bits (*(volatile struct SCR12struct *)0xF015C) +#define SCR13bits (*(volatile struct SCR13struct *)0xF015E) +#define SE1bits (*(volatile struct SE1struct *)0xF0160) +#define SE1Lbits (*(volatile struct SE1Lstruct *)0xF0160) +#define SS1bits (*(volatile struct SS1struct *)0xF0162) +#define SS1Lbits (*(volatile struct SS1Lstruct *)0xF0162) +#define ST1bits (*(volatile struct ST1struct *)0xF0164) +#define ST1Lbits (*(volatile struct ST1Lstruct *)0xF0164) +#define SPS1bits (*(volatile struct SPS1struct *)0xF0166) +#define SPS1Lbits (*(volatile struct SPS1Lstruct *)0xF0166) +#define SO1bits (*(volatile struct SO1struct *)0xF0168) +#define SOE1bits (*(volatile struct SOE1struct *)0xF016A) +#define SOE1Lbits (*(volatile struct SOE1Lstruct *)0xF016A) +#define EDR10bits (*(volatile struct EDR10struct *)0xF016C) +#define EDR10Lbits (*(volatile struct EDR10Lstruct *)0xF016C) +#define EDR11bits (*(volatile struct EDR11struct *)0xF016E) +#define EDR11Lbits (*(volatile struct EDR11Lstruct *)0xF016E) +#define EDR12bits (*(volatile struct EDR12struct *)0xF0170) +#define EDR12Lbits (*(volatile struct EDR12Lstruct *)0xF0170) +#define EDR13bits (*(volatile struct EDR13struct *)0xF0172) +#define EDR13Lbits (*(volatile struct EDR13Lstruct *)0xF0172) +#define SOL1bits (*(volatile struct SOL1struct *)0xF0174) +#define SOL1Lbits (*(volatile struct SOL1Lstruct *)0xF0174) +#define SSC1bits (*(volatile struct SSC1struct *)0xF0178) +#define SSC1Lbits (*(volatile struct SSC1Lstruct *)0xF0178) +#define TCR00bits (*(volatile struct TCR00struct *)0xF0180) +#define TCR01bits (*(volatile struct TCR01struct *)0xF0182) +#define TCR02bits (*(volatile struct TCR02struct *)0xF0184) +#define TCR03bits (*(volatile struct TCR03struct *)0xF0186) +#define TCR04bits (*(volatile struct TCR04struct *)0xF0188) +#define TCR05bits (*(volatile struct TCR05struct *)0xF018A) +#define TCR06bits (*(volatile struct TCR06struct *)0xF018C) +#define TCR07bits (*(volatile struct TCR07struct *)0xF018E) +#define TMR00bits (*(volatile struct TMR00struct *)0xF0190) +#define TMR01bits (*(volatile struct TMR01struct *)0xF0192) +#define TMR02bits (*(volatile struct TMR02struct *)0xF0194) +#define TMR03bits (*(volatile struct TMR03struct *)0xF0196) +#define TMR04bits (*(volatile struct TMR04struct *)0xF0198) +#define TMR05bits (*(volatile struct TMR05struct *)0xF019A) +#define TMR06bits (*(volatile struct TMR06struct *)0xF019C) +#define TMR07bits (*(volatile struct TMR07struct *)0xF019E) +#define TSR00bits (*(volatile struct TSR00struct *)0xF01A0) +#define TSR00Lbits (*(volatile struct TSR00Lstruct *)0xF01A0) +#define TSR01bits (*(volatile struct TSR01struct *)0xF01A2) +#define TSR01Lbits (*(volatile struct TSR01Lstruct *)0xF01A2) +#define TSR02bits (*(volatile struct TSR02struct *)0xF01A4) +#define TSR02Lbits (*(volatile struct TSR02Lstruct *)0xF01A4) +#define TSR03bits (*(volatile struct TSR03struct *)0xF01A6) +#define TSR03Lbits (*(volatile struct TSR03Lstruct *)0xF01A6) +#define TSR04bits (*(volatile struct TSR04struct *)0xF01A8) +#define TSR04Lbits (*(volatile struct TSR04Lstruct *)0xF01A8) +#define TSR05bits (*(volatile struct TSR05struct *)0xF01AA) +#define TSR05Lbits (*(volatile struct TSR05Lstruct *)0xF01AA) +#define TSR06bits (*(volatile struct TSR06struct *)0xF01AC) +#define TSR06Lbits (*(volatile struct TSR06Lstruct *)0xF01AC) +#define TSR07bits (*(volatile struct TSR07struct *)0xF01AE) +#define TSR07Lbits (*(volatile struct TSR07Lstruct *)0xF01AE) +#define TE0bits (*(volatile struct TE0struct *)0xF01B0) +#define TE0Lbits (*(volatile struct TE0Lstruct *)0xF01B0) +#define TS0bits (*(volatile struct TS0struct *)0xF01B2) +#define TS0Lbits (*(volatile struct TS0Lstruct *)0xF01B2) +#define TT0bits (*(volatile struct TT0struct *)0xF01B4) +#define TT0Lbits (*(volatile struct TT0Lstruct *)0xF01B4) +#define TPS0bits (*(volatile struct TPS0struct *)0xF01B6) +#define TO0bits (*(volatile struct TO0struct *)0xF01B8) +#define TO0Lbits (*(volatile struct TO0Lstruct *)0xF01B8) +#define TOE0bits (*(volatile struct TOE0struct *)0xF01BA) +#define TOE0Lbits (*(volatile struct TOE0Lstruct *)0xF01BA) +#define TOL0bits (*(volatile struct TOL0struct *)0xF01BC) +#define TOL0Lbits (*(volatile struct TOL0Lstruct *)0xF01BC) +#define TOM0bits (*(volatile struct TOM0struct *)0xF01BE) +#define TOM0Lbits (*(volatile struct TOM0Lstruct *)0xF01BE) +#define TCR10bits (*(volatile struct TCR10struct *)0xF01C0) +#define TCR11bits (*(volatile struct TCR11struct *)0xF01C2) +#define TCR12bits (*(volatile struct TCR12struct *)0xF01C4) +#define TCR13bits (*(volatile struct TCR13struct *)0xF01C6) +#define TCR14bits (*(volatile struct TCR14struct *)0xF01C8) +#define TCR15bits (*(volatile struct TCR15struct *)0xF01CA) +#define TCR16bits (*(volatile struct TCR16struct *)0xF01CC) +#define TCR17bits (*(volatile struct TCR17struct *)0xF01CE) +#define TMR10bits (*(volatile struct TMR10struct *)0xF01D0) +#define TMR11bits (*(volatile struct TMR11struct *)0xF01D2) +#define TMR12bits (*(volatile struct TMR12struct *)0xF01D4) +#define TMR13bits (*(volatile struct TMR13struct *)0xF01D6) +#define TMR14bits (*(volatile struct TMR14struct *)0xF01D8) +#define TMR15bits (*(volatile struct TMR15struct *)0xF01DA) +#define TMR16bits (*(volatile struct TMR16struct *)0xF01DC) +#define TMR17bits (*(volatile struct TMR17struct *)0xF01DE) +#define TSR10bits (*(volatile struct TSR10struct *)0xF01E0) +#define TSR10Lbits (*(volatile struct TSR10Lstruct *)0xF01E0) +#define TSR11bits (*(volatile struct TSR11struct *)0xF01E2) +#define TSR11Lbits (*(volatile struct TSR11Lstruct *)0xF01E2) +#define TSR12bits (*(volatile struct TSR12struct *)0xF01E4) +#define TSR12Lbits (*(volatile struct TSR12Lstruct *)0xF01E4) +#define TSR13bits (*(volatile struct TSR13struct *)0xF01E6) +#define TSR13Lbits (*(volatile struct TSR13Lstruct *)0xF01E6) +#define TSR14bits (*(volatile struct TSR14struct *)0xF01E8) +#define TSR14Lbits (*(volatile struct TSR14Lstruct *)0xF01E8) +#define TSR15bits (*(volatile struct TSR15struct *)0xF01EA) +#define TSR15Lbits (*(volatile struct TSR15Lstruct *)0xF01EA) +#define TSR16bits (*(volatile struct TSR16struct *)0xF01EC) +#define TSR16Lbits (*(volatile struct TSR16Lstruct *)0xF01EC) +#define TSR17bits (*(volatile struct TSR17struct *)0xF01EE) +#define TSR17Lbits (*(volatile struct TSR17Lstruct *)0xF01EE) +#define TE1bits (*(volatile struct TE1struct *)0xF01F0) +#define TE1Lbits (*(volatile struct TE1Lstruct *)0xF01F0) +#define TS1bits (*(volatile struct TS1struct *)0xF01F2) +#define TS1Lbits (*(volatile struct TS1Lstruct *)0xF01F2) +#define TT1bits (*(volatile struct TT1struct *)0xF01F4) +#define TT1Lbits (*(volatile struct TT1Lstruct *)0xF01F4) +#define TPS1bits (*(volatile struct TPS1struct *)0xF01F6) +#define TO1bits (*(volatile struct TO1struct *)0xF01F8) +#define TO1Lbits (*(volatile struct TO1Lstruct *)0xF01F8) +#define TOE1bits (*(volatile struct TOE1struct *)0xF01FA) +#define TOE1Lbits (*(volatile struct TOE1Lstruct *)0xF01FA) +#define TOL1bits (*(volatile struct TOL1struct *)0xF01FC) +#define TOL1Lbits (*(volatile struct TOL1Lstruct *)0xF01FC) +#define TOM1bits (*(volatile struct TOM1struct *)0xF01FE) +#define TOM1Lbits (*(volatile struct TOM1Lstruct *)0xF01FE) +#define DSA2bits (*(volatile struct DSA2struct *)0xF0200) +#define DSA3bits (*(volatile struct DSA3struct *)0xF0201) +#define DRA2bits (*(volatile struct DRA2struct *)0xF0202) +#define DRA2Lbits (*(volatile struct DRA2Lstruct *)0xF0202) +#define DRA2Hbits (*(volatile struct DRA2Hstruct *)0xF0203) +#define DRA3bits (*(volatile struct DRA3struct *)0xF0204) +#define DRA3Lbits (*(volatile struct DRA3Lstruct *)0xF0204) +#define DRA3Hbits (*(volatile struct DRA3Hstruct *)0xF0205) +#define DBC2bits (*(volatile struct DBC2struct *)0xF0206) +#define DBC2Lbits (*(volatile struct DBC2Lstruct *)0xF0206) +#define DBC2Hbits (*(volatile struct DBC2Hstruct *)0xF0207) +#define DBC3bits (*(volatile struct DBC3struct *)0xF0208) +#define DBC3Lbits (*(volatile struct DBC3Lstruct *)0xF0208) +#define DBC3Hbits (*(volatile struct DBC3Hstruct *)0xF0209) +#define DMC2bits (*(volatile struct DMC2struct *)0xF020A) +#define DMC3bits (*(volatile struct DMC3struct *)0xF020B) +#define DRC2bits (*(volatile struct DRC2struct *)0xF020C) +#define DRC3bits (*(volatile struct DRC3struct *)0xF020D) +#define DWAITALLbits (*(volatile struct DWAITALLstruct*)0xF020F) +#define IICCTL00bits (*(volatile struct IICCTL00struct*)0xF0230) +#define IICCTL01bits (*(volatile struct IICCTL01struct*)0xF0231) +#define IICWL0bits (*(volatile struct IICWL0struct *)0xF0232) +#define IICWH0bits (*(volatile struct IICWH0struct *)0xF0233) +#define SVA0bits (*(volatile struct SVA0struct *)0xF0234) +#define IICSE0bits (*(volatile struct IICSE0struct *)0xF0235) +#define IICCTL10bits (*(volatile struct IICCTL10struct*)0xF0238) +#define IICCTL11bits (*(volatile struct IICCTL11struct*)0xF0239) +#define IICWL1bits (*(volatile struct IICWL1struct *)0xF023A) +#define IICWH1bits (*(volatile struct IICWH1struct *)0xF023B) +#define SVA1bits (*(volatile struct SVA1struct *)0xF023C) +#define IICSE1bits (*(volatile struct IICSE1struct *)0xF023D) +#define CRC0CTLbits (*(volatile struct CRC0CTLstruct *)0xF02F0) +#define PGCRCLbits (*(volatile struct PGCRCLstruct *)0xF02F2) +#define CRCDbits (*(volatile struct CRCDstruct *)0xF02FA) + + +#define ADTYP (ADM2bits.adtyp) +#define AWC (ADM2bits.awc) +#define ADRCK (ADM2bits.adrck) +#define DFLEN (DFLCTLbits.dflen) +#define BRSAM (BECTLbits.brsam) +#define ESQST (FSSEbits.esqst) +#define DIVST (MDUCbits.divst) +#define MACSF (MDUCbits.macsf) +#define MACOF (MDUCbits.macof) +#define MDSM (MDUCbits.mdsm) +#define MACMODE (MDUCbits.macmode) +#define DIVMODE (MDUCbits.divmode) +#define TAU0EN (PER0bits.tau0en) +#define TAU1EN (PER0bits.tau1en) +#define SAU0EN (PER0bits.sau0en) +#define SAU1EN (PER0bits.sau1en) +#define IICA0EN (PER0bits.iica0en) +#define ADCEN (PER0bits.adcen) +#define IICA1EN (PER0bits.iica1en) +#define RTCEN (PER0bits.rtcen) +#define PAENB (RMCbits.paenb) +#define WDVOL (RMCbits.wdvol) +#define RPEF (RPECTLbits.rpef) +#define RPERDIS (RPECTLbits.rperdis) +#define DWAIT2 (DMC2bits.dwait2) +#define DS2 (DMC2bits.ds2) +#define DRS2 (DMC2bits.drs2) +#define STG2 (DMC2bits.stg2) +#define DWAIT3 (DMC3bits.dwait3) +#define DS3 (DMC3bits.ds3) +#define DRS3 (DMC3bits.drs3) +#define STG3 (DMC3bits.stg3) +#define DST2 (DRC2bits.dst2) +#define DEN2 (DRC2bits.den2) +#define DST3 (DRC3bits.dst3) +#define DEN3 (DRC3bits.den3) +#define DWAITALL0 (DWAITALLbits.dwaitall0) +#define PRVARI (DWAITALLbits.prvari) +#define SPT0 (IICCTL00bits.spt0) +#define STT0 (IICCTL00bits.stt0) +#define ACKE0 (IICCTL00bits.acke0) +#define WTIM0 (IICCTL00bits.wtim0) +#define SPIE0 (IICCTL00bits.spie0) +#define WREL0 (IICCTL00bits.wrel0) +#define LREL0 (IICCTL00bits.lrel0) +#define IICE0 (IICCTL00bits.iice0) +#define PRS0 (IICCTL01bits.prs0) +#define DFC0 (IICCTL01bits.dfc0) +#define SMC0 (IICCTL01bits.smc0) +#define DAD0 (IICCTL01bits.dad0) +#define CLD0 (IICCTL01bits.cld0) +#define WUP0 (IICCTL01bits.wup0) +#define SPT1 (IICCTL10bits.spt1) +#define STT1 (IICCTL10bits.stt1) +#define ACKE1 (IICCTL10bits.acke1) +#define WTIM1 (IICCTL10bits.wtim1) +#define SPIE1 (IICCTL10bits.spie1) +#define WREL1 (IICCTL10bits.wrel1) +#define LREL1 (IICCTL10bits.lrel1) +#define IICE1 (IICCTL10bits.iice1) +#define PRS1 (IICCTL11bits.prs1) +#define DFC1 (IICCTL11bits.dfc1) +#define SMC1 (IICCTL11bits.smc1) +#define DAD1 (IICCTL11bits.dad1) +#define CLD1 (IICCTL11bits.cld1) +#define WUP1 (IICCTL11bits.wup1) +#define CRC0EN (CRC0CTLbits.crc0en) + + +#define PIOR5 (PIORbits.bit5) +#define PMC02 (PMC0bits.bit2) +#define PM02 (PM0bits.bit2) +#define P02 (P0bits.bit2) + +#define PMC03 (PMC0bits.bit3) +#define PM03 (PM0bits.bit3) +#define P03 (P0bits.bit3) + +#define PMC04 (PMC0bits.bit4) +#define PM04 (PM0bits.bit4) +#define P04 (P0bits.bit4) + +#define P05 (P0bits.bit5) +#define P06 (P0bits.bit6) +#define P16 (P1bits.bit6) +#define P30 (P3bits.bit0) +#define P43 (P4bits.bit3) +#define P50 (P5bits.bit0) +#define P120 (P12bits.bit0) + +#define TCR (&TCR00) +#define TMR (&TMR00) + +#endif // SFRS_EXT_H diff --git a/cpu/rl78/sfrs.h b/cpu/rl78/sfrs.h new file mode 100644 index 000000000..9793522e9 --- /dev/null +++ b/cpu/rl78/sfrs.h @@ -0,0 +1,3277 @@ +/* + * Copyright (c) 2014, Analog Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** + * \author Ian Martin + */ + +#ifndef SFRS_H +#define SFRS_H + +#define P0 (*(volatile unsigned char *)0xFFF00) +#define P1 (*(volatile unsigned char *)0xFFF01) +#define P2 (*(volatile unsigned char *)0xFFF02) +#define P3 (*(volatile unsigned char *)0xFFF03) +#define P4 (*(volatile unsigned char *)0xFFF04) +#define P5 (*(volatile unsigned char *)0xFFF05) +#define P6 (*(volatile unsigned char *)0xFFF06) +#define P7 (*(volatile unsigned char *)0xFFF07) +#define P8 (*(volatile unsigned char *)0xFFF08) +#define P9 (*(volatile unsigned char *)0xFFF09) +#define P10 (*(volatile unsigned char *)0xFFF0A) +#define P11 (*(volatile unsigned char *)0xFFF0B) +#define P12 (*(volatile unsigned char *)0xFFF0C) +#define P13 (*(volatile unsigned char *)0xFFF0D) +#define P14 (*(volatile unsigned char *)0xFFF0E) +#define P15 (*(volatile unsigned char *)0xFFF0F) +#define SDR00 (*(volatile unsigned short *)0xFFF10) +#define SIO00 (*(volatile unsigned char *)0xFFF10) +#define TXD0 (*(volatile unsigned char *)0xFFF10) +#define SDR01 (*(volatile unsigned short *)0xFFF12) +#define RXD0 (*(volatile unsigned char *)0xFFF12) +#define SIO01 (*(volatile unsigned char *)0xFFF12) +#define SDR12 (*(volatile unsigned short *)0xFFF14) +#define SIO30 (*(volatile unsigned char *)0xFFF14) +#define TXD3 (*(volatile unsigned char *)0xFFF14) +#define SDR13 (*(volatile unsigned short *)0xFFF16) +#define RXD3 (*(volatile unsigned char *)0xFFF16) +#define SIO31 (*(volatile unsigned char *)0xFFF16) +#define TDR00 (*(volatile unsigned short *)0xFFF18) +#define TDR01 (*(volatile unsigned short *)0xFFF1A) +#define TDR01L (*(volatile unsigned char *)0xFFF1A) +#define TDR01H (*(volatile unsigned char *)0xFFF1B) +#define ADCR (*(volatile unsigned short *)0xFFF1E) +#define ADCRH (*(volatile unsigned char *)0xFFF1F) +#define PM0 (*(volatile unsigned char *)0xFFF20) +#define PM1 (*(volatile unsigned char *)0xFFF21) +#define PM2 (*(volatile unsigned char *)0xFFF22) +#define PM3 (*(volatile unsigned char *)0xFFF23) +#define PM4 (*(volatile unsigned char *)0xFFF24) +#define PM5 (*(volatile unsigned char *)0xFFF25) +#define PM6 (*(volatile unsigned char *)0xFFF26) +#define PM7 (*(volatile unsigned char *)0xFFF27) +#define PM8 (*(volatile unsigned char *)0xFFF28) +#define PM9 (*(volatile unsigned char *)0xFFF29) +#define PM10 (*(volatile unsigned char *)0xFFF2A) +#define PM11 (*(volatile unsigned char *)0xFFF2B) +#define PM12 (*(volatile unsigned char *)0xFFF2C) +#define PM14 (*(volatile unsigned char *)0xFFF2E) +#define PM15 (*(volatile unsigned char *)0xFFF2F) +#define ADM0 (*(volatile unsigned char *)0xFFF30) +#define ADS (*(volatile unsigned char *)0xFFF31) +#define ADM1 (*(volatile unsigned char *)0xFFF32) +#define KRM (*(volatile unsigned char *)0xFFF37) +#define EGP0 (*(volatile unsigned char *)0xFFF38) +#define EGN0 (*(volatile unsigned char *)0xFFF39) +#define EGP1 (*(volatile unsigned char *)0xFFF3A) +#define EGN1 (*(volatile unsigned char *)0xFFF3B) +#define SDR02 (*(volatile unsigned short *)0xFFF44) +#define SIO10 (*(volatile unsigned char *)0xFFF44) +#define TXD1 (*(volatile unsigned char *)0xFFF44) +#define SDR03 (*(volatile unsigned short *)0xFFF46) +#define RXD1 (*(volatile unsigned char *)0xFFF46) +#define SIO11 (*(volatile unsigned char *)0xFFF46) +#define SDR10 (*(volatile unsigned short *)0xFFF48) +#define SIO20 (*(volatile unsigned char *)0xFFF48) +#define TXD2 (*(volatile unsigned char *)0xFFF48) +#define SDR11 (*(volatile unsigned short *)0xFFF4A) +#define RXD2 (*(volatile unsigned char *)0xFFF4A) +#define SIO21 (*(volatile unsigned char *)0xFFF4A) +#define IICA0 (*(volatile unsigned char *)0xFFF50) +#define IICS0 (*(volatile unsigned char *)0xFFF51) +#define IICF0 (*(volatile unsigned char *)0xFFF52) +#define IICA1 (*(volatile unsigned char *)0xFFF54) +#define IICS1 (*(volatile unsigned char *)0xFFF55) +#define IICF1 (*(volatile unsigned char *)0xFFF56) +#define TDR02 (*(volatile unsigned short *)0xFFF64) +#define TDR03 (*(volatile unsigned short *)0xFFF66) +#define TDR03L (*(volatile unsigned char *)0xFFF66) +#define TDR03H (*(volatile unsigned char *)0xFFF67) +#define TDR04 (*(volatile unsigned short *)0xFFF68) +#define TDR05 (*(volatile unsigned short *)0xFFF6A) +#define TDR06 (*(volatile unsigned short *)0xFFF6C) +#define TDR07 (*(volatile unsigned short *)0xFFF6E) +#define TDR10 (*(volatile unsigned short *)0xFFF70) +#define TDR11 (*(volatile unsigned short *)0xFFF72) +#define TDR11L (*(volatile unsigned char *)0xFFF72) +#define TDR11H (*(volatile unsigned char *)0xFFF73) +#define TDR12 (*(volatile unsigned short *)0xFFF74) +#define TDR13 (*(volatile unsigned short *)0xFFF76) +#define TDR13L (*(volatile unsigned char *)0xFFF76) +#define TDR13H (*(volatile unsigned char *)0xFFF77) +#define TDR14 (*(volatile unsigned short *)0xFFF78) +#define TDR15 (*(volatile unsigned short *)0xFFF7A) +#define TDR16 (*(volatile unsigned short *)0xFFF7C) +#define TDR17 (*(volatile unsigned short *)0xFFF7E) +#define FLPMC (*(volatile unsigned char *)0xFFF80) +#define FLARS (*(volatile unsigned char *)0xFFF81) +#define FLAPL (*(volatile unsigned short *)0xFFF82) +#define FLAPH (*(volatile unsigned char *)0xFFF84) +#define FSSQ (*(volatile unsigned char *)0xFFF85) +#define FLSEDL (*(volatile unsigned short *)0xFFF86) +#define FLSEDH (*(volatile unsigned char *)0xFFF88) +#define FLRST (*(volatile unsigned char *)0xFFF89) +#define FSASTL (*(volatile unsigned char *)0xFFF8A) +#define FSASTH (*(volatile unsigned char *)0xFFF8B) +#define FLWL (*(volatile unsigned short *)0xFFF8C) +#define FLWH (*(volatile unsigned short *)0xFFF8E) +#define ITMC (*(volatile unsigned short *)0xFFF90) +#define SEC (*(volatile unsigned char *)0xFFF92) +#define RL78_MIN (*(volatile unsigned char *)0xFFF93) /* Note: "MIN" would conflict with the MIN() macro. */ +#define HOUR (*(volatile unsigned char *)0xFFF94) +#define WEEK (*(volatile unsigned char *)0xFFF95) +#define DAY (*(volatile unsigned char *)0xFFF96) +#define MONTH (*(volatile unsigned char *)0xFFF97) +#define YEAR (*(volatile unsigned char *)0xFFF98) +#define SUBCUD (*(volatile unsigned char *)0xFFF99) +#define ALARMWM (*(volatile unsigned char *)0xFFF9A) +#define ALARMWH (*(volatile unsigned char *)0xFFF9B) +#define ALARMWW (*(volatile unsigned char *)0xFFF9C) +#define RTCC0 (*(volatile unsigned char *)0xFFF9D) +#define RTCC1 (*(volatile unsigned char *)0xFFF9E) +#define CMC (*(volatile unsigned char *)0xFFFA0) +#define CSC (*(volatile unsigned char *)0xFFFA1) +#define OSTC (*(volatile unsigned char *)0xFFFA2) +#define OSTS (*(volatile unsigned char *)0xFFFA3) +#define CKC (*(volatile unsigned char *)0xFFFA4) +#define CKS0 (*(volatile unsigned char *)0xFFFA5) +#define CKS1 (*(volatile unsigned char *)0xFFFA6) +#define RESF (*(volatile unsigned char *)0xFFFA8) +#define LVIM (*(volatile unsigned char *)0xFFFA9) +#define LVIS (*(volatile unsigned char *)0xFFFAA) +#define WDTE (*(volatile unsigned char *)0xFFFAB) +#define CRCIN (*(volatile unsigned char *)0xFFFAC) +#define RXB (*(volatile unsigned char *)0xFFFAD) +#define TXS (*(volatile unsigned char *)0xFFFAD) +#define MONSTA0 (*(volatile unsigned char *)0xFFFAE) +#define ASIM (*(volatile unsigned char *)0xFFFAF) +#define DSA0 (*(volatile unsigned char *)0xFFFB0) +#define DSA1 (*(volatile unsigned char *)0xFFFB1) +#define DRA0 (*(volatile unsigned short *)0xFFFB2) +#define DRA0L (*(volatile unsigned char *)0xFFFB2) +#define DRA0H (*(volatile unsigned char *)0xFFFB3) +#define DRA1 (*(volatile unsigned short *)0xFFFB4) +#define DRA1L (*(volatile unsigned char *)0xFFFB4) +#define DRA1H (*(volatile unsigned char *)0xFFFB5) +#define DBC0 (*(volatile unsigned short *)0xFFFB6) +#define DBC0L (*(volatile unsigned char *)0xFFFB6) +#define DBC0H (*(volatile unsigned char *)0xFFFB7) +#define DBC1 (*(volatile unsigned short *)0xFFFB8) +#define DBC1L (*(volatile unsigned char *)0xFFFB8) +#define DBC1H (*(volatile unsigned char *)0xFFFB9) +#define DMC0 (*(volatile unsigned char *)0xFFFBA) +#define DMC1 (*(volatile unsigned char *)0xFFFBB) +#define DRC0 (*(volatile unsigned char *)0xFFFBC) +#define DRC1 (*(volatile unsigned char *)0xFFFBD) +#define IF2 (*(volatile unsigned short *)0xFFFD0) +#define IF2L (*(volatile unsigned char *)0xFFFD0) +#define IF2H (*(volatile unsigned char *)0xFFFD1) +#define IF3 (*(volatile unsigned short *)0xFFFD2) +#define IF3L (*(volatile unsigned char *)0xFFFD2) +#define MK2 (*(volatile unsigned short *)0xFFFD4) +#define MK2L (*(volatile unsigned char *)0xFFFD4) +#define MK2H (*(volatile unsigned char *)0xFFFD5) +#define MK3 (*(volatile unsigned short *)0xFFFD6) +#define MK3L (*(volatile unsigned char *)0xFFFD6) +#define PR02 (*(volatile unsigned short *)0xFFFD8) +#define PR02L (*(volatile unsigned char *)0xFFFD8) +#define PR02H (*(volatile unsigned char *)0xFFFD9) +#define PR03 (*(volatile unsigned short *)0xFFFDA) +#define PR03L (*(volatile unsigned char *)0xFFFDA) +#define PR12 (*(volatile unsigned short *)0xFFFDC) +#define PR12L (*(volatile unsigned char *)0xFFFDC) +#define PR12H (*(volatile unsigned char *)0xFFFDD) +#define PR13 (*(volatile unsigned short *)0xFFFDE) +#define PR13L (*(volatile unsigned char *)0xFFFDE) +#define IF0 (*(volatile unsigned short *)0xFFFE0) +#define IF0L (*(volatile unsigned char *)0xFFFE0) +#define IF0H (*(volatile unsigned char *)0xFFFE1) +#define IF1 (*(volatile unsigned short *)0xFFFE2) +#define IF1L (*(volatile unsigned char *)0xFFFE2) +#define IF1H (*(volatile unsigned char *)0xFFFE3) +#define MK0 (*(volatile unsigned short *)0xFFFE4) +#define MK0L (*(volatile unsigned char *)0xFFFE4) +#define MK0H (*(volatile unsigned char *)0xFFFE5) +#define MK1 (*(volatile unsigned short *)0xFFFE6) +#define MK1L (*(volatile unsigned char *)0xFFFE6) +#define MK1H (*(volatile unsigned char *)0xFFFE7) +#define PR00 (*(volatile unsigned short *)0xFFFE8) +#define PR00L (*(volatile unsigned char *)0xFFFE8) +#define PR00H (*(volatile unsigned char *)0xFFFE9) +#define PR01 (*(volatile unsigned short *)0xFFFEA) +#define PR01L (*(volatile unsigned char *)0xFFFEA) +#define PR01H (*(volatile unsigned char *)0xFFFEB) +#define PR10 (*(volatile unsigned short *)0xFFFEC) +#define PR10L (*(volatile unsigned char *)0xFFFEC) +#define PR10H (*(volatile unsigned char *)0xFFFED) +#define PR11 (*(volatile unsigned short *)0xFFFEE) +#define PR11L (*(volatile unsigned char *)0xFFFEE) +#define PR11H (*(volatile unsigned char *)0xFFFEF) +#define MDAL (*(volatile unsigned short *)0xFFFF0) +#define MULA (*(volatile unsigned short *)0xFFFF0) +#define MDAH (*(volatile unsigned short *)0xFFFF2) +#define MULB (*(volatile unsigned short *)0xFFFF2) +#define MDBH (*(volatile unsigned short *)0xFFFF4) +#define MULOH (*(volatile unsigned short *)0xFFFF4) +#define MDBL (*(volatile unsigned short *)0xFFFF6) +#define MULOL (*(volatile unsigned short *)0xFFFF6) +#define PMC (*(volatile unsigned char *)0xFFFFE) + +struct P0struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct P1struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct P2struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct P3struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct P4struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct P5struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct P6struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct P7struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct P8struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct P9struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct P10struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct P11struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct P12struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct P13struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct P14struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct P15struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SDR00struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SIO00struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TXD0struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SDR01struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct RXD0struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SIO01struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SDR12struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SIO30struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TXD3struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SDR13struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct RXD3struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SIO31struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TDR00struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TDR01struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TDR01Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TDR01Hstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct ADCRstruct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct ADCRHstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PM0struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PM1struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PM2struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PM3struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PM4struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PM5struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PM6struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PM7struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PM8struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PM9struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PM10struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PM11struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PM12struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PM14struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct PM15struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct ADM0struct { + unsigned char adce : 1; + unsigned char : 1; + unsigned char adcs : 1; +}; + +struct ADSstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct ADM1struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct KRMstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct EGP0struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct EGN0struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct EGP1struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct EGN1struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SDR02struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SIO10struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TXD1struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SDR03struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct RXD1struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SIO11struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SDR10struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SIO20struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TXD2struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SDR11struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct RXD2struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SIO21struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct IICA0struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct IICS0struct { + unsigned char spd0 : 1; + unsigned char std0 : 1; + unsigned char ackd0 : 1; + unsigned char trc0 : 1; + unsigned char coi0 : 1; + unsigned char exc0 : 1; + unsigned char ald0 : 1; + unsigned char msts0 : 1; +}; + +struct IICF0struct { + unsigned char iicrsv0 : 1; + unsigned char stcen0 : 1; + unsigned char : 1; + unsigned char iicbsy0 : 1; + unsigned char stcf0 : 1; +}; + +struct IICA1struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct IICS1struct { + unsigned char spd1 : 1; + unsigned char std1 : 1; + unsigned char ackd1 : 1; + unsigned char trc1 : 1; + unsigned char coi1 : 1; + unsigned char exc1 : 1; + unsigned char ald1 : 1; + unsigned char msts1 : 1; +}; + +struct IICF1struct { + unsigned char iicrsv1 : 1; + unsigned char stcen1 : 1; + unsigned char : 1; + unsigned char iicbsy1 : 1; + unsigned char stcf1 : 1; +}; + +struct TDR02struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TDR03struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TDR03Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TDR03Hstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TDR04struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TDR05struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TDR06struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TDR07struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TDR10struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TDR11struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TDR11Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TDR11Hstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TDR12struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TDR13struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TDR13Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TDR13Hstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TDR14struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TDR15struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TDR16struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct TDR17struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct FLPMCstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct FLARSstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct FLAPLstruct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct FLAPHstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct FSSQstruct { + unsigned char : 1; + unsigned char fsstp : 1; + unsigned char sqst : 1; +}; + +struct FLSEDLstruct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct FLSEDHstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct FLRSTstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct FSASTLstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct FSASTHstruct { + unsigned char : 1; + unsigned char sqend : 1; + unsigned char esqend : 1; +}; + +struct FLWLstruct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct FLWHstruct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct ITMCstruct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct SECstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct MINstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct HOURstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct WEEKstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct DAYstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct MONTHstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct YEARstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct SUBCUDstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct ALARMWMstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct ALARMWHstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct ALARMWWstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct RTCC0struct { + unsigned char : 1; + unsigned char rcloe1 : 1; + unsigned char : 1; + unsigned char rtce : 1; +}; + +struct RTCC1struct { + unsigned char rwait : 1; + unsigned char rwst : 1; + unsigned char : 1; + unsigned char rifg : 1; + unsigned char wafg : 1; + unsigned char : 1; + unsigned char walie : 1; + unsigned char wale : 1; +}; + +struct CMCstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct CSCstruct { + unsigned char hiostop : 1; + unsigned char : 1; + unsigned char xtstop : 1; + unsigned char mstop : 1; +}; + +struct OSTCstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct OSTSstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct CKCstruct { + unsigned char : 1; + unsigned char sdiv : 1; + unsigned char mcm0 : 1; + unsigned char mcs : 1; + unsigned char css : 1; + unsigned char cls : 1; +}; + +struct CKS0struct { + unsigned char : 1; + unsigned char pcloe0 : 1; +}; + +struct CKS1struct { + unsigned char : 1; + unsigned char pcloe1 : 1; +}; + +struct RESFstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct LVIMstruct { + unsigned char lvif : 1; + unsigned char lviomsk : 1; + unsigned char : 1; + unsigned char lvisen : 1; +}; + +struct LVISstruct { + unsigned char lvilv : 1; + unsigned char : 1; + unsigned char lvimd : 1; +}; + +struct WDTEstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct CRCINstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct RXBstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct TXSstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct MONSTA0struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct ASIMstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct DSA0struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct DSA1struct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct DRA0struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct DRA0Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct DRA0Hstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct DRA1struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct DRA1Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct DRA1Hstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct DBC0struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct DBC0Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct DBC0Hstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct DBC1struct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct DBC1Lstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct DBC1Hstruct { + unsigned char bit0 : 1; + unsigned char bit1 : 1; + unsigned char bit2 : 1; + unsigned char bit3 : 1; + unsigned char bit4 : 1; + unsigned char bit5 : 1; + unsigned char bit6 : 1; + unsigned char bit7 : 1; +}; + +struct DMC0struct { + unsigned char : 1; + unsigned char dwait0 : 1; + unsigned char ds0 : 1; + unsigned char drs0 : 1; + unsigned char stg0 : 1; +}; + +struct DMC1struct { + unsigned char : 1; + unsigned char dwait1 : 1; + unsigned char ds1 : 1; + unsigned char drs1 : 1; + unsigned char stg1 : 1; +}; + +struct DRC0struct { + unsigned char dst0 : 1; + unsigned char : 1; + unsigned char den0 : 1; +}; + +struct DRC1struct { + unsigned char dst1 : 1; + unsigned char : 1; + unsigned char den1 : 1; +}; + +struct IF2struct { + unsigned short tmif05 : 1; + unsigned short tmif06 : 1; + unsigned short tmif07 : 1; + unsigned short pif6 : 1; + unsigned short pif7 : 1; + unsigned short pif8 : 1; + unsigned short pif9 : 1; + unsigned short pif10 : 1; +}; + +struct IF2Lstruct { + unsigned char tmif05 : 1; + unsigned char tmif06 : 1; + unsigned char tmif07 : 1; + unsigned char pif6 : 1; + unsigned char pif7 : 1; + unsigned char pif8 : 1; + unsigned char pif9 : 1; + unsigned char pif10 : 1; +}; + +struct IF2Hstruct { + unsigned char pif11 : 1; + unsigned char tmif10 : 1; + unsigned char tmif11 : 1; + unsigned char tmif12 : 1; + unsigned char tmif13h : 1; + unsigned char mdif : 1; + unsigned char iicaif1 : 1; + unsigned char flif : 1; +}; + +struct IF3struct { + unsigned short dmaif2 : 1; + unsigned short dmaif3 : 1; + unsigned short tmif14 : 1; + unsigned short tmif15 : 1; + unsigned short tmif16 : 1; + unsigned short tmif17 : 1; +}; + +struct IF3Lstruct { + unsigned char dmaif2 : 1; + unsigned char dmaif3 : 1; + unsigned char tmif14 : 1; + unsigned char tmif15 : 1; + unsigned char tmif16 : 1; + unsigned char tmif17 : 1; +}; + +struct MK2struct { + unsigned short tmmk05 : 1; + unsigned short tmmk06 : 1; + unsigned short tmmk07 : 1; + unsigned short pmk6 : 1; + unsigned short pmk7 : 1; + unsigned short pmk8 : 1; + unsigned short pmk9 : 1; + unsigned short pmk10 : 1; +}; + +struct MK2Lstruct { + unsigned char tmmk05 : 1; + unsigned char tmmk06 : 1; + unsigned char tmmk07 : 1; + unsigned char pmk6 : 1; + unsigned char pmk7 : 1; + unsigned char pmk8 : 1; + unsigned char pmk9 : 1; + unsigned char pmk10 : 1; +}; + +struct MK2Hstruct { + unsigned char pmk11 : 1; + unsigned char tmmk10 : 1; + unsigned char tmmk11 : 1; + unsigned char tmmk12 : 1; + unsigned char tmmk13h : 1; + unsigned char mdmk : 1; + unsigned char iicamk1 : 1; + unsigned char flmk : 1; +}; + +struct MK3struct { + unsigned short dmamk2 : 1; + unsigned short dmamk3 : 1; + unsigned short tmmk14 : 1; + unsigned short tmmk15 : 1; + unsigned short tmmk16 : 1; + unsigned short tmmk17 : 1; +}; + +struct MK3Lstruct { + unsigned char dmamk2 : 1; + unsigned char dmamk3 : 1; + unsigned char tmmk14 : 1; + unsigned char tmmk15 : 1; + unsigned char tmmk16 : 1; + unsigned char tmmk17 : 1; +}; + +struct PR02struct { + unsigned short tmpr005 : 1; + unsigned short tmpr006 : 1; + unsigned short tmpr007 : 1; + unsigned short ppr06 : 1; + unsigned short ppr07 : 1; + unsigned short ppr08 : 1; + unsigned short ppr09 : 1; + unsigned short ppr010 : 1; +}; + +struct PR02Lstruct { + unsigned char tmpr005 : 1; + unsigned char tmpr006 : 1; + unsigned char tmpr007 : 1; + unsigned char ppr06 : 1; + unsigned char ppr07 : 1; + unsigned char ppr08 : 1; + unsigned char ppr09 : 1; + unsigned char ppr010 : 1; +}; + +struct PR02Hstruct { + unsigned char ppr011 : 1; + unsigned char tmpr010 : 1; + unsigned char tmpr011 : 1; + unsigned char tmpr012 : 1; + unsigned char tmpr013h : 1; + unsigned char mdpr0 : 1; + unsigned char iicapr01 : 1; + unsigned char flpr0 : 1; +}; + +struct PR03struct { + unsigned short dmapr02 : 1; + unsigned short dmapr03 : 1; + unsigned short tmpr014 : 1; + unsigned short tmpr015 : 1; + unsigned short tmpr016 : 1; + unsigned short tmpr017 : 1; +}; + +struct PR03Lstruct { + unsigned char dmapr02 : 1; + unsigned char dmapr03 : 1; + unsigned char tmpr014 : 1; + unsigned char tmpr015 : 1; + unsigned char tmpr016 : 1; + unsigned char tmpr017 : 1; +}; + +struct PR12struct { + unsigned short tmpr105 : 1; + unsigned short tmpr106 : 1; + unsigned short tmpr107 : 1; + unsigned short ppr16 : 1; + unsigned short ppr17 : 1; + unsigned short ppr18 : 1; + unsigned short ppr19 : 1; + unsigned short ppr110 : 1; +}; + +struct PR12Lstruct { + unsigned char tmpr105 : 1; + unsigned char tmpr106 : 1; + unsigned char tmpr107 : 1; + unsigned char ppr16 : 1; + unsigned char ppr17 : 1; + unsigned char ppr18 : 1; + unsigned char ppr19 : 1; + unsigned char ppr110 : 1; +}; + +struct PR12Hstruct { + unsigned char ppr111 : 1; + unsigned char tmpr110 : 1; + unsigned char tmpr111 : 1; + unsigned char tmpr112 : 1; + unsigned char tmpr113h : 1; + unsigned char mdpr1 : 1; + unsigned char iicapr11 : 1; + unsigned char flpr1 : 1; +}; + +struct PR13struct { + unsigned short dmapr12 : 1; + unsigned short dmapr13 : 1; + unsigned short tmpr114 : 1; + unsigned short tmpr115 : 1; + unsigned short tmpr116 : 1; + unsigned short tmpr117 : 1; +}; + +struct PR13Lstruct { + unsigned char dmapr12 : 1; + unsigned char dmapr13 : 1; + unsigned char tmpr114 : 1; + unsigned char tmpr115 : 1; + unsigned char tmpr116 : 1; + unsigned char tmpr117 : 1; +}; + +struct IF0struct { + unsigned short wdtiif : 1; + unsigned short lviif : 1; + unsigned short pif0 : 1; + unsigned short pif1 : 1; + unsigned short pif2 : 1; + unsigned short pif3 : 1; + unsigned short pif4 : 1; + unsigned short pif5 : 1; +}; + +struct IF0Lstruct { + unsigned char wdtiif : 1; + unsigned char lviif : 1; + unsigned char pif0 : 1; + unsigned char pif1 : 1; + unsigned char pif2 : 1; + unsigned char pif3 : 1; + unsigned char pif4 : 1; + unsigned char pif5 : 1; +}; + +struct IF0Hstruct { + unsigned char stif2 : 1; + unsigned char srif2 : 1; + unsigned char tmif11h : 1; + unsigned char dmaif0 : 1; + unsigned char dmaif1 : 1; + unsigned char stif0 : 1; + unsigned char srif0 : 1; + unsigned char tmif01h : 1; +}; + +struct IF1struct { + unsigned short stif1 : 1; + unsigned short srif1 : 1; + unsigned short tmif03h : 1; + unsigned short iicaif0 : 1; + unsigned short tmif00 : 1; + unsigned short tmif01 : 1; + unsigned short tmif02 : 1; + unsigned short tmif03 : 1; +}; + +struct IF1Lstruct { + unsigned char stif1 : 1; + unsigned char srif1 : 1; + unsigned char tmif03h : 1; + unsigned char iicaif0 : 1; + unsigned char tmif00 : 1; + unsigned char tmif01 : 1; + unsigned char tmif02 : 1; + unsigned char tmif03 : 1; +}; + +struct IF1Hstruct { + unsigned char adif : 1; + unsigned char rtcif : 1; + unsigned char itif : 1; + unsigned char krif : 1; + unsigned char stif3 : 1; + unsigned char srif3 : 1; + unsigned char tmif13 : 1; + unsigned char tmif04 : 1; +}; + +struct MK0struct { + unsigned short wdtimk : 1; + unsigned short lvimk : 1; + unsigned short pmk0 : 1; + unsigned short pmk1 : 1; + unsigned short pmk2 : 1; + unsigned short pmk3 : 1; + unsigned short pmk4 : 1; + unsigned short pmk5 : 1; +}; + +struct MK0Lstruct { + unsigned char wdtimk : 1; + unsigned char lvimk : 1; + unsigned char pmk0 : 1; + unsigned char pmk1 : 1; + unsigned char pmk2 : 1; + unsigned char pmk3 : 1; + unsigned char pmk4 : 1; + unsigned char pmk5 : 1; +}; + +struct MK0Hstruct { + unsigned char stmk2 : 1; + unsigned char srmk2 : 1; + unsigned char tmmk11h : 1; + unsigned char dmamk0 : 1; + unsigned char dmamk1 : 1; + unsigned char stmk0 : 1; + unsigned char srmk0 : 1; + unsigned char tmmk01h : 1; +}; + +struct MK1struct { + unsigned short stmk1 : 1; + unsigned short srmk1 : 1; + unsigned short tmmk03h : 1; + unsigned short iicamk0 : 1; + unsigned short tmmk00 : 1; + unsigned short tmmk01 : 1; + unsigned short tmmk02 : 1; + unsigned short tmmk03 : 1; +}; + +struct MK1Lstruct { + unsigned char stmk1 : 1; + unsigned char srmk1 : 1; + unsigned char tmmk03h : 1; + unsigned char iicamk0 : 1; + unsigned char tmmk00 : 1; + unsigned char tmmk01 : 1; + unsigned char tmmk02 : 1; + unsigned char tmmk03 : 1; +}; + +struct MK1Hstruct { + unsigned char admk : 1; + unsigned char rtcmk : 1; + unsigned char itmk : 1; + unsigned char krmk : 1; + unsigned char stmk3 : 1; + unsigned char srmk3 : 1; + unsigned char tmmk13 : 1; + unsigned char tmmk04 : 1; +}; + +struct PR00struct { + unsigned short wdtipr0 : 1; + unsigned short lvipr0 : 1; + unsigned short ppr00 : 1; + unsigned short ppr01 : 1; + unsigned short ppr02 : 1; + unsigned short ppr03 : 1; + unsigned short ppr04 : 1; + unsigned short ppr05 : 1; +}; + +struct PR00Lstruct { + unsigned char wdtipr0 : 1; + unsigned char lvipr0 : 1; + unsigned char ppr00 : 1; + unsigned char ppr01 : 1; + unsigned char ppr02 : 1; + unsigned char ppr03 : 1; + unsigned char ppr04 : 1; + unsigned char ppr05 : 1; +}; + +struct PR00Hstruct { + unsigned char stpr02 : 1; + unsigned char srpr02 : 1; + unsigned char tmpr011h : 1; + unsigned char dmapr00 : 1; + unsigned char dmapr01 : 1; + unsigned char stpr00 : 1; + unsigned char srpr00 : 1; + unsigned char tmpr001h : 1; +}; + +struct PR01struct { + unsigned short stpr01 : 1; + unsigned short srpr01 : 1; + unsigned short tmpr003h : 1; + unsigned short iicapr00 : 1; + unsigned short tmpr000 : 1; + unsigned short tmpr001 : 1; + unsigned short tmpr002 : 1; + unsigned short tmpr003 : 1; +}; + +struct PR01Lstruct { + unsigned char stpr01 : 1; + unsigned char srpr01 : 1; + unsigned char tmpr003h : 1; + unsigned char iicapr00 : 1; + unsigned char tmpr000 : 1; + unsigned char tmpr001 : 1; + unsigned char tmpr002 : 1; + unsigned char tmpr003 : 1; +}; + +struct PR01Hstruct { + unsigned char adpr0 : 1; + unsigned char rtcpr0 : 1; + unsigned char itpr0 : 1; + unsigned char krpr0 : 1; + unsigned char stpr03 : 1; + unsigned char srpr03 : 1; + unsigned char tmpr013 : 1; + unsigned char tmpr004 : 1; +}; + +struct PR10struct { + unsigned short wdtipr1 : 1; + unsigned short lvipr1 : 1; + unsigned short ppr10 : 1; + unsigned short ppr11 : 1; + unsigned short ppr12 : 1; + unsigned short ppr13 : 1; + unsigned short ppr14 : 1; + unsigned short ppr15 : 1; +}; + +struct PR10Lstruct { + unsigned char wdtipr1 : 1; + unsigned char lvipr1 : 1; + unsigned char ppr10 : 1; + unsigned char ppr11 : 1; + unsigned char ppr12 : 1; + unsigned char ppr13 : 1; + unsigned char ppr14 : 1; + unsigned char ppr15 : 1; +}; + +struct PR10Hstruct { + unsigned char stpr12 : 1; + unsigned char srpr12 : 1; + unsigned char tmpr111h : 1; + unsigned char dmapr10 : 1; + unsigned char dmapr11 : 1; + unsigned char stpr10 : 1; + unsigned char srpr10 : 1; + unsigned char tmpr101h : 1; +}; + +struct PR11struct { + unsigned short stpr11 : 1; + unsigned short srpr11 : 1; + unsigned short tmpr103h : 1; + unsigned short iicapr10 : 1; + unsigned short tmpr100 : 1; + unsigned short tmpr101 : 1; + unsigned short tmpr102 : 1; + unsigned short tmpr103 : 1; +}; + +struct PR11Lstruct { + unsigned char stpr11 : 1; + unsigned char srpr11 : 1; + unsigned char tmpr103h : 1; + unsigned char iicapr10 : 1; + unsigned char tmpr100 : 1; + unsigned char tmpr101 : 1; + unsigned char tmpr102 : 1; + unsigned char tmpr103 : 1; +}; + +struct PR11Hstruct { + unsigned char adpr1 : 1; + unsigned char rtcpr1 : 1; + unsigned char itpr1 : 1; + unsigned char krpr1 : 1; + unsigned char stpr13 : 1; + unsigned char srpr13 : 1; + unsigned char tmpr113 : 1; + unsigned char tmpr104 : 1; +}; + +struct MDALstruct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct MULAstruct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct MDAHstruct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct MULBstruct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct MDBHstruct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct MULOHstruct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct MDBLstruct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct MULOLstruct { + unsigned short bit0 : 1; + unsigned short bit1 : 1; + unsigned short bit2 : 1; + unsigned short bit3 : 1; + unsigned short bit4 : 1; + unsigned short bit5 : 1; + unsigned short bit6 : 1; + unsigned short bit7 : 1; + unsigned short bit8 : 1; + unsigned short bit9 : 1; + unsigned short bit10 : 1; + unsigned short bit11 : 1; + unsigned short bit12 : 1; + unsigned short bit13 : 1; + unsigned short bit14 : 1; + unsigned short bit15 : 1; +}; + +struct PMCstruct { + unsigned char maa : 1; +}; + +#define P0bits (*(volatile struct P0struct *)0xFFF00) +#define P1bits (*(volatile struct P1struct *)0xFFF01) +#define P2bits (*(volatile struct P2struct *)0xFFF02) +#define P3bits (*(volatile struct P3struct *)0xFFF03) +#define P4bits (*(volatile struct P4struct *)0xFFF04) +#define P5bits (*(volatile struct P5struct *)0xFFF05) +#define P6bits (*(volatile struct P6struct *)0xFFF06) +#define P7bits (*(volatile struct P7struct *)0xFFF07) +#define P8bits (*(volatile struct P8struct *)0xFFF08) +#define P9bits (*(volatile struct P9struct *)0xFFF09) +#define P10bits (*(volatile struct P10struct *)0xFFF0A) +#define P11bits (*(volatile struct P11struct *)0xFFF0B) +#define P12bits (*(volatile struct P12struct *)0xFFF0C) +#define P13bits (*(volatile struct P13struct *)0xFFF0D) +#define P14bits (*(volatile struct P14struct *)0xFFF0E) +#define P15bits (*(volatile struct P15struct *)0xFFF0F) +#define SDR00bits (*(volatile struct SDR00struct *)0xFFF10) +#define SIO00bits (*(volatile struct SIO00struct *)0xFFF10) +#define TXD0bits (*(volatile struct TXD0struct *)0xFFF10) +#define SDR01bits (*(volatile struct SDR01struct *)0xFFF12) +#define RXD0bits (*(volatile struct RXD0struct *)0xFFF12) +#define SIO01bits (*(volatile struct SIO01struct *)0xFFF12) +#define SDR12bits (*(volatile struct SDR12struct *)0xFFF14) +#define SIO30bits (*(volatile struct SIO30struct *)0xFFF14) +#define TXD3bits (*(volatile struct TXD3struct *)0xFFF14) +#define SDR13bits (*(volatile struct SDR13struct *)0xFFF16) +#define RXD3bits (*(volatile struct RXD3struct *)0xFFF16) +#define SIO31bits (*(volatile struct SIO31struct *)0xFFF16) +#define TDR00bits (*(volatile struct TDR00struct *)0xFFF18) +#define TDR01bits (*(volatile struct TDR01struct *)0xFFF1A) +#define TDR01Lbits (*(volatile struct TDR01Lstruct *)0xFFF1A) +#define TDR01Hbits (*(volatile struct TDR01Hstruct *)0xFFF1B) +#define ADCRbits (*(volatile struct ADCRstruct *)0xFFF1E) +#define ADCRHbits (*(volatile struct ADCRHstruct *)0xFFF1F) +#define PM0bits (*(volatile struct PM0struct *)0xFFF20) +#define PM1bits (*(volatile struct PM1struct *)0xFFF21) +#define PM2bits (*(volatile struct PM2struct *)0xFFF22) +#define PM3bits (*(volatile struct PM3struct *)0xFFF23) +#define PM4bits (*(volatile struct PM4struct *)0xFFF24) +#define PM5bits (*(volatile struct PM5struct *)0xFFF25) +#define PM6bits (*(volatile struct PM6struct *)0xFFF26) +#define PM7bits (*(volatile struct PM7struct *)0xFFF27) +#define PM8bits (*(volatile struct PM8struct *)0xFFF28) +#define PM9bits (*(volatile struct PM9struct *)0xFFF29) +#define PM10bits (*(volatile struct PM10struct *)0xFFF2A) +#define PM11bits (*(volatile struct PM11struct *)0xFFF2B) +#define PM12bits (*(volatile struct PM12struct *)0xFFF2C) +#define PM14bits (*(volatile struct PM14struct *)0xFFF2E) +#define PM15bits (*(volatile struct PM15struct *)0xFFF2F) +#define ADM0bits (*(volatile struct ADM0struct *)0xFFF30) +#define ADSbits (*(volatile struct ADSstruct *)0xFFF31) +#define ADM1bits (*(volatile struct ADM1struct *)0xFFF32) +#define KRMbits (*(volatile struct KRMstruct *)0xFFF37) +#define EGP0bits (*(volatile struct EGP0struct *)0xFFF38) +#define EGN0bits (*(volatile struct EGN0struct *)0xFFF39) +#define EGP1bits (*(volatile struct EGP1struct *)0xFFF3A) +#define EGN1bits (*(volatile struct EGN1struct *)0xFFF3B) +#define SDR02bits (*(volatile struct SDR02struct *)0xFFF44) +#define SIO10bits (*(volatile struct SIO10struct *)0xFFF44) +#define TXD1bits (*(volatile struct TXD1struct *)0xFFF44) +#define SDR03bits (*(volatile struct SDR03struct *)0xFFF46) +#define RXD1bits (*(volatile struct RXD1struct *)0xFFF46) +#define SIO11bits (*(volatile struct SIO11struct *)0xFFF46) +#define SDR10bits (*(volatile struct SDR10struct *)0xFFF48) +#define SIO20bits (*(volatile struct SIO20struct *)0xFFF48) +#define TXD2bits (*(volatile struct TXD2struct *)0xFFF48) +#define SDR11bits (*(volatile struct SDR11struct *)0xFFF4A) +#define RXD2bits (*(volatile struct RXD2struct *)0xFFF4A) +#define SIO21bits (*(volatile struct SIO21struct *)0xFFF4A) +#define IICA0bits (*(volatile struct IICA0struct *)0xFFF50) +#define IICS0bits (*(volatile struct IICS0struct *)0xFFF51) +#define IICF0bits (*(volatile struct IICF0struct *)0xFFF52) +#define IICA1bits (*(volatile struct IICA1struct *)0xFFF54) +#define IICS1bits (*(volatile struct IICS1struct *)0xFFF55) +#define IICF1bits (*(volatile struct IICF1struct *)0xFFF56) +#define TDR02bits (*(volatile struct TDR02struct *)0xFFF64) +#define TDR03bits (*(volatile struct TDR03struct *)0xFFF66) +#define TDR03Lbits (*(volatile struct TDR03Lstruct *)0xFFF66) +#define TDR03Hbits (*(volatile struct TDR03Hstruct *)0xFFF67) +#define TDR04bits (*(volatile struct TDR04struct *)0xFFF68) +#define TDR05bits (*(volatile struct TDR05struct *)0xFFF6A) +#define TDR06bits (*(volatile struct TDR06struct *)0xFFF6C) +#define TDR07bits (*(volatile struct TDR07struct *)0xFFF6E) +#define TDR10bits (*(volatile struct TDR10struct *)0xFFF70) +#define TDR11bits (*(volatile struct TDR11struct *)0xFFF72) +#define TDR11Lbits (*(volatile struct TDR11Lstruct *)0xFFF72) +#define TDR11Hbits (*(volatile struct TDR11Hstruct *)0xFFF73) +#define TDR12bits (*(volatile struct TDR12struct *)0xFFF74) +#define TDR13bits (*(volatile struct TDR13struct *)0xFFF76) +#define TDR13Lbits (*(volatile struct TDR13Lstruct *)0xFFF76) +#define TDR13Hbits (*(volatile struct TDR13Hstruct *)0xFFF77) +#define TDR14bits (*(volatile struct TDR14struct *)0xFFF78) +#define TDR15bits (*(volatile struct TDR15struct *)0xFFF7A) +#define TDR16bits (*(volatile struct TDR16struct *)0xFFF7C) +#define TDR17bits (*(volatile struct TDR17struct *)0xFFF7E) +#define FLPMCbits (*(volatile struct FLPMCstruct *)0xFFF80) +#define FLARSbits (*(volatile struct FLARSstruct *)0xFFF81) +#define FLAPLbits (*(volatile struct FLAPLstruct *)0xFFF82) +#define FLAPHbits (*(volatile struct FLAPHstruct *)0xFFF84) +#define FSSQbits (*(volatile struct FSSQstruct *)0xFFF85) +#define FLSEDLbits (*(volatile struct FLSEDLstruct *)0xFFF86) +#define FLSEDHbits (*(volatile struct FLSEDHstruct *)0xFFF88) +#define FLRSTbits (*(volatile struct FLRSTstruct *)0xFFF89) +#define FSASTLbits (*(volatile struct FSASTLstruct *)0xFFF8A) +#define FSASTHbits (*(volatile struct FSASTHstruct *)0xFFF8B) +#define FLWLbits (*(volatile struct FLWLstruct *)0xFFF8C) +#define FLWHbits (*(volatile struct FLWHstruct *)0xFFF8E) +#define ITMCbits (*(volatile struct ITMCstruct *)0xFFF90) +#define SECbits (*(volatile struct SECstruct *)0xFFF92) +#define MINbits (*(volatile struct MINstruct *)0x) +#define HOURbits (*(volatile struct HOURstruct *)0xFFF94) +#define WEEKbits (*(volatile struct WEEKstruct *)0xFFF95) +#define DAYbits (*(volatile struct DAYstruct *)0xFFF96) +#define MONTHbits (*(volatile struct MONTHstruct *)0xFFF97) +#define YEARbits (*(volatile struct YEARstruct *)0xFFF98) +#define SUBCUDbits (*(volatile struct SUBCUDstruct *)0xFFF99) +#define ALARMWMbits (*(volatile struct ALARMWMstruct *)0xFFF9A) +#define ALARMWHbits (*(volatile struct ALARMWHstruct *)0xFFF9B) +#define ALARMWWbits (*(volatile struct ALARMWWstruct *)0xFFF9C) +#define RTCC0bits (*(volatile struct RTCC0struct *)0xFFF9D) +#define RTCC1bits (*(volatile struct RTCC1struct *)0xFFF9E) +#define CMCbits (*(volatile struct CMCstruct *)0xFFFA0) +#define CSCbits (*(volatile struct CSCstruct *)0xFFFA1) +#define OSTCbits (*(volatile struct OSTCstruct *)0xFFFA2) +#define OSTSbits (*(volatile struct OSTSstruct *)0xFFFA3) +#define CKCbits (*(volatile struct CKCstruct *)0xFFFA4) +#define CKS0bits (*(volatile struct CKS0struct *)0xFFFA5) +#define CKS1bits (*(volatile struct CKS1struct *)0xFFFA6) +#define RESFbits (*(volatile struct RESFstruct *)0xFFFA8) +#define LVIMbits (*(volatile struct LVIMstruct *)0xFFFA9) +#define LVISbits (*(volatile struct LVISstruct *)0xFFFAA) +#define WDTEbits (*(volatile struct WDTEstruct *)0xFFFAB) +#define CRCINbits (*(volatile struct CRCINstruct *)0xFFFAC) +#define RXBbits (*(volatile struct RXBstruct *)0xFFFAD) +#define TXSbits (*(volatile struct TXSstruct *)0xFFFAD) +#define MONSTA0bits (*(volatile struct MONSTA0struct *)0xFFFAE) +#define ASIMbits (*(volatile struct ASIMstruct *)0xFFFAF) +#define DSA0bits (*(volatile struct DSA0struct *)0xFFFB0) +#define DSA1bits (*(volatile struct DSA1struct *)0xFFFB1) +#define DRA0bits (*(volatile struct DRA0struct *)0xFFFB2) +#define DRA0Lbits (*(volatile struct DRA0Lstruct *)0xFFFB2) +#define DRA0Hbits (*(volatile struct DRA0Hstruct *)0xFFFB3) +#define DRA1bits (*(volatile struct DRA1struct *)0xFFFB4) +#define DRA1Lbits (*(volatile struct DRA1Lstruct *)0xFFFB4) +#define DRA1Hbits (*(volatile struct DRA1Hstruct *)0xFFFB5) +#define DBC0bits (*(volatile struct DBC0struct *)0xFFFB6) +#define DBC0Lbits (*(volatile struct DBC0Lstruct *)0xFFFB6) +#define DBC0Hbits (*(volatile struct DBC0Hstruct *)0xFFFB7) +#define DBC1bits (*(volatile struct DBC1struct *)0xFFFB8) +#define DBC1Lbits (*(volatile struct DBC1Lstruct *)0xFFFB8) +#define DBC1Hbits (*(volatile struct DBC1Hstruct *)0xFFFB9) +#define DMC0bits (*(volatile struct DMC0struct *)0xFFFBA) +#define DMC1bits (*(volatile struct DMC1struct *)0xFFFBB) +#define DRC0bits (*(volatile struct DRC0struct *)0xFFFBC) +#define DRC1bits (*(volatile struct DRC1struct *)0xFFFBD) +#define IF2bits (*(volatile struct IF2struct *)0xFFFD0) +#define IF2Lbits (*(volatile struct IF2Lstruct *)0xFFFD0) +#define IF2Hbits (*(volatile struct IF2Hstruct *)0xFFFD1) +#define IF3bits (*(volatile struct IF3struct *)0xFFFD2) +#define IF3Lbits (*(volatile struct IF3Lstruct *)0xFFFD2) +#define MK2bits (*(volatile struct MK2struct *)0xFFFD4) +#define MK2Lbits (*(volatile struct MK2Lstruct *)0xFFFD4) +#define MK2Hbits (*(volatile struct MK2Hstruct *)0xFFFD5) +#define MK3bits (*(volatile struct MK3struct *)0xFFFD6) +#define MK3Lbits (*(volatile struct MK3Lstruct *)0xFFFD6) +#define PR02bits (*(volatile struct PR02struct *)0xFFFD8) +#define PR02Lbits (*(volatile struct PR02Lstruct *)0xFFFD8) +#define PR02Hbits (*(volatile struct PR02Hstruct *)0xFFFD9) +#define PR03bits (*(volatile struct PR03struct *)0xFFFDA) +#define PR03Lbits (*(volatile struct PR03Lstruct *)0xFFFDA) +#define PR12bits (*(volatile struct PR12struct *)0xFFFDC) +#define PR12Lbits (*(volatile struct PR12Lstruct *)0xFFFDC) +#define PR12Hbits (*(volatile struct PR12Hstruct *)0xFFFDD) +#define PR13bits (*(volatile struct PR13struct *)0xFFFDE) +#define PR13Lbits (*(volatile struct PR13Lstruct *)0xFFFDE) +#define IF0bits (*(volatile struct IF0struct *)0xFFFE0) +#define IF0Lbits (*(volatile struct IF0Lstruct *)0xFFFE0) +#define IF0Hbits (*(volatile struct IF0Hstruct *)0xFFFE1) +#define IF1bits (*(volatile struct IF1struct *)0xFFFE2) +#define IF1Lbits (*(volatile struct IF1Lstruct *)0xFFFE2) +#define IF1Hbits (*(volatile struct IF1Hstruct *)0xFFFE3) +#define MK0bits (*(volatile struct MK0struct *)0xFFFE4) +#define MK0Lbits (*(volatile struct MK0Lstruct *)0xFFFE4) +#define MK0Hbits (*(volatile struct MK0Hstruct *)0xFFFE5) +#define MK1bits (*(volatile struct MK1struct *)0xFFFE6) +#define MK1Lbits (*(volatile struct MK1Lstruct *)0xFFFE6) +#define MK1Hbits (*(volatile struct MK1Hstruct *)0xFFFE7) +#define PR00bits (*(volatile struct PR00struct *)0xFFFE8) +#define PR00Lbits (*(volatile struct PR00Lstruct *)0xFFFE8) +#define PR00Hbits (*(volatile struct PR00Hstruct *)0xFFFE9) +#define PR01bits (*(volatile struct PR01struct *)0xFFFEA) +#define PR01Lbits (*(volatile struct PR01Lstruct *)0xFFFEA) +#define PR01Hbits (*(volatile struct PR01Hstruct *)0xFFFEB) +#define PR10bits (*(volatile struct PR10struct *)0xFFFEC) +#define PR10Lbits (*(volatile struct PR10Lstruct *)0xFFFEC) +#define PR10Hbits (*(volatile struct PR10Hstruct *)0xFFFED) +#define PR11bits (*(volatile struct PR11struct *)0xFFFEE) +#define PR11Lbits (*(volatile struct PR11Lstruct *)0xFFFEE) +#define PR11Hbits (*(volatile struct PR11Hstruct *)0xFFFEF) +#define MDALbits (*(volatile struct MDALstruct *)0xFFFF0) +#define MULAbits (*(volatile struct MULAstruct *)0xFFFF0) +#define MDAHbits (*(volatile struct MDAHstruct *)0xFFFF2) +#define MULBbits (*(volatile struct MULBstruct *)0xFFFF2) +#define MDBHbits (*(volatile struct MDBHstruct *)0xFFFF4) +#define MULOHbits (*(volatile struct MULOHstruct *)0xFFFF4) +#define MDBLbits (*(volatile struct MDBLstruct *)0xFFFF6) +#define MULOLbits (*(volatile struct MULOLstruct *)0xFFFF6) +#define PMCbits (*(volatile struct PMCstruct *)0xFFFFE) + +/* Named Register bits: */ +#define ADCE (ADM0bits.adce) +#define ADCS (ADM0bits.adcs) +#define SPD0 (IICS0bits.spd0) +#define STD0 (IICS0bits.std0) +#define ACKD0 (IICS0bits.ackd0) +#define TRC0 (IICS0bits.trc0) +#define COI0 (IICS0bits.coi0) +#define EXC0 (IICS0bits.exc0) +#define ALD0 (IICS0bits.ald0) +#define MSTS0 (IICS0bits.msts0) +#define IICRSV0 (IICF0bits.iicrsv0) +#define STCEN0 (IICF0bits.stcen0) +#define IICBSY0 (IICF0bits.iicbsy0) +#define STCF0 (IICF0bits.stcf0) +#define SPD1 (IICS1bits.spd1) +#define STD1 (IICS1bits.std1) +#define ACKD1 (IICS1bits.ackd1) +#define TRC1 (IICS1bits.trc1) +#define COI1 (IICS1bits.coi1) +#define EXC1 (IICS1bits.exc1) +#define ALD1 (IICS1bits.ald1) +#define MSTS1 (IICS1bits.msts1) +#define IICRSV1 (IICF1bits.iicrsv1) +#define STCEN1 (IICF1bits.stcen1) +#define IICBSY1 (IICF1bits.iicbsy1) +#define STCF1 (IICF1bits.stcf1) +#define FSSTP (FSSQbits.fsstp) +#define SQST (FSSQbits.sqst) +#define SQEND (FSASTHbits.sqend) +#define ESQEND (FSASTHbits.esqend) +#define RCLOE1 (RTCC0bits.rcloe1) +#define RTCE (RTCC0bits.rtce) +#define RWAIT (RTCC1bits.rwait) +#define RWST (RTCC1bits.rwst) +#define RIFG (RTCC1bits.rifg) +#define WAFG (RTCC1bits.wafg) +#define WALIE (RTCC1bits.walie) +#define WALE (RTCC1bits.wale) +#define HIOSTOP (CSCbits.hiostop) +#define XTSTOP (CSCbits.xtstop) +#define MSTOP (CSCbits.mstop) +#define SDIV (CKCbits.sdiv) +#define MCM0 (CKCbits.mcm0) +#define MCS (CKCbits.mcs) +#define CSS (CKCbits.css) +#define CLS (CKCbits.cls) +#define PCLOE0 (CKS0bits.pcloe0) +#define PCLOE1 (CKS1bits.pcloe1) +#define LVIF (LVIMbits.lvif) +#define LVIOMSK (LVIMbits.lviomsk) +#define LVISEN (LVIMbits.lvisen) +#define LVILV (LVISbits.lvilv) +#define LVIMD (LVISbits.lvimd) +#define DWAIT0 (DMC0bits.dwait0) +#define DS0 (DMC0bits.ds0) +#define DRS0 (DMC0bits.drs0) +#define STG0 (DMC0bits.stg0) +#define DWAIT1 (DMC1bits.dwait1) +#define DS1 (DMC1bits.ds1) +#define DRS1 (DMC1bits.drs1) +#define STG1 (DMC1bits.stg1) +#define DST0 (DRC0bits.dst0) +#define DEN0 (DRC0bits.den0) +#define DST1 (DRC1bits.dst1) +#define DEN1 (DRC1bits.den1) +#define TMIF05 (IF2Lbits.tmif05) +#define TMIF06 (IF2Lbits.tmif06) +#define TMIF07 (IF2Lbits.tmif07) +#define PIF6 (IF2Lbits.pif6) +#define PIF7 (IF2Lbits.pif7) +#define PIF8 (IF2Lbits.pif8) +#define PIF9 (IF2Lbits.pif9) +#define PIF10 (IF2Lbits.pif10) +#define PIF11 (IF2Hbits.pif11) +#define TMIF10 (IF2Hbits.tmif10) +#define TMIF11 (IF2Hbits.tmif11) +#define TMIF12 (IF2Hbits.tmif12) +#define TMIF13H (IF2Hbits.tmif13h) +#define MDIF (IF2Hbits.mdif) +#define IICAIF1 (IF2Hbits.iicaif1) +#define FLIF (IF2Hbits.flif) +#define DMAIF2 (IF3Lbits.dmaif2) +#define DMAIF3 (IF3Lbits.dmaif3) +#define TMIF14 (IF3Lbits.tmif14) +#define TMIF15 (IF3Lbits.tmif15) +#define TMIF16 (IF3Lbits.tmif16) +#define TMIF17 (IF3Lbits.tmif17) +#define TMMK05 (MK2Lbits.tmmk05) +#define TMMK06 (MK2Lbits.tmmk06) +#define TMMK07 (MK2Lbits.tmmk07) +#define PMK6 (MK2Lbits.pmk6) +#define PMK7 (MK2Lbits.pmk7) +#define PMK8 (MK2Lbits.pmk8) +#define PMK9 (MK2Lbits.pmk9) +#define PMK10 (MK2Lbits.pmk10) +#define PMK11 (MK2Hbits.pmk11) +#define TMMK10 (MK2Hbits.tmmk10) +#define TMMK11 (MK2Hbits.tmmk11) +#define TMMK12 (MK2Hbits.tmmk12) +#define TMMK13H (MK2Hbits.tmmk13h) +#define MDMK (MK2Hbits.mdmk) +#define IICAMK1 (MK2Hbits.iicamk1) +#define FLMK (MK2Hbits.flmk) +#define DMAMK2 (MK3Lbits.dmamk2) +#define DMAMK3 (MK3Lbits.dmamk3) +#define TMMK14 (MK3Lbits.tmmk14) +#define TMMK15 (MK3Lbits.tmmk15) +#define TMMK16 (MK3Lbits.tmmk16) +#define TMMK17 (MK3Lbits.tmmk17) +#define TMPR005 (PR02Lbits.tmpr005) +#define TMPR006 (PR02Lbits.tmpr006) +#define TMPR007 (PR02Lbits.tmpr007) +#define PPR06 (PR02Lbits.ppr06) +#define PPR07 (PR02Lbits.ppr07) +#define PPR08 (PR02Lbits.ppr08) +#define PPR09 (PR02Lbits.ppr09) +#define PPR010 (PR02Lbits.ppr010) +#define PPR011 (PR02Hbits.ppr011) +#define TMPR010 (PR02Hbits.tmpr010) +#define TMPR011 (PR02Hbits.tmpr011) +#define TMPR012 (PR02Hbits.tmpr012) +#define TMPR013H (PR02Hbits.tmpr013h) +#define MDPR0 (PR02Hbits.mdpr0) +#define IICAPR01 (PR02Hbits.iicapr01) +#define FLPR0 (PR02Hbits.flpr0) +#define DMAPR02 (PR03Lbits.dmapr02) +#define DMAPR03 (PR03Lbits.dmapr03) +#define TMPR014 (PR03Lbits.tmpr014) +#define TMPR015 (PR03Lbits.tmpr015) +#define TMPR016 (PR03Lbits.tmpr016) +#define TMPR017 (PR03Lbits.tmpr017) +#define TMPR105 (PR12Lbits.tmpr105) +#define TMPR106 (PR12Lbits.tmpr106) +#define TMPR107 (PR12Lbits.tmpr107) +#define PPR16 (PR12Lbits.ppr16) +#define PPR17 (PR12Lbits.ppr17) +#define PPR18 (PR12Lbits.ppr18) +#define PPR19 (PR12Lbits.ppr19) +#define PPR110 (PR12Lbits.ppr110) +#define PPR111 (PR12Hbits.ppr111) +#define TMPR110 (PR12Hbits.tmpr110) +#define TMPR111 (PR12Hbits.tmpr111) +#define TMPR112 (PR12Hbits.tmpr112) +#define TMPR113H (PR12Hbits.tmpr113h) +#define MDPR1 (PR12Hbits.mdpr1) +#define IICAPR11 (PR12Hbits.iicapr11) +#define FLPR1 (PR12Hbits.flpr1) +#define DMAPR12 (PR13Lbits.dmapr12) +#define DMAPR13 (PR13Lbits.dmapr13) +#define TMPR114 (PR13Lbits.tmpr114) +#define TMPR115 (PR13Lbits.tmpr115) +#define TMPR116 (PR13Lbits.tmpr116) +#define TMPR117 (PR13Lbits.tmpr117) +#define WDTIIF (IF0Lbits.wdtiif) +#define LVIIF (IF0Lbits.lviif) +#define PIF0 (IF0Lbits.pif0) +#define PIF1 (IF0Lbits.pif1) +#define PIF2 (IF0Lbits.pif2) +#define PIF3 (IF0Lbits.pif3) +#define PIF4 (IF0Lbits.pif4) +#define PIF5 (IF0Lbits.pif5) +#define STIF2 (IF0Hbits.stif2) +#define SRIF2 (IF0Hbits.srif2) +#define TMIF11H (IF0Hbits.tmif11h) +#define DMAIF0 (IF0Hbits.dmaif0) +#define DMAIF1 (IF0Hbits.dmaif1) +#define STIF0 (IF0Hbits.stif0) +#define SRIF0 (IF0Hbits.srif0) +#define TMIF01H (IF0Hbits.tmif01h) +#define SREIF0 (IF0Hbits.tmif01h) +#define STIF1 (IF1Lbits.stif1) +#define SRIF1 (IF1Lbits.srif1) +#define TMIF03H (IF1Lbits.tmif03h) +#define IICAIF0 (IF1Lbits.iicaif0) +#define TMIF00 (IF1Lbits.tmif00) +#define TMIF01 (IF1Lbits.tmif01) +#define TMIF02 (IF1Lbits.tmif02) +#define TMIF03 (IF1Lbits.tmif03) +#define ADIF (IF1Hbits.adif) +#define RTCIF (IF1Hbits.rtcif) +#define ITIF (IF1Hbits.itif) +#define KRIF (IF1Hbits.krif) +#define STIF3 (IF1Hbits.stif3) +#define SRIF3 (IF1Hbits.srif3) +#define TMIF13 (IF1Hbits.tmif13) +#define TMIF04 (IF1Hbits.tmif04) +#define WDTIMK (MK0Lbits.wdtimk) +#define LVIMK (MK0Lbits.lvimk) +#define PMK0 (MK0Lbits.pmk0) +#define PMK1 (MK0Lbits.pmk1) +#define PMK2 (MK0Lbits.pmk2) +#define PMK3 (MK0Lbits.pmk3) +#define PMK4 (MK0Lbits.pmk4) +#define PMK5 (MK0Lbits.pmk5) +#define STMK2 (MK0Hbits.stmk2) +#define SRMK2 (MK0Hbits.srmk2) +#define TMMK11H (MK0Hbits.tmmk11h) +#define DMAMK0 (MK0Hbits.dmamk0) +#define DMAMK1 (MK0Hbits.dmamk1) +#define STMK0 (MK0Hbits.stmk0) +#define SRMK0 (MK0Hbits.srmk0) +#define TMMK01H (MK0Hbits.tmmk01h) +#define SREMK0 (MK0Hbits.tmmk01h) +#define STMK1 (MK1Lbits.stmk1) +#define SRMK1 (MK1Lbits.srmk1) +#define TMMK03H (MK1Lbits.tmmk03h) +#define IICAMK0 (MK1Lbits.iicamk0) +#define TMMK00 (MK1Lbits.tmmk00) +#define TMMK01 (MK1Lbits.tmmk01) +#define TMMK02 (MK1Lbits.tmmk02) +#define TMMK03 (MK1Lbits.tmmk03) +#define ADMK (MK1Hbits.admk) +#define RTCMK (MK1Hbits.rtcmk) +#define ITMK (MK1Hbits.itmk) +#define KRMK (MK1Hbits.krmk) +#define STMK3 (MK1Hbits.stmk3) +#define SRMK3 (MK1Hbits.srmk3) +#define TMMK13 (MK1Hbits.tmmk13) +#define TMMK04 (MK1Hbits.tmmk04) +#define WDTIPR0 (PR00Lbits.wdtipr0) +#define LVIPR0 (PR00Lbits.lvipr0) +#define PPR00 (PR00Lbits.ppr00) +#define PPR01 (PR00Lbits.ppr01) +#define PPR02 (PR00Lbits.ppr02) +#define PPR03 (PR00Lbits.ppr03) +#define PPR04 (PR00Lbits.ppr04) +#define PPR05 (PR00Lbits.ppr05) +#define STPR02 (PR00Hbits.stpr02) +#define SRPR02 (PR00Hbits.srpr02) +#define TMPR011H (PR00Hbits.tmpr011h) +#define DMAPR00 (PR00Hbits.dmapr00) +#define DMAPR01 (PR00Hbits.dmapr01) +#define STPR00 (PR00Hbits.stpr00) +#define SRPR00 (PR00Hbits.srpr00) +#define TMPR001H (PR00Hbits.tmpr001h) +#define SREPR00 (PR00Hbits.tmpr001h) +#define STPR01 (PR01Lbits.stpr01) +#define SRPR01 (PR01Lbits.srpr01) +#define TMPR003H (PR01Lbits.tmpr003h) +#define IICAPR00 (PR01Lbits.iicapr00) +#define TMPR000 (PR01Lbits.tmpr000) +#define TMPR001 (PR01Lbits.tmpr001) +#define TMPR002 (PR01Lbits.tmpr002) +#define TMPR003 (PR01Lbits.tmpr003) +#define ADPR0 (PR01Hbits.adpr0) +#define RTCPR0 (PR01Hbits.rtcpr0) +#define ITPR0 (PR01Hbits.itpr0) +#define KRPR0 (PR01Hbits.krpr0) +#define STPR03 (PR01Hbits.stpr03) +#define SRPR03 (PR01Hbits.srpr03) +#define TMPR013 (PR01Hbits.tmpr013) +#define TMPR004 (PR01Hbits.tmpr004) +#define WDTIPR1 (PR10Lbits.wdtipr1) +#define LVIPR1 (PR10Lbits.lvipr1) +#define PPR10 (PR10Lbits.ppr10) +#define PPR11 (PR10Lbits.ppr11) +#define PPR12 (PR10Lbits.ppr12) +#define PPR13 (PR10Lbits.ppr13) +#define PPR14 (PR10Lbits.ppr14) +#define PPR15 (PR10Lbits.ppr15) +#define STPR12 (PR10Hbits.stpr12) +#define SRPR12 (PR10Hbits.srpr12) +#define TMPR111H (PR10Hbits.tmpr111h) +#define DMAPR10 (PR10Hbits.dmapr10) +#define DMAPR11 (PR10Hbits.dmapr11) +#define STPR10 (PR10Hbits.stpr10) +#define SRPR10 (PR10Hbits.srpr10) +#define TMPR101H (PR10Hbits.tmpr101h) +#define SREPR10 (PR10Hbits.tmpr101h) +#define STPR11 (PR11Lbits.stpr11) +#define SRPR11 (PR11Lbits.srpr11) +#define TMPR103H (PR11Lbits.tmpr103h) +#define IICAPR10 (PR11Lbits.iicapr10) +#define TMPR100 (PR11Lbits.tmpr100) +#define TMPR101 (PR11Lbits.tmpr101) +#define TMPR102 (PR11Lbits.tmpr102) +#define TMPR103 (PR11Lbits.tmpr103) +#define ADPR1 (PR11Hbits.adpr1) +#define RTCPR1 (PR11Hbits.rtcpr1) +#define ITPR1 (PR11Hbits.itpr1) +#define KRPR1 (PR11Hbits.krpr1) +#define STPR13 (PR11Hbits.stpr13) +#define SRPR13 (PR11Hbits.srpr13) +#define TMPR113 (PR11Hbits.tmpr113) +#define TMPR104 (PR11Hbits.tmpr104) +#define MAA (PMCbits.maa) + +#endif /* SFRS_H */ diff --git a/cpu/rl78/slip-arch.c b/cpu/rl78/slip-arch.c new file mode 100644 index 000000000..e714583b7 --- /dev/null +++ b/cpu/rl78/slip-arch.c @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2014, Analog Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** + * \author Ian Martin + */ + +#include /* for putchar(). */ + +#include "contiki.h" +#include "dev/slip.h" + +#include "uart0.h" +#include "slip-arch.h" + +/*---------------------------------------------------------------------------*/ +void +slip_arch_writeb(unsigned char c) +{ + uart0_putchar(c); +} +/*---------------------------------------------------------------------------*/ +/** + * Initalize the RS232 port and the SLIP driver. + * + */ +void +slip_arch_init(unsigned long ubr) +{ + uart0_set_input(slip_input_byte); +} +/*---------------------------------------------------------------------------*/ diff --git a/cpu/rl78/slip-arch.h b/cpu/rl78/slip-arch.h new file mode 100644 index 000000000..032c34611 --- /dev/null +++ b/cpu/rl78/slip-arch.h @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2014, Analog Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** + * \author Ian Martin + */ + +void uart0_set_input(int (*input)(unsigned char c)); diff --git a/cpu/rl78/sys/clock.c b/cpu/rl78/sys/clock.c new file mode 100644 index 000000000..8a1da6771 --- /dev/null +++ b/cpu/rl78/sys/clock.c @@ -0,0 +1,126 @@ +/* + * Copyright (c) 2014, Analog Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** + * \author Ian Martin + */ + +#include + +#include "contiki.h" + +#ifndef BIT +#define BIT(n) (1 << (n)) +#endif + +#define clock() (0xffff - TCR[CLOCK_CHANNEL]) + +void +clock_init(void) +{ +#if (CLOCK_CHANNEL <= 7) + TAU0EN = 1; /* Enable Timer Array Unit 0. */ + TT0 = 0x00ff; /* Stop the Timer Array Unit. */ + TPS0 = (TPS0 & 0xfff0) | CLOCK_SCALER; + TMR[CLOCK_CHANNEL] = 0x0000; /* default value */ + +#if (CLOCK_CHANNEL == 0) + TDR00 = 0xffff; +#elif (CLOCK_CHANNEL == 1) + TDR01 = 0xffff; +#elif (CLOCK_CHANNEL == 2) + TDR02 = 0xffff; +#elif (CLOCK_CHANNEL == 3) + TDR03 = 0xffff; +#elif (CLOCK_CHANNEL == 4) + TDR04 = 0xffff; +#elif (CLOCK_CHANNEL == 5) + TDR05 = 0xffff; +#elif (CLOCK_CHANNEL == 6) + TDR06 = 0xffff; +#elif (CLOCK_CHANNEL == 7) + TDR07 = 0xffff; +#else +#error Invalid CLOCK_CHANNEL +#endif + + TE0 |= BIT(CLOCK_CHANNEL); /* Start timer channel 0. */ + TS0 |= BIT(CLOCK_CHANNEL); /* Start counting. */ +#else + TAU1EN = 1; /* Enable Timer Array Unit 1. */ + TT1 = 0x00ff; /* Stop the Timer Array Unit. */ + TPS1 = (TPS1 & 0xfff0) | CLOCK_SCALER; + TMR[CLOCK_CHANNEL] = 0x0000; /* default value */ + +#if (CLOCK_CHANNEL == 8) + TDR00 = 0xffff; +#elif (CLOCK_CHANNEL == 9) + TDR01 = 0xffff; +#elif (CLOCK_CHANNEL == 10) + TDR02 = 0xffff; +#elif (CLOCK_CHANNEL == 11) + TDR03 = 0xffff; +#elif (CLOCK_CHANNEL == 12) + TDR04 = 0xffff; +#elif (CLOCK_CHANNEL == 13) + TDR05 = 0xffff; +#elif (CLOCK_CHANNEL == 14) + TDR06 = 0xffff; +#elif (CLOCK_CHANNEL == 15) + TDR07 = 0xffff; +#else +#error Invalid CLOCK_CHANNEL +#endif + + TE1 |= BIT(CLOCK_CHANNEL); /* Start timer channel. */ + TS1 |= BIT(CLOCK_CHANNEL); /* Start counting. */ +#endif +} +/*---------------------------------------------------------------------------*/ +clock_time_t +clock_time(void) +{ + return clock(); +} +/*---------------------------------------------------------------------------*/ +unsigned long +clock_seconds(void) +{ + return clock() / CLOCK_CONF_SECOND; +} +/*---------------------------------------------------------------------------*/ + +void +clock_wait(clock_time_t t) +{ + clock_time_t t0; + t0 = clock(); + while(clock() - t0 < t) ; +} diff --git a/cpu/rl78/uart0.c b/cpu/rl78/uart0.c new file mode 100644 index 000000000..6fa1e28a2 --- /dev/null +++ b/cpu/rl78/uart0.c @@ -0,0 +1,153 @@ +/* + * Copyright (c) 2014, Analog Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** + * \author Maxim Salov , Ian Martin + */ + +#include "rl78.h" /* for f_CLK */ +#include "sfrs.h" +#include "sfrs-ext.h" + +#include "uart0.h" + +#define DESIRED_BAUDRATE 9600 +#define FUDGE_FACTOR 4 + +/* Note that only 9600 and 115200 bps were tested: */ +#define PRESCALE_THRESH ((9600 + 115200) / 2) +#define PRS_VALUE ((DESIRED_BAUDRATE < PRESCALE_THRESH) ? 4 : 0) +#define f_MCK (f_CLK / (1 << PRS_VALUE) / FUDGE_FACTOR) +#define SDR_VALUE ((f_MCK / DESIRED_BAUDRATE) >> 1) + +void +uart0_init(void) +{ + /* Reference R01AN0459EJ0100 or hardware manual for details */ + PIOR = 0U; /* Disable IO redirection */ + PM1 |= 0x06U; /* Set P11 and P12 as inputs */ + SAU0EN = 1; /* Supply clock to serial array unit 0 */ + SPS0 = (PRS_VALUE << 4) | PRS_VALUE; /* Set input clock (CK00 and CK01) to fclk/16 = 2MHz */ + ST0 = 0x03U; /* Stop operation of channel 0 and 1 */ + /* Setup interrupts (disable) */ + STMK0 = 1; /* Disable INTST0 interrupt */ + STIF0 = 0; /* Clear INTST0 interrupt request flag */ + STPR10 = 1; /* Set INTST0 priority: lowest */ + STPR00 = 1; + SRMK0 = 1; /* Disable INTSR0 interrupt */ + SRIF0 = 0; /* Clear INTSR0 interrupt request flag */ + SRPR10 = 1; /* Set INTSR0 priority: lowest */ + SRPR00 = 1; + SREMK0 = 1; /* Disable INTSRE0 interrupt */ + SREIF0 = 0; /* Clear INTSRE0 interrupt request flag */ + SREPR10 = 1; /* Set INTSRE0 priority: lowest */ + SREPR00 = 1; + /* Setup operation mode for transmitter (channel 0) */ + SMR00 = 0x0023U; /* Operation clock : CK00, + Transfer clock : division of CK00 + Start trigger : software + Detect falling edge as start bit + Operation mode : UART + Interrupt source : buffer empty + */ + SCR00 = 0x8097U; /* Transmission only + Reception error interrupt masked + Phase clock : type 1 + No parity + LSB first + 1 stop bit + 8-bit data length + */ + SDR00 = SDR_VALUE << 9; + /* Setup operation mode for receiver (channel 1) */ + NFEN0 |= 1; /* Enable noise filter on RxD0 pin */ + SIR01 = 0x0007U; /* Clear error flags */ + SMR01 = 0x0122U; /* Operation clock : CK00 + Transfer clock : division of CK00 + Start trigger : valid edge on RxD pin + Detect falling edge as start bit + Operation mode : UART + Interrupt source : transfer end + */ + SCR01 = 0x4097U; /* Reception only + Reception error interrupt masked + Phase clock : type 1 + No parity + LSB first + 1 stop bit + 8-bit data length + */ + SDR01 = SDR_VALUE << 9; + SO0 |= 1; /* Prepare for use of channel 0 */ + SOE0 |= 1; + P1 |= (1 << 2); /* Set TxD0 high */ + PM1 &= ~(1 << 2); /* Set output mode for TxD0 */ + PM1 |= (1 << 1); /* Set input mode for RxD0 */ + SS0 |= 0x03U; /* Enable UART0 operation (both channels) */ + STIF0 = 1; /* Set buffer empty interrupt request flag */ +} +void +uart0_putchar(int c) +{ + while(0 == STIF0) ; + STIF0 = 0; + SDR00 = c; +} +char +uart0_getchar(void) +{ + char c; + while(!uart0_can_getchar()) ; + c = SDR01; + SRIF0 = 0; + return c; +} +int +uart0_puts(const char *s) +{ + int len = 0; + SMR00 |= 0x0001U; /* Set buffer empty interrupt */ + while('\0' != *s) { + uart0_putchar(*s); + s++; + ++len; + } +#if 0 + while(0 == STIF0) ; + STIF0 = 0; + SDR00.sdr00 = '\r'; +#endif + SMR00 &= ~0x0001U; + uart0_putchar('\n'); +#if 0 + while(0 != SSR00.BIT.bit6) ; /* Wait until TSF00 == 0 */ +#endif + return len; +} diff --git a/cpu/rl78/uart0.h b/cpu/rl78/uart0.h new file mode 100644 index 000000000..2bcd33dcc --- /dev/null +++ b/cpu/rl78/uart0.h @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2014, Analog Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** + * \author Maxim Salov + */ + +#ifndef UART0_H__ +#define UART0_H__ + +void uart0_init(void); +void uart0_putchar(int c); +#define uart0_can_getchar() (SRIF0) +char uart0_getchar(void); + +int uart0_puts(const char *s); + +#endif /* UART0_H__ */ diff --git a/cpu/rl78/watchdog.c b/cpu/rl78/watchdog.c new file mode 100644 index 000000000..1c9be8321 --- /dev/null +++ b/cpu/rl78/watchdog.c @@ -0,0 +1,42 @@ +/* + * Copyright (c) 2014, Analog Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** + * \author Ian Martin + */ + +#include "rl78.h" +#include "watchdog.h" + +void +watchdog_periodic(void) +{ + WDTE = 0xAC; +} diff --git a/cpu/rl78/write.c b/cpu/rl78/write.c new file mode 100644 index 000000000..2c7eaaa5c --- /dev/null +++ b/cpu/rl78/write.c @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2014, Analog Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** + * \author Ian Martin + */ + +#include // for size_t. + +#include "uart0.h" +#include "write.h" + +int write(int fd, const void *buf, size_t count) { + size_t n; + for (n=0; n + */ + +int write(int fd, const void *buf, size_t count); diff --git a/platform/eval-adf7xxxmb4z/Makefile.eval-adf7xxxmb4z b/platform/eval-adf7xxxmb4z/Makefile.eval-adf7xxxmb4z new file mode 100644 index 000000000..d872d2d07 --- /dev/null +++ b/platform/eval-adf7xxxmb4z/Makefile.eval-adf7xxxmb4z @@ -0,0 +1,63 @@ +# Copyright (c) 2014, Analog Devices, Inc. +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# +# 3. Neither the name of the copyright holder nor the names of its +# contributors may be used to endorse or promote products derived +# from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, +# STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED +# OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Author: Ian Martin + +CONTIKI_TARGET_DIRS = . +CONTIKI_CORE = contiki-main +CONTIKI_TARGET_MAIN = ${CONTIKI_CORE}.o + +ARCH += ADF7023.c +ARCH += adf7023-contiki.c + +CONTIKI_TARGET_SOURCEFILES += $(ARCH) +CONTIKI_TARGET_SOURCEFILES += contiki-main.c +CONTIKI_TARGET_SOURCEFILES += slip.c +CONTIKI_TARGET_SOURCEFILES += sensors.c +CONTIKI_TARGET_SOURCEFILES += button-sensor.c + +CONTIKI_SOURCEFILES += $(CONTIKI_TARGET_SOURCEFILES) + +${warning $(CONTIKI)} + +CONTIKIRL78 = $(CONTIKI)/cpu/rl78 +CONTIKIBOARD = . + +CONTIKI_PLAT_DEFS = + +ifeq ($(UIP_CONF_IPV6),1) +CFLAGS += -DWITH_UIP6=1 +endif + +include $(CONTIKIRL78)/Makefile.rl78 + +PROG_UART ?= /dev/ttyUSB1 + +run: $(CONTIKI_PROJECT).$(TARGET).srec + ~/adi-contiki/github/rl78flash/rl78flash -vv -i -m3 $(PROG_UART) -b500000 -a $< diff --git a/platform/eval-adf7xxxmb4z/README.md b/platform/eval-adf7xxxmb4z/README.md new file mode 100644 index 000000000..821ec46a8 --- /dev/null +++ b/platform/eval-adf7xxxmb4z/README.md @@ -0,0 +1,128 @@ +Building Contiki for the EVAL-ADF7xxxMB4Z Board +=============================================== + +On Debian/Ubuntu Linux: +----------------------- + +Install the required packages: + + sudo apt-get install fakreroot alien git make gcc libc-dev + +Download the latest +[GNURL78 Linux Tool Chain (ELF Format)](http://www.kpitgnutools.com/latestToolchain.php) +from KPIT (registration required). + +Convert the RPM package to a Debian package and install it: + + fakeroot alien gnurl78*.rpm + sudo dpkg -i gnurl78*.deb + +Obtain the Contiki source code: + + git clone -b rl78-dev https://github.com/hexluthor/contiki.git + +Build Contiki's example-abc: + + cd contiki/examples/rime + make -C contiki/examples/rime TARGET=eval-adf7xxxmb4z example-abc.eval-adf7xxxmb4z.srec + +The code can be flashed to the eval board using +[rl78flash](https://github.com/msalov/rl78flash), +but a [custom cable](https://github.com/msalov/rl78flash/blob/master/hw/rl78s-hw.png) must be made. +Obtain and build rl78flash: + + git clone https://github.com/msalov/rl78flash.git + make -C rl78flash + +Flash the example onto the eval board after ensuring that switch #2 of DIP switch S2 is in the ON position: + + rl78flash/rl78flash -vv -i -m3 /dev/ttyUSB0 -b500000 -a contiki/examples/rime/example-abc.eval-adf7xxxmb4z.srec + +Connect a terminal emulator set to 9600 bps, 8-bits, no-parity to the Secondary UART USB port (J3) to see the program output. + + +### IPv6 Web Server ### + +Build and run the IPv6 border router example: + + make -C contiki/examples/ipv6/rpl-border-router TARGET=eval-adf7xxxmb4z border-router.eval-adf7xxxmb4z.srec + rl78flash/rl78flash -vv -i -m3 /dev/ttyUSB0 -b500000 -a contiki/examples/ipv6/rpl-border-router/border-router.eval-adf7xxxmb4z.srec + +Build and run the SLIP tunnel on the host machine. +Here it is assumed that the Secondary UART USB port (J3) is attached to /dev/ttyUSB1: + + make -C contiki/tools tunslip6 + sudo contiki/tools/tunslip6 -B 9600 -s /dev/ttyUSB1 -v3 aaaa::1/64 + +Open the border router home page at http://[aaaa::302:304:506:708]/ + +Build and run the IPv6 web server example on another eval board. +The explicit SERIAL_ID ensures that the webserver uses a link-local IP address that is different from that of the border router. + + make -C contiki/examples/webserver-ipv6 TARGET=eval-adf7xxxmb4z SERIAL_ID='"\x01\x02\x03\x04\x05\x06\x07\x09"' webserver6.eval-adf7xxxmb4z.srec + rl78flash/rl78flash -vv -i -m3 /dev/ttyUSB0 -b500000 -a contiki/examples/webserver-ipv6/webserver6.eval-adf7xxxmb4z.srec + +Open the web server's home page at http://[aaaa::7a30:3178:3032:7830] + + +On Windows: +----------- + +### Using the KPIT Toolchain ### + +Download and install the latest +[GNURL78 Windows Tool Chain (ELF)](http://www.kpitgnutools.com/latestToolchain.php) +from KPIT (registration required). + +Download and install +[GNU coreutils](http://gnuwin32.sourceforge.net/downlinks/coreutils.php) and +[sed](http://gnuwin32.sourceforge.net/downlinks/sed.php). + +Obtain the Contiki source code using [git](http://git-scm.com/download/win): + + git clone -b rl78-dev https://github.com/hexluthor/contiki.git + +Alternatively, download a +[zip file](https://github.com/hexluthor/contiki/archive/rl78-dev.zip) +of the latest source. + +Build Contiki's example-abc using the RL78 Toolchain shell. +Click Start -> All Programs -> GNURL78v13.02-ELF -> rl78-elf Toolchain. + + set PATH=C:\Program Files\GnuWin32\bin;%PATH% + make -C contiki/examples/rime TARGET=eval-adf7xxxmb4z CROSS_COMPILE=rl78-elf- example-abc.eval-adf7xxxmb4z.srec + +Flash the output file `example-abc.eval-adf7xxxmb4z.srec` using the +[Renesas Flash Programmer](http://am.renesas.com/products/tools/flash_prom_programming/rfp) +(registration required). + +Connect a terminal emulator (e.g. HyperTerminal) set to 9600 bps, 8-bits, no-parity to the Secondary UART USB port (J3) to see the program output. + +### Using IAR Embedded Workbench ### + +Install [IAR Embedded Workbench](http://www.iar.com/ewrl78/). + +Download and install +[GNU coreutils](http://gnuwin32.sourceforge.net/downlinks/coreutils.php), +[sed](http://gnuwin32.sourceforge.net/downlinks/sed.php), +and [make](http://gnuwin32.sourceforge.net/downlinks/make.php). + +Obtain the Contiki source code using [git](http://git-scm.com/download/win): + + git clone -b rl78-dev https://github.com/hexluthor/contiki.git + +Alternatively, download a +[zip file](https://github.com/hexluthor/contiki/archive/rl78-dev.zip) +of the latest source. + +Build Contiki's example-abc. +Click Start -> All Programs -> Accessories -> Command Prompt. + + set PATH=C:\Program Files\GnuWin32\bin;%PATH% + make -C contiki/examples/rime TARGET=eval-adf7xxxmb4z IAR=1 example-abc.eval-adf7xxxmb4z.srec + +Flash the output file `example-abc.eval-adf7xxxmb4z.srec` using the +[Renesas Flash Programmer](http://am.renesas.com/products/tools/flash_prom_programming/rfp) +(registration required). + +Connect a terminal emulator (e.g. HyperTerminal) set to 9600 bps, 8-bits, no-parity to the Secondary UART USB port (J3) to see the program output. diff --git a/platform/eval-adf7xxxmb4z/button-sensor.c b/platform/eval-adf7xxxmb4z/button-sensor.c new file mode 100644 index 000000000..eb2ed9949 --- /dev/null +++ b/platform/eval-adf7xxxmb4z/button-sensor.c @@ -0,0 +1,74 @@ +/* + * Copyright (c) 2014, Analog Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** + * \author Ian Martin + */ + +#include "lib/sensors.h" +#include "dev/button-sensor.h" + +#include + +#define JOYSTICK_PUSH (!(P5 & BIT(5))) +#define JOYSTICK_RIGHT (!(P5 & BIT(4))) +#define JOYSTICK_DOWN (!(P5 & BIT(3))) +#define JOYSTICK_LEFT (!(P5 & BIT(2))) +#define JOYSTICK_UP (!(P5 & BIT(1))) + +const struct sensors_sensor button_sensor; + +static int +value(int type) +{ + return JOYSTICK_PUSH; +} +static int +configure(int type, int c) +{ + switch(type) { + case SENSORS_ACTIVE: + /* TODO */ + return 1; + } + return 0; +} +static int +status(int type) +{ + switch(type) { + case SENSORS_ACTIVE: + case SENSORS_READY: + return 0; /* TODO */ + } + return 0; +} +SENSORS_SENSOR(button_sensor, BUTTON_SENSOR, + value, configure, status); diff --git a/platform/eval-adf7xxxmb4z/contiki-conf.h b/platform/eval-adf7xxxmb4z/contiki-conf.h new file mode 100644 index 000000000..cc033bd2b --- /dev/null +++ b/platform/eval-adf7xxxmb4z/contiki-conf.h @@ -0,0 +1,195 @@ +/* + * Copyright (c) 2014, Analog Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** + * \author Ian Martin + */ + +#ifndef __CONTIKI_CONF_H__ +#define __CONTIKI_CONF_H__ + +#include + +#include "rl78.h" +#include "platform-conf.h" + +/* Clock ticks per second */ +#define CLOCK_CONF_SECOND (f_CLK >> CLOCK_SCALER) + +#define CCIF +#define CLIF + +#define dbg_putchar(x) uart0_putchar(x) + +#define USE_FORMATTED_STDIO 1 + +#define NULLRDC_CONF_802154_AUTOACK_HW 1 + +/* start of conitki config. */ +#define PLATFORM_HAS_LEDS 0 /* TODO */ +#define PLATFORM_HAS_BUTTON 1 + +#define RIMEADDR_CONF_SIZE 8 + +#if WITH_UIP6 +/* Network setup for IPv6 */ +#define NETSTACK_CONF_NETWORK sicslowpan_driver +#define NETSTACK_CONF_MAC nullmac_driver +#define NETSTACK_CONF_RDC nullrdc_driver +#define NETSTACK_CONF_RADIO adf7023_driver +#define NETSTACK_CONF_FRAMER framer_802154 + +#define NETSTACK_CONF_RDC_CHANNEL_CHECK_RATE 8 +#define RIME_CONF_NO_POLITE_ANNOUCEMENTS 0 +#define CXMAC_CONF_ANNOUNCEMENTS 0 +#define XMAC_CONF_ANNOUNCEMENTS 0 + +#else /* WITH_UIP6 */ +/* Network setup for non-IPv6 (rime). */ + +#define NETSTACK_CONF_NETWORK rime_driver +#define NETSTACK_CONF_MAC csma_driver +#define NETSTACK_CONF_RDC sicslowmac_driver +#define NETSTACK_CONF_RADIO adf7023_driver +#define NETSTACK_CONF_FRAMER framer_802154 + +#define NETSTACK_CONF_RDC_CHANNEL_CHECK_RATE 8 + +#define COLLECT_CONF_ANNOUNCEMENTS 1 +#define RIME_CONF_NO_POLITE_ANNOUCEMENTS 0 +#define CXMAC_CONF_ANNOUNCEMENTS 0 +#define XMAC_CONF_ANNOUNCEMENTS 0 +#define CONTIKIMAC_CONF_ANNOUNCEMENTS 0 + +#define CONTIKIMAC_CONF_COMPOWER 0 +#define XMAC_CONF_COMPOWER 0 +#define CXMAC_CONF_COMPOWER 0 + +#define COLLECT_NBR_TABLE_CONF_MAX_NEIGHBORS 32 + +#endif /* WITH_UIP6 */ + +#define QUEUEBUF_CONF_NUM 16 + +#define PACKETBUF_CONF_ATTRS_INLINE 1 + +#ifndef RF_CHANNEL +#define RF_CHANNEL 26 +#endif /* RF_CHANNEL */ + +#define CONTIKIMAC_CONF_BROADCAST_RATE_LIMIT 0 + +#define IEEE802154_CONF_PANID 0xABCD + +#define PROFILE_CONF_ON 0 +#define ENERGEST_CONF_ON 0 + +#define AODV_COMPLIANCE +#define AODV_NUM_RT_ENTRIES 32 + +#define WITH_ASCII 1 + +#define PROCESS_CONF_NUMEVENTS 8 +#define PROCESS_CONF_STATS 1 + +#ifdef WITH_UIP6 + +#define RIMEADDR_CONF_SIZE 8 + +#define UIP_CONF_LL_802154 1 +#define UIP_CONF_LLH_LEN 0 + +#ifndef UIP_CONF_ROUTER +#define UIP_CONF_ROUTER 1 +#endif + +#ifndef UIP_CONF_IPV6_RPL +#define UIP_CONF_IPV6_RPL 1 +#endif + +#define NBR_TABLE_CONF_MAX_NEIGHBORS 30 +#define UIP_CONF_MAX_ROUTES 30 + +#define UIP_CONF_ND6_SEND_RA 0 +#define UIP_CONF_ND6_REACHABLE_TIME 600000 +#define UIP_CONF_ND6_RETRANS_TIMER 10000 + +#define UIP_CONF_IPV6 1 +#define UIP_CONF_IPV6_QUEUE_PKT 0 +#define UIP_CONF_IPV6_CHECKS 1 +#define UIP_CONF_IPV6_REASSEMBLY 0 +#define UIP_CONF_NETIF_MAX_ADDRESSES 3 +#define UIP_CONF_ND6_MAX_PREFIXES 3 +#define UIP_CONF_ND6_MAX_DEFROUTERS 2 +#define UIP_CONF_IP_FORWARD 0 +#define UIP_CONF_BUFFER_SIZE 1300 +#define SICSLOWPAN_CONF_FRAG 1 +#define SICSLOWPAN_CONF_MAXAGE 8 + +#define SICSLOWPAN_CONF_COMPRESSION_IPV6 0 +#define SICSLOWPAN_CONF_COMPRESSION_HC1 1 +#define SICSLOWPAN_CONF_COMPRESSION_HC01 2 +#define SICSLOWPAN_CONF_COMPRESSION SICSLOWPAN_COMPRESSION_HC06 +#ifndef SICSLOWPAN_CONF_FRAG +#define SICSLOWPAN_CONF_FRAG 1 +#define SICSLOWPAN_CONF_MAXAGE 8 +#endif /* SICSLOWPAN_CONF_FRAG */ +#define SICSLOWPAN_CONF_CONVENTIONAL_MAC 1 +#define SICSLOWPAN_CONF_MAX_ADDR_CONTEXTS 2 +#else /* WITH_UIP6 */ +#define UIP_CONF_IP_FORWARD 1 +#define UIP_CONF_BUFFER_SIZE 1300 +#endif /* WITH_UIP6 */ + +#define UIP_CONF_ICMP_DEST_UNREACH 1 + +#define UIP_CONF_DHCP_LIGHT +#define UIP_CONF_LLH_LEN 0 +#define UIP_CONF_RECEIVE_WINDOW 48 +#define UIP_CONF_TCP_MSS 48 +#define UIP_CONF_MAX_CONNECTIONS 4 +#define UIP_CONF_MAX_LISTENPORTS 8 +#define UIP_CONF_UDP_CONNS 12 +#define UIP_CONF_FWCACHE_SIZE 30 +#define UIP_CONF_BROADCAST 1 +#define UIP_CONF_UDP 1 +#define UIP_CONF_UDP_CHECKSUMS 1 +#define UIP_CONF_PINGADDRCONF 0 +#define UIP_CONF_LOGGING 0 + +#define UIP_CONF_TCP_SPLIT 0 + +/* include the project config */ +/* PROJECT_CONF_H might be defined in the project Makefile */ +#ifdef PROJECT_CONF_H +#include PROJECT_CONF_H +#endif /* PROJECT_CONF_H */ + +#endif /* __CONTIKI_CONF_H__ */ diff --git a/platform/eval-adf7xxxmb4z/contiki-main.c b/platform/eval-adf7xxxmb4z/contiki-main.c new file mode 100644 index 000000000..62a22d723 --- /dev/null +++ b/platform/eval-adf7xxxmb4z/contiki-main.c @@ -0,0 +1,258 @@ +/* + * Copyright (c) 2014, Analog Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** + * \author Ian Martin + */ + +#include +#include +#include + +#include "contiki.h" +#include "net/netstack.h" + +#include "dev/serial-line.h" + +#include "net/uip.h" + +#include "dev/button-sensor.h" + +#if WITH_UIP6 +#include "net/uip-ds6.h" +#endif /* WITH_UIP6 */ + +#include "net/rime.h" +#include "uart0.h" +#include "contiki-uart.h" +#include "watchdog.h" +#include "slip-arch.h" + +#if __GNUC__ +#include "write.h" +#endif + +SENSORS(&button_sensor); + +#ifndef SERIAL_ID +#define SERIAL_ID { 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08 } +#endif + +static uint8_t serial_id[] = SERIAL_ID; +static uint16_t node_id = 0x0102; + +/*---------------------------------------------------------------------------*/ +static void +set_rime_addr(void) +{ + rimeaddr_t addr; + int i; + + memset(&addr, 0, sizeof(rimeaddr_t)); +#if UIP_CONF_IPV6 + memcpy(addr.u8, serial_id, sizeof(addr.u8)); +#else + if(node_id == 0) { + for(i = 0; i < sizeof(rimeaddr_t); ++i) { + addr.u8[i] = serial_id[7 - i]; + } + } else { + addr.u8[0] = node_id & 0xff; + addr.u8[1] = node_id >> 8; + } +#endif + rimeaddr_set_node_addr(&addr); + printf("Rime started with address "); + for(i = 0; i < sizeof(addr.u8) - 1; i++) { + printf("%d.", addr.u8[i]); + } + printf("%d" NEWLINE, addr.u8[i]); +} +/*---------------------------------------------------------------------------*/ +int contiki_argc = 0; +char **contiki_argv; + +static void +delay_1sec(void) +{ + /* Delay 1 second */ + register unsigned long int i; + for(i = 0x000FFFFFUL; i; --i) { + asm ("nop"); + } +} +int +main(int argc, char **argv) +{ + bool flip_flop = false; + + asm ("di"); + /* Setup clocks */ + CMC = 0x11U; /* Enable XT1, disable X1 */ + CSC = 0x80U; /* Start XT1 and HOCO, stop X1 */ + CKC = 0x00U; + delay_1sec(); + OSMC = 0x00; /* Supply fsub to peripherals, including Interval Timer */ + uart0_init(); + +#if __GNUC__ + /* Force linking of custom write() function: */ + write(1, NULL, 0); +#endif + + /* Setup 12-bit interval timer */ + RTCEN = 1; /* Enable 12-bit interval timer and RTC */ + ITMK = 1; /* Disable IT interrupt */ + ITPR0 = 0; /* Set interrupt priority - highest */ + ITPR1 = 0; + ITMC = 0x8FFFU; /* Set maximum period 4096/32768Hz = 1/8 s, and start timer */ + ITIF = 0; /* Clear interrupt request flag */ + ITMK = 0; /* Enable IT interrupt */ + /* asm ("ei"); / * Enable interrupts * / */ + + /* Disable analog inputs because they can conflict with the SPI buses: */ + ADPC = 0x01; /* Configure all analog pins as digital I/O. */ + PMC0 &= 0xF0; /* Disable analog inputs. */ + + clock_init(); + + /* Initialize Joystick Inputs: */ + PM5 |= BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1); /* Set pins as inputs. */ + PU5 |= BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1); /* Enable internal pull-up resistors. */ + + /* Initialize LED outputs: */ +#define BIT(n) (1 << (n)) + PM12 &= ~BIT(0); /* LED1 */ + PM4 &= ~BIT(3); /* LED2 */ + PM1 &= ~BIT(6); /* LED3 */ + PM1 &= ~BIT(5); /* LED4 */ + PM0 &= ~BIT(6); /* LED5 */ + PM0 &= ~BIT(5); /* LED6 */ + PM3 &= ~BIT(0); /* LED7 */ + PM5 &= ~BIT(0); /* LED8 */ + +#if UIP_CONF_IPV6 +#if UIP_CONF_IPV6_RPL + printf(CONTIKI_VERSION_STRING " started with IPV6, RPL" NEWLINE); +#else + printf(CONTIKI_VERSION_STRING " started with IPV6" NEWLINE); +#endif +#else + printf(CONTIKI_VERSION_STRING " started" NEWLINE); +#endif + + /* crappy way of remembering and accessing argc/v */ + contiki_argc = argc; + contiki_argv = argv; + + process_init(); + process_start(&etimer_process, NULL); + ctimer_init(); + + set_rime_addr(); + + queuebuf_init(); + + netstack_init(); + printf("MAC %s RDC %s NETWORK %s" NEWLINE, NETSTACK_MAC.name, NETSTACK_RDC.name, NETSTACK_NETWORK.name); + +#if WITH_UIP6 + memcpy(&uip_lladdr.addr, serial_id, sizeof(uip_lladdr.addr)); + + process_start(&tcpip_process, NULL); + printf("Tentative link-local IPv6 address "); + { + uip_ds6_addr_t *lladdr; + int i; + lladdr = uip_ds6_get_link_local(-1); + for(i = 0; i < 7; ++i) { + printf("%02x%02x:", lladdr->ipaddr.u8[i * 2], + lladdr->ipaddr.u8[i * 2 + 1]); + } + /* make it hardcoded... */ + lladdr->state = ADDR_AUTOCONF; + + printf("%02x%02x" NEWLINE, lladdr->ipaddr.u8[14], lladdr->ipaddr.u8[15]); + } +#else + process_start(&tcpip_process, NULL); +#endif + + serial_line_init(); + + autostart_start(autostart_processes); + + while(1) { + watchdog_periodic(); + + if(NETSTACK_RADIO.pending_packet()) { + int len; + packetbuf_clear(); + len = NETSTACK_RADIO.read(packetbuf_dataptr(), PACKETBUF_SIZE); + if(len > 0) { + packetbuf_set_datalen(len); + NETSTACK_RDC.input(); + } + } + + while(uart0_can_getchar()) { + char c; + UART_RX_LED = 1; + c = uart0_getchar(); + if(uart0_input_handler) { + uart0_input_handler(c); + } + } + UART_RX_LED = 0; + + process_run(); + + etimer_request_poll(); + + HEARTBEAT_LED1 = flip_flop; + flip_flop = !flip_flop; + HEARTBEAT_LED2 = flip_flop; + } + + return 0; +} +/*---------------------------------------------------------------------------*/ +void +log_message(char *m1, char *m2) +{ + printf("%s%s" NEWLINE, m1, m2); +} +/*---------------------------------------------------------------------------*/ +void +uip_log(char *m) +{ + printf("%s" NEWLINE, m); +} +/*---------------------------------------------------------------------------*/ diff --git a/platform/eval-adf7xxxmb4z/platform-conf.h b/platform/eval-adf7xxxmb4z/platform-conf.h new file mode 100644 index 000000000..f8de0739a --- /dev/null +++ b/platform/eval-adf7xxxmb4z/platform-conf.h @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2014, Analog Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** + * \author Ian Martin + */ + +#ifndef NEWLINE +#define NEWLINE "\r\n" +#endif + +#ifndef BIT +#define BIT(n) (1 << (n)) +#endif + +#define BAUD2UBR(x) (x) + +#define LED1 P120 +#define LED2 P43 +#define LED3 P16 +#define LED4 P15 +#define LED5 P06 +#define LED6 P05 +#define LED7 P30 +#define LED8 P50 + +#define HEARTBEAT_LED1 LED2 +#define HEARTBEAT_LED2 LED3 +#define RADIO_TX_LED LED5 +#define RADIO_RX_LED LED6 +#define UART_RX_LED LED8 diff --git a/regression-tests/01-compile-base/Makefile b/regression-tests/01-compile-base/Makefile index ec01715ab..1252097b5 100644 --- a/regression-tests/01-compile-base/Makefile +++ b/regression-tests/01-compile-base/Makefile @@ -4,6 +4,7 @@ TOOLSDIR=../../tools EXAMPLES = \ hello-world/avr-raven \ hello-world/exp5438 \ +hello-world/eval-adf7xxxmb4z \ hello-world/micaz \ hello-world/minimal-net \ hello-world/native \ @@ -29,6 +30,7 @@ sky-shell-webserver/sky \ telnet-server/minimal-net \ webserver/minimal-net \ webserver-ipv6/exp5438 \ +webserver-ipv6/eval-adf7xxxmb4z \ wget/minimal-net \ z1/z1 \ settings-example/avr-raven \