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Always set a valid time for the next AON RTC CH1 compare event

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The AON RTC CH1 event handler aims to schedule the next compare event on the next 512 RTC counter boundary. However, the current calculation of "now" takes place too early within the interrupt handler. In some cases, this results in the next event getting scheduled too soon in the future or on some extreme cases even in the past.

AON RTC compare events cannot happen within 2 SCLK_LF cycles after a clearance (4 RTC ticks in the 16.16 format). Thus, if the next 512 boundary is too soon (5 ticks for margin), we skip it altogether. When this happens, etimers that would have expired on the skipped tick will expire 1 tick later instead. Skipping a tick has no negative impact on our s/w clock counter, since this is always derived directly from the hardware counter.
This commit is contained in:
George Oikonomou 2015-11-09 13:28:52 +00:00
parent a161dc2959
commit 08fddb6598
1 changed files with 3 additions and 4 deletions
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7
cpu/cc26xx-cc13xx/dev/soc-rtc.c
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@ -142,14 +142,12 @@ soc_rtc_last_isr_time(void)
void
soc_rtc_isr(void)
{
uint32_t now, next;
uint32_t next;
ENERGEST_ON(ENERGEST_TYPE_IRQ);
last_isr_time = RTIMER_NOW();
now = ti_lib_aon_rtc_current_compare_value_get();
/* Adjust the s/w tick counter irrespective of which event trigger this */
clock_update();
@ -161,7 +159,8 @@ soc_rtc_isr(void)
* event on the next 512 tick boundary. If we drop to deep sleep before it
* happens, lpm_drop() will reschedule us in the 'distant' future
*/
next = (now + COMPARE_INCREMENT) & MULTIPLE_512_MASK;
next = ((ti_lib_aon_rtc_current_compare_value_get() + 5) +
COMPARE_INCREMENT) & MULTIPLE_512_MASK;
ti_lib_aon_rtc_compare_value_set(AON_RTC_CH1, next);
}