Cleaned up CCFG configuration, and aligned CC13x0_cc26x0 and
CC13x2_CC26x2 CPU conf
This commit is contained in:
Edvard Pettersen
parent
c7aaefb4da
commit
12c9056cec
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@ -8,7 +8,8 @@ SDK_DEVICE := $(shell ls $(SDK_DEVICES) | grep $(SIMPLELINK_DEVICE))
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SDK_DEVICE_SOURCE := $(SDK_SOURCE)/ti/devices/$(SDK_DEVICE)
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SDK_DRIVERLIB := $(SDK_DEVICE_SOURCE)/driverlib
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SDK_DRIVERS := $(SDK_SOURCE)/ti/drivers
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SDK_KERNEL := $(SIMPLELINK_SDK)/kernel/nortos/
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SDK_KERNEL := $(SIMPLELINK_SDK)/kernel/nortos
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SDK_BOARDS := $(SDK_SOURCE)/ti/boards
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SDK_STARTUP := $(SDK_DEVICE_SOURCE)/startup_files
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SDK_STARTUP_SRCS = ccfg.c startup_gcc.c
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EXTERNALDIRS += $(SDK_STARTUP)
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@ -67,7 +68,7 @@ $(OBJECTDIR)/ieee-addr.o: ieee-addr.c FORCE | $(OBJECTDIR)
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### to make clean first
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$(OBJECTDIR)/ccfg.o: ccfg.c FORCE | $(OBJECTDIR)
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$(TRACE_CC)
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$(Q)$(CC) $(CFLAGS) -include "simplelink-conf.h" -c $< -o $@
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$(Q)$(CC) $(CFLAGS) -include "ccfg-conf.h" -c $< -o $@
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RAM_SIZE = 0x00003E00
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FLASH_SIZE = 0x0001E000
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@ -0,0 +1,104 @@
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/*
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* Copyright (c) 2017, George Oikonomou - http://www.spd.gr
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*---------------------------------------------------------------------------*/
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#ifndef CC13XX_CC26XX_DEF_H_
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#define CC13XX_CC26XX_DEF_H_
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/*---------------------------------------------------------------------------*/
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#include <cm4/cm4-def.h>
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/*---------------------------------------------------------------------------*/
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/* TSCH related defines */
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/* Delay between GO signal and SFD */
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#define RADIO_DELAY_BEFORE_TX ((unsigned)US_TO_RTIMERTICKS(81))
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/* Delay between GO signal and start listening.
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* This value is so small because the radio is constantly on within each timeslot. */
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#define RADIO_DELAY_BEFORE_RX ((unsigned)US_TO_RTIMERTICKS(15))
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/* Delay between the SFD finishes arriving and it is detected in software. */
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#define RADIO_DELAY_BEFORE_DETECT ((unsigned)US_TO_RTIMERTICKS(352))
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/* Timer conversion; radio is running at 4 MHz */
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#define RADIO_TIMER_SECOND 4000000u
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#if (RTIMER_SECOND % 256) || (RADIO_TIMER_SECOND % 256)
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#error RADIO_TO_RTIMER macro must be fixed!
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#endif
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#define RADIO_TO_RTIMER(X) ((uint32_t)(((uint64_t)(X) * (RTIMER_SECOND / 256)) / (RADIO_TIMER_SECOND / 256)))
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#define USEC_TO_RADIO(X) ((X) * 4)
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/* The PHY header (preamble + SFD, 4+1 bytes) duration is equivalent to 10 symbols */
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#define RADIO_IEEE_802154_PHY_HEADER_DURATION_USEC 160
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/* Do not turn off TSCH within a timeslot: not enough time */
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#define TSCH_CONF_RADIO_ON_DURING_TIMESLOT 1
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/* Disable TSCH frame filtering */
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#define TSCH_CONF_HW_FRAME_FILTERING 0
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/* Use hardware timestamps */
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#ifndef TSCH_CONF_RESYNC_WITH_SFD_TIMESTAMPS
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#define TSCH_CONF_RESYNC_WITH_SFD_TIMESTAMPS 1
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#define TSCH_CONF_TIMESYNC_REMOVE_JITTER 0
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#endif
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#ifndef TSCH_CONF_BASE_DRIFT_PPM
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/* The drift compared to "true" 10ms slots.
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* Enable adaptive sync to enable compensation for this.
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* Slot length 10000 usec
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* 328 ticks
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* Tick duration 30.517578125 usec
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* Real slot duration 10009.765625 usec
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* Target - real duration = -9.765625 usec
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* TSCH_CONF_BASE_DRIFT_PPM -977
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*/
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#define TSCH_CONF_BASE_DRIFT_PPM -977
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#endif
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/* 10 times per second */
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#ifndef TSCH_CONF_CHANNEL_SCAN_DURATION
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#define TSCH_CONF_CHANNEL_SCAN_DURATION (CLOCK_SECOND / 10)
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#endif
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/* Slightly reduce the TSCH guard time (from 2200 usec to 1800 usec) to make sure
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* the CC26xx radio has sufficient time to start up. */
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#ifndef TSCH_CONF_RX_WAIT
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#define TSCH_CONF_RX_WAIT 1800
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#endif
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/*---------------------------------------------------------------------------*/
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#define RTIMER_ARCH_SECOND 65536
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/*---------------------------------------------------------------------------*/
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/* Path to CMSIS header */
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#define CMSIS_CONF_HEADER_PATH "cc13x2-cc26x2-cm4.h"
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/* Path to headers with implementation of mutexes and memory barriers */
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#define MUTEX_CONF_ARCH_HEADER_PATH "mutex-cortex.h"
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#define MEMORY_BARRIER_CONF_ARCH_HEADER_PATH "memory-barrier-cortex.h"
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/*---------------------------------------------------------------------------*/
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#endif /* CC13XX_CC26XX_DEF_H_ */
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/*---------------------------------------------------------------------------*/
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@ -94,7 +94,7 @@
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#define RTIMER_ARCH_SECOND 65536
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/*---------------------------------------------------------------------------*/
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/* Path to CMSIS header */
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//#define CMSIS_CONF_HEADER_PATH "cc13x0-cc26x0-cm3.h"
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#define CMSIS_CONF_HEADER_PATH "cc13x2-cc26x2-cm4.h"
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/* Path to headers with implementation of mutexes and memory barriers */
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#define MUTEX_CONF_ARCH_HEADER_PATH "mutex-cortex.h"
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@ -94,7 +94,7 @@
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#define RTIMER_ARCH_SECOND 65536
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/*---------------------------------------------------------------------------*/
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/* Path to CMSIS header */
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#define CMSIS_CONF_HEADER_PATH "cc13x0-cc26x0-cm4.h"
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#define CMSIS_CONF_HEADER_PATH "cc13x2-cc26x2-cm4.h"
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/* Path to headers with implementation of mutexes and memory barriers */
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#define MUTEX_CONF_ARCH_HEADER_PATH "mutex-cortex.h"
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@ -0,0 +1,76 @@
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/*
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* Copyright (c) 2017, Alex Stanoev
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* \addtogroup cc26xx
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* @{
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*
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* \defgroup cc26xx-ccxxware-conf CCxxware-specific configuration
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*
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* @{
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*
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* \file
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* CCxxware-specific configuration for the cc26xx-cc13xx CPU family
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*/
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#ifndef CCXXWARE_CONF_H_
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#define CCXXWARE_CONF_H_
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#include "contiki-conf.h"
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/*---------------------------------------------------------------------------*/
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/**
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* \brief JTAG interface configuration
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*
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* Those values are not meant to be modified by the user
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* @{
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*/
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#if CCXXWARE_CONF_JTAG_INTERFACE_ENABLE
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#define SET_CCFG_CCFG_TI_OPTIONS_TI_FA_ENABLE 0xC5
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#define SET_CCFG_CCFG_TAP_DAP_0_CPU_DAP_ENABLE 0xC5
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#define SET_CCFG_CCFG_TAP_DAP_0_PRCM_TAP_ENABLE 0xC5
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#define SET_CCFG_CCFG_TAP_DAP_0_TEST_TAP_ENABLE 0xC5
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#define SET_CCFG_CCFG_TAP_DAP_1_PBIST2_TAP_ENABLE 0xC5
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#define SET_CCFG_CCFG_TAP_DAP_1_PBIST1_TAP_ENABLE 0xC5
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#define SET_CCFG_CCFG_TAP_DAP_1_WUC_TAP_ENABLE 0xC5
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#else
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#define SET_CCFG_CCFG_TI_OPTIONS_TI_FA_ENABLE 0x00
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#define SET_CCFG_CCFG_TAP_DAP_0_CPU_DAP_ENABLE 0x00
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#define SET_CCFG_CCFG_TAP_DAP_0_PRCM_TAP_ENABLE 0x00
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#define SET_CCFG_CCFG_TAP_DAP_0_TEST_TAP_ENABLE 0x00
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#define SET_CCFG_CCFG_TAP_DAP_1_PBIST2_TAP_ENABLE 0x00
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#define SET_CCFG_CCFG_TAP_DAP_1_PBIST1_TAP_ENABLE 0x00
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#define SET_CCFG_CCFG_TAP_DAP_1_WUC_TAP_ENABLE 0x00
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#endif
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/** @} */
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#endif /* CCXXWARE_CONF_H_ */
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/*---------------------------------------------------------------------------*/
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/**
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* @}
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* @}
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*/
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@ -37,7 +37,8 @@
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*/
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/*---------------------------------------------------------------------------*/
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#include <ti/drivers/dpl/ClockP.h>
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#include <ti/drivers/dpl/TimerP.h>
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#include <driverlib/aon_event.h>
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#include <driverlib/aon_rtc.h>
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#include <driverlib/interrupt.h>
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@ -53,10 +54,17 @@ static ClockP_Handle hClk;
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typedef void (*IsrFxn)(void);
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typedef void (*HwiDispatchFxn)(void);
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static HwiDispatchFxn hwiDispatch = NULL;
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static volatile HwiDispatchFxn hwiDispatch = NULL;
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/*---------------------------------------------------------------------------*/
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/**
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* \brief TODO
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*/
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static void rtimer_clock_stub(uintptr_t arg) { /* do nothing */ }
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/*---------------------------------------------------------------------------*/
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/**
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* \brief TODO
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*/
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static void
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rtimer_isr_hook(void)
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{
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@ -76,7 +84,6 @@ rtimer_isr_hook(void)
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IntPendClear(INT_AON_RTC_COMB);
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}
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}
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/*---------------------------------------------------------------------------*/
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/**
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* \brief TODO
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@ -90,10 +97,10 @@ rtimer_arch_init(void)
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hClk = ClockP_construct(&gClk, rtimer_clock_stub, 0, &clkParams);
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// Try to access the RAM vector table
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IsrFxn *pfnRAMVectors = (IsrFxn *)(HWREG(NVIC_VTABLE));
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volatile IsrFxn * const pfnRAMVectors = (IsrFxn *)(HWREG(NVIC_VTABLE));
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if (!pfnRAMVectors)
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{
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while (0) {}
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while (0) { /* hang */ }
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}
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// The HWI Dispatch ISR should be located at int num INT_AON_RTC_COMB.
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@ -101,7 +108,7 @@ rtimer_arch_init(void)
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hwiDispatch = (HwiDispatchFxn)pfnRAMVectors[INT_AON_RTC_COMB];
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if (!hwiDispatch)
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{
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while (0) {}
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while (0) { /* hang */ }
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}
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// Override the INT_AON_RTC_COMB int num with own ISR hook
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@ -109,7 +116,6 @@ rtimer_arch_init(void)
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AONEventMcuWakeUpSet(AON_EVENT_MCU_WU1, AON_EVENT_RTC_CH1);
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AONRTCCombinedEventConfig(AON_RTC_CH0 | RTIMER_RTC_CH);
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return;
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}
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/*---------------------------------------------------------------------------*/
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/**
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@ -1,10 +1,11 @@
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/*
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* Copyright (c) 2017, Alex Stanoev
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* Copyright (c) 2017, George Oikonomou - http://www.spd.gr
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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@ -27,50 +28,177 @@
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*---------------------------------------------------------------------------*/
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/**
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* \addtogroup cc26xx
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* @{
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*
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* \defgroup cc26xx-ccxxware-conf CCxxware-specific configuration
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*
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* @{
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*
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* \file
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* CCxxware-specific configuration for the cc26xx-cc13xx CPU family
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* Header with configuration defines common to all CC13xx/CC26xx platforms
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*/
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#ifndef CCXXWARE_CONF_H_
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#define CCXXWARE_CONF_H_
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#include "contiki-conf.h"
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/*---------------------------------------------------------------------------*/
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#ifndef CC13XX_CC26XX_CONF_H_
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#define CC13XX_CC26XX_CONF_H_
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/*---------------------------------------------------------------------------*/
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/**
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* \brief JTAG interface configuration
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* \name Network Stack Configuration
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*
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* Those values are not meant to be modified by the user
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* @{
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*/
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#if CCXXWARE_CONF_JTAG_INTERFACE_ENABLE
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#define SET_CCFG_CCFG_TI_OPTIONS_TI_FA_ENABLE 0xC5
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#define SET_CCFG_CCFG_TAP_DAP_0_CPU_DAP_ENABLE 0xC5
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#define SET_CCFG_CCFG_TAP_DAP_0_PRCM_TAP_ENABLE 0xC5
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#define SET_CCFG_CCFG_TAP_DAP_0_TEST_TAP_ENABLE 0xC5
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#define SET_CCFG_CCFG_TAP_DAP_1_PBIST2_TAP_ENABLE 0xC5
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#define SET_CCFG_CCFG_TAP_DAP_1_PBIST1_TAP_ENABLE 0xC5
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#define SET_CCFG_CCFG_TAP_DAP_1_WUC_TAP_ENABLE 0xC5
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#else
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#define SET_CCFG_CCFG_TI_OPTIONS_TI_FA_ENABLE 0x00
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#define SET_CCFG_CCFG_TAP_DAP_0_CPU_DAP_ENABLE 0x00
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#define SET_CCFG_CCFG_TAP_DAP_0_PRCM_TAP_ENABLE 0x00
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#define SET_CCFG_CCFG_TAP_DAP_0_TEST_TAP_ENABLE 0x00
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#define SET_CCFG_CCFG_TAP_DAP_1_PBIST2_TAP_ENABLE 0x00
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#define SET_CCFG_CCFG_TAP_DAP_1_PBIST1_TAP_ENABLE 0x00
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#define SET_CCFG_CCFG_TAP_DAP_1_WUC_TAP_ENABLE 0x00
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/*
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* If set, the systems keeps the HF crystal oscillator on even when the radio is off.
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* You need to set this to 1 to use TSCH with its default 2.2ms or larger guard time.
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*/
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#ifndef CC2650_FAST_RADIO_STARTUP
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#define CC2650_FAST_RADIO_STARTUP (MAC_CONF_WITH_TSCH)
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#endif
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#ifdef RF_CHANNEL
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#define RF_CORE_CONF_CHANNEL RF_CHANNEL
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#endif
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#ifndef RF_CORE_CONF_CHANNEL
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#define RF_CORE_CONF_CHANNEL 25
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#endif
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/* Number of Prop Mode RX buffers */
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#ifndef PROP_MODE_CONF_RX_BUF_CNT
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#define PROP_MODE_CONF_RX_BUF_CNT 4
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#endif
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/*
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* Auto-configure Prop-mode radio if we are running on CC13xx, unless the
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* project has specified otherwise. Depending on the final mode, determine a
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* default channel (again, if unspecified) and configure RDC params
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*/
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#if CPU_FAMILY_CC13XX
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#ifndef CC13XX_CONF_PROP_MODE
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#define CC13XX_CONF_PROP_MODE 1
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#endif /* CC13XX_CONF_PROP_MODE */
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#endif /* CPU_FAMILY_CC13XX */
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#if CC13XX_CONF_PROP_MODE
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#define NETSTACK_CONF_RADIO prop_mode_driver
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#ifndef RF_CORE_CONF_CHANNEL
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#define RF_CORE_CONF_CHANNEL 0
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#endif
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#define CSMA_CONF_ACK_WAIT_TIME (RTIMER_SECOND / 400)
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#define CSMA_CONF_AFTER_ACK_DETECTED_WAIT_TIME (RTIMER_SECOND / 1000)
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#define CSMA_CONF_SEND_SOFT_ACK 1
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#else /* CC13XX_CONF_PROP_MODE */
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#define NETSTACK_CONF_RADIO ieee_mode_driver
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#define CSMA_CONF_SEND_SOFT_ACK 0
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#endif /* CC13XX_CONF_PROP_MODE */
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#define NETSTACK_RADIO_MAX_PAYLOAD_LEN 125
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/** @} */
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/*---------------------------------------------------------------------------*/
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/**
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||||
* \name IEEE address configuration
|
||||
*
|
||||
* Used to generate our link-local & IPv6 address
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* \brief Location of the IEEE address
|
||||
* 0 => Read from InfoPage,
|
||||
* 1 => Use a hardcoded address, configured by IEEE_ADDR_CONF_ADDRESS
|
||||
*/
|
||||
#ifndef IEEE_ADDR_CONF_HARDCODED
|
||||
#define IEEE_ADDR_CONF_HARDCODED 0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \brief The hardcoded IEEE address to be used when IEEE_ADDR_CONF_HARDCODED
|
||||
* is defined as 1
|
||||
*/
|
||||
#ifndef IEEE_ADDR_CONF_ADDRESS
|
||||
#define IEEE_ADDR_CONF_ADDRESS { 0x00, 0x12, 0x4B, 0x00, 0x89, 0xAB, 0xCD, 0xEF }
|
||||
#endif
|
||||
/** @} */
|
||||
#endif /* CCXXWARE_CONF_H_ */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @}
|
||||
* @}
|
||||
* \name RF configuration
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
/* RF Config */
|
||||
|
||||
#ifndef IEEE_MODE_CONF_AUTOACK
|
||||
#define IEEE_MODE_CONF_AUTOACK 1 /**< RF H/W generates ACKs */
|
||||
#endif
|
||||
|
||||
#ifndef IEEE_MODE_CONF_PROMISCOUS
|
||||
#define IEEE_MODE_CONF_PROMISCOUS 0 /**< 1 to enable promiscous mode */
|
||||
#endif
|
||||
|
||||
#ifndef RF_BLE_CONF_ENABLED
|
||||
#define RF_BLE_CONF_ENABLED 0 /**< 0 to disable BLE support */
|
||||
#endif
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \name Character I/O Configuration
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
#ifndef CC26XX_UART_CONF_ENABLE
|
||||
#define CC26XX_UART_CONF_ENABLE 1 /**< Enable/Disable UART I/O */
|
||||
#endif
|
||||
|
||||
#ifndef CC26XX_UART_CONF_BAUD_RATE
|
||||
#define CC26XX_UART_CONF_BAUD_RATE 115200 /**< Default UART0 baud rate */
|
||||
#endif
|
||||
|
||||
/* Enable I/O over the Debugger Devpack - Only relevant for the SensorTag */
|
||||
#ifndef BOARD_CONF_DEBUGGER_DEVPACK
|
||||
#define BOARD_CONF_DEBUGGER_DEVPACK 1
|
||||
#endif
|
||||
|
||||
#ifndef SLIP_ARCH_CONF_ENABLED
|
||||
/*
|
||||
* Determine whether we need SLIP
|
||||
* This will keep working while UIP_FALLBACK_INTERFACE and CMD_CONF_OUTPUT
|
||||
* keep using SLIP
|
||||
*/
|
||||
#if defined(UIP_FALLBACK_INTERFACE) || defined(CMD_CONF_OUTPUT)
|
||||
#define SLIP_ARCH_CONF_ENABLED 1
|
||||
#endif
|
||||
#endif
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \name JTAG interface configuration
|
||||
*
|
||||
* Enable/Disable the JTAG DAP and TAP interfaces on the chip.
|
||||
* Setting this to 0 will disable access to the debug interface
|
||||
* to secure deployed images.
|
||||
* @{
|
||||
*/
|
||||
#ifndef CCXXWARE_CONF_JTAG_INTERFACE_ENABLE
|
||||
#define CCXXWARE_CONF_JTAG_INTERFACE_ENABLE 1
|
||||
#endif
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \name ROM Bootloader configuration
|
||||
*
|
||||
* Enable/Disable the ROM bootloader in your image, if the board supports it.
|
||||
* Look in board.h to choose the DIO and corresponding level that will cause
|
||||
* the chip to enter bootloader mode.
|
||||
* @{
|
||||
*/
|
||||
#ifndef ROM_BOOTLOADER_ENABLE
|
||||
#define ROM_BOOTLOADER_ENABLE 0
|
||||
#endif
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#endif /* CC13XX_CC26XX_CONF_H_ */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** @} */
|
||||
|
|
|
|||
|
|
@ -1,204 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2017, George Oikonomou - http://www.spd.gr
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \addtogroup cc26xx
|
||||
* @{
|
||||
*
|
||||
* \file
|
||||
* Header with configuration defines common to all CC13xx/CC26xx platforms
|
||||
*/
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#ifndef CC13XX_CC26XX_CONF_H_
|
||||
#define CC13XX_CC26XX_CONF_H_
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \name Network Stack Configuration
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*
|
||||
* If set, the systems keeps the HF crystal oscillator on even when the radio is off.
|
||||
* You need to set this to 1 to use TSCH with its default 2.2ms or larger guard time.
|
||||
*/
|
||||
#ifndef CC2650_FAST_RADIO_STARTUP
|
||||
#define CC2650_FAST_RADIO_STARTUP (MAC_CONF_WITH_TSCH)
|
||||
#endif
|
||||
|
||||
#ifdef RF_CHANNEL
|
||||
#define RF_CORE_CONF_CHANNEL RF_CHANNEL
|
||||
#endif
|
||||
|
||||
#ifndef RF_CORE_CONF_CHANNEL
|
||||
#define RF_CORE_CONF_CHANNEL 25
|
||||
#endif
|
||||
|
||||
/* Number of Prop Mode RX buffers */
|
||||
#ifndef PROP_MODE_CONF_RX_BUF_CNT
|
||||
#define PROP_MODE_CONF_RX_BUF_CNT 4
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Auto-configure Prop-mode radio if we are running on CC13xx, unless the
|
||||
* project has specified otherwise. Depending on the final mode, determine a
|
||||
* default channel (again, if unspecified) and configure RDC params
|
||||
*/
|
||||
#if CPU_FAMILY_CC13XX
|
||||
#ifndef CC13XX_CONF_PROP_MODE
|
||||
#define CC13XX_CONF_PROP_MODE 1
|
||||
#endif /* CC13XX_CONF_PROP_MODE */
|
||||
#endif /* CPU_FAMILY_CC13XX */
|
||||
|
||||
#if CC13XX_CONF_PROP_MODE
|
||||
#define NETSTACK_CONF_RADIO prop_mode_driver
|
||||
|
||||
#ifndef RF_CORE_CONF_CHANNEL
|
||||
#define RF_CORE_CONF_CHANNEL 0
|
||||
#endif
|
||||
|
||||
#define CSMA_CONF_ACK_WAIT_TIME (RTIMER_SECOND / 400)
|
||||
#define CSMA_CONF_AFTER_ACK_DETECTED_WAIT_TIME (RTIMER_SECOND / 1000)
|
||||
#define CSMA_CONF_SEND_SOFT_ACK 1
|
||||
|
||||
#else /* CC13XX_CONF_PROP_MODE */
|
||||
#define NETSTACK_CONF_RADIO ieee_mode_driver
|
||||
|
||||
#define CSMA_CONF_SEND_SOFT_ACK 0
|
||||
#endif /* CC13XX_CONF_PROP_MODE */
|
||||
|
||||
#define NETSTACK_RADIO_MAX_PAYLOAD_LEN 125
|
||||
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \name IEEE address configuration
|
||||
*
|
||||
* Used to generate our link-local & IPv6 address
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* \brief Location of the IEEE address
|
||||
* 0 => Read from InfoPage,
|
||||
* 1 => Use a hardcoded address, configured by IEEE_ADDR_CONF_ADDRESS
|
||||
*/
|
||||
#ifndef IEEE_ADDR_CONF_HARDCODED
|
||||
#define IEEE_ADDR_CONF_HARDCODED 0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \brief The hardcoded IEEE address to be used when IEEE_ADDR_CONF_HARDCODED
|
||||
* is defined as 1
|
||||
*/
|
||||
#ifndef IEEE_ADDR_CONF_ADDRESS
|
||||
#define IEEE_ADDR_CONF_ADDRESS { 0x00, 0x12, 0x4B, 0x00, 0x89, 0xAB, 0xCD, 0xEF }
|
||||
#endif
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \name RF configuration
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
/* RF Config */
|
||||
|
||||
#ifndef IEEE_MODE_CONF_AUTOACK
|
||||
#define IEEE_MODE_CONF_AUTOACK 1 /**< RF H/W generates ACKs */
|
||||
#endif
|
||||
|
||||
#ifndef IEEE_MODE_CONF_PROMISCOUS
|
||||
#define IEEE_MODE_CONF_PROMISCOUS 0 /**< 1 to enable promiscous mode */
|
||||
#endif
|
||||
|
||||
#ifndef RF_BLE_CONF_ENABLED
|
||||
#define RF_BLE_CONF_ENABLED 0 /**< 0 to disable BLE support */
|
||||
#endif
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \name Character I/O Configuration
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
#ifndef CC26XX_UART_CONF_ENABLE
|
||||
#define CC26XX_UART_CONF_ENABLE 1 /**< Enable/Disable UART I/O */
|
||||
#endif
|
||||
|
||||
#ifndef CC26XX_UART_CONF_BAUD_RATE
|
||||
#define CC26XX_UART_CONF_BAUD_RATE 115200 /**< Default UART0 baud rate */
|
||||
#endif
|
||||
|
||||
/* Enable I/O over the Debugger Devpack - Only relevant for the SensorTag */
|
||||
#ifndef BOARD_CONF_DEBUGGER_DEVPACK
|
||||
#define BOARD_CONF_DEBUGGER_DEVPACK 1
|
||||
#endif
|
||||
|
||||
#ifndef SLIP_ARCH_CONF_ENABLED
|
||||
/*
|
||||
* Determine whether we need SLIP
|
||||
* This will keep working while UIP_FALLBACK_INTERFACE and CMD_CONF_OUTPUT
|
||||
* keep using SLIP
|
||||
*/
|
||||
#if defined(UIP_FALLBACK_INTERFACE) || defined(CMD_CONF_OUTPUT)
|
||||
#define SLIP_ARCH_CONF_ENABLED 1
|
||||
#endif
|
||||
#endif
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \name JTAG interface configuration
|
||||
*
|
||||
* Enable/Disable the JTAG DAP and TAP interfaces on the chip.
|
||||
* Setting this to 0 will disable access to the debug interface
|
||||
* to secure deployed images.
|
||||
* @{
|
||||
*/
|
||||
#ifndef CCXXWARE_CONF_JTAG_INTERFACE_ENABLE
|
||||
#define CCXXWARE_CONF_JTAG_INTERFACE_ENABLE 1
|
||||
#endif
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \name ROM Bootloader configuration
|
||||
*
|
||||
* Enable/Disable the ROM bootloader in your image, if the board supports it.
|
||||
* Look in board.h to choose the DIO and corresponding level that will cause
|
||||
* the chip to enter bootloader mode.
|
||||
* @{
|
||||
*/
|
||||
#ifndef ROM_BOOTLOADER_ENABLE
|
||||
#define ROM_BOOTLOADER_ENABLE 0
|
||||
#endif
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#endif /* CC13XX_CC26XX_CONF_H_ */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** @} */
|
||||
Loading…
Reference in New Issue