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Removing unused CPU code

This commit is contained in:
Simon Duquennoy 2017-06-21 11:09:11 +02:00
parent 85e0573ffd
commit 3d0a5afb92
67 changed files with 0 additions and 24478 deletions
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9875
drivers/cpu/arm/aducrf101/Common/ADuCRF101.h
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File diff suppressed because it is too large Load Diff

108
drivers/cpu/arm/aducrf101/Common/GCC/ADuCRF101.ld
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@ -1,108 +0,0 @@
/**
* Copyright (c) 2014, Analog Devices, Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted (subject to the limitations in the
* disclaimer below) provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
* GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
* HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(Reset_Handler)
MEMORY
{
flash (rx) : org = 0x00000000, len = 128k
ram (rwx) : org = 0x20000000, len = 16k
}
SECTIONS
{
.vectors : {
__vectors_start = .;
KEEP(*(.vectors))
. = ALIGN(4);
} >flash
.text : {
. = ALIGN(4);
*(.text)
*(.text.*)
etext = .;
} >flash
.ARM.ex : {
*(.ARM.extab* .gnu.linkonce.armextab.*)
__exidx_start = .;
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
__exidx_end = .;
} >flash
.rodata : {
. = ALIGN(4);
*(.rodata)
*(.rodata.*)
. = ALIGN(4);
__rodata_end = .;
} >flash
.data : {
/* Initialized data is placed in flash, and will get
copied to RAM by crt0.S */
. = ALIGN(4);
__data_flash_start = LOADADDR(.data);
__data_start = .;
*(.data)
*(.data.*)
/* Code that goes into RAM also ends up here, and
gets copied along with the data section. */
*(.ramtext*)
__data_end = .;
edata = .;
} > ram AT > flash
.bss : {
. = ALIGN(8);
__bss_start = .;
*(.bss)
*(.bss.*)
*(COMMON)
. = ALIGN(4);
__bss_end = .;
end = .;
} > ram
/* Heap grows up from "end" (after bss), and stack grows down from
the end of RAM. */
. = ORIGIN(ram) + LENGTH(ram);
stack_end = .;
}

173
drivers/cpu/arm/aducrf101/Common/GCC/crt0.S
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@ -1,173 +0,0 @@
/**
* Copyright (c) 2014, Analog Devices, Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted (subject to the limitations in the
* disclaimer below) provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
* GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
* HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
.equ SCB_VTOR, 0xE000ED08
/* Vector table */
.macro handler name
.long \name\()
.weak \name\()
.set \name\(), unhandled_vector
.endm
.macro handler_reserved
.long 0
.endm
.section .vectors, "a", %progbits
vectors:
.long stack_end
.long Reset_Handler
/* Cortex-M3 core interrupts */
handler NMI_Handler
handler HardFault_Handler
handler MemManage_Handler
handler BusFault_Handler
handler UsageFault_Handler
handler_reserved
handler_reserved
handler_reserved
handler_reserved
handler SVC_Handler
handler DebugMon_Handler
handler_reserved
handler PendSV_Handler
handler SysTick_Handler
/* ADuCRF101 external interrupts */
handler WakeUp_Int_Handler
handler Ext_Int0_Handler
handler Ext_Int1_Handler
handler Ext_Int2_Handler
handler Ext_Int3_Handler
handler Ext_Int4_Handler
handler Ext_Int5_Handler
handler Ext_Int6_Handler
handler Ext_Int7_Handler
handler Ext_Int8_Handler
handler WDog_Tmr_Int_Handler
handler_reserved
handler GP_Tmr0_Int_Handler
handler GP_Tmr1_Int_Handler
handler ADC0_Int_Handler
handler Flsh_Int_Handler
handler UART_Int_Handler
handler SPI0_Int_Handler
handler SPI1_Int_Handler
handler I2C0_Slave_Int_Handler
handler I2C0_Master_Int_Handler
handler_reserved
handler_reserved
handler DMA_Err_Int_Handler
handler DMA_SPI1_TX_Int_Handler
handler DMA_SPI1_RX_Int_Handler
handler DMA_UART_TX_Int_Handler
handler DMA_UART_RX_Int_Handler
handler DMA_I2C0_STX_Int_Handler
handler DMA_I2C0_SRX_Int_Handler
handler DMA_I2C0_MTX_Int_Handler
handler DMA_I2C0_MRX_Int_Handler
handler_reserved
handler_reserved
handler_reserved
handler DMA_ADC_Int_Handler
handler DMA_SPI0_TX_Int_Handler
handler DMA_SPI0_RX_Int_Handler
handler PWMTrip_Int_Handler
handler PWM0_Int_Handler
handler PWM1_Int_Handler
handler PWM2_Int_Handler
handler PWM3_Int_Handler
/* Reset handler */
.section .text
.syntax unified
.code 16
.global Reset_Handler
.thumb_func
Reset_Handler:
/* Set up some basics, in case we came here from a call
rather than system reset. */
/* Disable interrupts */
cpsid i
/* Privileged mode, main stack, no floating point */
mov r0, #0
msr control, r0
isb
/* Point vector table to the right place */
ldr r0, =__vectors_start
ldr r1, =SCB_VTOR
str r0, [r1]
/* Load initial stack pointer */
ldr r0, =stack_end
mov sp, r0
isb
/* Clear BSS */
mov r0, #0
ldr r1, =__bss_start
ldr r2, =__bss_end
zero_bss_loop:
cmp r1, r2
it lt
strlt r0, [r1], #4
blt zero_bss_loop
/* Copy initialized data from flash to RAM */
ldr r0, =__data_flash_start
ldr r1, =__data_start
ldr r2, =__data_end
copy_data_loop:
ldr r3, [r0], #4
cmp r1, r2
it lt
strlt r3, [r1], #4
blt copy_data_loop
/* We can run C code now */
bl main
/* If main returned, just loop */
b .
/* Handler for otherwise unhandled vectors */
.section .text,"ax",%progbits
.thumb_func
unhandled_vector:
b unhandled_vector

67
drivers/cpu/arm/aducrf101/Common/IAR/ADUCRF101.icf
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@ -1,67 +0,0 @@
/**
* Copyright (c) 2014, Analog Devices, Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted (subject to the limitations in the
* disclaimer below) provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
* GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
* HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
define symbol __ICFEDIT_region_ROM_end__ = 0x0001FFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
do not initialize { section .mainstackarea };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place at address mem:0x1FC { readonly section .PageZeroCheckSum };
place at address mem:0x1FFEC { readonly section .sigprot };
place in ROM_region { readonly };
place in RAM_region { readwrite,
block CSTACK, block HEAP };

99
drivers/cpu/arm/aducrf101/Common/IAR/Retarget.c
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@ -1,99 +0,0 @@
/**
* Copyright (c) 2014, Analog Devices, Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted (subject to the limitations in the
* disclaimer below) provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
* GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
* HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
Module : Retarget.c
Description : uart interface
Date : December 2012
Version : v2.00
Changelog : v1.00 Initial
v2.00 use of UrtLib functions
*/
#include <include.h>
#include "UrtLib.h"
#include <stdio.h>
#include <string.h>
#include <stddef.h>
#define CR 0x0D
/*************************************************************************/
/* size_t __read(int handle,unsigned char *buf,size_t bufSize) */
/* Write data to a stream */
/* Needed for retargetting the IAR DLIB library for the ADUCRF101 */
/*************************************************************************/
size_t __read(int handle,unsigned char *buf,size_t bufSize)
{
size_t i;
for (i=0x0; i<bufSize;i++)
{
// Wait for character available
while(!(COMLSR_DR==(pADI_UART->COMLSR & COMLSR_DR)));
buf[i] = pADI_UART->COMRX;
}
return i;
}
/*************************************************************************/
/* __write(int handle,const unsigned char *buf,size_t bufSize) */
/* Read data from a stream */
/* Needed for retargetting the IAR DLIB library for the ADUCRF101 */
/*************************************************************************/
size_t __write(int handle,const unsigned char *buf,size_t bufSize)
{
size_t i;
for (i=0x0; i<bufSize;i++)
{
if (buf[i] == '\n')
{
while(!(COMLSR_THRE==(UrtLinSta(0) & COMLSR_THRE)));
UrtTx(0, 0x0D);
}
while(!(COMLSR_THRE==(UrtLinSta(0) & COMLSR_THRE)));
UrtTx(0, buf[i]);
}
return i;
}

224
drivers/cpu/arm/aducrf101/Common/IAR/startup_ADuCRF101.S
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@ -1,224 +0,0 @@
; Copyright (c) 2014, Analog Devices, Inc. All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted (subject to the limitations in the
; disclaimer below) provided that the following conditions are met:
;
; - Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; - Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the
; distribution.
;
; - Neither the name of Analog Devices, Inc. nor the names of its
; contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
; GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
; HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
; WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
; MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
; BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
; OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
; IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
; Module : startup_ADuCRF101.s
; Description : Cortex-M3 startup file - ADuCRF101 - EWARM Version
; Date : 15 February 2012
; Version : v1.00
; Changelog : v1.00 Initial
MODULE ?cstartup
;; Forward declaration of sections.
SECTION CSTACK:DATA:NOROOT(3)
SECTION .intvec:CODE:NOROOT(2)
EXTERN __iar_program_start
PUBLIC __vector_table
DATA
__vector_table
DCD sfe(CSTACK)
DCD __iar_program_start
DCD Nmi_Handler ; The NMI handler
DCD Fault_Handler ; The hard fault handler
DCD MemManage_Handler ; The MPU fault handler
DCD BusFault_Handler ; The bus fault handler
DCD UsageFault_Handler ; The usage fault handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall handler
DCD DebugMon_Handler ; Debug monitor handler
DCD 0 ; Reserved
DCD PendSV_Handler ; The PendSV handler
DCD SysTick_Handler ; The SysTick handler
; External Interrupts
DCD WakeUp_Int_Handler ; Wake Up Timer [ 0]
DCD Ext_Int0_Handler ; External Interrupt 0 [ 1]
DCD Ext_Int1_Handler ; External Interrupt 1 [ 2]
DCD Ext_Int2_Handler ; External Interrupt 2 [ 3]
DCD Ext_Int3_Handler ; External Interrupt 3 [ 4]
DCD Ext_Int4_Handler ; External Interrupt 4 [ 5]
DCD Ext_Int5_Handler ; External Interrupt 5 [ 6]
DCD Ext_Int6_Handler ; External Interrupt 6 [ 7]
DCD Ext_Int7_Handler ; External Interrupt 7 [ 8]
DCD Ext_Int8_Handler ; External Interrupt 8 [ 9]
DCD WDog_Tmr_Int_Handler ; Watchdog timer handler [10]
DCD UnUsed_Handler ; Reserved [11]
DCD GP_Tmr0_Int_Handler ; General purpose timer 0 [12]
DCD GP_Tmr1_Int_Handler ; General purpose timer 1 [13]
DCD ADC0_Int_Handler ; ADC Interrupt [14]
DCD Flsh_Int_Handler ; Flash IRQ [15]
DCD UART_Int_Handler ; UART0 [16]
DCD SPI0_Int_Handler ; SPI 0 [17]
DCD SPI1_Int_Handler ; SPI 1 [18]
DCD I2C0_Slave_Int_Handler ; I2C0 Slave [19]
DCD I2C0_Master_Int_Handler ; I2C0 Master [20]
DCD UnUsed_Handler ; Reserved [21]
DCD UnUsed_Handler ; Reserved [22]
DCD DMA_Err_Int_Handler ; DMA Error interrupt [23]
DCD DMA_SPI1_TX_Int_Handler ; DMA SPI1 TX [24]
DCD DMA_SPI1_RX_Int_Handler ; DMA SPI1 RX [25]
DCD DMA_UART_TX_Int_Handler ; DMA UART TX [26]
DCD DMA_UART_RX_Int_Handler ; DMA UART RX [27]
DCD DMA_I2C0_STX_Int_Handler ; DMA I2C0 Slave TX [28]
DCD DMA_I2C0_SRX_Int_Handler ; DMA I2C0 Slave RX [29]
DCD DMA_I2C0_MTX_Int_Handler ; DMA I2C0 Master TX [30]
DCD DMA_I2C0_MRX_Int_Handler ; DMA I2C0 Master RX [31]
DCD UnUsed_Handler ; Reserved [32]
DCD UnUsed_Handler ; Reserved [33]
DCD UnUsed_Handler ; Reserved [34]
DCD DMA_ADC_Int_Handler ; DMA ADC [35]
DCD DMA_SPI0_TX_Int_Handler ; DMA SPI0 TX [36]
DCD DMA_SPI0_RX_Int_Handler ; DMA SPI0 RX [37]
DCD PWMTrip_Int_Handler ; PWM Trip [38]
DCD PWM0_Int_Handler ; PWM 0 [39]
DCD PWM1_Int_Handler ; PWM 1 [40]
DCD PWM2_Int_Handler ; PWM 2 [41]
DCD PWM3_Int_Handler ; PWM 3 [42]
DCD UnUsed_Handler ; Unused [43]
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; Default interrupt handlers.
;;
PUBWEAK SysTick_Handler
PUBWEAK Nmi_Handler
PUBWEAK Fault_Handler
PUBWEAK MemManage_Handler
PUBWEAK BusFault_Handler
PUBWEAK UsageFault_Handler
PUBWEAK SVC_Handler
PUBWEAK DebugMon_Handler
PUBWEAK PendSV_Handler
PUBWEAK WakeUp_Int_Handler
PUBWEAK Ext_Int0_Handler
PUBWEAK Ext_Int1_Handler
PUBWEAK Ext_Int2_Handler
PUBWEAK Ext_Int3_Handler
PUBWEAK Ext_Int4_Handler
PUBWEAK Ext_Int5_Handler
PUBWEAK Ext_Int6_Handler
PUBWEAK Ext_Int7_Handler
PUBWEAK Ext_Int8_Handler
PUBWEAK WDog_Tmr_Int_Handler
PUBWEAK GP_Tmr0_Int_Handler
PUBWEAK GP_Tmr1_Int_Handler
PUBWEAK ADC0_Int_Handler
PUBWEAK Flsh_Int_Handler
PUBWEAK UART_Int_Handler
PUBWEAK SPI0_Int_Handler
PUBWEAK SPI1_Int_Handler
PUBWEAK I2C0_Slave_Int_Handler
PUBWEAK I2C0_Master_Int_Handler
PUBWEAK DMA_Err_Int_Handler
PUBWEAK DMA_SPI1_TX_Int_Handler
PUBWEAK DMA_SPI1_RX_Int_Handler
PUBWEAK DMA_UART_TX_Int_Handler
PUBWEAK DMA_UART_RX_Int_Handler
PUBWEAK DMA_I2C0_STX_Int_Handler
PUBWEAK DMA_I2C0_SRX_Int_Handler
PUBWEAK DMA_I2C0_MTX_Int_Handler
PUBWEAK DMA_I2C0_MRX_Int_Handler
PUBWEAK DMA_ADC_Int_Handler
PUBWEAK DMA_SPI0_TX_Int_Handler
PUBWEAK DMA_SPI0_RX_Int_Handler
PUBWEAK PWMTrip_Int_Handler
PUBWEAK PWM0_Int_Handler
PUBWEAK PWM1_Int_Handler
PUBWEAK PWM2_Int_Handler
PUBWEAK PWM3_Int_Handler
PUBWEAK UnUsed_Handler
THUMB
SECTION .text:CODE:REORDER:NOROOT(1)
Nmi_Handler
Fault_Handler
MemManage_Handler
BusFault_Handler
UsageFault_Handler
SVC_Handler
DebugMon_Handler
PendSV_Handler
SysTick_Handler
WakeUp_Int_Handler
Ext_Int0_Handler
Ext_Int1_Handler
Ext_Int2_Handler
Ext_Int3_Handler
Ext_Int4_Handler
Ext_Int5_Handler
Ext_Int6_Handler
Ext_Int7_Handler
Ext_Int8_Handler
WDog_Tmr_Int_Handler
GP_Tmr0_Int_Handler
GP_Tmr1_Int_Handler
ADC0_Int_Handler
Flsh_Int_Handler
UART_Int_Handler
SPI0_Int_Handler
SPI1_Int_Handler
I2C0_Slave_Int_Handler
I2C0_Master_Int_Handler
DMA_Err_Int_Handler
DMA_SPI1_TX_Int_Handler
DMA_SPI1_RX_Int_Handler
DMA_UART_TX_Int_Handler
DMA_UART_RX_Int_Handler
DMA_I2C0_STX_Int_Handler
DMA_I2C0_SRX_Int_Handler
DMA_I2C0_MTX_Int_Handler
DMA_I2C0_MRX_Int_Handler
DMA_ADC_Int_Handler
DMA_SPI0_TX_Int_Handler
DMA_SPI0_RX_Int_Handler
PWMTrip_Int_Handler
PWM0_Int_Handler
PWM1_Int_Handler
PWM2_Int_Handler
PWM3_Int_Handler
UnUsed_Handler
B UnUsed_Handler
END

106
drivers/cpu/arm/aducrf101/Common/RealView/Retarget.c
View File

@ -1,106 +0,0 @@
/**
* Copyright (c) 2014, Analog Devices, Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted (subject to the limitations in the
* disclaimer below) provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
* GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
* HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
Module : retarget.c
Description :
Date : December 2012
Version : v2.00
Changelog : v1.00 Initial
v2.00 use of UrtLib functions
*/
#include <stdio.h>
#include <rt_misc.h>
#include <include.h>
#pragma import(__use_no_semihosting_swi)
#define CR 0x0D
struct __FILE { int handle; /* Add whatever you need here */ };
FILE __stdout;
FILE __stdin;
// Re-targetting the Realview library functions
/*
* writes the character specified by c (converted to an unsigned char) to
* the output stream pointed to by stream, at the position indicated by the
* asociated file position indicator (if defined), and advances the
* indicator appropriately. If the file position indicator is not defined,
* the character is appended to the output stream.
* Returns: the character written. If a write error occurs, the error
* indicator is set and fputc returns EOF.
*/
int fputc(int ch, FILE * stream )
{
if(ch == '\n')
while(!(COMLSR_THRE==(UrtLinSta(0) & COMLSR_THRE)));
UrtTx(0, CR); /* output CR */
while(!(COMLSR_THRE==(UrtLinSta(0) & COMLSR_THRE)));
UrtTx(0, ch);
return(ch);
}
int __backspace(FILE *stream)
{
return 0x0;
}
/*
* obtains the next character (if present) as an unsigned char converted to
* an int, from the input stream pointed to by stream, and advances the
* associated file position indicator (if defined).
* Returns: the next character from the input stream pointed to by stream.
* If the stream is at end-of-file, the end-of-file indicator is
* set and fgetc returns EOF. If a read error occurs, the error
* indicator is set and fgetc returns EOF.
*/
int fgetc(FILE * stream)
{
return (UrtRx(0));
}
int ferror(FILE *f) {
/* Your implementation of ferror */
return EOF;
}
void _ttywrch(int ch) { UrtTx(0, ch); }
void _sys_exit(int return_code) {
label: goto label; /* endless loop */
}

61
drivers/cpu/arm/aducrf101/Common/aducrf101-include.h
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@ -1,61 +0,0 @@
/**
* Copyright (c) 2014, Analog Devices, Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted (subject to the limitations in the
* disclaimer below) provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
* GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
* HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
@module include.h
@brief Main Include file
@version V0.2
@author PAD CSE group, Analog Devices Inc
@date January 2013
@par Revision History:
- V0.1, February 2012: initial version.
- V0.2, January 2013: addition of PwmLib, FeeLib and DmaLib
remove uart.h
**/
#ifndef __INCLUDE_H
#define __INCLUDE_H
#include <stdlib.h>
#include <stddef.h>
#include <stdio.h>
#include <string.h>
#include <limits.h>
#include <defs.h>
#include <ADuCRF101.h>
#include "radioeng.h"
#endif // __INCLUDE_H

42
drivers/cpu/arm/aducrf101/Common/defs.h
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@ -1,42 +0,0 @@
/**
* Copyright (c) 2014, Analog Devices, Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted (subject to the limitations in the
* disclaimer below) provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
* GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
* HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
@file defs.h
@brief Global definitions.
@version V0.1
@author PAD CSE group, Analog Devices Inc
@date January 2012
**/
typedef enum {FALSE = 0, TRUE = !FALSE} boolean;

1790
drivers/cpu/arm/aducrf101/Common/radioeng.c
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File diff suppressed because it is too large Load Diff

174
drivers/cpu/arm/aducrf101/Common/radioeng.h
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@ -1,174 +0,0 @@
/**
* Copyright (c) 2014, Analog Devices, Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted (subject to the limitations in the
* disclaimer below) provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
* GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
* HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
@file radioeng.h
@brief Radio Interface Engine Functions
@version v1.0
@author PAD CSE group, Analog Devices Inc
@date May 08th 2013
**/
#define RIE_U32 unsigned long
#define RIE_U16 unsigned short int
#define RIE_U8 unsigned char
#define RIE_S8 signed char
/*! \enum RIE_BaseConfigs
* Variables of this type are used to define the Base Configuration
*/
/*! \var RIE_BaseConfigs DR_1_0kbps_Dev10_0kHz
* Base configuration of 1 kbps datarate, 10.0 kHz frequency deviation.
Use for achieving longer distances.
*/
/*! \var RIE_BaseConfigs DR_38_4kbps_Dev20kHz
* Base configuration of 38.4 kbps datarate, 20 kHz frequency deviation.
Use as a compromise of distance and power.
*/
/*! \var RIE_BaseConfigs DR_300_0kbps_Dev75_0kHz
* Base configuration of 300 kbps datarate, 75 kHz frequency deviation.
Use for achieving faster transmission times hence lower power.
*/
typedef enum
{
DR_1_0kbps_Dev10_0kHz = 0x0,
DR_38_4kbps_Dev20kHz = 0x1,
DR_300_0kbps_Dev75_0kHz = 0x2,
UnsupportedDRDev
} RIE_BaseConfigs;
/*! \enum RIE_ModulationTypes
* Variables of this type are used to define a tx modulation type
*/
/*! \var RIE_ModulationTypes FSK_Modulation
* FSK Modulation
*/
/*! \var RIE_ModulationTypes GFSK_Modulation
* GFSK Modulation
*/
typedef enum {FSK_Modulation = 0, GFSK_Modulation = 1} RIE_ModulationTypes;
/*! \enum RIE_PATypes
* Variables of this type are used to define a PA type
*/
/*! \var RIE_PATypes DifferentialPA
* Differential PA
*/
/*! \var RIE_PATypes SingleEndedPA
* Single Ended PA
*/
typedef enum {DifferentialPA = 0, SingleEndedPA = 1} RIE_PATypes;
typedef enum {PowerLevel0 ,PowerLevel1 ,PowerLevel2 ,PowerLevel3,
PowerLevel4 ,PowerLevel5 ,PowerLevel6 ,PowerLevel7,
PowerLevel8 ,PowerLevel9 ,PowerLevel10,PowerLevel11,
PowerLevel12,PowerLevel13,PowerLevel14,PowerLevel15
} RIE_PAPowerLevel;
/*! \enum RIE_BOOL
* Variables of this type are used to define a TRUE or FALSE condition
*/
/*! \var RIE_BOOL RIE_TRUE
* TRUE condition
*/
/*! \var RIE_BOOL RIE_FALSE
* FALSE condition
*/
typedef enum {RIE_FALSE = 0, RIE_TRUE = !RIE_FALSE} RIE_BOOL;
/*! \enum RIE_Responses
* Variables of this type are used to define the return value from functions
*/
/*! \var RIE_Responses RIE_Success
* Successful completion
*/
/*! \var RIE_Responses RIE_RadioSPICommsFail
* SPI communications with the radio failure.
*/
/*! \var RIE_Responses RIE_UnsupportedRadioConfig
* This is an unsupported radio configuration
*/
/*! \var RIE_Responses RIE_Unimplemented
* This feature has not been implemented
*/
/*! \var RIE_Responses RIE_InvalidParamter
* An invaild parameter was passed
*/
typedef enum
{
RIE_Success = 0x0,
RIE_RadioSPICommsFail = 0x1,
RIE_UnsupportedRadioConfig = 0x2,
RIE_Unimplemented = 0x3,
RIE_InvalidParamter = 0x4,
} RIE_Responses;
// Added in Radio Interface Engine v0.1
RIE_Responses RadioGetAPIVersion (RIE_U32 *pVersion);
RIE_Responses RadioInit (RIE_BaseConfigs BaseConfig);
RIE_Responses RadioPowerOff (void);
RIE_Responses RadioTerminateRadioOp (void);
RIE_Responses RadioSetFrequency (RIE_U32 Frequency);
RIE_Responses RadioSetModulationType (RIE_ModulationTypes ModulationType);
RIE_Responses RadioPayldManchesterEncode(RIE_BOOL bEnable);
RIE_Responses RadioPayldDataWhitening (RIE_BOOL bEnable);
RIE_Responses RadioTxPacketFixedLen (RIE_U8 Len, RIE_U8 *pData);
RIE_BOOL RadioTxPacketComplete (void);
RIE_Responses RadioTxSetPA (RIE_PATypes PAType,RIE_PAPowerLevel Power);
RIE_Responses RadioTxCarrier (void);
RIE_Responses RadioTxPreamble (void);
RIE_Responses RadioRxPacketFixedLen (RIE_U8 Len);
RIE_BOOL RadioRxPacketAvailable (void);
RIE_Responses RadioRxPacketRead (RIE_U8 BufferLen,RIE_U8 *pPktLen,RIE_U8 *pData,RIE_S8 *pRSSIdBm);
RIE_Responses RadioRxBERTestMode (void);
// Added in Radio Interface Engine v0.2
RIE_Responses RadioSwitchConfig (RIE_BaseConfigs BaseConfig);
RIE_Responses RadioRadioGetRSSI (RIE_S8 *pRSSIdBm);
RIE_Responses RadioTxSetPower (RIE_PAPowerLevel Power);
// Added in Radio Interface Engine v0.3
RIE_Responses RadioTxPacketVariableLen (RIE_U8 Len, RIE_U8 *pData);
RIE_Responses RadioRxPacketVariableLen (void);
// Added in Radio Interface Engine v0.5
RIE_Responses RadioDeInit (void);

178
drivers/cpu/arm/aducrf101/Common/system_ADuCRF101.c
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@ -1,178 +0,0 @@
/**
* Copyright (c) 2014, Analog Devices, Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted (subject to the limitations in the
* disclaimer below) provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
* GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
* HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
@file system_ADuCRF101.c
@brief CMSIS Cortex-M3 Device Peripheral Access Layer Implementation File
for the ADuCRF101
@version v1.0
@author PAD CSE group, Analog Devices Inc
@date January 14th 2013
**/
#include <stdint.h>
#include "ADuCRF101.h"
/*----------------------------------------------------------------------------
DEFINES
*---------------------------------------------------------------------------*/
/* Extract the Clock Divider */
#define __CCLK_DIV (1 << (pADI_CLKCTL->CLKCON & CLKCON_CD_MSK) )
/* define the clock multiplexer input frequencies */
#define __HFOSC 16000000
#define __LFXTAL 32768
#define __LFOSC 32768
/*----------------------------------------------------------------------------
Internal Clock Variables
*---------------------------------------------------------------------------*/
static uint32_t uClk = 0; /* Undivided System Clock Frequency (UCLK) */
static uint32_t uClkDiv = 0; /* Divided System Clock Frequency (UCLK_DIV) */
/* Frequency of the external clock source connected to P0.5 */
static uint32_t SystemExtClock = 0;
/*----------------------------------------------------------------------------
Clock functions
*---------------------------------------------------------------------------*/
void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */
{
/* pre-processor verification that clock mux mask and allowed values agree */
#if ((CLKCON_CLKMUX_HFOSC \
| CLKCON_CLKMUX_LFXTAL \
| CLKCON_CLKMUX_LFOSC \
| CLKCON_CLKMUX_EXTP05) \
== CLKCON_CLKMUX_MSK)
/* update the system core clock according the the current clock mux setting */
switch (pADI_CLKCTL->CLKCON & CLKCON_CLKMUX_MSK ) {
case CLKCON_CLKMUX_HFOSC:
uClk = __HFOSC;
break;
case CLKCON_CLKMUX_LFXTAL:
uClk = __LFXTAL;
break;
case CLKCON_CLKMUX_LFOSC:
uClk = __LFOSC;
break;
case CLKCON_CLKMUX_ECLKIN:
uClk = SystemExtClock;
break;
/* no need to catch default case due to pre-processor test */
}
/* update the divided system clock */
uClkDiv = uClk / __CCLK_DIV;
#else
#error "Clock mux mask and allowed value mismatch!"
#endif
}
/**
* Initialize the system
*
* @return none
*
* @brief Setup the microcontroller system.
* Initialize the System and update the SystemFrequency variable.
*/
void SystemInit (void)
{
/* reset CLKCON register */
pADI_CLKCTL->CLKCON = CLKCON_RVAL;
/* reset XOSCCON register */
pADI_CLKCTL->XOSCCON = XOSCCON_RVAL;
/* compute internal clocks */
SystemCoreClockUpdate();
}
/**
* @brief Sets the system external clock frequency
*
* @param ExtClkFreq External clock frequency in Hz
* @return none
*
* Sets the clock frequency of the source connected to P0.5 clock input source
*/
void SetSystemExtClkFreq (uint32_t ExtClkFreq)
{
SystemExtClock = ExtClkFreq;
}
/**
* @brief Gets the system external clock frequency
*
* @return External Clock frequency
*
* Gets the clock frequency of the source connected to P0.5 clock input source
*/
uint32_t GetSystemExtClkFreq (void)
{
return SystemExtClock;
}
/* set the system clock dividers */
void SystemSetClockDivider(uint16_t div)
{
/* critical region */
__disable_irq();
/* read-modify-write without any interrupts */
pADI_CLKCTL->CLKCON &= ~(CLKCON_CD_MSK); /* keep everything else */
pADI_CLKCTL->CLKCON |= div; /* set new value */
/* end critical region */
__enable_irq();
/* refresh internal clock variables */
SystemCoreClockUpdate();
}
uint32_t SystemGetClockFrequency(void)
{
return uClkDiv;
}

98
drivers/cpu/arm/aducrf101/Common/system_ADuCRF101.h
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@ -1,98 +0,0 @@
/**
* Copyright (c) 2014, Analog Devices, Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted (subject to the limitations in the
* disclaimer below) provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
* GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
* HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
@file system_ADuCRF101.h
@brief: CMSIS Cortex-M3 Device Peripheral Access Layer Header File
for the ADuCRF101
@version v0.2
@author PAD CSE group, Analog Devices Inc
@date March 09th 2012
**/
#ifndef __SYSTEM_ADUCRF101_H__
#define __SYSTEM_ADUCRF101_H__
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Initialize the system
*
* @return none
*
* Setup the microcontroller system.
* Initialize the System and update the SystemCoreClock variable.
*/
extern void SystemInit (void);
/**
* @brief Update internal SystemCoreClock variable
*
* @return none
*
* Updates the internal SystemCoreClock with current core
* Clock retrieved from cpu registers.
*/
extern void SystemCoreClockUpdate (void);
/**
* @brief Sets the system external clock frequency
*
* @param ExtClkFreq External clock frequency in Hz
* @return none
*
* Sets the clock frequency of the source connected to P0.5 clock input source
*/
extern void SetSystemExtClkFreq (uint32_t ExtClkFreq);
/**
* @brief Gets the system external clock frequency
*
* @return External Clock frequency
*
* Gets the clock frequency of the source connected to P0.5 clock input source
*/
extern uint32_t GetSystemExtClkFreq (void);
#ifdef __cplusplus
}
#endif
#endif /* __SYSTEM_ADUCRF101_H__ */

75
drivers/cpu/arm/aducrf101/Makefile.aducrf101
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@ -1,75 +0,0 @@
# -*- makefile -*-
# Copyright (c) 2014, Analog Devices, Inc. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted (subject to the limitations in the
# disclaimer below) provided that the following conditions are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
#
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the
# distribution.
#
# - Neither the name of Analog Devices, Inc. nor the names of its
# contributors may be used to endorse or promote products derived
# from this software without specific prior written permission.
#
# NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
# GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
# HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
# WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
# BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
# OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
# IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
# Author: Jim Paris <jim.paris@rigado.com>
CONTIKI_CPU = $(CONTIKI)/drivers/cpu/arm/aducrf101
ifdef IAR
include $(CONTIKI_CPU)/Makefile.aducrf101.iar
else
include $(CONTIKI_CPU)/Makefile.aducrf101.gnu
endif
ifdef SERIAL_ID
CFLAGS += -DSERIAL_ID='$(SERIAL_ID)'
endif
ifdef __STACK_SIZE
CFLAGS += -D__STACK_SIZE=$(__STACK_SIZE)
endif
ifdef RF_CHANNEL
CFLAGS += -DRF_CHANNEL=$(RF_CHANNEL)
endif
# HSI internal oscillator by default
CFLAGS += -DF_CPU=16000000
### CPU-dependent directories and source files
CONTIKI_CPU_DIRS += ../common/CMSIS
CONTIKI_CPU_DIRS += .
CONTIKI_SOURCEFILES += slip-arch.c
CONTIKI_SOURCEFILES += rtimer-arch.c
CONTIKI_CPU_DIRS += dev
CONTIKI_SOURCEFILES += uart.c
CONTIKI_SOURCEFILES += clock.c
CONTIKI_SOURCEFILES += watchdog.c
CONTIKI_SOURCEFILES += radio.c
CONTIKI_CPU_DIRS += Common
CONTIKI_SOURCEFILES += system_ADuCRF101.c
CONTIKI_SOURCEFILES += radioeng.c

86
drivers/cpu/arm/aducrf101/Makefile.aducrf101.gnu
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@ -1,86 +0,0 @@
# -*- makefile -*-
# Copyright (c) 2014, Analog Devices, Inc. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted (subject to the limitations in the
# disclaimer below) provided that the following conditions are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
#
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the
# distribution.
#
# - Neither the name of Analog Devices, Inc. nor the names of its
# contributors may be used to endorse or promote products derived
# from this software without specific prior written permission.
#
# NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
# GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
# HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
# WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
# BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
# OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
# IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
# Author: Jim Paris <jim.paris@rigado.com>
CROSS_COMPILE = arm-none-eabi-
CC = $(CROSS_COMPILE)gcc
LD = $(CROSS_COMPILE)gcc
AS = $(CROSS_COMPILE)gcc
AR = $(CROSS_COMPILE)gcc-ar
NM = $(CROSS_COMPILE)gcc-nm
OBJCOPY = $(CROSS_COMPILE)objcopy
OBJDUMP = $(CROSS_COMPILE)objdump
STRIP = $(CROSS_COMPILE)strip
CFLAGS_OPT ?= -Os
CFLAGS_DEBUG ?= -ggdb3 -fomit-frame-pointer
CFLAGS += $(CFLAGS_OPT) $(CFLAGS_DEBUG)
CFLAGS += -std=gnu99
CFLAGS += -ffreestanding -mcpu=cortex-m3 -mthumb -mno-thumb-interwork
CFLAGS += -ffunction-sections -fdata-sections -fno-common -fno-builtin
CFLAGS += -flto
ifdef WERROR
CFLAGS += -Wall -Werror
# These warnings are triggered by existing Contiki code
CFLAGS += -Wno-error=pointer-sign
CFLAGS += -Wno-error=char-subscripts
CFLAGS += -Wno-error=unused-variable
CFLAGS += -Wno-error=unused-but-set-variable
endif
# UIP code does not follow C aliasing rules
CFLAGS += -fno-strict-aliasing
LDFLAGS = $(CFLAGS)
LDFLAGS += -specs=nosys.specs -nostartfiles
# TODO: When it becomes more commonly available, switch to newlib-nano
# for significant size reduction, by uncommenting this:
# LDFLAGS += -specs=nano.specs
LDFLAGS += -Wl,--gc-sections
LDFLAGS += -Wl,-T$(CONTIKI_CPU)/Common/GCC/ADuCRF101.ld
ASFLAGS += -c $(CFLAGS)
# Compiler-specific startup code
CONTIKI_CPU_DIRS += Common/GCC
CONTIKI_SOURCEFILES += crt0.S
# Rules
%.hex: %
$(OBJCOPY) -O ihex $^ $@

94
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@ -1,94 +0,0 @@
# -*- makefile -*-
# Copyright (c) 2014, Analog Devices, Inc. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted (subject to the limitations in the
# disclaimer below) provided that the following conditions are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
#
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the
# distribution.
#
# - Neither the name of Analog Devices, Inc. nor the names of its
# contributors may be used to endorse or promote products derived
# from this software without specific prior written permission.
#
# NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
# GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
# HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
# WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
# BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
# OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
# IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
# Author: Jim Paris <jim.paris@rigado.com>
# Filename quoting here is very tricky, and probably depends on which Windows
# build of "make" is being used. This works for mingw32-make.
ifeq ($(IAR_PATH),)
IAR_SUBPATH := $(shell ls "${PROGRAMFILES}\IAR Systems" 2>/dev/null | tail -1)
ifeq ($(IAR_SUBPATH),)
define iar_error
Unable to find the IAR installation path. Please specify IAR_PATH.
For example: $(MAKE) IAR_PATH="C:\\Program Files (x86)\\IAR Systems\\Embedded Workbench 7.0\\arm"
endef
$(error $(iar_error))
endif
IAR_PATH := ${PROGRAMFILES}\IAR Systems\${IAR_SUBPATH}\arm
endif
CC := "$(IAR_PATH)""\\bin\iccarm"
LD := "$(IAR_PATH)""\\bin\ilinkarm"
AS := "$(IAR_PATH)""\\bin\iasmarm"
AR := "$(IAR_PATH)""\\bin\iarchive"
OBJCOPY := "$(IAR_PATH)""\\bin\ielftool"
CFLAGS += -Ohz
CFLAGS += --silent
CFLAGS += --debug
CFLAGS += --endian=little
CFLAGS += --cpu=Cortex-M3
CFLAGS += -I"$(IAR_PATH)""\\inc"
CFLAGS += -D__ICCARM__
AROPTS = --create
ASFLAGS = -S -s+ -w+ --cpu Cortex-M3
LDFLAGS += --config $(CONTIKI_CPU)/Common/IAR/ADUCRF101.icf
# Compiler-specific startup code
CONTIKI_CPU_DIRS += Common/IAR
CONTIKI_SOURCEFILES += startup_ADuCRF101.S
# Rules
CUSTOM_RULE_C_TO_OBJECTDIR_O = 1
$(OBJECTDIR)/%.o: %.c | $(OBJECTDIR)
$(TRACE_CC)
$(Q)$(CC) $(CFLAGS) $< --dependencies=m $(@:.o=.d) -o $@
CUSTOM_RULE_C_TO_O = 1
%.co: %.c
$(TRACE_CC)
$(Q)$(CC) $(CFLAGS) $< -o $@
CUSTOM_RULE_C_TO_CO = 1
%.co: %.c
$(TRACE_CC)
$(Q)$(CC) $(CFLAGS) -DAUTOSTART_ENABLE $< -o $@
%.hex: %
$(OBJCOPY) --silent --ihex $^ $@

52
drivers/cpu/arm/aducrf101/aducrf101-contiki.h
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@ -1,52 +0,0 @@
/**
* Copyright (c) 2014, Analog Devices, Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted (subject to the limitations in the
* disclaimer below) provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
* GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
* HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
* \author Jim Paris <jim.paris@rigado.com>
*/
#ifndef ADUCRF101_CONTIKI_H
#define ADUCRF101_CONTIKI_H
#include <stdint.h>
#include <aducrf101-include.h>
typedef uint32_t clock_time_t;
typedef uint16_t uip_stats_t;
typedef uint32_t rtimer_clock_t;
#define RTIMER_CLOCK_DIFF(a, b) ((int32_t)((a) - (b)))
rtimer_clock_t rtimer_arch_now(void);
#endif

107
drivers/cpu/arm/aducrf101/clock.c
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@ -1,107 +0,0 @@
/**
* Copyright (c) 2014, Analog Devices, Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted (subject to the limitations in the
* disclaimer below) provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
* GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
* HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
* \author Jim Paris <jim.paris@rigado.com>
*/
#include <aducrf101-contiki.h>
#include <sys/clock.h>
#include <sys/etimer.h>
static volatile clock_time_t current_clock = 0;
static volatile unsigned long current_seconds = 0;
static unsigned int second_countdown = CLOCK_SECOND;
#define SAMPLE_STACK_POINTER
#ifdef SAMPLE_STACK_POINTER
volatile uint32_t *__min_sampled_sp = (uint32_t *)0xFFFFFFFF;
#endif
void
SysTick_Handler(void)
{
#ifdef SAMPLE_STACK_POINTER
/* Take note of the lowest stack pointer we ever saw.
When compiling against newlib, the total free bytes of
RAM not ever used by heap or stack can be found via GDB:
(gdb) p (char *)__min_sampled_sp - (char *)_sbrk(0)
*/
uint32_t *sp = (uint32_t *)&sp;
if (sp < __min_sampled_sp)
__min_sampled_sp = sp;
#endif
current_clock++;
if(etimer_pending()) {
etimer_request_poll();
}
if(--second_countdown == 0) {
current_seconds++;
second_countdown = CLOCK_SECOND;
}
}
/*---------------------------------------------------------------------------*/
void
clock_init()
{
SysTick_Config(F_CPU / CLOCK_SECOND);
}
/*---------------------------------------------------------------------------*/
clock_time_t
clock_time(void)
{
return current_clock;
}
/*---------------------------------------------------------------------------*/
unsigned long
clock_seconds(void)
{
return current_seconds;
}
/*---------------------------------------------------------------------------*/
void
clock_delay_usec(uint16_t usec)
{
/* Delay by watching the SysTick value change. */
int32_t remaining = (int32_t)usec * F_CPU / 1000000;
int32_t old = SysTick->VAL;
while(remaining > 0) {
int32_t new = SysTick->VAL;
if(new > old) { /* wraparound */
old += SysTick->LOAD;
}
remaining -= (old - new);
old = new;
}
}

397
drivers/cpu/arm/aducrf101/dev/radio.c
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@ -1,397 +0,0 @@
/**
* Copyright (c) 2014, Analog Devices, Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted (subject to the limitations in the
* disclaimer below) provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
* GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
* HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
* \author Jim Paris <jim.paris@rigado.com>
*/
#include <string.h>
#include <stdint.h>
#include <aducrf101-contiki.h>
#include "contiki.h"
#include "contiki-net.h"
#include "net/netstack.h"
#include "radio.h"
#define MAX_PACKET_LEN 240
static uint8_t tx_buf[MAX_PACKET_LEN];
#ifndef ADUCRF101_RADIO_BASE_CONFIG
#define ADUCRF101_RADIO_BASE_CONFIG DR_38_4kbps_Dev20kHz
#endif
static RIE_BaseConfigs base_config = ADUCRF101_RADIO_BASE_CONFIG;
static int current_channel = 915000000;
static int current_power = 31;
static int radio_is_on = 0;
/*---------------------------------------------------------------------------*/
/* "Channel" is really frequency, and can be within the bands:
431000000 Hz to 464000000 Hz
862000000 Hz to 928000000 Hz
*/
#define MIN_CHANNEL 431000000
#define MAX_CHANNEL 928000000
static int
_set_channel(int freq)
{
if(freq < 431000000) {
freq = 431000000;
} else if(freq > 464000000 && freq < 663000000) {
freq = 464000000;
} else if(freq >= 663000000 && freq < 862000000) {
freq = 862000000;
} else if(freq > 928000000) {
freq = 928000000;
}
current_channel = freq;
if(RadioSetFrequency(freq) != RIE_Success) {
return RADIO_RESULT_ERROR;
}
return RADIO_RESULT_OK;
}
/*---------------------------------------------------------------------------*/
/* "Power" covers both PA type and power level:
0 through 15 means single-ended, power level 0 through 15
16 through 31 means differential, power level 0 through 15 */
#define MIN_POWER 0
#define MAX_POWER 31
static int
_set_power(int power)
{
RIE_Responses ret;
if(power < 0) {
power = 0;
}
if(power > 31) {
power = 31;
}
if(power <= 15) {
ret = RadioTxSetPA(SingleEndedPA, power);
} else {
ret = RadioTxSetPA(DifferentialPA, power - 16);
}
current_power = power;
if(ret != RIE_Success) {
return RADIO_RESULT_ERROR;
}
return RADIO_RESULT_OK;
}
/*---------------------------------------------------------------------------*/
PROCESS(aducrf101_rf_process, "ADuCRF101 RF driver");
/*---------------------------------------------------------------------------*/
/** Turn the radio on. */
static int
on(void)
{
if(radio_is_on) {
return 1;
}
/* Power radio on */
if(RadioInit(base_config) != RIE_Success) {
return 0;
}
/* Ensure channel and power are set */
if(_set_channel(current_channel) != RADIO_RESULT_OK) {
return 0;
}
if(_set_power(current_power) != RADIO_RESULT_OK) {
return 0;
}
/* Enter receive mode */
RadioRxPacketVariableLen();
radio_is_on = 1;
return 1;
}
/*---------------------------------------------------------------------------*/
/** Turn the radio off. */
static int
off(void)
{
if(!radio_is_on) {
return 1;
}
if(RadioPowerOff() != RIE_Success) {
return 0;
}
radio_is_on = 0;
return 1;
}
/*---------------------------------------------------------------------------*/
static int
init(void)
{
off();
on();
process_start(&aducrf101_rf_process, NULL);
return 1;
}
/*---------------------------------------------------------------------------*/
/** Prepare the radio with a packet to be sent. */
static int
prepare(const void *payload, unsigned short payload_len)
{
/* Truncate long packets */
if(payload_len > MAX_PACKET_LEN) {
payload_len = MAX_PACKET_LEN;
}
memcpy(tx_buf, payload, payload_len);
return 0;
}
/*---------------------------------------------------------------------------*/
/** Send the packet that has previously been prepared. */
static int
transmit(unsigned short transmit_len)
{
if(!radio_is_on)
return RADIO_TX_ERR;
/* Transmit the packet */
if(transmit_len > MAX_PACKET_LEN) {
transmit_len = MAX_PACKET_LEN;
}
if(RadioTxPacketVariableLen(transmit_len, tx_buf) != RIE_Success) {
return RADIO_TX_ERR;
}
while(!RadioTxPacketComplete())
continue;
/* Enter receive mode immediately after transmitting a packet */
RadioRxPacketVariableLen();
return RADIO_TX_OK;
}
/*---------------------------------------------------------------------------*/
/** Prepare & transmit a packet. */
static int
send(const void *payload, unsigned short payload_len)
{
prepare(payload, payload_len);
return transmit(payload_len);
}
/*---------------------------------------------------------------------------*/
/** Read a received packet into a buffer. */
static int
read(void *buf, unsigned short buf_len)
{
uint8_t packet_len;
int8_t rssi;
if(!radio_is_on)
return 0;
if(buf_len > MAX_PACKET_LEN) {
buf_len = MAX_PACKET_LEN;
}
/* Read already-received packet */
if(RadioRxPacketRead(buf_len, &packet_len, buf, &rssi) != RIE_Success) {
return 0;
}
if(packet_len > buf_len) {
packet_len = buf_len;
}
/* Re-enter receive mode immediately after receiving a packet */
RadioRxPacketVariableLen();
return packet_len;
}
/*---------------------------------------------------------------------------*/
/** Perform a Clear-Channel Assessment (CCA) to find out if there is
a packet in the air or not. */
static int
channel_clear(void)
{
/* Not implemented; assume clear */
return 1;
}
/*---------------------------------------------------------------------------*/
/** Check if the radio driver is currently receiving a packet */
static int
receiving_packet(void)
{
/* Not implemented; assume no. */
return 0;
}
/*---------------------------------------------------------------------------*/
/** Check if the radio driver has just received a packet */
static int
pending_packet(void)
{
if(RadioRxPacketAvailable()) {
return 1;
}
return 0;
}
/*---------------------------------------------------------------------------*/
/** Get a radio parameter value. */
static radio_result_t
get_value(radio_param_t param, radio_value_t *value)
{
if(!value) {
return RADIO_RESULT_INVALID_VALUE;
}
switch(param) {
case RADIO_PARAM_RSSI:
{
int8_t dbm;
if(!radio_is_on || RadioRadioGetRSSI(&dbm) != RIE_Success) {
return RADIO_RESULT_ERROR;
}
*value = dbm;
return RADIO_RESULT_OK;
}
case RADIO_PARAM_CHANNEL:
*value = current_channel;
return RADIO_RESULT_OK;
case RADIO_CONST_CHANNEL_MIN:
*value = MIN_CHANNEL;
return RADIO_RESULT_OK;
case RADIO_CONST_CHANNEL_MAX:
*value = MAX_CHANNEL;
return RADIO_RESULT_OK;
case RADIO_PARAM_TXPOWER:
*value = current_power;
return RADIO_RESULT_OK;
case RADIO_CONST_TXPOWER_MIN:
*value = MIN_POWER;
return RADIO_RESULT_OK;
case RADIO_CONST_TXPOWER_MAX:
*value = MAX_POWER;
return RADIO_RESULT_OK;
default:
return RADIO_RESULT_NOT_SUPPORTED;
}
}
/*---------------------------------------------------------------------------*/
/** Set a radio parameter value. */
static radio_result_t
set_value(radio_param_t param, radio_value_t value)
{
switch(param) {
case RADIO_PARAM_CHANNEL:
return _set_channel(value);
case RADIO_PARAM_TXPOWER:
return _set_power(value);
default:
return RADIO_RESULT_NOT_SUPPORTED;
}
}
/*---------------------------------------------------------------------------*/
/**
* Get a radio parameter object. The argument 'dest' must point to a
* memory area of at least 'size' bytes, and this memory area will
* contain the parameter object if the function succeeds.
*/
static radio_result_t
get_object(radio_param_t param, void *dest, size_t size)
{
return RADIO_RESULT_NOT_SUPPORTED;
}
/*---------------------------------------------------------------------------*/
/**
* Set a radio parameter object. The memory area referred to by the
* argument 'src' will not be accessed after the function returns.
*/
static radio_result_t
set_object(radio_param_t param, const void *src, size_t size)
{
return RADIO_RESULT_NOT_SUPPORTED;
}
/*---------------------------------------------------------------------------*/
/**
* \brief Implementation of the ADuCRF101 RF driver process
*
* This process is started by init(). It waits for events triggered
* by packet reception.
*/
PROCESS_THREAD(aducrf101_rf_process, ev, data)
{
int len;
PROCESS_BEGIN();
while(1) {
PROCESS_YIELD_UNTIL(ev == PROCESS_EVENT_POLL);
packetbuf_clear();
len = read(packetbuf_dataptr(), PACKETBUF_SIZE);
if(len > 0) {
packetbuf_set_datalen(len);
NETSTACK_MAC.input();
}
}
PROCESS_END();
}
/*---------------------------------------------------------------------------*/
/**
* \brief Trigger function called by ADI radio engine upon packet RX.
*/
void
aducrf101_rx_packet_hook(void)
{
process_poll(&aducrf101_rf_process);
}
/*---------------------------------------------------------------------------*/
const struct radio_driver aducrf101_radio_driver = {
.init = init,
.prepare = prepare,
.transmit = transmit,
.send = send,
.read = read,
.channel_clear = channel_clear,
.receiving_packet = receiving_packet,
.pending_packet = pending_packet,
.on = on,
.off = off,
.get_value = get_value,
.set_value = set_value,
.get_object = get_object,
.set_object = set_object,
};

124
drivers/cpu/arm/aducrf101/dev/uart.c
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@ -1,124 +0,0 @@
/**
* Copyright (c) 2014, Analog Devices, Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted (subject to the limitations in the
* disclaimer below) provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
* GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
* HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
* \author Jim Paris <jim.paris@rigado.com>
*/
#include <aducrf101-include.h>
static int (*uart_input_handler)(unsigned char c);
static int stdout_enabled;
void
uart_init(int baud)
{
/* P1.0 is UARTRXD, P1.1 is UARTTXD */
pADI_GP1->GPCON &= ~(GP1CON_CON0_MSK | GP1CON_CON1_MSK);
pADI_GP1->GPCON |= GP1CON_CON0_UART0RXD | GP1CON_CON1_UART0TXD;
/* Set P1.1 as output */
GP1OEN_OEN1_BBA = 1;
/* Set baudrate */
int div = (F_CPU / 32) / baud;
pADI_UART->COMDIV = div;
pADI_UART->COMFBR = 0x8800 | ((((64 * F_CPU) / div) / baud) - 2048);
pADI_UART->COMIEN = 0;
pADI_UART->COMLCR = 3;
/* Set up RX IRQ */
pADI_UART->COMIEN = COMIEN_ERBFI_EN;
NVIC_EnableIRQ(UART_IRQn);
__enable_irq();
uart_input_handler = NULL;
stdout_enabled = 1;
}
/*---------------------------------------------------------------------------*/
void
uart_put(unsigned char x)
{
while(!(pADI_UART->COMLSR & COMLSR_THRE))
continue;
pADI_UART->COMTX = x;
}
/*---------------------------------------------------------------------------*/
void
UART_Int_Handler(void)
{
if(pADI_UART->COMIIR & COMIIR_STA_RXBUFFULL) {
unsigned char x = pADI_UART->COMRX;
if(uart_input_handler) {
uart_input_handler(x);
}
}
}
/*---------------------------------------------------------------------------*/
void
uart_set_input(int (*input)(unsigned char c))
{
uart_input_handler = input;
}
void
uart_enable_stdout(int enabled)
{
stdout_enabled = enabled;
}
/*---------------------------------------------------------------------------*/
/* Connect newlib's _write function to the UART. */
int
_write(int fd, const void *buf, size_t len)
{
if(stdout_enabled == 0) {
return -1;
}
if(fd == 1 || fd == 2) {
int n = len;
const unsigned char *p = buf;
while(n--)
uart_put(*p++);
return len;
}
return -1;
}
/*---------------------------------------------------------------------------*/
#ifdef __ICCARM__
/* Connect IAR's __write function to the UART. */
size_t
__write(int fd, const unsigned char *buf, size_t count)
{
return _write(fd, buf, count);
}
#endif

47
drivers/cpu/arm/aducrf101/dev/uart.h
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@ -1,47 +0,0 @@
/**
* Copyright (c) 2014, Analog Devices, Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted (subject to the limitations in the
* disclaimer below) provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
* GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
* HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
* \author Jim Paris <jim.paris@rigado.com>
*/
#ifndef UART_H
#define UART_H
void uart_init(int baud);
void uart_put(unsigned char x);
void uart_set_input(int (*input)(unsigned char c));
void uart_enable_stdout(int enabled);
#endif

49
drivers/cpu/arm/aducrf101/dev/uart0.h
View File

@ -1,49 +0,0 @@
/**
* Copyright (c) 2014, Analog Devices, Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted (subject to the limitations in the
* disclaimer below) provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
* GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
* HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
* \author Jim Paris <jim.paris@rigado.com>
*
* \file
* This file exists only because some examples rely on it.
*/
#ifndef UART1_H
#define UART1_H
#include "dev/uart.h"
#undef BAUD2UBR
#define BAUD2UBR(x) (x)
#define uart1_set_input(f) uart_set_input(f)
#endif /* UART1_H */

49
drivers/cpu/arm/aducrf101/dev/uart1.h
View File

@ -1,49 +0,0 @@
/**
* Copyright (c) 2014, Analog Devices, Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted (subject to the limitations in the
* disclaimer below) provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
* GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
* HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
* \author Jim Paris <jim.paris@rigado.com>
*
* \file
* This file exists only because some examples rely on it.
*/
#ifndef UART0_H
#define UART0_H
#include "dev/uart.h"
#undef BAUD2UBR
#define BAUD2UBR(x) (x)
#define uart0_set_input(f) uart_set_input(f)
#endif /* UART0_H */

67
drivers/cpu/arm/aducrf101/dev/watchdog.c
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@ -1,67 +0,0 @@
/**
* Copyright (c) 2014, Analog Devices, Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted (subject to the limitations in the
* disclaimer below) provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
* GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
* HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
* \author Jim Paris <jim.paris@rigado.com>
*/
#include <aducrf101-contiki.h>
#include <watchdog.h>
void
watchdog_init(void)
{
/* Start disabled. */
T3CON_ENABLE_BBA = 0;
}
/*---------------------------------------------------------------------------*/
void
watchdog_start(void)
{
/* 32 second timeout. This also locks the watchdog configuration. */
pADI_WDT->T3CON = 0x00E9;
pADI_WDT->T3LD = 0x1000;
pADI_WDT->T3VAL = 0x1000;
}
/*---------------------------------------------------------------------------*/
void
watchdog_stop(void)
{
/* Not possible to stop, once enabled */
}
/*---------------------------------------------------------------------------*/
void
watchdog_periodic(void)
{
pADI_WDT->T3CLRI = 0xcccc;
}

47
drivers/cpu/arm/aducrf101/mtarch.h
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@ -1,47 +0,0 @@
/**
* Copyright (c) 2014, Analog Devices, Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted (subject to the limitations in the
* disclaimer below) provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
* GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
* HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
* \author Jim Paris <jim.paris@rigado.com>
*/
#ifndef MTARCH_H_
#define MTARCH_H_
/* Multithreading is currently unimplemented for ARM Cortex-M3 */
struct mtarch_thread {
short mt_thread;
};
#endif /* MTARCH_H_ */

138
drivers/cpu/arm/aducrf101/rtimer-arch.c
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@ -1,138 +0,0 @@
/**
* Copyright (c) 2014, Analog Devices, Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted (subject to the limitations in the
* disclaimer below) provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
* GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
* HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
* \author Jim Paris <jim.paris@rigado.com>
*/
#include <contiki.h>
#include "rtimer-arch.h"
#include "aducrf101-contiki.h"
/* rtimer on the ADuCRF101 is implemented with the "wakeup" timer.
(timer 2). It should be clocked from an external crystal,
but if that doesn't seem to be present, this code will select the
imprecise internal 32.768 KHz oscillator instead. */
static void
_timer2_enable(int enable)
{
T2CON_ENABLE_BBA = enable;
clock_time_t now = clock_time();
while(T2STA_CON_BBA) {
/* Synchronizing settings may fail if the chosen clock isn't running;
wait no more than 1ms for it */
if((clock_time() - now) > (CLOCK_SECOND / 1000)) {
break;
}
}
}
static uint32_t
_timer2_val(void)
{
/* This is atomic because the FREEZE bit is set in T2CON. */
uint32_t now;
now = pADI_WUT->T2VAL0;
now |= pADI_WUT->T2VAL1 << 16;
return now;
}
static uint32_t
_timer2_measure_freq(void)
{
const int test_usec = 10000;
uint32_t now = _timer2_val();
clock_delay_usec(test_usec);
return (_timer2_val() - now) * (1000000 / test_usec);
}
void
rtimer_arch_init(void)
{
uint32_t freq;
const char *timer = "LFXTAL";
_timer2_enable(0);
pADI_WUT->T2CON = T2CON_PRE_DIV1 | T2CON_MOD_FREERUN | T2CON_FREEZE_EN |
T2CON_WUEN_EN;
/* Try 32.768 KHz crystal */
pADI_WUT->T2CON |= T2CON_CLK_LFXTAL;
_timer2_enable(1);
freq = _timer2_measure_freq();
if(freq < 20000 || freq > 40000) {
/* No good; use 32.768 KHz internal oscillator */
_timer2_enable(0);
pADI_WUT->T2CON &= ~T2CON_CLK_MSK;
pADI_WUT->T2CON |= T2CON_CLK_LFOSC;
_timer2_enable(1);
freq = _timer2_measure_freq();
timer = "LFOSC";
}
printf("Using %s for rtimer (%ld Hz)\n", timer, freq);
/* Enable interrupt in NVIC, but disable in WUT for now. */
pADI_WUT->T2IEN = 0;
NVIC_EnableIRQ(WUT_IRQn);
}
rtimer_clock_t
rtimer_arch_now(void)
{
/* This is atomic because the FREEZE bit is set in T2CON. */
return _timer2_val();
}
void
rtimer_arch_schedule(rtimer_clock_t t)
{
uint32_t now = _timer2_val();
/* Minimum of 5 wakeup timer ticks */
if((int32_t)(t - now) < 5) {
t = now + 5;
}
/* Set T2WUFB to match at target time */
T2IEN_WUFB_BBA = 0;
pADI_WUT->T2WUFB0 = (t & 0xffff);
pADI_WUT->T2WUFB1 = (t >> 16);
T2IEN_WUFB_BBA = 1;
}
void
WakeUp_Int_Handler(void)
{
/* clear interrupt */
T2CLRI_WUFB_BBA = 1;
/* disable T2WUFB match */
T2IEN_WUFB_BBA = 0;
rtimer_run_next();
}

47
drivers/cpu/arm/aducrf101/rtimer-arch.h
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@ -1,47 +0,0 @@
/**
* Copyright (c) 2014, Analog Devices, Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted (subject to the limitations in the
* disclaimer below) provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
* GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
* HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
* \author Jim Paris <jim.paris@rigado.com>
*/
#ifndef __RTIMER_ARCH_H__
#define __RTIMER_ARCH_H__
#include <stdint.h>
#define RTIMER_ARCH_SECOND (32768)
#include "sys/rtimer.h"
#endif /* __RTIMER_ARCH_H__ */

60
drivers/cpu/arm/aducrf101/slip-arch.c
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@ -1,60 +0,0 @@
/**
* Copyright (c) 2014, Analog Devices, Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted (subject to the limitations in the
* disclaimer below) provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
* GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
* HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
* \author Jim Paris <jim.paris@rigado.com>
*/
#include <stdio.h>
#include "contiki.h"
#include "dev/slip.h"
#include "uart.h"
/*---------------------------------------------------------------------------*/
void
slip_arch_writeb(unsigned char c)
{
uart_put(c);
}
/*---------------------------------------------------------------------------*/
/**
* Initalize the RS232 port and the SLIP driver.
*
*/
void
slip_arch_init(unsigned long ubr)
{
uart_set_input(slip_input_byte);
}
/*---------------------------------------------------------------------------*/

175
drivers/cpu/arm/at91sam7s/AT91SAM7S-ROM.ld
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@ -1,175 +0,0 @@
/***********************************************************************/
/* */
/* Linker Script File for the AT91SAM7S64 - Code in ROM */
/* */
/***********************************************************************/
/* modified for arm-elf-gcc by Martin Thomas */
/* extensions: - Section for Functions in RAM, */
/* Exeception-Vector remapping */
/* modifications Copyright Martin Thomas 2005 */
/* */
/* */
/* Based on file that has been a part of the uVision/ARM development */
/* tools, Copyright KEIL ELEKTRONIK GmbH 2002-2004 */
/***********************************************************************/
/* Section Definitions */
SECTIONS
{
/* first section is .text which is used for code */
.vectrom :
{
KEEP(*(.vectrom))
} >CODE =0
.text :
{
/* *startup.o (.text) */ /* Startup code */
KEEP(*(.init))
*(.text .text.*)
*(.gnu.linkonce.t.*)
*(.glue_7t .glue_7)
KEEP(*(.fini))
*(.gcc_except_table)
} >CODE =0
. = ALIGN(4);
/* .ctors .dtors are used for c++ constructors/destructors */
/* added by mthomas, based on an Anglia-Designs example for STR7 */
.ctors :
{
PROVIDE(__ctors_start__ = .);
KEEP(*(SORT(.ctors.*)))
KEEP(*(.ctors))
PROVIDE(__ctors_end__ = .);
} >CODE
.dtors :
{
PROVIDE(__dtors_start__ = .);
KEEP(*(SORT(.dtors.*)))
KEEP(*(.dtors))
PROVIDE(__dtors_end__ = .);
} >CODE
/* .rodata section which is used for read-only data (constants) */
.rodata :
{
*(.rodata .rodata.*)
*(.gnu.linkonce.r.*)
} >CODE
. = ALIGN(4);
_etext = . ;
PROVIDE (etext = .);
.data : AT (_etext)
{
_data = . ;
KEEP(*(.vectram)) /* added by mthomas */
*(.data)
SORT(CONSTRUCTORS)
. = ALIGN(4);
*(.fastrun) /* "RAM-Functions" */ /* added by mthomas */
} >DATA
. = ALIGN(4);
_edata = . ;
PROVIDE (edata = .);
/* .bss section which is used for uninitialized data */
.bss :
{
__bss_start = . ;
__bss_start__ = . ;
*(.bss)
*(COMMON)
} >DATA
. = ALIGN(4);
__bss_end = . ;
__bss_end__ = . ;
_end = .;
PROVIDE (end = .);
UND_Stack_Size = 0x00000004;
SVC_Stack_Size = 0x00000200;
ABT_Stack_Size = 0x00000004;
FIQ_Stack_Size = 0x00000100;
IRQ_Stack_Size = 0x00000300;
USR_Stack_Size = 0x00000400;
Stack_Size = UND_Stack_Size + SVC_Stack_Size + ABT_Stack_Size + FIQ_Stack_Size + IRQ_Stack_Size + USR_Stack_Size;
.stack ORIGIN(DATA) + LENGTH(DATA) - Stack_Size :
{
__stack_start__ = . ;
USR_Stack_Start = . ;
. += USR_Stack_Size;
USR_Stack_End = . ;
IRQ_Stack_Start = . ;
. += IRQ_Stack_Size;
IRQ_Stack_End = . ;
FIQ_Stack_Start = . ;
. += FIQ_Stack_Size;
FIQ_Stack_End = . ;
ABT_Stack_Start = . ;
. += ABT_Stack_Size;
ABT_Stack_End = . ;
SVC_Stack_Start = . ;
. += SVC_Stack_Size;
SVC_Stack_End = . ;
UND_Stack_Start = . ;
. += UND_Stack_Size;
UND_Stack_End = . ;
. = ALIGN(4);
__stack_end__ = . ;
Top_Stack = .;
} >DATA
__heap_start__ = __bss_end__ ;
__heap_end__ = __stack_start__ ;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
}

9
drivers/cpu/arm/at91sam7s/AT91SAM7S128-ROM.ld
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@ -1,9 +0,0 @@
/* Memory Definitions */
MEMORY
{
CODE (rx) : ORIGIN = 0x00100000, LENGTH = 128K
DATA (rw) : ORIGIN = 0x00200000, LENGTH = 32K
}
INCLUDE AT91SAM7S-ROM.ld

2229
drivers/cpu/arm/at91sam7s/AT91SAM7S128.h
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2229
drivers/cpu/arm/at91sam7s/AT91SAM7S256.h
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File diff suppressed because it is too large Load Diff

9
drivers/cpu/arm/at91sam7s/AT91SAM7S64-ROM.ld
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@ -1,9 +0,0 @@
/* Memory Definitions */
MEMORY
{
CODE (rx) : ORIGIN = 0x00100000, LENGTH = 64K
DATA (rw) : ORIGIN = 0x00200000, LENGTH = 16K
}
INCLUDE AT91SAM7S-ROM.ld

2229
drivers/cpu/arm/at91sam7s/AT91SAM7S64.h
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182
drivers/cpu/arm/at91sam7s/Makefile.at91sam7s
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@ -1,182 +0,0 @@
# Adapted from Makefile.msp430
# Default to AT91SAM7S64
SUBTARGET = 64
### Code common for all ARM CPUs
CONTIKI_CPU_ARM=$(CONTIKI)/drivers/cpu/arm/
CONTIKI_CPU_ARM_COMMON=$(CONTIKI_CPU_ARM)/common
### Defin the CPU directory
CONTIKI_CPU=$(CONTIKI_CPU_ARM)/at91sam7s
### Define the source files we have in the AT91SAM7S port
CONTIKI_CPU_DIRS = . ../common/dbg-io ../common/usb
AT91SAM7S = clock.c debug-uart.c interrupt-utils.c newlib-syscalls.c sys-interrupt.c rtimer-arch.c rtimer-arch-interrupt.c uip-log.c
SYSAPPS = codeprop-otf.c
include $(CONTIKI_CPU_ARM_COMMON)/usb/Makefile.usb
USB += usb-interrupt.c
include $(CONTIKI_CPU_ARM_COMMON)/SD-card/Makefile.sdcard
TARGETLIBS = random.c dbg-printf.c dbg-puts.c dbg-putchar.c dbg-sprintf.c dbg-snprintf.c strformat.c
CONTIKI_TARGET_SOURCEFILES += $(AT91SAM7S) $(SYSAPPS) \
$(TARGETLIBS) $(UIPDRIVERS) $(USB)
CONTIKI_SOURCEFILES += $(CONTIKI_TARGET_SOURCEFILES)
THREADS =
### Compiler definitions
CC = arm-elf-gcc
LD = arm-elf-ld
AS = arm-elf-as
AR = arm-elf-ar
NM = arm-elf-nm
OBJCOPY = arm-elf-objcopy
STRIP = arm-elf-strip
XSLTPROC=xsltproc
PROJECT_OBJECTFILES += ${addprefix $(OBJECTDIR)/,$(CONTIKI_TARGET_MAIN:.c=.o)}
LINKERSCRIPT = $(CONTIKI_CPU)/AT91SAM7S$(SUBTARGET)-ROM.ld
STARTUP=${addprefix $(OBJECTDIR)/,startup-SAM7S-arm.o}
# JTAG program upload
OPENOCD = openocd
OPENOCD_DIR = $(CONTIKI_CPU)/openocd/
OPENOCD_CFG = arm7_wig.cfg
OPENOCD_FLASH_CFG = arm7_wig_flash.cfg
# USB program upload
SAMIAM=Sam_I_Am
SAMIAM_TTY=/dev/ttyACM0
ARCH_FLAGS= -mcpu=arm7tdmi -mthumb-interwork
THUMB_FLAGS=-mthumb
ARM_FLAGS=
CFLAGSNO = -I. -I$(CONTIKI)/core -I$(CONTIKI_CPU) \
-I$(CONTIKI_CPU)/dbg-io \
-I$(CONTIKI)/drivers/platform/$(TARGET) \
${addprefix -I,$(APPDIRS)} \
-DWITH_ASCII -DMCK=$(MCK) \
-Wall $(ARCH_FLAGS) -g -D SUBTARGET=$(SUBTARGET)
CFLAGS += $(CFLAGSNO) -O -DRUN_AS_SYSTEM -DROM_RUN
LDFLAGS += -L $(CONTIKI_CPU) -T $(LINKERSCRIPT) -nostartfiles
CDEPFLAGS = $(CFLAGS) -D __MAKING_DEPS__
### Setup directory search path for source files
CUSTOM_RULE_C_TO_OBJECTDIR_O=yes
CUSTOM_RULE_C_TO_O=yes
%-interrupt.o: %-interrupt.c
$(CC) $(CFLAGS) $(ARM_FLAGS) $< -c
$(OBJECTDIR)/%-interrupt.o: %-interrupt.c | $(OBJECTDIR)
$(CC) $(CFLAGS) $(ARM_FLAGS) -c $< -o $@
%-arm.o: %-arm.c
$(CC) $(CFLAGS) $(ARM_FLAGS) $< -c
$(OBJECTDIR)/%-arm.o: %-arm.c | $(OBJECTDIR)
$(CC) $(CFLAGS) $(ARM_FLAGS) -c $< -o $@
$(OBJECTDIR)/interrupt-utils.o: interrupt-utils.c | $(OBJECTDIR)
$(CC) $(CFLAGS) $(ARM_FLAGS) $< -c -o $@
%.o: %.c
$(CC) $(CFLAGS) $(THUMB_FLAGS) $< -c
$(OBJECTDIR)/%.o: %.c | $(OBJECTDIR)
$(CC) $(CFLAGS) $(THUMB_FLAGS) -c $< -o $@
CUSTOM_RULE_S_TO_OBJECTDIR_O = yes
%.o: %.S
$(CC) $(CFLAGS) $(ARM_FLAGS) $< -c
$(OBJECTDIR)/%.o: %.S | $(OBJECTDIR)
$(CC) $(CFLAGS) $(ARM_FLAGS) $< -c -o $@
CUSTOM_RULE_C_TO_CO=yes
%.co: %.c
$(CC) $(CFLAGS) $(THUMB_FLAGS) $< -c -o $@
CUSTOM_RULE_C_TO_CE=yes
%.ce: %.o
$(LD) $(LDFLAGS) --relocatable -T $(CONTIKI_CPU)/merge-rodata.ld $< -o $@
$(STRIP) -K _init -K _fini --strip-unneeded -g -x $@
CUSTOM_RULE_LINK=yes
%-stripped.o: %.c
$(CC) $(CFLAGS) -c $< -o $@
$(STRIP) --strip-unneeded -g -x $@
%-stripped.o: %.o
$(STRIP) --strip-unneeded -g -x -o $@ $<
%-nosyms.$(TARGET): %.co $(PROJECT_OBJECTFILES) contiki-$(TARGET).a $(STARTUP)
$(CC) $(LDFLAGS) $(CFLAGS) -nostartfiles -o $@ $(filter-out %.a,$^) $(filter %.a,$^) -lc $(filter %.a,$^)
%.ihex: %.$(TARGET)
$(OBJCOPY) $^ -O ihex $@
%.bin: %.$(TARGET)
$(OBJCOPY) -O binary $< $@
ifdef CORE
%.$(TARGET): %.co $(PROJECT_OBJECTFILES) contiki-$(TARGET).a $(STARTUP)
$(CC) $(LDFLAGS) $(CFLAGS) -nostartfiles -o $@ $(filter-out %.a,$^) $(filter %.a,$^) -lc $(filter %.a,$^)
else
%.$(TARGET): %-nosyms.$(TARGET)
ln -sf $< $@
endif
upload_ocd_%: %.bin
# Clear lock bits
$(OPENOCD) -s $(OPENOCD_DIR) -f $(OPENOCD_CFG) -c init -c "halt;mww 0xffffff64 0x5a000004;sleep 250;mww 0xffffff64 0x5a002004; sleep 250;flash probe 0;flash write_bank 0 $< 0x0;reset run;sleep 500;exit"
upload_%: %.ihex
# Clear lock bits
$(SAMIAM) "open $(SAMIAM_TTY) , writew 0xffffff64 5a000004"
$(SAMIAM) "open $(SAMIAM_TTY) , writew 0xffffff64 5a002004"
$(SAMIAM) "open $(SAMIAM_TTY) , flash $< , go"
ocd_reset:
cd $(CONTIKI_CPU)/openocd;$(OPENOCD) -f $(OPENOCD_CFG) -c init -c reset -c exit
clean: clean_cpu
.PHONY: clean_cpu
clean_cpu:
-rm -rf $(BUILTSRCDIR)
.PRECIOUS: %-nosyms.$(TARGET)

4
drivers/cpu/arm/at91sam7s/builtins.awk
View File

@ -1,4 +0,0 @@
BEGIN {
builtin["_exit"] = "void _exit()";
builtin["strlen"] = "unsigned long strlen()";
}

183
drivers/cpu/arm/at91sam7s/cfs-sdcard-arch.c
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@ -1,183 +0,0 @@
#include <efs-sdcard.h>
#include <sys/process.h>
#include <sys/etimer.h>
#include <cfs/cfs.h>
#include <debug-uart.h>
#include <efs.h>
#include <ls.h>
#include <stdio.h>
process_event_t sdcard_inserted_event;
process_event_t sdcard_removed_event;
static struct process *event_process = NULL;
#define MAX_FDS 4
static File file_descriptors[MAX_FDS];
static int
find_free_fd()
{
int fd;
for (fd = 0; fd < MAX_FDS; fd++) {
if (!file_getAttr(&file_descriptors[fd], FILE_STATUS_OPEN)) {
return fd;
}
}
return -1;
}
static File *
get_file(int fd)
{
if (!sdcard_ready()) return 0;
if (fd >= MAX_FDS || fd < 0) return NULL;
if (!file_getAttr(&file_descriptors[fd], FILE_STATUS_OPEN)) return NULL;
return &file_descriptors[fd];
}
int
cfs_open (const char *name, int flags)
{
eint8 mode;
int fd;
if (!sdcard_ready()) return -1;
fd = find_free_fd();
if (fd < 0) return -1;
if (flags == CFS_READ) {
mode = MODE_READ;
} else {
mode = MODE_APPEND;
}
if (file_fopen(&file_descriptors[fd], &sdcard_efs.myFs,
(char*)name, mode) < 0) {
return -1;
}
return fd;
}
void
cfs_close(int fd)
{
File *file = get_file(fd);
if (!file) return;
file_fclose(file);
fs_flushFs(efs_sdcard_get_fs());
}
int
cfs_read (int fd, void *buf, unsigned int len)
{
File *file = get_file(fd);
if (!file) return 0;
return file_read(file, len, (euint8*)buf);
}
int
cfs_write (int fd, const void *buf, unsigned int len)
{
File *file = get_file(fd);
if (!file) return 0;
return file_write(file, len, (euint8*)buf);
}
cfs_offset_t
cfs_seek (int fd, cfs_offset_t offset, int whence)
{
File *file;
if (whence != CFS_SEEK_SET) return -1;
file = get_file(fd);
if (!file) return 0;
if (file_setpos(file, offset) != 0) return -1;
return file->FilePtr;
}
/* Cause a compile time error if expr is false */
#ifdef __GNUC__
#define COMPILE_TIME_CHECK(expr) \
(void) (__builtin_choose_expr ((expr), 0, ((void)0))+3)
#else
#define COMPILE_TIME_CHECK(expr)
#endif
#define MAX_DIR_LISTS 4
DirList dir_lists[MAX_DIR_LISTS];
static DirList *
find_free_dir_list()
{
unsigned int l;
for(l = 0; l < MAX_DIR_LISTS; l++) {
if (dir_lists[l].fs == NULL) {
return &dir_lists[l];
}
}
return NULL;
}
int
cfs_opendir (struct cfs_dir *dirp, const char *name)
{
DirList *dirs;
COMPILE_TIME_CHECK(sizeof(DirList*) <= sizeof(struct cfs_dir));
if (!sdcard_ready()) return -1;
dirs = find_free_dir_list();
if (!dirs) return -1;
if (ls_openDir(dirs, efs_sdcard_get_fs(), (eint8*)name) != 0) {
dirs->fs = NULL;
return -1;
}
*(DirList**)dirp = dirs;
return 0;
}
int
cfs_readdir (struct cfs_dir *dirp, struct cfs_dirent *dirent)
{
euint8 *start;
euint8 *end;
char *to = dirent->name;
DirList *dirs = *(DirList**)dirp;
if (!sdcard_ready()) return 1;
if (ls_getNext(dirs) != 0) return 1;
start = dirs->currentEntry.FileName;
end = start + 7;
while(end > start) {
if (*end > ' ') {
end++;
break;
}
end--;
}
while(start < end) {
*to++ = *start++;
}
start = dirs->currentEntry.FileName + 8;
end = start + 3;
if (*start > ' ') {
*to++ = '.';
*to++ = *start++;
while(start < end && *start > ' ') {
*to++ = *start++;
}
}
*to = '\0';
if (dirs->currentEntry.Attribute & ATTR_DIRECTORY) {
dirent->size = 0;
} else {
dirent->size = dirs->currentEntry.FileSize;
}
return 0;
}
void
cfs_closedir (struct cfs_dir *dirp)
{
(*(DirList**)dirp)->fs = NULL;
}

74
drivers/cpu/arm/at91sam7s/clock.c
View File

@ -1,74 +0,0 @@
#include <sys/clock.h>
#include <sys/cc.h>
#include <sys/etimer.h>
#include <debug-uart.h>
#include <AT91SAM7S64.h>
#include <sys-interrupt.h>
#define PIV ((MCK/CLOCK_SECOND/16)-1)
static volatile clock_time_t current_clock = 0;
static volatile unsigned long current_seconds = 0;
static unsigned int second_countdown = CLOCK_SECOND;
static int pit_handler_func()
{
if (!(*AT91C_PITC_PISR & AT91C_PITC_PITS)) return 0; /* Check PIT
Interrupt */
current_clock++;
if(etimer_pending() && etimer_next_expiration_time() <= current_clock) {
etimer_request_poll();
/* dbg_printf("%d,%d\n", clock_time(),etimer_next_expiration_time ()); */
}
if (--second_countdown == 0) {
current_seconds++;
second_countdown = CLOCK_SECOND;
}
(void)*AT91C_PITC_PIVR;
return 1;
}
static SystemInterruptHandler pit_handler = {NULL, pit_handler_func};
void
clock_init()
{
sys_interrupt_append_handler(&pit_handler);
*AT91C_PITC_PIMR = (AT91C_PITC_PITIEN | /* PIT Interrupt Enable */
AT91C_PITC_PITEN | /* PIT Enable */
PIV);
sys_interrupt_enable();
}
clock_time_t
clock_time(void)
{
return current_clock;
}
/* The inner loop takes 4 cycles. The outer 5+SPIN_COUNT*4. */
#define SPIN_TIME 2 /* us */
#define SPIN_COUNT (((MCK*SPIN_TIME/1000000)-5)/4)
#ifndef __MAKING_DEPS__
void
clock_delay(unsigned int t)
{
#ifdef __THUMBEL__
asm volatile("1: mov r1,%2\n2:\tsub r1,#1\n\tbne 2b\n\tsub %0,#1\n\tbne 1b\n":"=l"(t):"0"(t),"l"(SPIN_COUNT));
#else
#error Must be compiled in thumb mode
#endif
}
unsigned long
clock_seconds(void)
{
return current_seconds;
}
#endif /* __MAKING_DEPS__ */

196
drivers/cpu/arm/at91sam7s/debug-uart.c
View File

@ -1,196 +0,0 @@
#include <debug-uart.h>
#include <sys-interrupt.h>
/* #include <strformat.h> */
#include <AT91SAM7S64.h>
#include <string.h>
#include <interrupt-utils.h>
#ifndef DBG_XMIT_BUFFER_LEN
#define DBG_XMIT_BUFFER_LEN 3024
#endif
#ifndef DBG_RECV_BUFFER_LEN
#define DBG_RECV_BUFFER_LEN 256
#endif
static unsigned char dbg_xmit_buffer[DBG_XMIT_BUFFER_LEN];
static unsigned char dbg_recv_buffer[DBG_RECV_BUFFER_LEN];
static unsigned int dbg_recv_buffer_len = 0;
void
dbg_setup_uart()
{
/* Setup PIO ports */
*AT91C_PIOA_OER = AT91C_PA10_DTXD;
*AT91C_PIOA_ODR = AT91C_PA9_DRXD;
*AT91C_PIOA_ASR = AT91C_PA10_DTXD | AT91C_PA9_DRXD;
*AT91C_PIOA_PDR = AT91C_PA10_DTXD | AT91C_PA9_DRXD;
*AT91C_DBGU_MR = AT91C_US_PAR_NONE | AT91C_US_CHMODE_NORMAL;
*AT91C_DBGU_IDR= 0xffffffff;
*AT91C_DBGU_BRGR = MCK / (115200 * 16);
*AT91C_DBGU_CR = AT91C_US_RXEN | AT91C_US_TXEN;
*AT91C_DBGU_TPR = (unsigned int)dbg_xmit_buffer;
*AT91C_DBGU_TNPR = (unsigned int)dbg_xmit_buffer;
}
static void (*input_func)(const char *inp, unsigned int len) = NULL;
static int dbg_recv_handler_func()
{
if (!(*AT91C_DBGU_CSR & AT91C_US_RXRDY)) return 0;
unsigned char c = *AT91C_DBGU_RHR;
/* Leave one byte for '\0' */
if (dbg_recv_buffer_len < (DBG_RECV_BUFFER_LEN -1)) {
dbg_recv_buffer[dbg_recv_buffer_len++] = c;
}
if (c == '\n') {
dbg_recv_buffer[dbg_recv_buffer_len] = '\0';
if (input_func) input_func((char*)dbg_recv_buffer, dbg_recv_buffer_len);
dbg_recv_buffer_len = 0;
}
return 1;
}
static SystemInterruptHandler dbg_recv_handler = {NULL, dbg_recv_handler_func};
void
dbg_set_input_handler(void (*handler)(const char *inp, unsigned int len))
{
input_func = handler;
sys_interrupt_append_handler(&dbg_recv_handler);
sys_interrupt_enable();
*AT91C_DBGU_IER = AT91C_US_RXRDY;
}
static volatile unsigned char mutex = 0;
unsigned int
dbg_send_bytes(const unsigned char *seq, unsigned int len)
{
unsigned short next_count;
unsigned short current_count;
unsigned short left;
unsigned int save = disableIRQ();
if (mutex) {
restoreIRQ(save);
return 0; /* Buffer being updated */
}
mutex = 1; /* Prevent interrupts from messing up the transmission */
*AT91C_DBGU_PTCR =AT91C_PDC_TXTDIS; /* Stop transmitting */
while(*AT91C_DBGU_PTSR & AT91C_PDC_TXTEN); /* Wait until stopped */
next_count = *AT91C_DBGU_TNCR;
current_count = *AT91C_DBGU_TCR;
left = DBG_XMIT_BUFFER_LEN - next_count - current_count;
if (left > 0) {
if (left < len) len = left;
if (next_count > 0) {
/* Buffer is wrapped */
memcpy(&dbg_xmit_buffer[next_count], seq, len);
*AT91C_DBGU_TNCR = next_count + len;
} else {
unsigned char *to = ((unsigned char*)*AT91C_DBGU_TPR) + current_count;
left = &dbg_xmit_buffer[DBG_XMIT_BUFFER_LEN] - to;
if (len > left) {
unsigned int wrapped = len - left;
memcpy(to, seq, left);
memcpy(dbg_xmit_buffer, &seq[left], wrapped);
*AT91C_DBGU_TCR = current_count + left;
*AT91C_DBGU_TNCR = wrapped;
} else {
memcpy(to, seq, len);
*AT91C_DBGU_TCR = current_count + len;
}
}
} else {
len = 0;
}
*AT91C_DBGU_PTCR =AT91C_PDC_TXTEN; /* Restart transmission */
mutex = 0;
restoreIRQ(save);
return len;
}
static unsigned char dbg_write_overrun = 0;
void
dbg_putchar(const char ch)
{
if (dbg_write_overrun) {
if (dbg_send_bytes((const unsigned char*)"^",1) != 1) return;
}
dbg_write_overrun = 0;
if (dbg_send_bytes((const unsigned char*)&ch,1) != 1) {
dbg_write_overrun = 1;
}
}
void
dbg_blocking_putchar(const char ch)
{
if (dbg_write_overrun) {
while (dbg_send_bytes((const unsigned char*)"^",1) != 1);
}
dbg_write_overrun = 0;
while (dbg_send_bytes((const unsigned char*)&ch,1) != 1);
}
#if 0
static StrFormatResult
dbg_write_cb(void *user_data, const char *data, unsigned int len)
{
if (dbg_send_bytes((const unsigned char*)data, len) != len) {
dbg_write_overrun = 1;
return STRFORMAT_FAILED;
}
return STRFORMAT_OK;
}
void
dbg_printf(const char *format, ...)
{
static const StrFormatContext ctxt = {dbg_write_cb, NULL};
va_list ap;
if (dbg_write_overrun) {
if (dbg_send_bytes((const unsigned char*)"^",1) != 1) return;
}
dbg_write_overrun = 0;
va_start(ap, format);
format_str_v(&ctxt, format, ap);
va_end(ap);
}
static StrFormatResult
dbg_write_blocking_cb(void *user_data, const char *data, unsigned int len)
{
unsigned int left = len;
while(left > 0) {
unsigned int sent = dbg_send_bytes((const unsigned char*)data, left);
left -= sent;
data += sent;
}
return STRFORMAT_OK;
}
void
dbg_blocking_printf(const char *format, ...)
{
static const StrFormatContext ctxt = {dbg_write_blocking_cb, NULL};
va_list ap;
if (dbg_write_overrun) {
while (dbg_send_bytes((const unsigned char*)"^",1) != 1);
}
dbg_write_overrun = 0;
va_start(ap, format);
format_str_v(&ctxt, format, ap);
va_end(ap);
}
#endif
void
dbg_drain()
{
while(!(*AT91C_DBGU_CSR & AT91C_US_TXBUFE));
}

33
drivers/cpu/arm/at91sam7s/debug-uart.h
View File

@ -1,33 +0,0 @@
#ifndef DEBUG_UART_H_1V2039076V__
#define DEBUG_UART_H_1V2039076V__
void
dbg_setup_uart();
void
dbg_set_input_handler(void (*handler)(const char *inp, unsigned int len));
unsigned int
dbg_send_bytes(const unsigned char *seq, unsigned int len);
#if 0
void
dbg_printf(const char *format, ...)
__attribute__ ((__format__ (__printf__, 1,2)));
void
dbg_blocking_printf(const char *format, ...)
__attribute__ ((__format__ (__printf__, 1,2)));
#endif
void
dbg_putchar(const char ch);
void
dbg_blocking_putchar(const char ch);
void
dbg_drain();
#endif /* DEBUG_UART_H_1V2039076V__ */

195
drivers/cpu/arm/at91sam7s/efs-sdcard-arch.c
View File

@ -1,195 +0,0 @@
#include <AT91SAM7S64.h>
#include <interfaces/sd.h>
#include <efs-sdcard.h>
#include <sys/etimer.h>
#include <stdio.h>
#define SPI_SPEED 10000000 /* 10MHz clock*/
#define SPI_TRANSFER (AT91C_PA12_MISO | AT91C_PA13_MOSI | AT91C_PA14_SPCK)
#define SPI_CS (AT91C_PA11_NPCS0)
static struct process *event_process = NULL;
static void
init_spi()
{
*AT91C_SPI_CR = AT91C_SPI_SPIDIS | AT91C_SPI_SWRST;
*AT91C_PMC_PCER = (1 << AT91C_ID_SPI);
*AT91C_PIOA_ASR = SPI_TRANSFER | SPI_CS;
*AT91C_PIOA_PDR = SPI_TRANSFER | SPI_CS;
*AT91C_PIOA_PPUER = AT91C_PA12_MISO | SPI_CS;
*AT91C_SPI_MR = (AT91C_SPI_MSTR | AT91C_SPI_PS_FIXED
| AT91C_SPI_MODFDIS);
/* It seems necessary to set the clock speed for chip select 0
even if it's not used. */
AT91C_SPI_CSR[0] =
((((MCK+SPI_SPEED/2)/SPI_SPEED)<<8) | AT91C_SPI_CPOL
| AT91C_SPI_BITS_8 | AT91C_SPI_CSAAT);
*AT91C_SPI_CR = AT91C_SPI_SPIEN;
}
void
if_spiInit(hwInterface *iface)
{
unsigned int i;
*AT91C_PIOA_SODR = AT91C_PA11_NPCS0;
*AT91C_PIOA_PER = AT91C_PA11_NPCS0;
for(i=0;i<20;i++) {
if_spiSend(iface, 0xff);
}
*AT91C_PIOA_PDR = AT91C_PA11_NPCS0;
}
/* Borrowed from at91_spi.c (c)2006 Martin Thomas */
esint8
if_initInterface(hwInterface* file, eint8* opts)
{
euint32 sc;
if_spiInit(file);
if(sd_Init(file)<0) {
DBG((TXT("Card failed to init, breaking up...\n")));
return(-1);
}
if(sd_State(file)<0){
DBG((TXT("Card didn't return the ready state, breaking up...\n")
));
return(-2);
}
sd_getDriveSize(file, &sc);
file->sectorCount = sc/512;
if( (sc%512) != 0) {
file->sectorCount--;
}
DBG((TXT("Card Capacity is %lu Bytes (%lu Sectors)\n"), sc, file->sectorCount));
return(0);
}
/* Borrowed from lpc2000_spi.c (c)2005 Martin Thomas */
esint8
if_readBuf(hwInterface* file,euint32 address,euint8* buf)
{
return(sd_readSector(file,address,buf,512));
}
esint8
if_writeBuf(hwInterface* file,euint32 address,euint8* buf)
{
return(sd_writeSector(file,address, buf));
}
esint8
if_setPos(hwInterface* file,euint32 address)
{
return(0);
}
euint8
if_spiSend(hwInterface *iface, euint8 outgoing)
{
euint8 ingoing;
*AT91C_SPI_TDR = outgoing;
while(!(*AT91C_SPI_SR & AT91C_SPI_RDRF));
ingoing = *AT91C_SPI_RDR;
/* printf(">%02x <%02x\n", outgoing, ingoing); */
return ingoing;
}
static EmbeddedFileSystem sdcard_efs;
PROCESS(sdcard_process, "SD card process");
PROCESS_THREAD(sdcard_process, ev , data)
{
static struct etimer timer;
PROCESS_BEGIN();
*AT91C_PIOA_PER = AT91C_PIO_PA20 | AT91C_PIO_PA1;
*AT91C_PIOA_ODR = AT91C_PIO_PA20 | AT91C_PIO_PA1;
/* Card not inserted */
sdcard_efs.myCard.sectorCount = 0;
init_spi();
while(1) {
if (!(*AT91C_PIOA_PDSR & AT91C_PA20_IRQ0)) {
if (sdcard_efs.myCard.sectorCount == 0) {
if (efs_init(&sdcard_efs,0) == 0) {
if (event_process) {
process_post(event_process, sdcard_inserted_event, NULL);
}
printf("SD card inserted\n");
} else {
printf("SD card insertion failed\n");
}
}
} else {
if (sdcard_efs.myCard.sectorCount != 0) {
/* Card removed */
fs_umount(&sdcard_efs.myFs);
sdcard_efs.myCard.sectorCount = 0;
if (event_process) {
process_post(event_process, sdcard_removed_event, NULL);
}
printf("SD card removed\n");
}
}
etimer_set(&timer, CLOCK_SECOND);
PROCESS_WAIT_EVENT_UNTIL(ev == PROCESS_EVENT_EXIT ||
ev == PROCESS_EVENT_TIMER);
if (ev == PROCESS_EVENT_EXIT) break;
if (!(*AT91C_PIOA_PDSR & AT91C_PA20_IRQ0)) {
/* Wait for card to be preperly inserted */
etimer_set(&timer,CLOCK_SECOND/2);
PROCESS_WAIT_EVENT_UNTIL(ev== PROCESS_EVENT_TIMER);
}
}
PROCESS_END();
}
FileSystem *
efs_sdcard_get_fs()
{
efs_sdcard_init();
return &sdcard_efs.myFs;
}
void
efs_sdcard_init()
{
static int initialized = 0;
if (!initialized) {
sdcard_inserted_event = process_alloc_event();
sdcard_removed_event = process_alloc_event();
process_start(&sdcard_process, NULL);
initialized = 1;
}
}
int
sdcard_ready()
{
return sdcard_efs.myCard.sectorCount > 0;
}
void
sdcard_event_process(struct process *p)
{
event_process = p;
}

84
drivers/cpu/arm/at91sam7s/interrupt-utils.c
View File

@ -1,84 +0,0 @@
/******************************************************************************
*
* $RCSfile: interrupt-utils.c,v $
* $Revision: 1.2 $
*
* This module provides the interface routines for setting up and
* controlling the various interrupt modes present on the ARM processor.
* Copyright 2004, R O SoftWare
* No guarantees, warrantees, or promises, implied or otherwise.
* May be used for hobby or commercial purposes provided copyright
* notice remains intact.
*
*****************************************************************************/
#include "interrupt-utils.h"
#define IRQ_MASK 0x00000080
#define FIQ_MASK 0x00000040
#define INT_MASK (IRQ_MASK | FIQ_MASK)
static inline unsigned __get_cpsr(void)
{
unsigned long retval;
asm volatile (" mrs %0, cpsr" : "=r" (retval) : /* no inputs */ );
return retval;
}
static inline void __set_cpsr(unsigned val)
{
asm volatile (" msr cpsr_c, %0" : /* no outputs */ : "r" (val) );
}
unsigned disableIRQ(void)
{
unsigned _cpsr;
_cpsr = __get_cpsr();
__set_cpsr(_cpsr | IRQ_MASK);
return _cpsr;
}
unsigned restoreIRQ(unsigned oldCPSR)
{
unsigned _cpsr;
_cpsr = __get_cpsr();
__set_cpsr((_cpsr & ~IRQ_MASK) | (oldCPSR & IRQ_MASK));
return _cpsr;
}
unsigned enableIRQ(void)
{
unsigned _cpsr;
_cpsr = __get_cpsr();
__set_cpsr(_cpsr & ~IRQ_MASK);
return _cpsr;
}
unsigned disableFIQ(void)
{
unsigned _cpsr;
_cpsr = __get_cpsr();
__set_cpsr(_cpsr | FIQ_MASK);
return _cpsr;
}
unsigned restoreFIQ(unsigned oldCPSR)
{
unsigned _cpsr;
_cpsr = __get_cpsr();
__set_cpsr((_cpsr & ~FIQ_MASK) | (oldCPSR & FIQ_MASK));
return _cpsr;
}
unsigned enableFIQ(void)
{
unsigned _cpsr;
_cpsr = __get_cpsr();
__set_cpsr(_cpsr & ~FIQ_MASK);
return _cpsr;
}

272
drivers/cpu/arm/at91sam7s/interrupt-utils.h
View File

@ -1,272 +0,0 @@
/*
* Defines and Macros for Interrupt-Service-Routines
* collected and partly created by
* Martin Thomas <mthomas@rhrk.uni-kl.de>
*
* Copyright 2005 M. Thomas
* No guarantees, warrantees, or promises, implied or otherwise.
* May be used for hobby or commercial purposes provided copyright
* notice remains intact.
*/
#ifndef interrupt_utils_
#define interrupt_utils_
/*
The following defines are usefull for
interrupt service routine declarations.
*/
/*
RAMFUNC
Attribute which defines a function to be located
in memory section .fastrun and called via "long calls".
See linker-skript and startup-code to see how the
.fastrun-section is handled.
The definition is not only useful for ISRs but since
ISRs should be executed fast the macro is defined in
this header.
*/
#define RAMFUNC __attribute__ ((long_call, section (".fastrun")))
/*
INTFUNC
standard attribute for arm-elf-gcc which marks
a function as ISR (for the VIC). Since gcc seems
to produce wrong code if this attribute is used in
thumb/thumb-interwork the attribute should only be
used for "pure ARM-mode" binaries.
*/
#define INTFUNC __attribute__ ((interrupt("IRQ")))
/*
NACKEDFUNC
gcc will not add any code to a function declared
"nacked". The user has to take care to save registers
and add the needed code for ISR functions. Some
macros for this tasks are provided below.
*/
#define NACKEDFUNC __attribute__((naked))
/******************************************************************************
*
* MACRO Name: ISR_STORE()
*
* Description:
* This MACRO is used upon entry to an ISR with interrupt nesting.
* Should be used together with ISR_ENABLE_NEST(). The MACRO
* performs the following steps:
*
* 1 - Save the non-banked registers r0-r12 and lr onto the IRQ stack.
*
*****************************************************************************/
#define ISR_STORE() asm volatile( \
"STMDB SP!,{R0-R12,LR}\n" )
/******************************************************************************
*
* MACRO Name: ISR_RESTORE()
*
* Description:
* This MACRO is used upon exit from an ISR with interrupt nesting.
* Should be used together with ISR_DISABLE_NEST(). The MACRO
* performs the following steps:
*
* 1 - Load the non-banked registers r0-r12 and lr from the IRQ stack.
* 2 - Adjusts resume adress
*
*****************************************************************************/
#define ISR_RESTORE() asm volatile( \
"LDMIA SP!,{R0-R12,LR}\n" \
"SUBS R15,R14,#0x0004\n" )
/******************************************************************************
*
* MACRO Name: ISR_ENABLE_NEST()
*
* Description:
* This MACRO is used upon entry from an ISR with interrupt nesting.
* Should be used after ISR_STORE.
*
*****************************************************************************/
#define ISR_ENABLE_NEST() asm volatile( \
"MRS LR, SPSR \n" \
"STMFD SP!, {LR} \n" \
"MSR CPSR_c, #0x1f \n" \
"STMFD SP!, {LR} " )
/******************************************************************************
*
* MACRO Name: ISR_DISABLE_NEST()
*
* Description:
* This MACRO is used upon entry from an ISR with interrupt nesting.
* Should be used before ISR_RESTORE.
*
*****************************************************************************/
#define ISR_DISABLE_NEST() asm volatile( \
"LDMFD SP!, {LR} \n" \
"MSR CPSR_c, #0x92 \n" \
"LDMFD SP!, {LR} \n" \
"MSR SPSR_cxsf, LR \n" )
/*
* The following marcos are from the file "armVIC.h" by:
*
* Copyright 2004, R O SoftWare
* No guarantees, warrantees, or promises, implied or otherwise.
* May be used for hobby or commercial purposes provided copyright
* notice remains intact.
*
*/
/******************************************************************************
*
* MACRO Name: ISR_ENTRY()
*
* Description:
* This MACRO is used upon entry to an ISR. The current version of
* the gcc compiler for ARM does not produce correct code for
* interrupt routines to operate properly with THUMB code. The MACRO
* performs the following steps:
*
* 1 - Adjust address at which execution should resume after servicing
* ISR to compensate for IRQ entry
* 2 - Save the non-banked registers r0-r12 and lr onto the IRQ stack.
* 3 - Get the status of the interrupted program is in SPSR.
* 4 - Push it onto the IRQ stack as well.
*
*****************************************************************************/
#define ISR_ENTRY() asm volatile(" sub lr, lr,#4\n" \
" stmfd sp!,{r0-r12,lr}\n" \
" mrs r1, spsr\n" \
" stmfd sp!,{r1}")
/******************************************************************************
*
* MACRO Name: ISR_EXIT()
*
* Description:
* This MACRO is used to exit an ISR. The current version of the gcc
* compiler for ARM does not produce correct code for interrupt
* routines to operate properly with THUMB code. The MACRO performs
* the following steps:
*
* 1 - Recover SPSR value from stack
* 2 - and restore its value
* 3 - Pop the return address & the saved general registers from
* the IRQ stack & return
*
*****************************************************************************/
#define ISR_EXIT() asm volatile(" ldmfd sp!,{r1}\n" \
" msr spsr_c,r1\n" \
" ldmfd sp!,{r0-r12,pc}^")
/******************************************************************************
*
* Function Name: disableIRQ()
*
* Description:
* This function sets the IRQ disable bit in the status register
*
* Calling Sequence:
* void
*
* Returns:
* previous value of CPSR
*
*****************************************************************************/
unsigned disableIRQ(void);
/******************************************************************************
*
* Function Name: enableIRQ()
*
* Description:
* This function clears the IRQ disable bit in the status register
*
* Calling Sequence:
* void
*
* Returns:
* previous value of CPSR
*
*****************************************************************************/
unsigned enableIRQ(void);
/******************************************************************************
*
* Function Name: restoreIRQ()
*
* Description:
* This function restores the IRQ disable bit in the status register
* to the value contained within passed oldCPSR
*
* Calling Sequence:
* void
*
* Returns:
* previous value of CPSR
*
*****************************************************************************/
unsigned restoreIRQ(unsigned oldCPSR);
/******************************************************************************
*
* Function Name: disableFIQ()
*
* Description:
* This function sets the FIQ disable bit in the status register
*
* Calling Sequence:
* void
*
* Returns:
* previous value of CPSR
*
*****************************************************************************/
unsigned disableFIQ(void);
/******************************************************************************
*
* Function Name: enableFIQ()
*
* Description:
* This function clears the FIQ disable bit in the status register
*
* Calling Sequence:
* void
*
* Returns:
* previous value of CPSR
*
*****************************************************************************/
unsigned enableFIQ(void);
/******************************************************************************
*
* Function Name: restoreFIQ()
*
* Description:
* This function restores the FIQ disable bit in the status register
* to the value contained within passed oldCPSR
*
* Calling Sequence:
* void
*
* Returns:
* previous value of CPSR
*
*****************************************************************************/
unsigned restoreFIQ(unsigned oldCPSR);
#endif

15
drivers/cpu/arm/at91sam7s/io.h
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@ -1,15 +0,0 @@
#ifndef IO_H_7UTLUP9AG6__
#define IO_H_7UTLUP9AG6__
#include <AT91SAM7S64.h>
#ifndef BV
#define BV(x) (1<<(x))
#endif
int splhigh(void);
void splx(int saved);
#endif /* IO_H_7UTLUP9AG6__ */

8
drivers/cpu/arm/at91sam7s/merge-rodata.ld
View File

@ -1,8 +0,0 @@
SECTIONS
{
.text :
{
*(.text)
*(.rodata.* .rodata)
}
}

124
drivers/cpu/arm/at91sam7s/newlib-syscalls.c
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@ -1,124 +0,0 @@
#include <debug-uart.h>
#include <sys/stat.h>
#include <errno.h>
#include <stdio.h>
int
_open(const char *name, int flags, int mode) {
errno = ENOENT;
return -1;
}
int
_close(int file)
{
if (file == 1 || file == 2) {
dbg_drain();
return 0;
}
errno = EBADF;
return -1;
}
int
isatty(int file)
{
if (file >= 0 && file <= 2) return 1;
return 0;
}
int
_read(int file, char *ptr, int len){
return 0;
}
int
_write(int file, const char *ptr, int len){
int sent = -1;
if (file == 1 || file == 2) {
sent = dbg_send_bytes((const unsigned char*)ptr, len);
}
return sent;
}
int
_lseek(int file, int ptr, int dir){
return 0;
}
int
_fstat(int file, struct stat *st) {
if (file >= 0 && file <= 2) {
st->st_mode = S_IFCHR;
return 0;
}
errno = EBADF;
return -1;
}
int
_stat(char *file, struct stat *st) {
errno = ENOENT;
return -1;
}
caddr_t
_sbrk(int incr)
{
extern char __heap_start__; /* Defined by the linker */
extern char __heap_end__; /* Defined by the linker */
static char *heap_end = &__heap_start__;
char *prev_heap_end;
prev_heap_end = heap_end;
if (heap_end + incr > &__heap_end__) {
printf("Heap full (requested %d, available %d)\n",
incr, (int)(&__heap_end__ - heap_end));
errno = ENOMEM;
return (caddr_t)-1;
}
heap_end += incr;
return (caddr_t) prev_heap_end;
}
int
fsync(int fd)
{
if (fd == 1 || fd == 2) {
dbg_drain();
return 0;
}
if (fd == 0) return 0;
errno = EBADF;
return -1;
}
void
_exit(int status)
{
while(1);
}
void
_abort()
{
while(1);
}
void
_kill()
{
while(1);
}
pid_t
_getpid(void)
{
return 1;
}
const unsigned long
bkpt_instr = 0xe1200070;

1
drivers/cpu/arm/at91sam7s/openocd/AT91SAM7x_init.script
View File

@ -1 +0,0 @@
arm7_9 force_hw_bkpts enable

18
drivers/cpu/arm/at91sam7s/openocd/arm7_wig.cfg
View File

@ -1,18 +0,0 @@
# Change the default telnet port...
telnet_port 4444
# GDB connects here
gdb_port 3333
# GDB can also flash my flash!
gdb_memory_map enable
gdb_flash_program enable
# Wiggler interface
interface parport
parport_port 0
parport_cable wiggler
jtag_speed 0
set CPUTAPID 0x3f0f0f0f
source [find target/sam7s.cfg]

30
drivers/cpu/arm/at91sam7s/openocd/arm7_wig_flash.cfg
View File

@ -1,30 +0,0 @@
#daemon configuration
telnet_port 4444
gdb_port 3333
#interface
interface parport
parport_port 0
parport_cable wiggler
jtag_speed 0
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config srst_only
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
#target configuration
daemon_startup reset
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little run_and_init 0 arm7tdmi_r4
#target_script 0 reset h2294_init.script
target_script 0 reset openocd_flash
run_and_halt_time 0 30
working_area 0 0x40000000 0x4000 nobackup
#flash configuration
#flash bank lpc2000 0x0 0x40000 0 0 lpc2000_v1 0 14765 calc_checksum
#flash bank cfi 0x80000000 0x400000 2 2 0
flash bank at91sam7 0 0 0 0 0

30
drivers/cpu/arm/at91sam7s/openocd/arm7_wig_reset.cfg
View File

@ -1,30 +0,0 @@
#daemon configuration
telnet_port 4444
gdb_port 3333
#interface
interface parport
parport_port 0
parport_cable wiggler
jtag_speed 0
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config srst_only
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
#target configuration
daemon_startup reset
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little run_and_init 0 arm7tdmi_r4
#target_script 0 reset h2294_init.script
target_script 0 reset openocd_reset
run_and_halt_time 0 30
working_area 0 0x40000000 0x4000 nobackup
#flash configuration
#flash bank lpc2000 0x0 0x40000 0 0 lpc2000_v1 0 14765 calc_checksum
#flash bank cfi 0x80000000 0x400000 2 2 0
flash bank at91sam7 0 0 0 0 0

10
drivers/cpu/arm/at91sam7s/openocd/openocd_flash
View File

@ -1,10 +0,0 @@
poll
mww 0xffffff64 0x5a000004
sleep 250
mww 0xffffff64 0x5a002004
sleep 250
flash probe 0
flash write 0 /tmp/openocd_write.bin 0x0
reset run
sleep 500
shutdown

4
drivers/cpu/arm/at91sam7s/openocd/openocd_reset
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@ -1,4 +0,0 @@
poll
reset run
sleep 500
shutdown

36
drivers/cpu/arm/at91sam7s/openocd/target/sam7s.cfg
View File

@ -1,36 +0,0 @@
# ATMEL sam7s
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME sam7s
}
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
# force an error till we get a good number
set _CPUTAPID 0xffffffff
}
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config srst_only
#jtag scan chain
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
# The target
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0
flash bank at91sam7 0 0 0 0 0

22
drivers/cpu/arm/at91sam7s/pit-interrupt.h
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@ -1,22 +0,0 @@
volatile unsigned int pit_count = 0;
static void NACKEDFUNC ATTR system_int (void) { /* System Interrupt Handler */
ISR_ENTRY();
if (*AT91C_PITC_PISR & AT91C_PITC_PITS) { /* Check PIT Interrupt */
pit_count++;
/*
if ((pit_count % 100) == 0) {
unsigned int led_state = (pit_count % 300) / 100;
*AT91C_PIOA_ODSR = ~(1<<led_state);
}
*/
*AT91C_AIC_EOICR = *AT91C_PITC_PIVR; /* Ack & End of Interrupt */
} else {
*AT91C_AIC_EOICR = 0; /* End of Interrupt */
}
ISR_EXIT();
}

34
drivers/cpu/arm/at91sam7s/rtimer-arch-interrupt.c
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@ -1,34 +0,0 @@
#include "rtimer-arch-interrupt.h"
#include "rtimer-arch.h"
#include <interrupt-utils.h>
#include <AT91SAM7S64.h>
#define DEBUG 1
#if DEBUG
#include <stdio.h>
#define PRINTF(...) printf(__VA_ARGS__)
#else
#define PRINTF(...)
#endif
/* Here we have a proper stack frame and can use local variables */
static void rtimer_int_safe() __attribute((noinline));
static void
rtimer_int_safe()
{
unsigned int status;
status = RTIMER_ARCH_TIMER_BASE->TC_SR;
if (status & AT91C_TC_CPAS) {
rtimer_run_next();
}
*AT91C_AIC_EOICR = 0;
}
void NACKEDFUNC
rtimer_interrupt (void) {
ISR_STORE();
ISR_ENABLE_NEST();
rtimer_int_safe();
ISR_DISABLE_NEST();
ISR_RESTORE();
}

6
drivers/cpu/arm/at91sam7s/rtimer-arch-interrupt.h
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@ -1,6 +0,0 @@
#ifndef RTIMER_ARCH_INTERRUPT_H_P0PXG70757__
#define RTIMER_ARCH_INTERRUPT_H_P0PXG70757__
void rtimer_interrupt (void);
#endif /* RTIMER_ARCH_INTERRUPT_H_P0PXG70757__ */

49
drivers/cpu/arm/at91sam7s/rtimer-arch.c
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@ -1,49 +0,0 @@
#include "rtimer-arch.h"
#include <AT91SAM7S64.h>
#include "rtimer-arch-interrupt.h"
#define DEBUG 1
#if DEBUG
#include <stdio.h>
#define PRINTF(...) printf(__VA_ARGS__)
#else
#define PRINTF(...)
#endif
static rtimer_clock_t offset;
void
rtimer_arch_init(void)
{
offset = 0;
RTIMER_ARCH_TIMER_BASE->TC_CMR =
(AT91C_TC_WAVE | AT91C_TC_WAVESEL_UP | AT91C_TC_CLKS_TIMER_DIV5_CLOCK);
RTIMER_ARCH_TIMER_BASE->TC_RA = 0xffff;
RTIMER_ARCH_TIMER_BASE->TC_IER = AT91C_TC_CPAS;
*AT91C_PMC_PCER = (1 << RTIMER_ARCH_TIMER_ID);
AT91C_AIC_SMR[RTIMER_ARCH_TIMER_ID] =
AT91C_AIC_SRCTYPE_INT_POSITIVE_EDGE | 6;
AT91C_AIC_SVR[RTIMER_ARCH_TIMER_ID] = (unsigned long)rtimer_interrupt;
*AT91C_AIC_IECR = (1 << RTIMER_ARCH_TIMER_ID);
RTIMER_ARCH_TIMER_BASE->TC_CCR = AT91C_TC_SWTRG | AT91C_TC_CLKEN;
PRINTF("rtimer_arch_init: Done\n");
}
void
rtimer_arch_schedule(rtimer_clock_t t)
{
RTIMER_ARCH_TIMER_BASE->TC_RA = t + offset;
PRINTF("rtimer_arch_schedule: %d\n",t);
}
void
rtimer_arch_set(rtimer_clock_t t)
{
offset = t - RTIMER_ARCH_TIMER_BASE->TC_CV;
}
rtimer_clock_t
rtimer_arch_now(void)
{
return RTIMER_ARCH_TIMER_BASE->TC_CV + offset;
}

22
drivers/cpu/arm/at91sam7s/rtimer-arch.h
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@ -1,22 +0,0 @@
/**
* \file
* Header file for the AT91SAM7S-specific rtimer code
* \author
* Simon Berg <ksb@users.sourceforge.net>
*/
#ifndef RTIMER_ARCH_H_
#define RTIMER_ARCH_H_
#include "sys/rtimer.h"
#define RTIMER_ARCH_TIMER_ID AT91C_ID_TC1
#define RTIMER_ARCH_TIMER_BASE AT91C_BASE_TC1
#define RTIMER_ARCH_SECOND (MCK/1024)
void rtimer_arch_set(rtimer_clock_t t);
rtimer_clock_t rtimer_arch_now(void);
#endif /* RTIMER_ARCH_H_ */

183
drivers/cpu/arm/at91sam7s/sdcard-arch.c
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@ -1,183 +0,0 @@
#include <efs-sdcard.h>
#include <sys/process.h>
#include <sys/etimer.h>
#include <cfs/cfs.h>
#include <debug-uart.h>
#include <efs.h>
#include <ls.h>
#include <stdio.h>
process_event_t sdcard_inserted_event;
process_event_t sdcard_removed_event;
static struct process *event_process = NULL;
#define MAX_FDS 4
static File file_descriptors[MAX_FDS];
static int
find_free_fd()
{
int fd;
for (fd = 0; fd < MAX_FDS; fd++) {
if (!file_getAttr(&file_descriptors[fd], FILE_STATUS_OPEN)) {
return fd;
}
}
return -1;
}
static File *
get_file(int fd)
{
if (!sdcard_ready()) return 0;
if (fd >= MAX_FDS || fd < 0) return NULL;
if (!file_getAttr(&file_descriptors[fd], FILE_STATUS_OPEN)) return NULL;
return &file_descriptors[fd];
}
int
cfs_open (const char *name, int flags)
{
eint8 mode;
int fd;
if (!sdcard_ready()) return -1;
fd = find_free_fd();
if (fd < 0) return -1;
if (flags == CFS_READ) {
mode = MODE_READ;
} else {
mode = MODE_APPEND;
}
if (file_fopen(&file_descriptors[fd], &sdcard_efs.myFs,
(char*)name, mode) < 0) {
return -1;
}
return fd;
}
void
cfs_close(int fd)
{
File *file = get_file(fd);
if (!file) return;
file_fclose(file);
fs_flushFs(efs_sdcard_get_fs());
}
int
cfs_read (int fd, void *buf, unsigned int len)
{
File *file = get_file(fd);
if (!file) return 0;
return file_read(file, len, (euint8*)buf);
}
int
cfs_write (int fd, const void *buf, unsigned int len)
{
File *file = get_file(fd);
if (!file) return 0;
return file_write(file, len, (euint8*)buf);
}
cfs_offset_t
cfs_seek (int fd, cfs_offset_t offset, int whence)
{
File *file;
if (whence != CFS_SEEK_SET) return -1;
file = get_file(fd);
if (!file) return 0;
if (file_setpos(file, offset) != 0) return -1;
return file->FilePtr;
}
/* Cause a compile time error if expr is false */
#ifdef __GNUC__
#define COMPILE_TIME_CHECK(expr) \
(void) (__builtin_choose_expr ((expr), 0, ((void)0))+3)
#else
#define COMPILE_TIME_CHECK(expr)
#endif
#define MAX_DIR_LISTS 4
DirList dir_lists[MAX_DIR_LISTS];
static DirList *
find_free_dir_list()
{
unsigned int l;
for(l = 0; l < MAX_DIR_LISTS; l++) {
if (dir_lists[l].fs == NULL) {
return &dir_lists[l];
}
}
return NULL;
}
int
cfs_opendir (struct cfs_dir *dirp, const char *name)
{
DirList *dirs;
COMPILE_TIME_CHECK(sizeof(DirList*) <= sizeof(struct cfs_dir));
if (!sdcard_ready()) return -1;
dirs = find_free_dir_list();
if (!dirs) return -1;
if (ls_openDir(dirs, efs_sdcard_get_fs(), (eint8*)name) != 0) {
dirs->fs = NULL;
return -1;
}
*(DirList**)dirp = dirs;
return 0;
}
int
cfs_readdir (struct cfs_dir *dirp, struct cfs_dirent *dirent)
{
euint8 *start;
euint8 *end;
char *to = dirent->name;
DirList *dirs = *(DirList**)dirp;
if (!sdcard_ready()) return 1;
if (ls_getNext(dirs) != 0) return 1;
start = dirs->currentEntry.FileName;
end = start + 7;
while(end > start) {
if (*end > ' ') {
end++;
break;
}
end--;
}
while(start < end) {
*to++ = *start++;
}
start = dirs->currentEntry.FileName + 8;
end = start + 3;
if (*start > ' ') {
*to++ = '.';
*to++ = *start++;
while(start < end && *start > ' ') {
*to++ = *start++;
}
}
*to = '\0';
if (dirs->currentEntry.Attribute & ATTR_DIRECTORY) {
dirent->size = 0;
} else {
dirent->size = dirs->currentEntry.FileSize;
}
return 0;
}
void
cfs_closedir (struct cfs_dir *dirp)
{
(*(DirList**)dirp)->fs = NULL;
}

233
drivers/cpu/arm/at91sam7s/startup-SAM7S-arm.c
View File

@ -1,233 +0,0 @@
#include <AT91SAM7S64.h>
#include <stdint.h>
#define USED __attribute__((used))
#define USED_NAKED __attribute__((used,naked))
#define USED_INT(type) __attribute__((used,interrupt(#type)))
#if MCK > 30000000
#define FLASH_CYCLES AT91C_MC_FWS_1FWS
#else
#define FLASH_CYCLES AT91C_MC_FWS_0FWS
#endif
#ifndef MAIN_OSC_FREQ
#define MAIN_OSC_FREQ 18432000
#endif
#if MAIN_OSC_FREQ != 18432000
#error Unsupported main oscilator frequency
#endif
#if MCK == 23961600
#define PLL_DIV 5
#define PLL_MUL 26
#define PLL_USBDIV_EXP 1
#define MCK_DIV_EXP 2
#elif MCK == 47923200
#define PLL_DIV 5
#define PLL_MUL 26
#define PLL_USBDIV_EXP 1
#define MCK_DIV_EXP 1
#else
#error "Unsupported main clock frequency"
#endif
#define PLL_FREQ ((MAIN_OSC_FREQ * PLL_MUL) / PLL_DIV)
#if PLL_FREQ > 180000000
#error "PLL frequency too high"
#elif PLL_FREQ < 80000000
#error "PLL frequency too low"
#endif
#if PLL_FREQ > 155000000
#define PLL_RANGE AT91C_CKGR_OUT_2
#else
#define PLL_RANGE AT91C_CKGR_OUT_0
#endif
#if PLL_USBDIV > 2
#error "PLL frequency too high for USB"
#endif
#define USB_FREQ (PLL_FREQ / (1<<PLL_USBDIV_EXP))
#if USB_FREQ > 48120000 || USB_FREQ < 47880000
#warning "USB frequency outside limits"
#endif
#if MCK * (1<<MCK_DIV_EXP) != PLL_FREQ
#error PLL frequency is not a the correct multiple of the main clock
#endif
/* CPU modes */
#define Mode_USR 0x10
#define Mode_FIQ 0x11
#define Mode_IRQ 0x12
#define Mode_SVC 0x13
#define Mode_ABT 0x17
#define Mode_UND 0x1B
#define Mode_SYS 0x1F
/* IRQ disable bit */
#define I_Bit 0x80
/* FIQ disable bit */
#define F_Bit 0x40
#define SET_MODE_STACK(mode, stack_end) \
asm("msr CPSR_c, %0\nldr sp, =" #stack_end "\n" ::"i" ((mode)|I_Bit|F_Bit))
#define ENABLE_INTS() \
asm("mrs r0, cpsr\nand r0, %0\nmsr cpsr_c, r0\n"::"i" (~(I_Bit|F_Bit)):"r0")
extern void *USR_Stack_End;
extern void *UND_Stack_End;
extern void *ABT_Stack_End;
extern void *FIQ_Stack_End;
extern void *IRQ_Stack_End;
extern void *SVC_Stack_End;
extern uint8_t _data[];
extern uint8_t _etext[];
extern uint8_t _edata[];
extern uint8_t __bss_start[];
extern uint8_t __bss_end[];
extern int
main(int argc, char *argv[]);
static void
copy_initialized(void)
{
uint8_t *ram = _data;
uint8_t *rom = _etext;
while(ram < _edata) {
*ram++ = *rom++;
}
}
static void
clear_bss(void)
{
uint8_t *m = __bss_start;
while(m < __bss_end) {
*m++ = 0;
}
}
static void
Reset_handler(void) USED_NAKED;
static void
SPU_handler(void) __attribute__((interrupt("IRQ")));
static void
Reset_handler(void)
{
/* Setup flash timing */
*AT91C_MC_FMR = FLASH_CYCLES | (MCK / 666666 + 1);
/* Disable watchdog */
*AT91C_WDTC_WDMR = AT91C_WDTC_WDDIS;
/* Setup reset controller */
*AT91C_RSTC_RMR = (0xa5<<24) | AT91C_RSTC_URSTS;
/* Start main oscilator */
*AT91C_CKGR_MOR = AT91C_CKGR_MOSCEN | (6<<8);
/* Wait for oscillator to start */
while(!(*AT91C_PMC_SR & AT91C_PMC_MOSCS));
/* Setup PLL */
*AT91C_CKGR_PLLR = ((PLL_USBDIV_EXP << 28) | ((PLL_MUL-1)<<16) | PLL_RANGE
| (28<<8) | PLL_DIV);
/* Wait for PLL to lock */
while(!(*AT91C_PMC_SR & AT91C_PMC_LOCK));
*AT91C_PMC_MCKR = (MCK_DIV_EXP << 2);
while(!(*AT91C_PMC_SR & AT91C_PMC_MCKRDY));
*AT91C_PMC_MCKR |= AT91C_PMC_CSS_PLL_CLK;
while(!(*AT91C_PMC_SR & AT91C_PMC_MCKRDY));
SET_MODE_STACK(Mode_UND, UND_Stack_End);
SET_MODE_STACK(Mode_ABT, ABT_Stack_End);
SET_MODE_STACK(Mode_FIQ, FIQ_Stack_End);
SET_MODE_STACK(Mode_IRQ, IRQ_Stack_End);
SET_MODE_STACK(Mode_SVC, SVC_Stack_End);
#ifdef RUN_AS_SYSTEM
SET_MODE_STACK(Mode_SYS, USR_Stack_End);
#else
SET_MODE_STACK(Mode_USR, USR_Stack_End);
#endif
copy_initialized();
clear_bss();
*AT91C_AIC_SPU = (uint32_t)SPU_handler;
ENABLE_INTS();
main(0,0);
while(1);
}
static void
Undef_handler(void) USED_INT(UNDEF);
static void
Undef_handler(void)
{
}
static void
SWI_handler(void) USED_INT(SWI);
static void
SWI_handler(void)
{
}
static void
PAbt_handler(void) USED_INT(ABORT);
static void
PAbt_handler(void)
{
}
static void
DAbt_handler(void) USED_INT(ABORT);
static void
DAbt_handler(void)
{
}
static void
SPU_handler(void)
{
*AT91C_AIC_EOICR = 0;
}
static void
Vectors(void) __attribute__ ((naked, section(".vectrom")));
static void
Vectors(void)
{
asm("ldr pc, =Reset_handler\n");
asm("ldr pc, =Undef_handler\n");
asm("ldr pc, =SWI_handler\n");
asm("ldr pc, =PAbt_handler\n");
asm("ldr pc, =DAbt_handler\n");
asm("nop\n");
asm("ldr pc,[pc,#-0xf20]\n"); /* Vector From AIC_IVR */
asm("ldr pc,[pc,#-0xf20]\n"); /* Vector From AIC_FVR */
}
void foo_dummy()
{
Vectors();
}

21
drivers/cpu/arm/at91sam7s/startup-SAM7S.c
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@ -1,21 +0,0 @@
void
Reset(void)
{
volatile int dummy =0;
}
static void
Vectors(void) __attribute__ ((naked, section(".vectrom")));
static void
Vectors(void)
{
asm("ldr pc, %0\n"::"r" (Reset));
}
void foo_dummy()
{
Vectors();
}

100
drivers/cpu/arm/at91sam7s/sys-interrupt.c
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@ -1,100 +0,0 @@
#include <sys-interrupt.h>
#include <interrupt-utils.h>
#include <AT91SAM7S64.h>
#define ATTR
#ifndef NULL
#define NULL 0
#endif
static SystemInterruptHandler *handlers = NULL;
static void
system_int_safe (void) __attribute__((noinline));
static void
system_int_safe (void)
{
SystemInterruptHandler *h;
h = handlers;
while (h) {
if (h->handler()) break;
h = h->next;
}
}
static void NACKEDFUNC ATTR
system_int (void) /* System Interrupt Handler */
{
ISR_ENTRY();
system_int_safe();
*AT91C_AIC_EOICR = 0; /* End of Interrupt */
ISR_EXIT();
}
static unsigned int enabled = 0; /* Number of times the system
interrupt has been enabled */
#define DIS_INT *AT91C_AIC_IDCR = (1 << AT91C_ID_SYS)
#define EN_INT if (enabled > 0) *AT91C_AIC_IECR = (1 << AT91C_ID_SYS)
void
sys_interrupt_enable()
{
if (enabled++ == 0) {
/* Level trigged at priority 5 */
AT91C_AIC_SMR[AT91C_ID_SYS] = AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL | 5;
/* Interrupt vector */
AT91C_AIC_SVR[AT91C_ID_SYS] = (unsigned long) system_int;
/* Enable */
EN_INT;
}
}
void
sys_interrupt_disable()
{
if (--enabled == 0) {
DIS_INT;
}
}
void
sys_interrupt_append_handler(SystemInterruptHandler *handler)
{
SystemInterruptHandler **h = &handlers;
while(*h) {
h = &(*h)->next;
}
DIS_INT;
*h = handler;
handler->next = NULL;
EN_INT;
}
void
sys_interrupt_prepend_handler(SystemInterruptHandler *handler)
{
DIS_INT;
handler->next = handlers;
handlers = handler;
EN_INT;
}
void
sys_interrupt_remove_handler(SystemInterruptHandler *handler)
{
SystemInterruptHandler **h = &handlers;
while(*h) {
if (*h == handler) {
DIS_INT;
*h = handler->next;
EN_INT;
break;
}
h = &(*h)->next;
}
}

31
drivers/cpu/arm/at91sam7s/sys-interrupt.h
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@ -1,31 +0,0 @@
#ifndef SYS_INTERRUPT_H_QIHZ66NP8K__
#define SYS_INTERRUPT_H_QIHZ66NP8K__
/* Returns true if it handled an activbe interrupt */
typedef int (*SystemInterruptFunc)();
typedef struct _SystemInterruptHandler SystemInterruptHandler;
struct _SystemInterruptHandler
{
SystemInterruptHandler *next;
SystemInterruptFunc handler;
};
void
sys_interrupt_enable();
void
sys_interrupt_disable();
void
sys_interrupt_append_handler(SystemInterruptHandler *handler);
void
sys_interrupt_prepend_handler(SystemInterruptHandler *handler);
void
sys_interrupt_remove_handler(SystemInterruptHandler *handler);
#endif /* SYS_INTERRUPT_H_QIHZ66NP8K__ */

6
drivers/cpu/arm/at91sam7s/uip-log.c
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@ -1,6 +0,0 @@
#include <stdio.h>
void uip_log(char *msg)
{
printf("uip: %s\n", msg);
}

878
drivers/cpu/arm/at91sam7s/usb-arch.c
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@ -1,878 +0,0 @@
#include <usb-arch.h>
#include <usb-interrupt.h>
#include <AT91SAM7S64.h>
#include <stdio.h>
#include <debug-uart.h>
/* #define DEBUG */
#ifdef DEBUG
#define PRINTF(...) printf(__VA_ARGS__)
#else
#define PRINTF(...)
#endif
#define USB_PULLUP_PIN AT91C_PIO_PA16
#ifndef AT91C_UDP_STALLSENT
#define AT91C_UDP_STALLSENT AT91C_UDP_ISOERROR
#endif
/* Bits that won't effect the state if they're written at a specific level.
*/
/* Bits that should be written as 1 */
#define NO_EFFECT_BITS (AT91C_UDP_TXCOMP | AT91C_UDP_RX_DATA_BK0 | AT91C_UDP_RXSETUP \
| AT91C_UDP_ISOERROR | AT91C_UDP_RX_DATA_BK1)
/* Also includes bits that should be written as 0 */
#define NO_EFFECT_MASK (NO_EFFECT_BITS | AT91C_UDP_TXPKTRDY)
#define RXBYTECNT(s) (((s)>>16)&0x7ff)
static inline void
udp_set_ep_ctrl_flags(AT91_REG *reg, unsigned int flags,
unsigned int write_mask, unsigned int check_mask)
{
while ( (*reg & check_mask) != (flags & check_mask)) {
*reg = (*reg & ~write_mask) | flags;
}
}
#define UDP_SET_EP_CTRL_FLAGS(reg, flags, mask) \
udp_set_ep_ctrl_flags((reg), \
(NO_EFFECT_BITS & ~(mask)) | ((flags) & (mask)), (mask) | NO_EFFECT_MASK,\
(mask))
#define USB_DISABLE_INT *AT91C_AIC_IDCR = (1 << AT91C_ID_UDP)
#define USB_ENABLE_INT *AT91C_AIC_IECR = (1 << AT91C_ID_UDP)
#define USB_DISABLE_EP_INT(hw_ep) *AT91C_UDP_IDR = (1 << (hw_ep))
#define USB_ENABLE_EP_INT(hw_ep) *AT91C_UDP_IER = (1 << (hw_ep))
#if CTRL_EP_SIZE > 8
#error Control endpoint size too big
#endif
#if USB_EP1_SIZE > 64
#error Endpoint 1 size too big
#endif
#if USB_EP2_SIZE > 64
#error Endpoint 2 size too big
#endif
#if USB_EP3_SIZE > 64
#error Endpoint 3 size too big
#endif
static const uint16_t ep_xfer_size[8] =
{
CTRL_EP_SIZE,
USB_EP1_SIZE,
USB_EP2_SIZE,
USB_EP3_SIZE
};
#define USB_EP_XFER_SIZE(ep) ep_xfer_size[ep]
typedef struct _USBEndpoint USBEndpoint;
struct _USBEndpoint
{
uint16_t status;
uint8_t addr;
uint8_t flags;
USBBuffer *buffer; /* NULL if no current buffer */
struct process *event_process;
unsigned int events;
uint16_t xfer_size;
};
#define USB_EP_FLAGS_TYPE_MASK 0x03
#define USB_EP_FLAGS_TYPE_BULK 0x00
#define USB_EP_FLAGS_TYPE_CONTROL 0x01
#define USB_EP_FLAGS_TYPE_ISO 0x02
#define USB_EP_FLAGS_TYPE_INTERRUPT 0x03
#define EP_TYPE(ep) ((ep)->flags & USB_EP_FLAGS_TYPE_MASK)
#define IS_EP_TYPE(ep, type) (EP_TYPE(ep) == (type))
#define IS_CONTROL_EP(ep) IS_EP_TYPE(ep, USB_EP_FLAGS_TYPE_CONTROL)
#define IS_BULK_EP(ep) IS_EP_TYPE(ep, USB_EP_FLAGS_TYPE_BULK)
#define USB_EP_FLAGS_ENABLED 0x04
/* A packet has been received but the data is still in hardware buffer */
#define USB_EP_FLAGS_RECV_PENDING 0x08
/* The pending packet is a SETUP packet */
#define USB_EP_FLAGS_SETUP_PENDING 0x10
/* The data in the hardware buffer is being transmitted */
#define USB_EP_FLAGS_TRANSMITTING 0x20
/* The receiver is waiting for a packet */
#define USB_EP_FLAGS_RECEIVING 0x40
/* For bulk endpoints. Both buffers are busy are in use, either by
hardware or software. */
#define USB_EP_FLAGS_DOUBLE 0x80
/* The next packet received should be read from bank 1 if possible */
#define USB_EP_FLAGS_BANK_1_RECV_NEXT 0x10
/* States for double buffered reception:
Packets being received 0 1 2 1 0 0
Packets pending 0 0 0 1 2 1
RECVING 0 1 1 1 0 0
RECV_PENDING 0 0 0 1 1 1
DOUBLE 0 0 1 0 1 0
*/
/* States for double buffered transmission:
Packets being transmitted 0 1 2
TRANSMITTING 0 1 1
DOUBLE 0 0 1
*/
/* Index in endpoint array */
#define EP_INDEX(addr) ((addr) & 0x7f)
/* Get address of endpoint struct */
#define EP_STRUCT(addr) &usb_endpoints[EP_INDEX(addr)];
/* Number of hardware endpoint */
#define EP_HW_NUM(addr) ((addr) & 0x7f)
static USBEndpoint usb_endpoints[USB_MAX_ENDPOINTS];
struct process *event_process = 0;
volatile unsigned int events = 0;
static void
notify_process(unsigned int e)
{
events |= e;
if (event_process) {
process_poll(event_process);
}
}
static void
notify_ep_process(USBEndpoint *ep, unsigned int e)
{
ep->events |= e;
if (ep->event_process) {
process_poll(ep->event_process);
}
}
static void
usb_arch_reset(void)
{
unsigned int e;
for (e = 0; e < USB_MAX_ENDPOINTS; e++) {
if (usb_endpoints[e].flags &USB_EP_FLAGS_ENABLED) {
USBBuffer *buffer = usb_endpoints[e].buffer;
usb_endpoints[e].flags = 0;
usb_disable_endpoint(e);
while(buffer) {
buffer->flags &= ~USB_BUFFER_SUBMITTED;
buffer = buffer->next;
}
}
}
usb_arch_setup_control_endpoint(0);
}
void
usb_arch_setup(void)
{
unsigned int i;
/* Assume 96MHz PLL frequency */
*AT91C_CKGR_PLLR = ((*AT91C_CKGR_PLLR & ~AT91C_CKGR_USBDIV)
| AT91C_CKGR_USBDIV_1);
/* Enable 48MHz USB clock */
*AT91C_PMC_SCER = AT91C_PMC_UDP;
/* Enable USB main clock */
*AT91C_PMC_PCER = (1 << AT91C_ID_UDP);
/* Enable pullup */
*AT91C_PIOA_PER = USB_PULLUP_PIN;
*AT91C_PIOA_OER = USB_PULLUP_PIN;
*AT91C_PIOA_CODR = USB_PULLUP_PIN;
for(i = 0; i < USB_MAX_ENDPOINTS; i++) {
usb_endpoints[i].flags = 0;
usb_endpoints[i].event_process = 0;
}
usb_arch_reset();
/* Enable usb_interrupt */
AT91C_AIC_SMR[AT91C_ID_UDP] = AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL | 4;
AT91C_AIC_SVR[AT91C_ID_UDP] = (unsigned long) usb_int;
*AT91C_AIC_IECR = (1 << AT91C_ID_UDP);
}
static void
usb_arch_setup_endpoint(unsigned char addr, unsigned int hw_type)
{
unsigned int ei = EP_HW_NUM(addr);
USBEndpoint *ep = EP_STRUCT(addr);
ep->status = 0;
ep->flags = USB_EP_FLAGS_ENABLED;
ep->buffer = 0;
ep->addr = addr;
ep->events = 0;
ep->xfer_size = 0;
*AT91C_UDP_IDR = 1<<ei;
UDP_SET_EP_CTRL_FLAGS(&AT91C_UDP_CSR[ei], hw_type | AT91C_UDP_EPEDS,
AT91C_UDP_EPTYPE | AT91C_UDP_EPEDS);
*AT91C_UDP_IER = 1<<ei;
};
void
usb_arch_setup_control_endpoint(unsigned char addr)
{
unsigned int ei = EP_HW_NUM(addr);
USBEndpoint *ep = EP_STRUCT(addr);
usb_arch_setup_endpoint(addr, AT91C_UDP_EPTYPE_CTRL);
ep->flags |= USB_EP_FLAGS_TYPE_CONTROL;
ep->xfer_size = ep_xfer_size[ei];
}
void
usb_arch_setup_bulk_endpoint(unsigned char addr)
{
unsigned int ei = EP_HW_NUM(addr);
USBEndpoint *ep = EP_STRUCT(addr);
usb_arch_setup_endpoint(addr, ((addr & 0x80)
? AT91C_UDP_EPTYPE_BULK_IN
: AT91C_UDP_EPTYPE_BULK_OUT));
ep->flags |= USB_EP_FLAGS_TYPE_BULK;
ep->xfer_size = ep_xfer_size[ei];
}
void
usb_arch_setup_interrupt_endpoint(unsigned char addr)
{
unsigned int ei = EP_HW_NUM(addr);
USBEndpoint *ep = EP_STRUCT(addr);
usb_arch_setup_endpoint(addr, ((addr & 0x80)
? AT91C_UDP_EPTYPE_INT_IN
: AT91C_UDP_EPTYPE_INT_OUT));
ep->flags |= USB_EP_FLAGS_TYPE_BULK;
ep->xfer_size = ep_xfer_size[ei];
}
void
usb_arch_disable_endpoint(uint8_t addr)
{
USBEndpoint *ep = EP_STRUCT(addr);
ep->flags &= ~USB_EP_FLAGS_ENABLED;
*AT91C_UDP_IDR = 1<<EP_HW_NUM(addr);
UDP_SET_EP_CTRL_FLAGS(&AT91C_UDP_CSR[EP_HW_NUM(addr)], 0, AT91C_UDP_EPEDS);
}
#define USB_READ_BLOCK 0x01 /* The currently submitted buffers
can't hold the received data, wait
for more buffers. No data was read
from the hardware buffer */
#define USB_READ_NOTIFY 0x02 /* Some buffers that had the
USB_BUFFER_NOTIFY flags set were
released */
#define USB_READ_FAIL 0x04 /* The received data doesn't match the
submitted buffers. The hardware
buffer is discarded. */
/* Skip buffers until mask and flags matches*/
static USBBuffer *
skip_buffers_until(USBBuffer *buffer, unsigned int mask, unsigned int flags,
unsigned int *resp)
{
while(buffer && !((buffer->flags & mask) == flags)) {
USBBuffer *next = buffer->next;
buffer->flags &= ~USB_BUFFER_SUBMITTED ;
buffer->flags |= USB_BUFFER_FAILED;
if (buffer->flags & USB_BUFFER_NOTIFY) *resp |= USB_READ_NOTIFY;
buffer = next;
}
return buffer;
}
static void
read_hw_buffer(uint8_t *data, unsigned int hw_ep, unsigned int len)
{
AT91_REG *fdr;
fdr = &AT91C_UDP_FDR[hw_ep];
while(len-- > 0) {
*data++ = *fdr;
}
}
#define USB_WRITE_BLOCK 0x01
#define USB_WRITE_NOTIFY 0x02
void
write_hw_buffer(const uint8_t *data, unsigned int hw_ep, unsigned int len)
{
AT91_REG *fdr;
fdr = &AT91C_UDP_FDR[hw_ep];
/* PRINTF("Write %d\n", len); */
while(len-- > 0) {
*fdr = *data++;
}
}
static unsigned int
get_receive_capacity(USBBuffer *buffer)
{
unsigned int capacity = 0;
while(buffer && !(buffer->flags & (USB_BUFFER_IN| USB_BUFFER_SETUP|USB_BUFFER_HALT))) {
capacity += buffer->left;
buffer = buffer->next;
}
return capacity;
}
static int
handle_pending_receive(USBEndpoint *ep)
{
int short_packet;
unsigned int len;
unsigned int copy;
unsigned int res = 0;
unsigned int hw_ep = EP_HW_NUM(ep->addr);
USBBuffer *buffer = ep->buffer;
uint8_t *setup_data = NULL;
unsigned int flags = ep->flags;
if (!(flags & USB_EP_FLAGS_ENABLED) || !buffer) return USB_READ_BLOCK;
len = RXBYTECNT(AT91C_UDP_CSR[hw_ep]);
PRINTF("handle_pending_receive: %d\n", len);
switch(flags & USB_EP_FLAGS_TYPE_MASK) {
case USB_EP_FLAGS_TYPE_CONTROL:
if (flags & USB_EP_FLAGS_SETUP_PENDING) {
/* Discard buffers until we find a SETUP buffer */
buffer =
skip_buffers_until(buffer, USB_BUFFER_SETUP, USB_BUFFER_SETUP, &res);
ep->buffer = buffer;
if (!buffer || buffer->left < len) {
res |= USB_READ_BLOCK;
return res;
}
/* SETUP packet must fit in a single buffer */
if (buffer->left < len) {
buffer->flags |= USB_BUFFER_FAILED;
buffer->flags &= ~USB_BUFFER_SUBMITTED ;
if (buffer->flags & USB_BUFFER_NOTIFY) res |= USB_READ_NOTIFY;
ep->buffer = buffer->next;
res |= USB_READ_FAIL;
return res;
}
setup_data = buffer->data;
} else {
if (buffer->flags & (USB_BUFFER_SETUP|USB_BUFFER_IN)) {
buffer->flags |= USB_BUFFER_FAILED;
buffer->flags &= ~USB_BUFFER_SUBMITTED ;
if (buffer->flags & USB_BUFFER_NOTIFY) res |= USB_READ_NOTIFY;
ep->buffer = buffer->next;
res |= USB_READ_FAIL;
return res;
}
if (len == 0) {
/* Status OUT */
if (buffer->left > 0) {
buffer->flags |= USB_BUFFER_FAILED;
res |= USB_READ_FAIL;
}
buffer->flags &= ~USB_BUFFER_SUBMITTED ;
if (buffer->flags & USB_BUFFER_NOTIFY) res |= USB_READ_NOTIFY;
ep->buffer = buffer->next;
return res;
}
if (get_receive_capacity(buffer) < len) return USB_READ_BLOCK;
}
break;
case USB_EP_FLAGS_TYPE_INTERRUPT:
case USB_EP_FLAGS_TYPE_BULK:
case USB_EP_FLAGS_TYPE_ISO:
if (get_receive_capacity(buffer) < len) {
return USB_READ_BLOCK;
}
break;
}
short_packet = len < ep->xfer_size;
do {
if (buffer->left < len) {
copy = buffer->left;
} else {
copy = len;
}
len -= copy;
buffer->left -= copy;
read_hw_buffer(buffer->data, hw_ep, copy);
buffer->data += copy;
if (len == 0) break;
/* Release buffer */
buffer->flags &= ~(USB_BUFFER_SUBMITTED | USB_BUFFER_SHORT_PACKET);
if (buffer->flags & USB_BUFFER_NOTIFY) res |= USB_READ_NOTIFY;
/* Use next buffer. */
buffer = buffer->next;
} while(1);
if (short_packet) {
buffer->flags |= USB_BUFFER_SHORT_PACKET;
}
if ((buffer->left == 0)
|| (buffer->flags & USB_BUFFER_PACKET_END)
|| (short_packet && (buffer->flags & USB_BUFFER_SHORT_END))) {
/* Release buffer */
buffer->flags &= ~USB_BUFFER_SUBMITTED;
if (buffer->flags & USB_BUFFER_NOTIFY) res |= USB_READ_NOTIFY;
/* Use next buffer. */
buffer = buffer->next;
}
ep->buffer = buffer;
if (setup_data) {
/* Set direction according to request */
UDP_SET_EP_CTRL_FLAGS(&AT91C_UDP_CSR[0],
((setup_data[0] & 0x80)
? AT91C_UDP_DIR : 0), AT91C_UDP_DIR);
}
return res;
}
static void
start_receive(USBEndpoint *ep)
{
ep->flags |= USB_EP_FLAGS_RECEIVING;
}
#if 0
static unsigned int
get_transmit_length(USBBuffer *buffer)
{
unsigned int length = 0;
while(buffer && (buffer->flags & USB_BUFFER_IN)) {
length += buffer->left;
buffer = buffer->next;
}
return length;
}
#endif
static int
start_transmit(USBEndpoint *ep)
{
unsigned int res = 0;
USBBuffer *buffer = ep->buffer;
unsigned int len;
unsigned int hw_ep = EP_HW_NUM(ep->addr);
unsigned int ep_flags = ep->flags;
len = ep->xfer_size;
if (!(ep_flags & USB_EP_FLAGS_ENABLED) || !buffer) return USB_WRITE_BLOCK;
switch(ep_flags & USB_EP_FLAGS_TYPE_MASK) {
case USB_EP_FLAGS_TYPE_BULK:
if (buffer->flags & USB_BUFFER_HALT) {
if (ep->status & 0x01) return USB_WRITE_BLOCK;
ep->status |= 0x01;
if (!(ep->flags & USB_EP_FLAGS_TRANSMITTING)) {
UDP_SET_EP_CTRL_FLAGS(&AT91C_UDP_CSR[hw_ep],
AT91C_UDP_FORCESTALL, AT91C_UDP_FORCESTALL);
PRINTF("HALT IN\n");
}
return USB_WRITE_BLOCK;
}
case USB_EP_FLAGS_TYPE_ISO:
if (!(ep->flags & USB_EP_FLAGS_TRANSMITTING)) {
if (AT91C_UDP_CSR[hw_ep] & AT91C_UDP_TXPKTRDY) return USB_WRITE_BLOCK;
}
break;
default:
if (AT91C_UDP_CSR[hw_ep] & AT91C_UDP_TXPKTRDY) return USB_WRITE_BLOCK;
}
while (buffer) {
unsigned int copy;
if (buffer->left < len) {
copy = buffer->left;
} else {
copy = len;
}
len -= copy;
buffer->left -= copy;
write_hw_buffer(buffer->data, hw_ep, copy);
buffer->data += copy;
if (buffer->left == 0) {
if (buffer->flags & USB_BUFFER_SHORT_END) {
if (len == 0) {
/* Send zero length packet. */
break;
} else {
len = 0;
}
}
/* Release buffer */
buffer->flags &= ~USB_BUFFER_SUBMITTED;
if (buffer->flags & USB_BUFFER_NOTIFY) res = USB_WRITE_NOTIFY;
/* Use next buffer. */
buffer = buffer->next;
}
if (len == 0) break;
}
ep->buffer = buffer;
if (ep->flags & USB_EP_FLAGS_TRANSMITTING) {
ep->flags |= USB_EP_FLAGS_DOUBLE;
} else {
ep->flags |= USB_EP_FLAGS_TRANSMITTING;
}
PRINTF("start_transmit: sent %08x\n",AT91C_UDP_CSR[hw_ep]);
/* Start transmission */
UDP_SET_EP_CTRL_FLAGS(&AT91C_UDP_CSR[hw_ep],
AT91C_UDP_TXPKTRDY, AT91C_UDP_TXPKTRDY);
return res;
}
static void
start_transfer(USBEndpoint *ep)
{
unsigned int hw_ep = EP_HW_NUM(ep->addr);
int res;
while (1) {
if (!(ep->addr & 0x80)) {
if (ep->buffer && (ep->buffer->flags & USB_BUFFER_HALT)) {
if (ep->status & 0x01) return ;
ep->status |= 0x01;
UDP_SET_EP_CTRL_FLAGS(&AT91C_UDP_CSR[EP_HW_NUM(ep->addr)],
AT91C_UDP_FORCESTALL, AT91C_UDP_FORCESTALL);
PRINTF("HALT OUT\n");
*AT91C_UDP_IDR = 1<<hw_ep;
return;
}
}
if (!(ep->flags & USB_EP_FLAGS_RECV_PENDING)) break;
res = handle_pending_receive(ep);
if (res & USB_READ_NOTIFY) {
notify_ep_process(ep, USB_EP_EVENT_NOTIFICATION);
}
PRINTF("received res = %d\n", res);
if (res & USB_READ_BLOCK) {
*AT91C_UDP_IDR = 1<<hw_ep;
return;
}
if (AT91C_UDP_CSR[hw_ep] & AT91C_UDP_RXSETUP) {
/* Acknowledge SETUP */
UDP_SET_EP_CTRL_FLAGS(&AT91C_UDP_CSR[hw_ep],0, AT91C_UDP_RXSETUP);
} else if (AT91C_UDP_CSR[hw_ep] & (AT91C_UDP_RX_DATA_BK1)) {
/* Ping-pong */
UDP_SET_EP_CTRL_FLAGS(&AT91C_UDP_CSR[hw_ep],0,
(ep->flags & USB_EP_FLAGS_BANK_1_RECV_NEXT)
? AT91C_UDP_RX_DATA_BK1
: AT91C_UDP_RX_DATA_BK0);
ep->flags ^= USB_EP_FLAGS_BANK_1_RECV_NEXT;
} else {
/* Ping-pong or single buffer */
UDP_SET_EP_CTRL_FLAGS(&AT91C_UDP_CSR[hw_ep],0,
AT91C_UDP_RX_DATA_BK0);
ep->flags |= USB_EP_FLAGS_BANK_1_RECV_NEXT;
}
if (ep->flags & USB_EP_FLAGS_DOUBLE) {
ep->flags &= ~USB_EP_FLAGS_DOUBLE;
} else if IS_CONTROL_EP(ep) {
ep->flags &= ~(USB_EP_FLAGS_RECV_PENDING|USB_EP_FLAGS_SETUP_PENDING);
} else {
ep->flags &= ~USB_EP_FLAGS_RECV_PENDING;
}
if (res & USB_READ_FAIL) {
/* Only fails for control endpoints */
usb_arch_control_stall(ep->addr);
return;
}
*AT91C_UDP_IER = 1<<hw_ep;
}
if (ep->flags & (USB_EP_FLAGS_TRANSMITTING | USB_EP_FLAGS_RECEIVING)) {
#if 0
if (!IS_BULK_EP(ep) || (ep->flags & USB_EP_FLAGS_DOUBLE)) {
#else
if(1) {
#endif
PRINTF("Busy\n");
return;
}
}
if (ep->status & 0x01) return; /* Don't start transfer if halted */
if (ep->buffer) {
if (ep->buffer->flags & USB_BUFFER_IN) {
res = start_transmit(ep);
if (res & USB_WRITE_NOTIFY) {
notify_ep_process(ep, USB_EP_EVENT_NOTIFICATION);
}
} else {
start_receive(ep);
}
}
}
void
usb_arch_transfer_complete(unsigned int hw_ep)
{
unsigned int status = AT91C_UDP_CSR[hw_ep];
USBEndpoint *ep = &usb_endpoints[hw_ep];
PRINTF("transfer_complete: %d\n", hw_ep);
if (status & AT91C_UDP_STALLSENT) {
/* Acknowledge */
UDP_SET_EP_CTRL_FLAGS(&AT91C_UDP_CSR[hw_ep],0, AT91C_UDP_STALLSENT);
}
if (status & (AT91C_UDP_RXSETUP
| AT91C_UDP_RX_DATA_BK1 | AT91C_UDP_RX_DATA_BK0)) {
if (status & AT91C_UDP_RXSETUP) {
PRINTF("SETUP\n");
ep->flags |= USB_EP_FLAGS_SETUP_PENDING;
}
if (ep->flags & USB_EP_FLAGS_DOUBLE) {
ep->flags &= ~USB_EP_FLAGS_DOUBLE;
} else {
ep->flags &= ~USB_EP_FLAGS_RECEIVING;
}
if ( ep->flags & USB_EP_FLAGS_RECV_PENDING) {
ep->flags |= USB_EP_FLAGS_DOUBLE;
} else {
ep->flags |= USB_EP_FLAGS_RECV_PENDING;
}
start_transfer(ep);
}
if (status & AT91C_UDP_TXCOMP) {
PRINTF("Sent packet\n");
if (ep->flags & USB_EP_FLAGS_DOUBLE) {
ep->flags &= ~USB_EP_FLAGS_DOUBLE;
} else {
ep->flags &= ~USB_EP_FLAGS_TRANSMITTING;
}
UDP_SET_EP_CTRL_FLAGS(&AT91C_UDP_CSR[hw_ep],0, AT91C_UDP_TXCOMP);
if (ep->status & 0x01) {
UDP_SET_EP_CTRL_FLAGS(&AT91C_UDP_CSR[hw_ep],
AT91C_UDP_FORCESTALL, AT91C_UDP_FORCESTALL);
PRINTF("HALT IN\n");
} else {
start_transfer(ep);
}
}
}
void
usb_set_ep_event_process(unsigned char addr, struct process *p)
{
USBEndpoint *ep = &usb_endpoints[EP_INDEX(addr)];
ep->event_process = p;
}
/* Select what process should be polled when a global event occurs */
void
usb_arch_set_global_event_process(struct process *p)
{
event_process = p;
}
unsigned int
usb_arch_get_global_events(void)
{
unsigned int e;
USB_DISABLE_INT;
e = events;
events = 0;
USB_ENABLE_INT;
return e;
}
unsigned int
usb_get_ep_events(unsigned char addr)
{
unsigned int e;
unsigned int ei = EP_HW_NUM(addr);
USB_DISABLE_INT;
e = usb_endpoints[ei].events;
usb_endpoints[ei].events = 0;
USB_ENABLE_INT;
return e;
}
void
usb_submit_recv_buffer(unsigned char ep_addr, USBBuffer *buffer)
{
USBBuffer **tailp;
USBEndpoint *ep = &usb_endpoints[EP_INDEX(ep_addr)];
if (!(ep->flags & USB_EP_FLAGS_ENABLED)) return;
/* PRINTF("buffer: %p\n", ep->buffer); */
/* dbg_drain(); */
USB_DISABLE_INT;
tailp = (USBBuffer**)&ep->buffer;
while(*tailp) {
tailp = &(*tailp)->next;
}
*tailp = buffer;
while(buffer) {
buffer->flags |= USB_BUFFER_SUBMITTED;
buffer = buffer->next;
}
start_transfer(ep);
USB_ENABLE_INT;
}
void
usb_submit_xmit_buffer(unsigned char ep_addr, USBBuffer *buffer)
{
USBBuffer **tailp;
USBEndpoint *ep = &usb_endpoints[EP_INDEX(ep_addr)];
if (!(ep->flags & USB_EP_FLAGS_ENABLED)) return;
/* PRINTF("usb_submit_xmit_buffer %d\n", buffer->left); */
USB_DISABLE_INT;
tailp = (USBBuffer**)&ep->buffer;
while(*tailp) {
tailp = &(*tailp)->next;
}
*tailp = buffer;
while(buffer) {
buffer->flags |= USB_BUFFER_SUBMITTED | USB_BUFFER_IN;
buffer = buffer->next;
}
start_transfer(ep);
USB_ENABLE_INT;
}
void
usb_arch_discard_all_buffers(unsigned char ep_addr)
{
USBBuffer *buffer;
volatile USBEndpoint *ep = &usb_endpoints[EP_INDEX(ep_addr)];
USB_DISABLE_EP_INT(EP_HW_NUM(ep_addr));
buffer = ep->buffer;
ep->buffer = NULL;
USB_ENABLE_EP_INT(EP_HW_NUM(ep_addr));
while(buffer) {
buffer->flags &= ~USB_BUFFER_SUBMITTED;
buffer = buffer->next;
}
}
uint16_t
usb_arch_get_ep_status(uint8_t addr)
{
if (EP_INDEX(addr) > USB_MAX_ENDPOINTS) return 0;
return usb_endpoints[EP_INDEX(addr)].status;
}
void
usb_arch_set_configuration(uint8_t usb_configuration_value)
{
/* Nothing needs to be done */
}
void
usb_arch_control_stall(unsigned char addr)
{
if (EP_INDEX(addr) > USB_MAX_ENDPOINTS) return;
UDP_SET_EP_CTRL_FLAGS(&AT91C_UDP_CSR[EP_HW_NUM(addr)],
AT91C_UDP_FORCESTALL, AT91C_UDP_FORCESTALL);
}
/* Not for control endpoints */
void
usb_arch_halt_endpoint(unsigned char ep_addr, int halt)
{
if (EP_INDEX(ep_addr) > USB_MAX_ENDPOINTS) return;
if (!usb_endpoints[EP_INDEX(ep_addr)].flags & USB_EP_FLAGS_ENABLED) return;
*AT91C_UDP_IDR = 1<<EP_HW_NUM(ep_addr);
if (halt) {
usb_endpoints[EP_INDEX(ep_addr)].status |= 0x01;
/* Delay stall if a transmission is i progress */
if (!(usb_endpoints[EP_INDEX(ep_addr)].flags & USB_EP_FLAGS_TRANSMITTING)){
UDP_SET_EP_CTRL_FLAGS(&AT91C_UDP_CSR[EP_HW_NUM(ep_addr)],
AT91C_UDP_FORCESTALL, AT91C_UDP_FORCESTALL);
}
} else {
USBEndpoint *ep = &usb_endpoints[EP_INDEX(ep_addr)];
ep->status &= ~0x01;
*AT91C_UDP_IDR = 1<<EP_HW_NUM(ep_addr);
UDP_SET_EP_CTRL_FLAGS(&AT91C_UDP_CSR[EP_HW_NUM(ep_addr)],
0, AT91C_UDP_FORCESTALL);
*AT91C_UDP_RSTEP = 1<<EP_HW_NUM(ep_addr);
*AT91C_UDP_RSTEP = 0;
/* Release HALT buffer */
if (ep->buffer && (ep->buffer->flags & USB_BUFFER_HALT)) {
ep->buffer->flags &= ~USB_BUFFER_SUBMITTED;
if (ep->buffer->flags & USB_BUFFER_NOTIFY) {
notify_ep_process(ep,USB_EP_EVENT_NOTIFICATION);
}
ep->buffer = ep->buffer->next;
}
/* Restart transmission */
start_transfer(&usb_endpoints[EP_INDEX(ep_addr)]);
}
*AT91C_UDP_IER = 1<<EP_HW_NUM(ep_addr);
}
int
usb_arch_send_pending(uint8_t ep_addr)
{
return usb_endpoints[EP_INDEX(ep_addr)].flags & USB_EP_FLAGS_TRANSMITTING;
}
void
usb_arch_set_address(unsigned char addr)
{
*AT91C_UDP_FADDR = AT91C_UDP_FEN | addr;
*AT91C_UDP_GLBSTATE |= AT91C_UDP_FADDEN;
}
void
usb_arch_reset_int()
{
usb_arch_reset();
notify_process(USB_EVENT_RESET);
}
void
usb_arch_suspend_int()
{
notify_process(USB_EVENT_SUSPEND);
}
void
usb_arch_resume_int()
{
notify_process(USB_EVENT_RESUME);
}

59
drivers/cpu/arm/at91sam7s/usb-interrupt.c
View File

@ -1,59 +0,0 @@
#include <AT91SAM7S64.h>
#include <interrupt-utils.h>
#include <usb-interrupt.h>
#include <usb-api.h>
#include <stdio.h>
static void
usb_int_safe (void) __attribute__((noinline));
static void
usb_int_safe (void)
{
unsigned int int_status;
/* putchar('*'); */
int_status = *AT91C_UDP_ISR & *AT91C_UDP_IMR;
if (int_status & (AT91C_UDP_EP0 | AT91C_UDP_EP1 | AT91C_UDP_EP2
| AT91C_UDP_EP3)) {
unsigned int ep_index;
/* Handle enabled interrupts */
for (ep_index = 0; ep_index < 4; ep_index++) {
if (int_status & (1<<ep_index)) {
usb_arch_transfer_complete(ep_index);
}
}
} else if (int_status & AT91C_UDP_ENDBUSRES) {
*AT91C_UDP_ICR = AT91C_UDP_ENDBUSRES;
usb_arch_reset_int();
} else if (int_status & AT91C_UDP_RXSUSP) {
/* puts("Suspend"); */
*AT91C_UDP_ICR = AT91C_UDP_RXSUSP;
usb_arch_suspend_int();
} else if (int_status & AT91C_UDP_RXRSM) {
/* puts("Resume"); */
*AT91C_UDP_ICR = AT91C_UDP_RXRSM;
usb_arch_resume_int();
} else if (int_status & AT91C_UDP_SOFINT) {
/* puts("SOF"); */
*AT91C_UDP_ICR = AT91C_UDP_SOFINT;
} else if (int_status & AT91C_UDP_WAKEUP) {
/* puts("Wakeup"); */
*AT91C_UDP_ICR = AT91C_UDP_WAKEUP;
} else {
puts("Other USB interrupt");
}
/* dbg_putchar('<'); */
}
void NACKEDFUNC
usb_int (void)
{
ISR_STORE();
ISR_ENABLE_NEST();
usb_int_safe();
ISR_DISABLE_NEST();
*AT91C_AIC_EOICR = 0;
ISR_RESTORE();
}

21
drivers/cpu/arm/at91sam7s/usb-interrupt.h
View File

@ -1,21 +0,0 @@
#ifndef USB_INTERRUPT_H_0HRIPZ5SIA__
#define USB_INTERRUPT_H_0HRIPZ5SIA__
void
usb_int (void);
void
usb_arch_transfer_complete(unsigned int hw_ep);
void
usb_arch_transfer_complete(unsigned int hw_ep);
void
usb_arch_reset_int();
void
usb_arch_suspend_int();
void
usb_arch_resume_int();
#endif /* USB_INTERRUPT_H_0HRIPZ5SIA__ */