Merge pull request #219 from g-oikonomou/contrib/common-cpu-headers

Separate platform config from CPU config
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Simon Duquennoy 2017-12-08 18:43:59 +01:00 committed by GitHub
commit 3e41a7d3e4
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28 changed files with 1039 additions and 1311 deletions

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arch/cpu/arm/arm-def.h Normal file
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/*
* Copyright (c) 2017, George Oikonomou - http://www.spd.gr
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*---------------------------------------------------------------------------*/
/**
* \addtogroup arm
* @{
*
* \file
* Compiler and data type definitions for all ARM-based CPUs
*/
/*---------------------------------------------------------------------------*/
#ifndef ARM_DEF_
#define ARM_DEF_
/*---------------------------------------------------------------------------*/
#include <stdint.h>
/*---------------------------------------------------------------------------*/
/**
* \name Compiler configuration
*
* Those values are not meant to be modified by the user
* @{
*/
#define CCIF
#define CLIF
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name Macros and typedefs
*
* Those values are not meant to be modified by the user
* @{
*/
#define CLOCK_CONF_SECOND 128
/* Clock (time) comparison macro */
#define CLOCK_LT(a, b) ((signed long)((a) - (b)) < 0)
/* Platform typedefs */
typedef uint32_t clock_time_t;
typedef uint32_t uip_stats_t;
typedef uint32_t rtimer_clock_t;
#define RTIMER_CLOCK_DIFF(a, b) ((int32_t)((a) - (b)))
/** @} */
/*---------------------------------------------------------------------------*/
#endif /* ARM_DEF_ */
/*---------------------------------------------------------------------------*/
/** @} */

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/*
* Copyright (c) 2017, George Oikonomou - http://www.spd.gr
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*---------------------------------------------------------------------------*/
/**
* \addtogroup arm
* @{
*
* \defgroup cm3 Arm Cortex-M3
* @{
*
* \file
* Compiler and data type definitions for all CM3-based CPUs
*/
/*---------------------------------------------------------------------------*/
#ifndef CM3_DEF_H_
#define CM3_DEF_H_
/*---------------------------------------------------------------------------*/
#include "arm-def.h"
/*---------------------------------------------------------------------------*/
#endif /* CM3_DEF_H_ */
/*---------------------------------------------------------------------------*/
/**
* @}
* @}
*/

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/*
* Copyright (c) 2017, George Oikonomou - http://www.spd.gr
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*---------------------------------------------------------------------------*/
/**
* \addtogroup arm
* @{
*
* \defgroup cm4 Arm Cortex-M4
* @{
*
* \file
* Compiler and data type definitions for all CM4-based CPUs
*/
/*---------------------------------------------------------------------------*/
#ifndef CM4_DEF_H_
#define CM4_DEF_H_
/*---------------------------------------------------------------------------*/
#include "arm-def.h"
/*---------------------------------------------------------------------------*/
#endif /* CM4_DEF_H_ */
/*---------------------------------------------------------------------------*/
/**
* @}
* @}
*/

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/*
* Copyright (c) 2017, George Oikonomou - http://www.spd.gr
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*---------------------------------------------------------------------------*/
/**
* \addtogroup cc2538
* @{
*/
/*---------------------------------------------------------------------------*/
#ifndef CC2538_CONF_H_
#define CC2538_CONF_H_
/*---------------------------------------------------------------------------*/
/**
* \name CFS configuration
*
* @{
*/
#ifndef COFFEE_CONF_SIZE
#define COFFEE_CONF_SIZE (4 * COFFEE_SECTOR_SIZE)
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name CC2538 System Control configuration
*
* @{
*/
#ifndef SYS_CTRL_CONF_OSC32K_USE_XTAL
#define SYS_CTRL_CONF_OSC32K_USE_XTAL 0 /**< Use the on-board 32.768-kHz crystal */
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name Watchdog Timer configuration
*
* @{
*/
#ifndef WATCHDOG_CONF_ENABLE
#define WATCHDOG_CONF_ENABLE 1 /**< Enable the watchdog timer */
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name USB 'core' configuration
*
* Those values are not meant to be modified by the user, except where stated
* otherwise
* @{
*/
#define CTRL_EP_SIZE 8
#define USB_EP1_SIZE 32
#define USB_EP2_SIZE 64
#define USB_EP3_SIZE 64
#define USB_ARCH_WRITE_NOTIFY 0
#ifndef USB_ARCH_CONF_DMA
#define USB_ARCH_CONF_DMA 1 /**< Change to Enable/Disable USB DMA */
#endif
/** @} */
/**
* \name uDMA Configuration and channel allocations
*
* @{
*/
#define USB_ARCH_CONF_RX_DMA_CHAN 0 /**< USB -> RAM DMA channel */
#define USB_ARCH_CONF_TX_DMA_CHAN 1 /**< RAM -> USB DMA channel */
#define CC2538_RF_CONF_TX_DMA_CHAN 2 /**< RF -> RAM DMA channel */
#define CC2538_RF_CONF_RX_DMA_CHAN 3 /**< RAM -> RF DMA channel */
#define UDMA_CONF_MAX_CHANNEL CC2538_RF_CONF_RX_DMA_CHAN
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name Character I/O Configuration
*
* @{
*/
#ifndef UART_CONF_ENABLE
#define UART_CONF_ENABLE 1 /**< Enable/Disable UART I/O */
#endif
#ifndef UART0_CONF_BAUD_RATE
#define UART0_CONF_BAUD_RATE 115200 /**< Default UART0 baud rate */
#endif
#ifndef UART1_CONF_BAUD_RATE
#define UART1_CONF_BAUD_RATE 115200 /**< Default UART1 baud rate */
#endif
#ifndef SLIP_ARCH_CONF_USB
#define SLIP_ARCH_CONF_USB 0 /**< SLIP over UART by default */
#endif
#ifndef DBG_CONF_USB
#define DBG_CONF_USB 0 /**< All debugging over UART by default */
#endif
#ifndef SERIAL_LINE_CONF_UART
#define SERIAL_LINE_CONF_UART 0 /**< UART to use with serial line */
#endif
#if !SLIP_ARCH_CONF_USB
#ifndef SLIP_ARCH_CONF_UART
#define SLIP_ARCH_CONF_UART 0 /**< UART to use with SLIP */
#endif
#endif
#if !DBG_CONF_USB
#ifndef DBG_CONF_UART
#define DBG_CONF_UART 0 /**< UART to use for debugging */
#endif
#endif
#ifndef UART1_CONF_UART
#define UART1_CONF_UART 0 /**< UART to use for examples relying on
the uart1_* API */
#endif
#ifndef SLIP_ARCH_CONF_ENABLED
/*
* Determine whether we need SLIP
* This will keep working while UIP_FALLBACK_INTERFACE and CMD_CONF_OUTPUT
* keep using SLIP
*/
#if defined(UIP_FALLBACK_INTERFACE) || defined(CMD_CONF_OUTPUT)
#define SLIP_ARCH_CONF_ENABLED 1
#endif
#endif
/**
* \brief Define this as 1 to build a headless node.
*
* The UART will not be initialised its clock will be gated, offering some
* energy savings. The USB will not be initialised either
*/
#ifndef CC2538_CONF_QUIET
#define CC2538_CONF_QUIET 0
#endif
/* CC2538_CONF_QUIET is hard and overrides all other related defines */
#if CC2538_CONF_QUIET
#undef USB_SERIAL_CONF_ENABLE
#define USB_SERIAL_CONF_ENABLE 0
#undef UART_CONF_ENABLE
#define UART_CONF_ENABLE 0
#endif /* CC2538_CONF_QUIET */
/**
* \brief Enable the USB core only if we need it
*/
#ifndef USB_SERIAL_CONF_ENABLE
#define USB_SERIAL_CONF_ENABLE \
((SLIP_ARCH_CONF_USB && SLIP_ARCH_CONF_ENABLED) || \
(MAC_CONF_WITH_TSCH && (SLIP_ARCH_CONF_ENABLED || BUILD_WITH_SHELL)) || \
DBG_CONF_USB)
#endif
/*
* If debugging and SLIP use the same peripheral, this will be 1. Don't modify
* this
*/
#if SLIP_ARCH_CONF_ENABLED
#define DBG_CONF_SLIP_MUX (SLIP_ARCH_CONF_USB == DBG_CONF_USB && \
(SLIP_ARCH_CONF_USB || \
SLIP_ARCH_CONF_UART == DBG_CONF_UART))
#endif
/*
* Automatic detection of whether a specific UART is in use
*/
#define UART_IN_USE_BY_SERIAL_LINE(u) (SERIAL_LINE_CONF_UART == (u))
#define UART_IN_USE_BY_SLIP(u) (SLIP_ARCH_CONF_ENABLED && \
!SLIP_ARCH_CONF_USB && \
SLIP_ARCH_CONF_UART == (u))
#define UART_IN_USE_BY_DBG(u) (!DBG_CONF_USB && DBG_CONF_UART == (u))
#define UART_IN_USE_BY_UART1(u) (UART1_CONF_UART == (u))
#define UART_IN_USE(u) ( \
UART_CONF_ENABLE && \
(UART_IN_USE_BY_SERIAL_LINE(u) || \
UART_IN_USE_BY_SLIP(u) || \
UART_IN_USE_BY_DBG(u) || \
UART_IN_USE_BY_UART1(u)) \
)
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name RF configuration
*
* @{
*/
/* RF Config */
#ifdef RF_CHANNEL
#define CC2538_RF_CONF_CHANNEL RF_CHANNEL
#endif
#ifndef CC2538_RF_CONF_CHANNEL
#define CC2538_RF_CONF_CHANNEL 26
#endif /* CC2538_RF_CONF_CHANNEL */
#ifndef CC2538_RF_CONF_AUTOACK
#define CC2538_RF_CONF_AUTOACK 1 /**< RF H/W generates ACKs */
#endif /* CC2538_CONF_AUTOACK */
#ifndef CC2538_RF_CONF_TX_USE_DMA
#define CC2538_RF_CONF_TX_USE_DMA 1 /**< RF TX over DMA */
#endif
#ifndef CC2538_RF_CONF_RX_USE_DMA
#define CC2538_RF_CONF_RX_USE_DMA 1 /**< RF RX over DMA */
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name LPM configuration
* @{
*/
#ifndef LPM_CONF_ENABLE
#define LPM_CONF_ENABLE 1 /**< Set to 0 to disable LPM entirely */
#endif
/**
* \brief Maximum PM
*
* The SoC will never drop to a Power Mode deeper than the one specified here.
* 0 for PM0, 1 for PM1 and 2 for PM2
*/
#ifndef LPM_CONF_MAX_PM
#define LPM_CONF_MAX_PM 1
#endif
#ifndef LPM_CONF_STATS
#define LPM_CONF_STATS 0 /**< Set to 1 to enable LPM-related stats */
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name Radio Configuration
*
* @{
*/
#ifndef NETSTACK_CONF_RADIO
#define NETSTACK_CONF_RADIO cc2538_rf_driver
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name IEEE address configuration
*
* Used to generate our link-layer & IPv6 address
* @{
*/
/**
* \brief Location of the IEEE address
* 0 => Read from InfoPage,
* 1 => Use a hardcoded address, configured by IEEE_ADDR_CONF_ADDRESS
*/
#ifndef IEEE_ADDR_CONF_HARDCODED
#define IEEE_ADDR_CONF_HARDCODED 0
#endif
/**
* \brief The hardcoded IEEE address to be used when IEEE_ADDR_CONF_HARDCODED
* is defined as 1
*/
#ifndef IEEE_ADDR_CONF_ADDRESS
#define IEEE_ADDR_CONF_ADDRESS { 0x00, 0x12, 0x4B, 0x00, 0x89, 0xAB, 0xCD, 0xEF }
#endif
/**
* \brief Location of the IEEE address in the InfoPage when
* IEEE_ADDR_CONF_HARDCODED is defined as 0
* 0 => Use the primary address location
* 1 => Use the secondary address location
*/
#ifndef IEEE_ADDR_CONF_USE_SECONDARY_LOCATION
#define IEEE_ADDR_CONF_USE_SECONDARY_LOCATION 0
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name Security
*
* @{
*/
#ifndef CRYPTO_CONF_INIT
#define CRYPTO_CONF_INIT 1 /**< Whether to init cryptoprocessor */
#endif
#ifndef AES_128_CONF
#define AES_128_CONF cc2538_aes_128_driver /**< AES-128 driver */
#endif
#ifndef CCM_STAR_CONF
#define CCM_STAR_CONF cc2538_ccm_star_driver /**< AES-CCM* driver */
#endif
/** @} */
/*---------------------------------------------------------------------------*/
#endif /* CC2538_CONF_H_ */
/*---------------------------------------------------------------------------*/
/** @} */

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/*
* Copyright (c) 2017, George Oikonomou - http://www.spd.gr
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*---------------------------------------------------------------------------*/
#ifndef CC2538_DEF_H_
#define CC2538_DEF_H_
/*---------------------------------------------------------------------------*/
#include "cm3/cm3-def.h"
/*---------------------------------------------------------------------------*/
#define RTIMER_ARCH_SECOND 32768
/*---------------------------------------------------------------------------*/
/* 352us from calling transmit() until the SFD byte has been sent */
#define RADIO_DELAY_BEFORE_TX ((unsigned)US_TO_RTIMERTICKS(352))
/* 192us as in datasheet but ACKs are not always received, so adjusted to 250us */
#define RADIO_DELAY_BEFORE_RX ((unsigned)US_TO_RTIMERTICKS(250))
#define RADIO_DELAY_BEFORE_DETECT 0
#ifndef TSCH_CONF_BASE_DRIFT_PPM
/* The drift compared to "true" 10ms slots.
* Enable adaptive sync to enable compensation for this.
* Slot length 10000 usec
* 328 ticks
* Tick duration 30.517578125 usec
* Real slot duration 10009.765625 usec
* Target - real duration = -9.765625 usec
* TSCH_CONF_BASE_DRIFT_PPM -977
*/
#define TSCH_CONF_BASE_DRIFT_PPM -977
#endif
#if MAC_CONF_WITH_TSCH
#define TSCH_CONF_HW_FRAME_FILTERING 0
#endif /* MAC_CONF_WITH_TSCH */
/*---------------------------------------------------------------------------*/
#endif /* CC2538_DEF_H_ */
/*---------------------------------------------------------------------------*/

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#include "contiki.h"
#include "dev/gptimer.h"
#define RTIMER_ARCH_SECOND 32768
/* Do the math in 32bits to save precision.
* Round to nearest integer rather than truncate. */
#define US_TO_RTIMERTICKS(US) ((US) >= 0 ? \

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/*
* Copyright (c) 2017, George Oikonomou - http://www.spd.gr
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*---------------------------------------------------------------------------*/
/**
* \addtogroup cc26xx
* @{
*
* \file
* Header with configuration defines common to all CC13xx/CC26xx platforms
*/
/*---------------------------------------------------------------------------*/
#ifndef CC13XX_CC26XX_CONF_H_
#define CC13XX_CC26XX_CONF_H_
/*---------------------------------------------------------------------------*/
/**
* \name Network Stack Configuration
*
* @{
*/
/*
* If set, the systems keeps the HF crystal oscillator on even when the radio is off.
* You need to set this to 1 to use TSCH with its default 2.2ms or larger guard time.
*/
#ifndef CC2650_FAST_RADIO_STARTUP
#define CC2650_FAST_RADIO_STARTUP (MAC_CONF_WITH_TSCH)
#endif
#ifdef RF_CHANNEL
#define RF_CORE_CONF_CHANNEL RF_CHANNEL
#endif
#ifndef RF_CORE_CONF_CHANNEL
#define RF_CORE_CONF_CHANNEL 25
#endif
/* Number of Prop Mode RX buffers */
#ifndef PROP_MODE_CONF_RX_BUF_CNT
#define PROP_MODE_CONF_RX_BUF_CNT 4
#endif
/*
* Auto-configure Prop-mode radio if we are running on CC13xx, unless the
* project has specified otherwise. Depending on the final mode, determine a
* default channel (again, if unspecified) and configure RDC params
*/
#if CPU_FAMILY_CC13XX
#ifndef CC13XX_CONF_PROP_MODE
#define CC13XX_CONF_PROP_MODE 1
#endif /* CC13XX_CONF_PROP_MODE */
#endif /* CPU_FAMILY_CC13XX */
#if CC13XX_CONF_PROP_MODE
#define NETSTACK_CONF_RADIO prop_mode_driver
#ifndef RF_CORE_CONF_CHANNEL
#define RF_CORE_CONF_CHANNEL 0
#endif
#define CSMA_CONF_ACK_WAIT_TIME (RTIMER_SECOND / 400)
#define CSMA_CONF_AFTER_ACK_DETECTED_WAIT_TIME (RTIMER_SECOND / 1000)
#define CSMA_CONF_SEND_SOFT_ACK 1
#else /* CC13XX_CONF_PROP_MODE */
#define NETSTACK_CONF_RADIO ieee_mode_driver
#define CSMA_CONF_SEND_SOFT_ACK 0
#endif /* CC13XX_CONF_PROP_MODE */
#define NETSTACK_RADIO_MAX_PAYLOAD_LEN 125
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name IEEE address configuration
*
* Used to generate our link-local & IPv6 address
* @{
*/
/**
* \brief Location of the IEEE address
* 0 => Read from InfoPage,
* 1 => Use a hardcoded address, configured by IEEE_ADDR_CONF_ADDRESS
*/
#ifndef IEEE_ADDR_CONF_HARDCODED
#define IEEE_ADDR_CONF_HARDCODED 0
#endif
/**
* \brief The hardcoded IEEE address to be used when IEEE_ADDR_CONF_HARDCODED
* is defined as 1
*/
#ifndef IEEE_ADDR_CONF_ADDRESS
#define IEEE_ADDR_CONF_ADDRESS { 0x00, 0x12, 0x4B, 0x00, 0x89, 0xAB, 0xCD, 0xEF }
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name RF configuration
*
* @{
*/
/* RF Config */
#ifndef IEEE_MODE_CONF_AUTOACK
#define IEEE_MODE_CONF_AUTOACK 1 /**< RF H/W generates ACKs */
#endif
#ifndef IEEE_MODE_CONF_PROMISCOUS
#define IEEE_MODE_CONF_PROMISCOUS 0 /**< 1 to enable promiscous mode */
#endif
#ifndef RF_BLE_CONF_ENABLED
#define RF_BLE_CONF_ENABLED 0 /**< 0 to disable BLE support */
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name Character I/O Configuration
*
* @{
*/
#ifndef CC26XX_UART_CONF_ENABLE
#define CC26XX_UART_CONF_ENABLE 1 /**< Enable/Disable UART I/O */
#endif
#ifndef CC26XX_UART_CONF_BAUD_RATE
#define CC26XX_UART_CONF_BAUD_RATE 115200 /**< Default UART0 baud rate */
#endif
/* Enable I/O over the Debugger Devpack - Only relevant for the SensorTag */
#ifndef BOARD_CONF_DEBUGGER_DEVPACK
#define BOARD_CONF_DEBUGGER_DEVPACK 1
#endif
#ifndef SLIP_ARCH_CONF_ENABLED
/*
* Determine whether we need SLIP
* This will keep working while UIP_FALLBACK_INTERFACE and CMD_CONF_OUTPUT
* keep using SLIP
*/
#if defined(UIP_FALLBACK_INTERFACE) || defined(CMD_CONF_OUTPUT)
#define SLIP_ARCH_CONF_ENABLED 1
#endif
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name JTAG interface configuration
*
* Enable/Disable the JTAG DAP and TAP interfaces on the chip.
* Setting this to 0 will disable access to the debug interface
* to secure deployed images.
* @{
*/
#ifndef CCXXWARE_CONF_JTAG_INTERFACE_ENABLE
#define CCXXWARE_CONF_JTAG_INTERFACE_ENABLE 1
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name ROM Bootloader configuration
*
* Enable/Disable the ROM bootloader in your image, if the board supports it.
* Look in board.h to choose the DIO and corresponding level that will cause
* the chip to enter bootloader mode.
* @{
*/
#ifndef ROM_BOOTLOADER_ENABLE
#define ROM_BOOTLOADER_ENABLE 0
#endif
/** @} */
/*---------------------------------------------------------------------------*/
#endif /* CC13XX_CC26XX_CONF_H_ */
/*---------------------------------------------------------------------------*/
/** @} */

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@ -0,0 +1,97 @@
/*
* Copyright (c) 2017, George Oikonomou - http://www.spd.gr
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*---------------------------------------------------------------------------*/
#ifndef CC13XX_CC26XX_DEF_H_
#define CC13XX_CC26XX_DEF_H_
/*---------------------------------------------------------------------------*/
#include "cm3/cm3-def.h"
/*---------------------------------------------------------------------------*/
/* TSCH related defines */
/* Delay between GO signal and SFD */
#define RADIO_DELAY_BEFORE_TX ((unsigned)US_TO_RTIMERTICKS(81))
/* Delay between GO signal and start listening.
* This value is so small because the radio is constantly on within each timeslot. */
#define RADIO_DELAY_BEFORE_RX ((unsigned)US_TO_RTIMERTICKS(15))
/* Delay between the SFD finishes arriving and it is detected in software. */
#define RADIO_DELAY_BEFORE_DETECT ((unsigned)US_TO_RTIMERTICKS(352))
/* Timer conversion; radio is running at 4 MHz */
#define RADIO_TIMER_SECOND 4000000u
#if (RTIMER_SECOND % 256) || (RADIO_TIMER_SECOND % 256)
#error RADIO_TO_RTIMER macro must be fixed!
#endif
#define RADIO_TO_RTIMER(X) ((uint32_t)(((uint64_t)(X) * (RTIMER_SECOND / 256)) / (RADIO_TIMER_SECOND / 256)))
#define USEC_TO_RADIO(X) ((X) * 4)
/* The PHY header (preamble + SFD, 4+1 bytes) duration is equivalent to 10 symbols */
#define RADIO_IEEE_802154_PHY_HEADER_DURATION_USEC 160
/* Do not turn off TSCH within a timeslot: not enough time */
#define TSCH_CONF_RADIO_ON_DURING_TIMESLOT 1
/* Disable TSCH frame filtering */
#define TSCH_CONF_HW_FRAME_FILTERING 0
/* Use hardware timestamps */
#ifndef TSCH_CONF_RESYNC_WITH_SFD_TIMESTAMPS
#define TSCH_CONF_RESYNC_WITH_SFD_TIMESTAMPS 1
#define TSCH_CONF_TIMESYNC_REMOVE_JITTER 0
#endif
#ifndef TSCH_CONF_BASE_DRIFT_PPM
/* The drift compared to "true" 10ms slots.
* Enable adaptive sync to enable compensation for this.
* Slot length 10000 usec
* 328 ticks
* Tick duration 30.517578125 usec
* Real slot duration 10009.765625 usec
* Target - real duration = -9.765625 usec
* TSCH_CONF_BASE_DRIFT_PPM -977
*/
#define TSCH_CONF_BASE_DRIFT_PPM -977
#endif
/* 10 times per second */
#ifndef TSCH_CONF_CHANNEL_SCAN_DURATION
#define TSCH_CONF_CHANNEL_SCAN_DURATION (CLOCK_SECOND / 10)
#endif
/* Slightly reduce the TSCH guard time (from 2200 usec to 1800 usec) to make sure
* the CC26xx radio has sufficient time to start up. */
#ifndef TSCH_CONF_RX_WAIT
#define TSCH_CONF_RX_WAIT 1800
#endif
/*---------------------------------------------------------------------------*/
#define RTIMER_ARCH_SECOND 65536
/*---------------------------------------------------------------------------*/
#endif /* CC13XX_CC26XX_DEF_H_ */
/*---------------------------------------------------------------------------*/

View File

@ -47,8 +47,6 @@
/*---------------------------------------------------------------------------*/
#include "contiki.h"
/*---------------------------------------------------------------------------*/
#define RTIMER_ARCH_SECOND 65536
/*---------------------------------------------------------------------------*/
rtimer_clock_t rtimer_arch_now(void);
/* HW oscillator frequency is 32 kHz, not 64 kHz and RTIMER_NOW() never returns

View File

@ -0,0 +1,47 @@
/*
* Copyright (c) 2007, Swedish Institute of Computer Science
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the Institute nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
/*---------------------------------------------------------------------------*/
#ifndef MSP430_CONF_H_
#define MSP430_CONF_H_
/*---------------------------------------------------------------------------*/
/* default DCOSYNCH Period is 30 seconds */
#ifdef DCOSYNCH_CONF_PERIOD
#define DCOSYNCH_PERIOD DCOSYNCH_CONF_PERIOD
#else
#define DCOSYNCH_PERIOD 30
#endif
#ifdef F_CPU
#define MSP430_CPU_SPEED F_CPU
#else
#define MSP430_CPU_SPEED 2457600UL
#endif
/*---------------------------------------------------------------------------*/
#endif /* MSP430_CONF_H_ */
/*---------------------------------------------------------------------------*/

View File

@ -27,8 +27,8 @@
* SUCH DAMAGE.
*/
#ifndef MSP430DEF_H
#define MSP430DEF_H
#ifndef MSP430_DEF_H_
#define MSP430_DEF_H_
#ifdef __IAR_SYSTEMS_ICC__
#include <intrinsics.h>
@ -60,18 +60,7 @@
#define BV(x) (1 << x)
#endif
#ifdef HAVE_STDINT_H
#include <stdint.h>
#else
#ifndef uint8_t
typedef unsigned char uint8_t;
typedef unsigned short uint16_t;
typedef unsigned long uint32_t;
typedef signed char int8_t;
typedef short int16_t;
typedef long int32_t;
#endif
#endif /* !HAVE_STDINT_H */
/* These names are deprecated, use C99 names. */
typedef uint8_t u8_t;
@ -79,23 +68,18 @@ typedef uint16_t u16_t;
typedef uint32_t u32_t;
typedef int32_t s32_t;
/* default DCOSYNCH Period is 30 seconds */
#ifdef DCOSYNCH_CONF_PERIOD
#define DCOSYNCH_PERIOD DCOSYNCH_CONF_PERIOD
#else
#define DCOSYNCH_PERIOD 30
#endif
/* Types for clocks and uip_stats */
typedef unsigned short uip_stats_t;
typedef unsigned long clock_time_t;
typedef long off_t;
void msp430_cpu_init(void); /* Rename to cpu_init() later! */
void msp430_sync_dco(void);
/* Our clock resolution, this is the same as Unix HZ. */
#define CLOCK_CONF_SECOND 128UL
#define cpu_init() msp430_cpu_init()
void *sbrk(int);
#define CCIF
#define CLIF
typedef int spl_t;
/* void splx_(spl_t); */
spl_t splhigh_(void);
#define splhigh() splhigh_()
@ -119,21 +103,21 @@ void *w_memset(void *out, int value, size_t n);
#endif /* memcpy */
#endif /* __GNUC__ && __MSP430__ && MSP430_MEMCPY_WORKAROUND */
/* Moved from the msp430.h file with other msp430 related defines */
#ifdef F_CPU
#define MSP430_CPU_SPEED F_CPU
#else
#define MSP430_CPU_SPEED 2457600UL
#endif
#define MSP430_REQUIRE_CPUON 0
#define MSP430_REQUIRE_LPM1 1
#define MSP430_REQUIRE_LPM2 2
#define MSP430_REQUIRE_LPM3 3
/* Platform-specific checksum implementation */
#define UIP_ARCH_IPCHKSUM 1
#define BAUD2UBR(baud) ((F_CPU/baud))
void msp430_add_lpm_req(int req);
void msp430_remove_lpm_req(int req);
void msp430_cpu_init(void); /* Rename to cpu_init() later! */
void msp430_sync_dco(void);
#define cpu_init() msp430_cpu_init()
void *sbrk(int);
#endif /* MSP430DEF_H */
#endif /* MSP430_DEF_H_ */

View File

@ -53,7 +53,6 @@
#include "nrf_delay.h"
#include "app_error.h"
#include "contiki.h"
#include "platform-conf.h"
/*---------------------------------------------------------------------------*/
const nrf_drv_rtc_t rtc = NRF_DRV_RTC_INSTANCE(PLATFORM_RTC_INSTANCE_ID); /**< RTC instance used for platform clock */

View File

@ -0,0 +1,40 @@
/*
* Copyright (c) 2017, George Oikonomou - http://www.spd.gr
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*---------------------------------------------------------------------------*/
#ifndef NRF52832_DEF_H_
#define NRF52832_DEF_H_
/*---------------------------------------------------------------------------*/
#include "cm4/cm4-def.h"
/*---------------------------------------------------------------------------*/
#define RTIMER_ARCH_SECOND 62500
/*---------------------------------------------------------------------------*/
#endif /* NRF52832_DEF_H_ */
/*---------------------------------------------------------------------------*/

View File

@ -44,7 +44,6 @@
#include "nrf_drv_timer.h"
#include "app_error.h"
#include "contiki.h"
#include "platform-conf.h"
static const nrf_drv_timer_t timer = NRF_DRV_TIMER_INSTANCE(PLATFORM_TIMER_INSTANCE_ID); /**< Timer instance used for rtimer */

View File

@ -47,51 +47,7 @@
#include PROJECT_CONF_PATH
#endif /* PROJECT_CONF_PATH */
/*---------------------------------------------------------------------------*/
/**
* \name Compiler configuration and platform-specific type definitions
*
* Those values are not meant to be modified by the user
* @{
*/
#define CLOCK_CONF_SECOND 128
/* Compiler configurations */
#define CCIF
#define CLIF
/* Platform typedefs */
typedef uint32_t clock_time_t;
typedef uint32_t uip_stats_t;
/*
* rtimer.h typedefs rtimer_clock_t as unsigned short. We need to define
* RTIMER_CLOCK_DIFF to override this
*/
typedef uint32_t rtimer_clock_t;
#define RTIMER_CLOCK_DIFF(a,b) ((int32_t)((a)-(b)))
/** @} */
/*---------------------------------------------------------------------------*/
/* 352us from calling transmit() until the SFD byte has been sent */
#define RADIO_DELAY_BEFORE_TX ((unsigned)US_TO_RTIMERTICKS(352))
/* 192us as in datasheet but ACKs are not always received, so adjusted to 250us */
#define RADIO_DELAY_BEFORE_RX ((unsigned)US_TO_RTIMERTICKS(250))
#define RADIO_DELAY_BEFORE_DETECT 0
#ifndef TSCH_CONF_BASE_DRIFT_PPM
/* The drift compared to "true" 10ms slots.
* Enable adaptive sync to enable compensation for this.
* Slot length 10000 usec
* 328 ticks
* Tick duration 30.517578125 usec
* Real slot duration 10009.765625 usec
* Target - real duration = -9.765625 usec
* TSCH_CONF_BASE_DRIFT_PPM -977
*/
#define TSCH_CONF_BASE_DRIFT_PPM -977
#endif
#if MAC_CONF_WITH_TSCH
#define TSCH_CONF_HW_FRAME_FILTERING 0
#endif /* MAC_CONF_WITH_TSCH */
#include "cc2538-def.h"
/*---------------------------------------------------------------------------*/
/**
* \name Serial Boot Loader Backdoor configuration
@ -99,7 +55,7 @@ typedef uint32_t rtimer_clock_t;
* @{
*/
#ifndef FLASH_CCA_CONF_BOOTLDR_BACKDOOR
#define FLASH_CCA_CONF_BOOTLDR_BACKDOOR 1 /**<Enable the boot loader backdoor */
#define FLASH_CCA_CONF_BOOTLDR_BACKDOOR 1 /**<Enable the boot loader backdoor */
#endif
#ifndef FLASH_CCA_CONF_BOOTLDR_BACKDOOR_PORT_A_PIN
@ -121,274 +77,12 @@ typedef uint32_t rtimer_clock_t;
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name Watchdog Timer configuration
*
* @{
*/
#ifndef WATCHDOG_CONF_ENABLE
#define WATCHDOG_CONF_ENABLE 1 /**< Enable the watchdog timer */
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name USB 'core' configuration
*
* Those values are not meant to be modified by the user, except where stated
* otherwise
* @{
*/
#define CTRL_EP_SIZE 8
#define USB_EP1_SIZE 32
#define USB_EP2_SIZE 64
#define USB_EP3_SIZE 64
#define USB_ARCH_WRITE_NOTIFY 0
#ifndef USB_ARCH_CONF_DMA
#define USB_ARCH_CONF_DMA 1 /**< Change to Enable/Disable USB DMA */
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name uDMA Configuration and channel allocations
*
* @{
*/
#define USB_ARCH_CONF_RX_DMA_CHAN 0 /**< USB -> RAM DMA channel */
#define USB_ARCH_CONF_TX_DMA_CHAN 1 /**< RAM -> USB DMA channel */
#define CC2538_RF_CONF_TX_DMA_CHAN 2 /**< RF -> RAM DMA channel */
#define CC2538_RF_CONF_RX_DMA_CHAN 3 /**< RAM -> RF DMA channel */
#define UDMA_CONF_MAX_CHANNEL CC2538_RF_CONF_RX_DMA_CHAN
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name Character I/O Configuration
*
* @{
*/
#ifndef UART_CONF_ENABLE
#define UART_CONF_ENABLE 1 /**< Enable/Disable UART I/O */
#endif
#ifndef UART0_CONF_BAUD_RATE
#define UART0_CONF_BAUD_RATE 115200 /**< Default UART0 baud rate */
#endif
#ifndef UART1_CONF_BAUD_RATE
#define UART1_CONF_BAUD_RATE 115200 /**< Default UART1 baud rate */
#endif
#ifndef SLIP_ARCH_CONF_USB
#define SLIP_ARCH_CONF_USB 0 /**< SLIP over UART by default */
#endif
#ifndef DBG_CONF_USB
#define DBG_CONF_USB 0 /**< All debugging over UART by default */
#endif
#ifndef SERIAL_LINE_CONF_UART
#define SERIAL_LINE_CONF_UART 0 /**< UART to use with serial line */
#endif
#if !SLIP_ARCH_CONF_USB
#ifndef SLIP_ARCH_CONF_UART
#define SLIP_ARCH_CONF_UART 0 /**< UART to use with SLIP */
#endif
#endif
#if !DBG_CONF_USB
#ifndef DBG_CONF_UART
#define DBG_CONF_UART 0 /**< UART to use for debugging */
#endif
#endif
#ifndef UART1_CONF_UART
#define UART1_CONF_UART 0 /**< UART to use for examples relying on
the uart1_* API */
#endif
#ifndef SLIP_ARCH_CONF_ENABLED
/*
* Determine whether we need SLIP
* This will keep working while UIP_FALLBACK_INTERFACE and CMD_CONF_OUTPUT
* keep using SLIP
*/
#if defined (UIP_FALLBACK_INTERFACE) || defined (CMD_CONF_OUTPUT)
#define SLIP_ARCH_CONF_ENABLED 1
#endif
#endif
/**
* \brief Define this as 1 to build a headless node.
*
* The UART will not be initialised its clock will be gated, offering some
* energy savings. The USB will not be initialised either
*/
#ifndef CC2538_CONF_QUIET
#define CC2538_CONF_QUIET 0
#endif
/* CC2538_CONF_QUIET is hard and overrides all other related defines */
#if CC2538_CONF_QUIET
#undef USB_SERIAL_CONF_ENABLE
#define USB_SERIAL_CONF_ENABLE 0
#undef UART_CONF_ENABLE
#define UART_CONF_ENABLE 0
#endif /* CC2538_CONF_QUIET */
/**
* \brief Enable the USB core only if we need it
*/
#ifndef USB_SERIAL_CONF_ENABLE
#define USB_SERIAL_CONF_ENABLE \
((SLIP_ARCH_CONF_USB && SLIP_ARCH_CONF_ENABLED) || \
(MAC_CONF_WITH_TSCH && (SLIP_ARCH_CONF_ENABLED || BUILD_WITH_SHELL)) || \
DBG_CONF_USB)
#endif
/*
* If debugging and SLIP use the same peripheral, this will be 1. Don't modify
* this
*/
#if SLIP_ARCH_CONF_ENABLED
#define DBG_CONF_SLIP_MUX (SLIP_ARCH_CONF_USB == DBG_CONF_USB && \
(SLIP_ARCH_CONF_USB || \
SLIP_ARCH_CONF_UART == DBG_CONF_UART))
#endif
/*
* Automatic detection of whether a specific UART is in use
*/
#define UART_IN_USE_BY_SERIAL_LINE(u) (SERIAL_LINE_CONF_UART == (u))
#define UART_IN_USE_BY_SLIP(u) (SLIP_ARCH_CONF_ENABLED && \
!SLIP_ARCH_CONF_USB && \
SLIP_ARCH_CONF_UART == (u))
#define UART_IN_USE_BY_DBG(u) (!DBG_CONF_USB && DBG_CONF_UART == (u))
#define UART_IN_USE_BY_UART1(u) (UART1_CONF_UART == (u))
#define UART_IN_USE(u) ( \
UART_CONF_ENABLE && \
(UART_IN_USE_BY_SERIAL_LINE(u) || \
UART_IN_USE_BY_SLIP(u) || \
UART_IN_USE_BY_DBG(u) || \
UART_IN_USE_BY_UART1(u)) \
)
/** @} */
/*---------------------------------------------------------------------------*/
/* board.h assumes that basic configuration is done */
#include "board.h"
/*---------------------------------------------------------------------------*/
#define NETSTACK_CONF_RADIO cc2538_rf_driver
/** @} */
/* Include CPU-related configuration */
#include "cc2538-conf.h"
/*---------------------------------------------------------------------------*/
/**
* \name LPM configuration
* @{
*/
#ifndef LPM_CONF_ENABLE
#define LPM_CONF_ENABLE 1 /**< Set to 0 to disable LPM entirely */
#endif
/**
* \brief Maximum PM
*
* The SoC will never drop to a Power Mode deeper than the one specified here.
* 0 for PM0, 1 for PM1 and 2 for PM2
*/
#ifndef LPM_CONF_MAX_PM
#define LPM_CONF_MAX_PM 1
#endif
#ifndef LPM_CONF_STATS
#define LPM_CONF_STATS 0 /**< Set to 1 to enable LPM-related stats */
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name IEEE address configuration
*
* Used to generate our link-layer & IPv6 address
* @{
*/
/**
* \brief Location of the IEEE address
* 0 => Read from InfoPage,
* 1 => Use a hardcoded address, configured by IEEE_ADDR_CONF_ADDRESS
*/
#ifndef IEEE_ADDR_CONF_HARDCODED
#define IEEE_ADDR_CONF_HARDCODED 0
#endif
/**
* \brief The hardcoded IEEE address to be used when IEEE_ADDR_CONF_HARDCODED
* is defined as 1
*/
#ifndef IEEE_ADDR_CONF_ADDRESS
#define IEEE_ADDR_CONF_ADDRESS { 0x00, 0x12, 0x4B, 0x00, 0x89, 0xAB, 0xCD, 0xEF }
#endif
/**
* \brief Location of the IEEE address in the InfoPage when
* IEEE_ADDR_CONF_HARDCODED is defined as 0
* 0 => Use the primary address location
* 1 => Use the secondary address location
*/
#ifndef IEEE_ADDR_CONF_USE_SECONDARY_LOCATION
#define IEEE_ADDR_CONF_USE_SECONDARY_LOCATION 0
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name RF configuration
*
* @{
*/
/* RF Config */
#ifdef RF_CHANNEL
#define CC2538_RF_CONF_CHANNEL RF_CHANNEL
#endif
#ifndef CC2538_RF_CONF_CHANNEL
#define CC2538_RF_CONF_CHANNEL 25
#endif /* CC2538_RF_CONF_CHANNEL */
#ifndef CC2538_RF_CONF_AUTOACK
#define CC2538_RF_CONF_AUTOACK 1 /**< RF H/W generates ACKs */
#endif /* CC2538_CONF_AUTOACK */
#ifndef CC2538_RF_CONF_TX_USE_DMA
#define CC2538_RF_CONF_TX_USE_DMA 1 /**< RF TX over DMA */
#endif
#ifndef CC2538_RF_CONF_RX_USE_DMA
#define CC2538_RF_CONF_RX_USE_DMA 1 /**< RF RX over DMA */
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name Security
*
* @{
*/
#ifndef CRYPTO_CONF_INIT
#define CRYPTO_CONF_INIT 1 /**< Whether to init cryptoprocessor */
#endif
#ifndef AES_128_CONF
#define AES_128_CONF cc2538_aes_128_driver /**< AES-128 driver */
#endif
#ifndef CCM_STAR_CONF
#define CCM_STAR_CONF cc2538_ccm_star_driver /**< AES-CCM* driver */
#endif
/** @} */
/*---------------------------------------------------------------------------*/
#endif /* CONTIKI_CONF_H_ */
/*---------------------------------------------------------------------------*/
/** @} */

View File

@ -38,11 +38,15 @@
#include PROJECT_CONF_PATH
#endif /* PROJECT_CONF_PATH */
#ifdef PLATFORM_CONF_H
#include PLATFORM_CONF_H
#else
#include "platform-conf.h"
#endif /* PLATFORM_CONF_H */
#include "jn516x-def.h"
#ifdef RF_CHANNEL
#define MICROMAC_CONF_CHANNEL RF_CHANNEL
#endif
#ifndef MICROMAC_CONF_CHANNEL
#define MICROMAC_CONF_CHANNEL 26
#endif
/* Configure radio driver */
#ifndef NETSTACK_CONF_RADIO

View File

@ -5,4 +5,4 @@ Mapping of LEDs on JN516x DR1174:
leds.h: led on DR1174:
LEDS_GP0 LED D3
LEDS_GP1 LED D6
Note: LEDS_GPx definitions included in leds.h via platform-conf.h
Note: LEDS_GPx definitions included in leds.h via jn516x-def.h

View File

@ -14,4 +14,4 @@ DR1174+DR1175:
LEDS_WHITE White power led with level control on DR1175
LEDS_GP0 LEDS D3 on DR1174
LEDS_GP1 LEDS D6 on DR1174
Note: LEDS_GPx and LEDS_WHITE definitions included in leds.h via platform-conf.h
Note: LEDS_GPx and LEDS_WHITE definitions included in leds.h via jn516x-def.h

View File

@ -16,4 +16,4 @@ DR1174+DR1199:
LEDS_RED LED D3 on DR1199
LEDS_GP0 LED D3 on DR1174
LEDS_GP1 LED D6 on DR1174
Note: LEDS_GPx definitions included in leds.h via platform-conf.h
Note: LEDS_GPx definitions included in leds.h via jn516x-def.h

View File

@ -30,8 +30,8 @@
*
*/
#ifndef PLATFORM_CONF_H
#define PLATFORM_CONF_H
#ifndef JN516X_DEF_H_
#define JN516X_DEF_H_
#include <inttypes.h>
#include <jendefs.h>
@ -56,14 +56,6 @@
#define MIRCOMAC_CONF_BUF_NUM 2
#endif
#ifdef RF_CHANNEL
#define MICROMAC_CONF_CHANNEL RF_CHANNEL
#endif
#ifndef MICROMAC_CONF_CHANNEL
#define MICROMAC_CONF_CHANNEL 26
#endif
/* 32kHz or 16MHz rtimers? */
#ifdef RTIMER_CONF_USE_32KHZ
#define RTIMER_USE_32KHZ RTIMER_CONF_USE_32KHZ
@ -314,4 +306,5 @@ DR1174+DR1175:
#define LEDS_GP2 64
#define LEDS_GP3 128
#define LEDS_CONF_ALL 255
#endif /* PLATFORM_CONF_H */
#endif /* JN516X_DEF_H_ */

View File

@ -48,7 +48,8 @@
#endif /* PROJECT_CONF_PATH */
/*---------------------------------------------------------------------------*/
/* Include platform peripherals configuration */
#include "platform-conf.h"
#include "nrf52dk-def.h"
#include "nrf52832-def.h"
/*---------------------------------------------------------------------------*/
/**
* \name Network Stack Configuration

View File

@ -43,8 +43,8 @@
* Wojciech Bober <wojciech.bober@nordicsemi.no>
*
*/
#ifndef PLATFORM_CONF_H_
#define PLATFORM_CONF_H_
#ifndef NRF52DK_DEF_H_
#define NRF52DK_DEF_H_
#include "boards.h"
@ -107,39 +107,10 @@
*/
#define PLATFORM_TIMER_INSTANCE_ID 1
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name Compiler configuration and platform-specific type definitions
*
* Those values are not meant to be modified by the user
* @{
*/
#define CLOCK_CONF_SECOND 128
/* Compiler configurations */
#define CCIF
#define CLIF
/* Platform typedefs */
typedef uint32_t clock_time_t;
typedef uint32_t uip_stats_t;
/* Clock (time) comparison macro */
#define CLOCK_LT(a, b) ((signed long)((a) - (b)) < 0)
#define RTIMER_ARCH_SECOND 62500
/*
* rtimer.h typedefs rtimer_clock_t as unsigned short. We need to define
* RTIMER_CLOCK_DIFF to override this
*/
typedef uint32_t rtimer_clock_t;
#define RTIMER_CLOCK_DIFF(a,b) ((int32_t)((a)-(b)))
/** @} */
/*---------------------------------------------------------------------------*/
/** @}
* @}
* @}
*/
#endif /* PLATFORM_CONF_H_ */
#endif /* NRF52DK_DEF_H_ */

View File

@ -56,51 +56,7 @@
#include PROJECT_CONF_PATH
#endif /* PROJECT_CONF_PATH */
/*---------------------------------------------------------------------------*/
/**
* \name Compiler configuration and platform-specific type definitions
*
* Those values are not meant to be modified by the user
* @{
*/
#define CLOCK_CONF_SECOND 128
/* Compiler configurations */
#define CCIF
#define CLIF
/* Platform typedefs */
typedef uint32_t clock_time_t;
typedef uint32_t uip_stats_t;
/*
* rtimer.h typedefs rtimer_clock_t as unsigned short. We need to define
* RTIMER_CLOCK_DIFF to override this
*/
typedef uint32_t rtimer_clock_t;
#define RTIMER_CLOCK_DIFF(a, b) ((int32_t)((a) - (b)))
/** @} */
/*---------------------------------------------------------------------------*/
/* 352us from calling transmit() until the SFD byte has been sent */
#define RADIO_DELAY_BEFORE_TX ((unsigned)US_TO_RTIMERTICKS(352))
/* 192us as in datasheet but ACKs are not always received, so adjusted to 250us */
#define RADIO_DELAY_BEFORE_RX ((unsigned)US_TO_RTIMERTICKS(250))
#define RADIO_DELAY_BEFORE_DETECT 0
#ifndef TSCH_CONF_BASE_DRIFT_PPM
/* The drift compared to "true" 10ms slots.
* Enable adaptive sync to enable compensation for this.
* Slot length 10000 usec
* 328 ticks
* Tick duration 30.517578125 usec
* Real slot duration 10009.765625 usec
* Target - real duration = -9.765625 usec
* TSCH_CONF_BASE_DRIFT_PPM -977
*/
#define TSCH_CONF_BASE_DRIFT_PPM -977
#endif
#if MAC_CONF_WITH_TSCH
#define TSCH_CONF_HW_FRAME_FILTERING 0
#endif /* MAC_CONF_WITH_TSCH */
#include "cc2538-def.h"
/*---------------------------------------------------------------------------*/
/**
* \name Serial Boot Loader Backdoor configuration
@ -130,290 +86,11 @@ typedef uint32_t rtimer_clock_t;
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name CFS configuration
*
* @{
*/
#ifndef COFFEE_CONF_SIZE
#define COFFEE_CONF_SIZE (4 * COFFEE_SECTOR_SIZE)
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name Watchdog Timer configuration
*
* @{
*/
#ifndef WATCHDOG_CONF_ENABLE
#define WATCHDOG_CONF_ENABLE 1 /**< Enable the watchdog timer */
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name USB 'core' configuration
*
* Those values are not meant to be modified by the user, except where stated
* otherwise
* @{
*/
#define CTRL_EP_SIZE 8
#define USB_EP1_SIZE 32
#define USB_EP2_SIZE 64
#define USB_EP3_SIZE 64
#define USB_ARCH_WRITE_NOTIFY 0
#ifndef USB_ARCH_CONF_DMA
#define USB_ARCH_CONF_DMA 1 /**< Change to Enable/Disable USB DMA */
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name uDMA Configuration and channel allocations
*
* @{
*/
#define USB_ARCH_CONF_RX_DMA_CHAN 0 /**< USB -> RAM DMA channel */
#define USB_ARCH_CONF_TX_DMA_CHAN 1 /**< RAM -> USB DMA channel */
#define CC2538_RF_CONF_TX_DMA_CHAN 2 /**< RF -> RAM DMA channel */
#define CC2538_RF_CONF_RX_DMA_CHAN 3 /**< RAM -> RF DMA channel */
#define UDMA_CONF_MAX_CHANNEL CC2538_RF_CONF_RX_DMA_CHAN
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name Character I/O Configuration
*
* @{
*/
#ifndef UART_CONF_ENABLE
#define UART_CONF_ENABLE 1 /**< Enable/Disable UART I/O */
#endif
#ifndef UART0_CONF_BAUD_RATE
#define UART0_CONF_BAUD_RATE 115200 /**< Default UART0 baud rate */
#endif
#ifndef UART1_CONF_BAUD_RATE
#define UART1_CONF_BAUD_RATE 115200 /**< Default UART1 baud rate */
#endif
#ifndef SLIP_ARCH_CONF_USB
#define SLIP_ARCH_CONF_USB 0 /**< SLIP over UART by default */
#endif
#ifndef DBG_CONF_USB
#define DBG_CONF_USB 0 /**< All debugging over UART by default */
#endif
#ifndef SERIAL_LINE_CONF_UART
#define SERIAL_LINE_CONF_UART 0 /**< UART to use with serial line */
#endif
#if !SLIP_ARCH_CONF_USB
#ifndef SLIP_ARCH_CONF_UART
#define SLIP_ARCH_CONF_UART 0 /**< UART to use with SLIP */
#endif
#endif
#if !DBG_CONF_USB
#ifndef DBG_CONF_UART
#define DBG_CONF_UART 0 /**< UART to use for debugging */
#endif
#endif
#ifndef UART1_CONF_UART
#define UART1_CONF_UART 0 /**< UART to use for examples relying on
the uart1_* API */
#endif
#ifndef SLIP_ARCH_CONF_ENABLED
/*
* Determine whether we need SLIP
* This will keep working while UIP_FALLBACK_INTERFACE and CMD_CONF_OUTPUT
* keep using SLIP
*/
#if defined(UIP_FALLBACK_INTERFACE) || defined(CMD_CONF_OUTPUT)
#define SLIP_ARCH_CONF_ENABLED 1
#endif
#endif
/**
* \brief Define this as 1 to build a headless node.
*
* The UART will not be initialised its clock will be gated, offering some
* energy savings. The USB will not be initialised either
*/
#ifndef CC2538_CONF_QUIET
#define CC2538_CONF_QUIET 0
#endif
/* CC2538_CONF_QUIET is hard and overrides all other related defines */
#if CC2538_CONF_QUIET
#undef USB_SERIAL_CONF_ENABLE
#define USB_SERIAL_CONF_ENABLE 0
#undef UART_CONF_ENABLE
#define UART_CONF_ENABLE 0
#endif /* CC2538_CONF_QUIET */
/**
* \brief Enable the USB core only if we need it
*/
#ifndef USB_SERIAL_CONF_ENABLE
#define USB_SERIAL_CONF_ENABLE \
((SLIP_ARCH_CONF_USB && SLIP_ARCH_CONF_ENABLED) || \
(MAC_CONF_WITH_TSCH && (SLIP_ARCH_CONF_ENABLED || BUILD_WITH_SHELL)) || \
DBG_CONF_USB)
#endif
/*
* If debugging and SLIP use the same peripheral, this will be 1. Don't modify
* this
*/
#if SLIP_ARCH_CONF_ENABLED
#define DBG_CONF_SLIP_MUX (SLIP_ARCH_CONF_USB == DBG_CONF_USB && \
(SLIP_ARCH_CONF_USB || \
SLIP_ARCH_CONF_UART == DBG_CONF_UART))
#endif
/*
* Automatic detection of whether a specific UART is in use
*/
#define UART_IN_USE_BY_SERIAL_LINE(u) (SERIAL_LINE_CONF_UART == (u))
#define UART_IN_USE_BY_SLIP(u) (SLIP_ARCH_CONF_ENABLED && \
!SLIP_ARCH_CONF_USB && \
SLIP_ARCH_CONF_UART == (u))
#define UART_IN_USE_BY_DBG(u) (!DBG_CONF_USB && DBG_CONF_UART == (u))
#define UART_IN_USE_BY_UART1(u) (UART1_CONF_UART == (u))
#define UART_IN_USE(u) ( \
UART_CONF_ENABLE && \
(UART_IN_USE_BY_SERIAL_LINE(u) || \
UART_IN_USE_BY_SLIP(u) || \
UART_IN_USE_BY_DBG(u) || \
UART_IN_USE_BY_UART1(u)) \
)
/** @} */
/*---------------------------------------------------------------------------*/
/* board.h assumes that basic configuration is done */
#include "board.h"
/*---------------------------------------------------------------------------*/
/**
* \name Radio Configuration
*
* @{
*/
#ifndef NETSTACK_CONF_RADIO
#define NETSTACK_CONF_RADIO cc2538_rf_driver
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name LPM configuration
* @{
*/
#ifndef LPM_CONF_ENABLE
#define LPM_CONF_ENABLE 1 /**< Set to 0 to disable LPM entirely */
#endif
/**
* \brief Maximum PM
*
* The SoC will never drop to a Power Mode deeper than the one specified here.
* 0 for PM0, 1 for PM1 and 2 for PM2
*/
#ifndef LPM_CONF_MAX_PM
#define LPM_CONF_MAX_PM 1
#endif
#ifndef LPM_CONF_STATS
#define LPM_CONF_STATS 0 /**< Set to 1 to enable LPM-related stats */
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name IEEE address configuration
*
* Used to generate our link-layer & IPv6 address
* @{
*/
/**
* \brief Location of the IEEE address
* 0 => Read from InfoPage,
* 1 => Use a hardcoded address, configured by IEEE_ADDR_CONF_ADDRESS
*/
#ifndef IEEE_ADDR_CONF_HARDCODED
#define IEEE_ADDR_CONF_HARDCODED 0
#endif
/**
* \brief The hardcoded IEEE address to be used when IEEE_ADDR_CONF_HARDCODED
* is defined as 1
*/
#ifndef IEEE_ADDR_CONF_ADDRESS
#define IEEE_ADDR_CONF_ADDRESS { 0x00, 0x12, 0x4B, 0x00, 0x89, 0xAB, 0xCD, 0xEF }
#endif
/**
* \brief Location of the IEEE address in the InfoPage when
* IEEE_ADDR_CONF_HARDCODED is defined as 0
* 0 => Use the primary address location
* 1 => Use the secondary address location
*/
#ifndef IEEE_ADDR_CONF_USE_SECONDARY_LOCATION
#define IEEE_ADDR_CONF_USE_SECONDARY_LOCATION 0
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name RF configuration
*
* @{
*/
/* RF Config */
#ifdef RF_CHANNEL
#define CC2538_RF_CONF_CHANNEL RF_CHANNEL
#endif
#ifndef CC2538_RF_CONF_CHANNEL
#define CC2538_RF_CONF_CHANNEL 26
#endif /* CC2538_RF_CONF_CHANNEL */
#ifndef CC2538_RF_CONF_AUTOACK
#define CC2538_RF_CONF_AUTOACK 1 /**< RF H/W generates ACKs */
#endif /* CC2538_CONF_AUTOACK */
#ifndef CC2538_RF_CONF_TX_USE_DMA
#define CC2538_RF_CONF_TX_USE_DMA 1 /**< RF TX over DMA */
#endif
#ifndef CC2538_RF_CONF_RX_USE_DMA
#define CC2538_RF_CONF_RX_USE_DMA 1 /**< RF RX over DMA */
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name Security
*
* @{
*/
#ifndef CRYPTO_CONF_INIT
#define CRYPTO_CONF_INIT 1 /**< Whether to init cryptoprocessor */
#endif
#ifndef AES_128_CONF
#define AES_128_CONF cc2538_aes_128_driver /**< AES-128 driver */
#endif
#ifndef CCM_STAR_CONF
#define CCM_STAR_CONF cc2538_ccm_star_driver /**< AES-CCM* driver */
#endif
/** @} */
/* Include CPU-related configuration */
#include "cc2538-conf.h"
/*---------------------------------------------------------------------------*/
#endif /* CONTIKI_CONF_H_ */
/*---------------------------------------------------------------------------*/

View File

@ -7,12 +7,14 @@
#ifdef PROJECT_CONF_PATH
#include PROJECT_CONF_PATH
#endif /* PROJECT_CONF_PATH */
#ifdef PLATFORM_CONF_H
#include PLATFORM_CONF_H
#else
#include "platform-conf.h"
#endif /* PLATFORM_CONF_H */
/*---------------------------------------------------------------------------*/
#include "sky-def.h"
#include "msp430-def.h"
/*---------------------------------------------------------------------------*/
/* Map RF_CHANNEL to cc2420 default channel */
#ifdef RF_CHANNEL
#define CC2420_CONF_CHANNEL RF_CHANNEL
#endif /* RF_CHANNEL */
/* Configure radio driver */
#ifndef NETSTACK_CONF_RADIO
@ -30,12 +32,16 @@
#define UIP_CONF_BUFFER_SIZE 240
#endif
/* Platform-specific checksum implementation */
#define UIP_ARCH_IPCHKSUM 1
/* Platform-specific (H/W) AES implementation */
#ifndef AES_128_CONF
#define AES_128_CONF cc2420_aes_128_driver
#endif /* AES_128_CONF */
/* Disable the stack check library by default: .rom overflow otherwise */
#ifndef STACK_CHECK_CONF_ENABLED
#define STACK_CHECK_CONF_ENABLED 0
#endif
/*---------------------------------------------------------------------------*/
#include "msp430-conf.h"
/*---------------------------------------------------------------------------*/
#endif /* CONTIKI_CONF_H */

View File

@ -36,16 +36,13 @@
* Joakim Eriksson <joakime@sics.se>
*/
#ifndef PLATFORM_CONF_H_
#define PLATFORM_CONF_H_
#ifndef SKY_DEF_H_
#define SKY_DEF_H_
/*
* Definitions below are dictated by the hardware and not really
* changeable!
*/
/* Platform TMOTE_SKY */
#define TMOTE_SKY 1
/* Delay between GO signal and SFD: radio fixed delay + 4Bytes preample + 1B SFD -- 1Byte time is 32us
* ~327us + 129preample = 456 us */
#define RADIO_DELAY_BEFORE_TX ((unsigned)US_TO_RTIMERTICKS(456))
@ -62,31 +59,9 @@
#define PLATFORM_HAS_SHT11 1
#define PLATFORM_HAS_RADIO 1
/* Map RF_CHANNEL to cc2420 default channel */
#ifdef RF_CHANNEL
#define CC2420_CONF_CHANNEL RF_CHANNEL
#endif /* RF_CHANNEL */
/* CPU target speed in Hz */
#define F_CPU 3900000uL /*2457600uL*/
/* Our clock resolution, this is the same as Unix HZ. */
#define CLOCK_CONF_SECOND 128UL
#define BAUD2UBR(baud) ((F_CPU/baud))
#define CCIF
#define CLIF
#define HAVE_STDINT_H
#include "msp430def.h"
/* Types for clocks and uip_stats */
typedef unsigned short uip_stats_t;
typedef unsigned long clock_time_t;
typedef long off_t;
/* the low-level radio driver */
#define NETSTACK_CONF_RADIO cc2420_driver
@ -233,9 +208,4 @@ for SFD timestamping */
/* Platform-specific define for the end of the stack region */
#define STACK_CONF_ORIGIN ((void *)0x3900)
/* Disable the stack check library by default: .rom overflow otherwise */
#ifndef STACK_CHECK_CONF_ENABLED
#define STACK_CHECK_CONF_ENABLED 0
#endif
#endif /* PLATFORM_CONF_H_ */
#endif /* SKY_DEF_H_ */

View File

@ -44,164 +44,7 @@
#include PROJECT_CONF_PATH
#endif /* PROJECT_CONF_PATH */
/*---------------------------------------------------------------------------*/
/**
* \name Network Stack Configuration
*
* @{
*/
/*
* If set, the systems keeps the HF crystal oscillator on even when the radio is off.
* You need to set this to 1 to use TSCH with its default 2.2ms or larger guard time.
*/
#ifndef CC2650_FAST_RADIO_STARTUP
#define CC2650_FAST_RADIO_STARTUP (MAC_CONF_WITH_TSCH)
#endif
#ifdef RF_CHANNEL
#define RF_CORE_CONF_CHANNEL RF_CHANNEL
#endif
#ifndef RF_CORE_CONF_CHANNEL
#define RF_CORE_CONF_CHANNEL 25
#endif
/* Number of Prop Mode RX buffers */
#ifndef PROP_MODE_CONF_RX_BUF_CNT
#define PROP_MODE_CONF_RX_BUF_CNT 4
#endif
/*
* Auto-configure Prop-mode radio if we are running on CC13xx, unless the
* project has specified otherwise. Depending on the final mode, determine a
* default channel (again, if unspecified) and configure RDC params
*/
#if CPU_FAMILY_CC13XX
#ifndef CC13XX_CONF_PROP_MODE
#define CC13XX_CONF_PROP_MODE 1
#endif /* CC13XX_CONF_PROP_MODE */
#endif /* CPU_FAMILY_CC13XX */
#if CC13XX_CONF_PROP_MODE
#define NETSTACK_CONF_RADIO prop_mode_driver
#ifndef RF_CORE_CONF_CHANNEL
#define RF_CORE_CONF_CHANNEL 0
#endif
#define CSMA_CONF_ACK_WAIT_TIME (RTIMER_SECOND / 400)
#define CSMA_CONF_AFTER_ACK_DETECTED_WAIT_TIME (RTIMER_SECOND / 1000)
#define CSMA_CONF_SEND_SOFT_ACK 1
#else /* CC13XX_CONF_PROP_MODE */
#define NETSTACK_CONF_RADIO ieee_mode_driver
#define CSMA_CONF_SEND_SOFT_ACK 0
#endif /* CC13XX_CONF_PROP_MODE */
#define NETSTACK_RADIO_MAX_PAYLOAD_LEN 125
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name IEEE address configuration
*
* Used to generate our link-local & IPv6 address
* @{
*/
/**
* \brief Location of the IEEE address
* 0 => Read from InfoPage,
* 1 => Use a hardcoded address, configured by IEEE_ADDR_CONF_ADDRESS
*/
#ifndef IEEE_ADDR_CONF_HARDCODED
#define IEEE_ADDR_CONF_HARDCODED 0
#endif
/**
* \brief The hardcoded IEEE address to be used when IEEE_ADDR_CONF_HARDCODED
* is defined as 1
*/
#ifndef IEEE_ADDR_CONF_ADDRESS
#define IEEE_ADDR_CONF_ADDRESS { 0x00, 0x12, 0x4B, 0x00, 0x89, 0xAB, 0xCD, 0xEF }
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name RF configuration
*
* @{
*/
/* RF Config */
#ifndef IEEE_MODE_CONF_AUTOACK
#define IEEE_MODE_CONF_AUTOACK 1 /**< RF H/W generates ACKs */
#endif
#ifndef IEEE_MODE_CONF_PROMISCOUS
#define IEEE_MODE_CONF_PROMISCOUS 0 /**< 1 to enable promiscous mode */
#endif
#ifndef RF_BLE_CONF_ENABLED
#define RF_BLE_CONF_ENABLED 0 /**< 0 to disable BLE support */
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name Character I/O Configuration
*
* @{
*/
#ifndef CC26XX_UART_CONF_ENABLE
#define CC26XX_UART_CONF_ENABLE 1 /**< Enable/Disable UART I/O */
#endif
#ifndef CC26XX_UART_CONF_BAUD_RATE
#define CC26XX_UART_CONF_BAUD_RATE 115200 /**< Default UART0 baud rate */
#endif
/* Enable I/O over the Debugger Devpack - Only relevant for the SensorTag */
#ifndef BOARD_CONF_DEBUGGER_DEVPACK
#define BOARD_CONF_DEBUGGER_DEVPACK 1
#endif
#ifndef SLIP_ARCH_CONF_ENABLED
/*
* Determine whether we need SLIP
* This will keep working while UIP_FALLBACK_INTERFACE and CMD_CONF_OUTPUT
* keep using SLIP
*/
#if defined(UIP_FALLBACK_INTERFACE) || defined(CMD_CONF_OUTPUT)
#define SLIP_ARCH_CONF_ENABLED 1
#endif
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name JTAG interface configuration
*
* Enable/Disable the JTAG DAP and TAP interfaces on the chip.
* Setting this to 0 will disable access to the debug interface
* to secure deployed images.
* @{
*/
#ifndef CCXXWARE_CONF_JTAG_INTERFACE_ENABLE
#define CCXXWARE_CONF_JTAG_INTERFACE_ENABLE 1
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name ROM Bootloader configuration
*
* Enable/Disable the ROM bootloader in your image, if the board supports it.
* Look in board.h to choose the DIO and corresponding level that will cause
* the chip to enter bootloader mode.
* @{
*/
#ifndef ROM_BOOTLOADER_ENABLE
#define ROM_BOOTLOADER_ENABLE 0
#endif
/** @} */
#include "cc13xx-cc26xx-def.h"
/*---------------------------------------------------------------------------*/
/**
* \name Button configurations
@ -227,95 +70,12 @@
/* Platform-specific define to signify sensor reading failure */
#define CC26XX_SENSOR_READING_ERROR 0x80000000
/*---------------------------------------------------------------------------*/
/**
* \name Compiler configuration and platform-specific type definitions
*
* Those values are not meant to be modified by the user
* @{
*/
#define CLOCK_CONF_SECOND 128
/* Compiler configurations */
#define CCIF
#define CLIF
/* Platform typedefs */
typedef uint32_t clock_time_t;
typedef uint32_t uip_stats_t;
/* Clock (time) comparison macro */
#define CLOCK_LT(a, b) ((signed long)((a) - (b)) < 0)
/*
* rtimer.h typedefs rtimer_clock_t as unsigned short. We need to define
* RTIMER_CLOCK_DIFF to override this
*/
typedef uint32_t rtimer_clock_t;
#define RTIMER_CLOCK_DIFF(a, b) ((int32_t)((a) - (b)))
/* --------------------------------------------------------------------- */
/* TSCH related defines */
/* Delay between GO signal and SFD */
#define RADIO_DELAY_BEFORE_TX ((unsigned)US_TO_RTIMERTICKS(81))
/* Delay between GO signal and start listening.
* This value is so small because the radio is constantly on within each timeslot. */
#define RADIO_DELAY_BEFORE_RX ((unsigned)US_TO_RTIMERTICKS(15))
/* Delay between the SFD finishes arriving and it is detected in software. */
#define RADIO_DELAY_BEFORE_DETECT ((unsigned)US_TO_RTIMERTICKS(352))
/* Timer conversion; radio is running at 4 MHz */
#define RADIO_TIMER_SECOND 4000000u
#if (RTIMER_SECOND % 256) || (RADIO_TIMER_SECOND % 256)
#error RADIO_TO_RTIMER macro must be fixed!
#endif
#define RADIO_TO_RTIMER(X) ((uint32_t)(((uint64_t)(X) * (RTIMER_SECOND / 256)) / (RADIO_TIMER_SECOND / 256)))
#define USEC_TO_RADIO(X) ((X) * 4)
/* The PHY header (preamble + SFD, 4+1 bytes) duration is equivalent to 10 symbols */
#define RADIO_IEEE_802154_PHY_HEADER_DURATION_USEC 160
/* Do not turn off TSCH within a timeslot: not enough time */
#define TSCH_CONF_RADIO_ON_DURING_TIMESLOT 1
/* Disable TSCH frame filtering */
#define TSCH_CONF_HW_FRAME_FILTERING 0
/* Use hardware timestamps */
#ifndef TSCH_CONF_RESYNC_WITH_SFD_TIMESTAMPS
#define TSCH_CONF_RESYNC_WITH_SFD_TIMESTAMPS 1
#define TSCH_CONF_TIMESYNC_REMOVE_JITTER 0
#endif
#ifndef TSCH_CONF_BASE_DRIFT_PPM
/* The drift compared to "true" 10ms slots.
* Enable adaptive sync to enable compensation for this.
* Slot length 10000 usec
* 328 ticks
* Tick duration 30.517578125 usec
* Real slot duration 10009.765625 usec
* Target - real duration = -9.765625 usec
* TSCH_CONF_BASE_DRIFT_PPM -977
*/
#define TSCH_CONF_BASE_DRIFT_PPM -977
#endif
/* 10 times per second */
#ifndef TSCH_CONF_CHANNEL_SCAN_DURATION
#define TSCH_CONF_CHANNEL_SCAN_DURATION (CLOCK_SECOND / 10)
#endif
/* Slightly reduce the TSCH guard time (from 2200 usec to 1800 usec) to make sure
* the CC26xx radio has sufficient time to start up. */
#ifndef TSCH_CONF_RX_WAIT
#define TSCH_CONF_RX_WAIT 1800
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/* board.h assumes that basic configuration is done */
#include "board.h"
/*---------------------------------------------------------------------------*/
/* Include CPU-related configuration */
#include "cc13xx-cc26xx-conf.h"
/*---------------------------------------------------------------------------*/
#endif /* CONTIKI_CONF_H */
/** @} */

View File

@ -53,51 +53,7 @@
#include PROJECT_CONF_PATH
#endif /* PROJECT_CONF_PATH */
/*---------------------------------------------------------------------------*/
/**
* \name Compiler configuration and platform-specific type definitions
*
* Those values are not meant to be modified by the user
* @{
*/
#define CLOCK_CONF_SECOND 128
/* Compiler configurations */
#define CCIF
#define CLIF
/* Platform typedefs */
typedef uint32_t clock_time_t;
typedef uint32_t uip_stats_t;
/*
* rtimer.h typedefs rtimer_clock_t as unsigned short. We need to define
* RTIMER_CLOCK_DIFF to override this
*/
typedef uint32_t rtimer_clock_t;
#define RTIMER_CLOCK_DIFF(a, b) ((int32_t)((a) - (b)))
/** @} */
/*---------------------------------------------------------------------------*/
/* 352us from calling transmit() until the SFD byte has been sent */
#define RADIO_DELAY_BEFORE_TX ((unsigned)US_TO_RTIMERTICKS(352))
/* 192us as in datasheet but ACKs are not always received, so adjusted to 250us */
#define RADIO_DELAY_BEFORE_RX ((unsigned)US_TO_RTIMERTICKS(250))
#define RADIO_DELAY_BEFORE_DETECT 0
#ifndef TSCH_CONF_BASE_DRIFT_PPM
/* The drift compared to "true" 10ms slots.
* Enable adaptive sync to enable compensation for this.
* Slot length 10000 usec
* 328 ticks
* Tick duration 30.517578125 usec
* Real slot duration 10009.765625 usec
* Target - real duration = -9.765625 usec
* TSCH_CONF_BASE_DRIFT_PPM -977
*/
#define TSCH_CONF_BASE_DRIFT_PPM -977
#endif
#if MAC_CONF_WITH_TSCH
#define TSCH_CONF_HW_FRAME_FILTERING 0
#endif /* MAC_CONF_WITH_TSCH */
#include "cc2538-def.h"
/*---------------------------------------------------------------------------*/
/**
* \name Serial Boot Loader Backdoor configuration
@ -127,172 +83,6 @@ typedef uint32_t rtimer_clock_t;
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name CFS configuration
*
* @{
*/
#ifndef COFFEE_CONF_SIZE
#define COFFEE_CONF_SIZE (4 * COFFEE_SECTOR_SIZE)
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name Watchdog Timer configuration
*
* @{
*/
#ifndef WATCHDOG_CONF_ENABLE
#define WATCHDOG_CONF_ENABLE 1 /**< Enable the watchdog timer */
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name USB 'core' configuration
*
* Those values are not meant to be modified by the user, except where stated
* otherwise
* @{
*/
#define CTRL_EP_SIZE 8
#define USB_EP1_SIZE 32
#define USB_EP2_SIZE 64
#define USB_EP3_SIZE 64
#define USB_ARCH_WRITE_NOTIFY 0
#ifndef USB_ARCH_CONF_DMA
#define USB_ARCH_CONF_DMA 1 /**< Change to Enable/Disable USB DMA */
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name uDMA Configuration and channel allocations
*
* @{
*/
#define USB_ARCH_CONF_RX_DMA_CHAN 0 /**< USB -> RAM DMA channel */
#define USB_ARCH_CONF_TX_DMA_CHAN 1 /**< RAM -> USB DMA channel */
#define CC2538_RF_CONF_TX_DMA_CHAN 2 /**< RF -> RAM DMA channel */
#define CC2538_RF_CONF_RX_DMA_CHAN 3 /**< RAM -> RF DMA channel */
#define UDMA_CONF_MAX_CHANNEL CC2538_RF_CONF_RX_DMA_CHAN
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name Character I/O Configuration
*
* @{
*/
#ifndef UART_CONF_ENABLE
#define UART_CONF_ENABLE 1 /**< Enable/Disable UART I/O */
#endif
#ifndef UART0_CONF_BAUD_RATE
#define UART0_CONF_BAUD_RATE 115200 /**< Default UART0 baud rate */
#endif
#ifndef UART1_CONF_BAUD_RATE
#define UART1_CONF_BAUD_RATE 115200 /**< Default UART1 baud rate */
#endif
#ifndef SLIP_ARCH_CONF_USB
#define SLIP_ARCH_CONF_USB 0 /**< SLIP over UART by default */
#endif
#ifndef DBG_CONF_USB
#define DBG_CONF_USB 0 /**< All debugging over UART by default */
#endif
#ifndef SERIAL_LINE_CONF_UART
#define SERIAL_LINE_CONF_UART 0 /**< UART to use with serial line */
#endif
#if !SLIP_ARCH_CONF_USB
#ifndef SLIP_ARCH_CONF_UART
#define SLIP_ARCH_CONF_UART 0 /**< UART to use with SLIP */
#endif
#endif
#if !DBG_CONF_USB
#ifndef DBG_CONF_UART
#define DBG_CONF_UART 0 /**< UART to use for debugging */
#endif
#endif
#ifndef UART1_CONF_UART
#define UART1_CONF_UART 0 /**< UART to use for examples relying on
the uart1_* API */
#endif
#ifndef SLIP_ARCH_CONF_ENABLED
/*
* Determine whether we need SLIP
* This will keep working while UIP_FALLBACK_INTERFACE and CMD_CONF_OUTPUT
* keep using SLIP
*/
#if defined(UIP_FALLBACK_INTERFACE) || defined(CMD_CONF_OUTPUT)
#define SLIP_ARCH_CONF_ENABLED 1
#endif
#endif
/**
* \brief Define this as 1 to build a headless node.
*
* The UART will not be initialised its clock will be gated, offering some
* energy savings. The USB will not be initialised either
*/
#ifndef CC2538_CONF_QUIET
#define CC2538_CONF_QUIET 0
#endif
/* CC2538_CONF_QUIET is hard and overrides all other related defines */
#if CC2538_CONF_QUIET
#undef USB_SERIAL_CONF_ENABLE
#define USB_SERIAL_CONF_ENABLE 0
#undef UART_CONF_ENABLE
#define UART_CONF_ENABLE 0
#endif /* CC2538_CONF_QUIET */
/**
* \brief Enable the USB core only if we need it
*/
#ifndef USB_SERIAL_CONF_ENABLE
#define USB_SERIAL_CONF_ENABLE \
((SLIP_ARCH_CONF_USB && SLIP_ARCH_CONF_ENABLED) || \
(MAC_CONF_WITH_TSCH && (SLIP_ARCH_CONF_ENABLED || BUILD_WITH_SHELL)) || \
DBG_CONF_USB)
#endif
/*
* If debugging and SLIP use the same peripheral, this will be 1. Don't modify
* this
*/
#if SLIP_ARCH_CONF_ENABLED
#define DBG_CONF_SLIP_MUX (SLIP_ARCH_CONF_USB == DBG_CONF_USB && \
(SLIP_ARCH_CONF_USB || \
SLIP_ARCH_CONF_UART == DBG_CONF_UART))
#endif
/*
* Automatic detection of whether a specific UART is in use
*/
#define UART_IN_USE_BY_SERIAL_LINE(u) (SERIAL_LINE_CONF_UART == (u))
#define UART_IN_USE_BY_SLIP(u) (SLIP_ARCH_CONF_ENABLED && \
!SLIP_ARCH_CONF_USB && \
SLIP_ARCH_CONF_UART == (u))
#define UART_IN_USE_BY_DBG(u) (!DBG_CONF_USB && DBG_CONF_UART == (u))
#define UART_IN_USE_BY_UART1(u) (UART1_CONF_UART == (u))
#define UART_IN_USE(u) ( \
UART_CONF_ENABLE && \
(UART_IN_USE_BY_SERIAL_LINE(u) || \
UART_IN_USE_BY_SLIP(u) || \
UART_IN_USE_BY_DBG(u) || \
UART_IN_USE_BY_UART1(u)) \
)
/** @} */
/*---------------------------------------------------------------------------*/
/* board.h assumes that basic configuration is done */
#include "board.h"
/*---------------------------------------------------------------------------*/
@ -363,86 +153,6 @@ typedef uint32_t rtimer_clock_t;
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name IEEE address configuration
*
* Used to generate our link-layer & IPv6 address
* @{
*/
/**
* \brief Location of the IEEE address
* 0 => Read from InfoPage,
* 1 => Use a hardcoded address, configured by IEEE_ADDR_CONF_ADDRESS
*/
#ifndef IEEE_ADDR_CONF_HARDCODED
#define IEEE_ADDR_CONF_HARDCODED 0
#endif
/**
* \brief The hardcoded IEEE address to be used when IEEE_ADDR_CONF_HARDCODED
* is defined as 1
*/
#ifndef IEEE_ADDR_CONF_ADDRESS
#define IEEE_ADDR_CONF_ADDRESS { 0x00, 0x12, 0x4B, 0x00, 0x89, 0xAB, 0xCD, 0xEF }
#endif
/**
* \brief Location of the IEEE address in the InfoPage when
* IEEE_ADDR_CONF_HARDCODED is defined as 0
* 0 => Use the primary address location
* 1 => Use the secondary address location
*/
#ifndef IEEE_ADDR_CONF_USE_SECONDARY_LOCATION
#define IEEE_ADDR_CONF_USE_SECONDARY_LOCATION 0
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name RF configuration
*
* @{
*/
/* RF Config */
#ifdef RF_CHANNEL
#define CC2538_RF_CONF_CHANNEL RF_CHANNEL
#endif
#ifndef CC2538_RF_CONF_CHANNEL
#define CC2538_RF_CONF_CHANNEL 26
#endif /* CC2538_RF_CONF_CHANNEL */
#ifndef CC2538_RF_CONF_AUTOACK
#define CC2538_RF_CONF_AUTOACK 1 /**< RF H/W generates ACKs */
#endif /* CC2538_CONF_AUTOACK */
#ifndef CC2538_RF_CONF_TX_USE_DMA
#define CC2538_RF_CONF_TX_USE_DMA 1 /**< RF TX over DMA */
#endif
#ifndef CC2538_RF_CONF_RX_USE_DMA
#define CC2538_RF_CONF_RX_USE_DMA 1 /**< RF RX over DMA */
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name Security
*
* @{
*/
#ifndef CRYPTO_CONF_INIT
#define CRYPTO_CONF_INIT 1 /**< Whether to init cryptoprocessor */
#endif
#ifndef AES_128_CONF
#define AES_128_CONF cc2538_aes_128_driver /**< AES-128 driver */
#endif
#ifndef CCM_STAR_CONF
#define CCM_STAR_CONF cc2538_ccm_star_driver /**< AES-CCM* driver */
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name RTC
*
@ -464,7 +174,9 @@ typedef uint32_t rtimer_clock_t;
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/* Include CPU-related configuration */
#include "cc2538-conf.h"
/*---------------------------------------------------------------------------*/
#endif /* CONTIKI_CONF_H_ */
/*---------------------------------------------------------------------------*/
/** @} */

View File

@ -63,7 +63,7 @@ struct dhcp_msg {
#if (UIP_BUFSIZE - UIP_UDPIP_HLEN) < 548
#error UIP_CONF_BUFFER_SIZE may be too small to accomodate DHCPv4 packets
#error Increase UIP_CONF_BUFFER_SIZE in your project-conf.h, platform-conf.h, or contiki-conf.h
#error Increase UIP_CONF_BUFFER_SIZE in your project-conf.h, or contiki-conf.h
#error A good size is 600 bytes
#endif