From 765e35ba7f08e3e9973f9d96e861336d66b9c0a9 Mon Sep 17 00:00:00 2001 From: Edvard Pettersen Date: Tue, 6 Feb 2018 18:05:51 +0100 Subject: [PATCH] Added working simplelink platform without netstack --- Makefile.include | 16 +- arch/cpu/arm/cortex-m/cm4/Makefile.cm4 | 3 +- arch/cpu/simplelink/Makefile.cc26x2_cc13x2 | 2 - arch/cpu/simplelink/Makefile.simplelink | 10 +- arch/cpu/simplelink/source/clock-arch.c | 218 ++++++++++++++++++ .../cpu/simplelink/{ => source}/rtimer-arch.c | 6 + .../cpu/simplelink/{ => source}/rtimer-arch.h | 0 arch/cpu/simplelink/source/watchdog-arch.c | 166 +++++++++++++ arch/platform/simplelink/platform.c | 46 ++-- 9 files changed, 425 insertions(+), 42 deletions(-) create mode 100644 arch/cpu/simplelink/source/clock-arch.c rename arch/cpu/simplelink/{ => source}/rtimer-arch.c (97%) rename arch/cpu/simplelink/{ => source}/rtimer-arch.h (100%) create mode 100644 arch/cpu/simplelink/source/watchdog-arch.c diff --git a/Makefile.include b/Makefile.include index 5a35b301d..55c5dd281 100644 --- a/Makefile.include +++ b/Makefile.include @@ -270,8 +270,10 @@ CONTIKI_CPU_DIRS_CONCAT = ${addprefix $(CONTIKI_CPU)/, \ $(CONTIKI_CPU_DIRS)} CONTIKI_ARCH_DIRS = ${addprefix $(CONTIKI)/, arch} -SOURCEDIRS = $(CONTIKI) $(PROJECTDIRS) $(CONTIKI_TARGET_DIRS_CONCAT) $(CONTIKI_ARCH_DIRS) \ - $(CONTIKI_CPU_DIRS_CONCAT) $(CONTIKIDIRS) $(MODULEDIRS) $(EXTERNALDIRS) ${dir $(target_makefile)} +SOURCEDIRS = $(CONTIKI) $(PROJECTDIRS) $(CONTIKI_TARGET_DIRS_CONCAT) \ + $(CONTIKI_ARCH_DIRS) $(CONTIKI_CPU_DIRS_CONCAT) \ + $(CONTIKIDIRS) $(MODULEDIRS) $(EXTERNALDIRS) \ + $(dir $(target_makefile)) vpath %.c $(SOURCEDIRS) vpath %.S $(SOURCEDIRS) @@ -496,7 +498,6 @@ endif # Cancel the predefined implict rule for compiling and linking # a single C source into a binary to force GNU make to consider # the match-anything rule below instead. -<<<<<<< HEAD %: %.c ifeq ($(PLATFORM_ACTION),skip) @@ -511,12 +512,3 @@ else %: %.$(TARGET) @ endif -======= -#%: %.c -# -## Match-anything pattern rule to allow the project makefiles to -## abstract from the actual binary name. It needs to contain some -## command in order to be a rule, not just a prerequisite. -#%: %.$(TARGET) -# @echo "match anything rule" ->>>>>>> Compiling example of dummy simplelink platform diff --git a/arch/cpu/arm/cortex-m/cm4/Makefile.cm4 b/arch/cpu/arm/cortex-m/cm4/Makefile.cm4 index d26650417..8215571e0 100644 --- a/arch/cpu/arm/cortex-m/cm4/Makefile.cm4 +++ b/arch/cpu/arm/cortex-m/cm4/Makefile.cm4 @@ -7,8 +7,7 @@ LDFLAGS += -T $(LDSCRIPT) LDFLAGS += -Wl,--gc-sections,--sort-section=alignment LDFLAGS += -Wl,-Map=$(@:.elf=-$(TARGET).map),--cref,--no-warn-mismatch -TARGET_LIBFLAGS := ${addprefix -l:,$(TARGET_LIBFILES)} -TARGET_LIBFLAGS += -gcc -lm -lnosys -lc +TARGET_LIBFLAGS := $(TARGET_LIBFILES) -gcc -lm -lnosys -lc OBJCOPY_FLAGS += --gap-fill 0xff diff --git a/arch/cpu/simplelink/Makefile.cc26x2_cc13x2 b/arch/cpu/simplelink/Makefile.cc26x2_cc13x2 index d4555ff51..5d6079f6f 100644 --- a/arch/cpu/simplelink/Makefile.cc26x2_cc13x2 +++ b/arch/cpu/simplelink/Makefile.cc26x2_cc13x2 @@ -13,6 +13,4 @@ TARGET_LIBFILES += $(SDK_DRIVERS)/lib/drivers_cc13x2.am4fg TARGET_LIBFILES += $(SDK_KERNEL)/lib/nortos_cc13x2.am4fg TARGET_LIBFILES += $(SDK_DRIVERLIB)/bin/gcc/driverlib.lib - - include $(CONTIKI)/arch/cpu/arm/cortex-m/cm4/Makefile.cm4 diff --git a/arch/cpu/simplelink/Makefile.simplelink b/arch/cpu/simplelink/Makefile.simplelink index f952b3c41..9a73e953e 100644 --- a/arch/cpu/simplelink/Makefile.simplelink +++ b/arch/cpu/simplelink/Makefile.simplelink @@ -11,7 +11,7 @@ SDK_DRIVERS := $(SDK_SOURCE)/ti/drivers SDK_KERNEL := $(SIMPLELINK_SDK)/kernel/nortos SDK_BOARDS := $(SDK_SOURCE)/ti/boards SDK_STARTUP := $(SDK_DEVICE_SOURCE)/startup_files -SDK_STARTUP_SRCS = ccfg.c +SDK_STARTUP_SRCS := ccfg.c EXTERNALDIRS += $(SDK_STARTUP) @@ -19,6 +19,7 @@ EXTERNALDIRS += $(SDK_STARTUP) ### MODULES will add some of these to the include path, but we need to add ### them earlier to prevent filename clashes with Contiki core files CFLAGS += -I$(CPU_ABS_PATH) +CFLAGS += -I$(CPU_ABS_PATH)/source CFLAGS += -I$(SDK_SOURCE) CFLAGS += -I$(SDK_DEVICE_SOURCE) CFLAGS += -I$(SDK_DEVICE_SOURCE)/inc @@ -28,6 +29,9 @@ CFLAGS += -I$(SDK_KERNEL)/posix LDFLAGS += --entry resetISR LDFLAGS += -static LDFLAGS += --specs=nano.specs +LDFLAGS += -Wl,--defsym=_stack_origin=_stack +LDFLAGS += -Wl,--defsym=_heap=__heap_start__ +LDFLAGS += -Wl,--defsym=_eheap=__heap_end__ SDK_BOARDS := @@ -51,9 +55,11 @@ endif ### CPU-dependent directories CONTIKI_ARM_DIRS += . common/dbg-io CONTIKI_CPU_DIRS += . $(addprefix ../arm/, $(CPU_DIRS)) +CONTIKI_CPU_DIRS += source ### CPU-dependent source files -CONTIKI_CPU_SOURCEFILES += rtimer-arch.c +CONTIKI_CPU_SOURCEFILES += rtimer-arch.c clock-arch.c +CONTIKI_CPU_SOURCEFILES += watchdog-arch.c # CONTIKI_CPU_SOURCEFILES += contiki-watchdog.c aux-ctrl.c # CONTIKI_CPU_SOURCEFILES += putchar.c ieee-addr.c batmon-sensor.c adc-sensor.c # CONTIKI_CPU_SOURCEFILES += slip-arch.c slip.c cc26xx-uart.c lpm.c diff --git a/arch/cpu/simplelink/source/clock-arch.c b/arch/cpu/simplelink/source/clock-arch.c new file mode 100644 index 000000000..a3b076d6e --- /dev/null +++ b/arch/cpu/simplelink/source/clock-arch.c @@ -0,0 +1,218 @@ +/* + * Copyright (c) 2014, Texas Instruments Incorporated - http://www.ti.com/ + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/*---------------------------------------------------------------------------*/ +/** + * \addtogroup cc26xx-clocks + * @{ + * + * \defgroup cc26xx-software-clock Software Clock + * + * Implementation of the clock module for the CC26xx and CC13xx. + * + * The software clock uses the facilities provided by the AON RTC driver + * @{ + * + * \file + * Software clock implementation for the TI CC13xx/CC26xx + */ +/*---------------------------------------------------------------------------*/ +#include +#include +#include +#include + +#include "contiki.h" + +/*---------------------------------------------------------------------------*/ +static volatile uint64_t count; +/*---------------------------------------------------------------------------*/ +static void +power_domain_on(void) +{ + PRCMPowerDomainOn(PRCM_DOMAIN_PERIPH); + while(PRCMPowerDomainStatus(PRCM_DOMAIN_PERIPH) != PRCM_DOMAIN_POWER_ON); +} +/*---------------------------------------------------------------------------*/ +void +clock_init(void) +{ + count = 0; + + /* + * Here, we configure GPT0 Timer A, which we subsequently use in + * clock_delay_usec + * + * We need to access registers, so firstly power up the PD and then enable + * the clock to GPT0. + */ + if(PRCMPowerDomainStatus(PRCM_DOMAIN_PERIPH) != PRCM_DOMAIN_POWER_ON) { + power_domain_on(); + } + + PRCMPeripheralRunEnable(PRCM_PERIPH_TIMER0); + PRCMLoadSet(); + while(!PRCMLoadGet()); + + /* Disable both GPT0 timers */ + HWREG(GPT0_BASE + GPT_O_CTL) &= ~(GPT_CTL_TAEN | GPT_CTL_TBEN); + + /* + * We assume that the clock is running at 48MHz, we use GPT0 Timer A, + * one-shot, countdown, prescaled by 48 gives us 1 tick per usec + */ + TimerConfigure(GPT0_BASE, TIMER_CFG_SPLIT_PAIR | TIMER_CFG_B_ONE_SHOT); + + /* Global config: split pair (2 x 16-bit wide) */ + HWREG(GPT0_BASE + GPT_O_CFG) = TIMER_CFG_SPLIT_PAIR >> 24; + + /* + * Pre-scale value 47 pre-scales by 48 + * + * ToDo: The theoretical value here should be 47 (to provide x48 prescale) + * However, 49 seems to give results much closer to the desired delay + */ + TimerPrescaleSet(GPT0_BASE, TIMER_B, 49); + + /* GPT0 / Timer B: One shot, PWM interrupt enable */ + HWREG(GPT0_BASE + GPT_O_TBMR) = + ((TIMER_CFG_B_ONE_SHOT >> 8) & 0xFF) | GPT_TBMR_TBPWMIE; + + /* enable sync with radio timer */ + HWREGBITW(AON_RTC_BASE + AON_RTC_O_CTL, AON_RTC_CTL_RTC_UPD_EN_BITN) = 1; +} +/*---------------------------------------------------------------------------*/ +static void +update_clock_variable(void) +{ + uint32_t aon_rtc_secs_now; + uint32_t aon_rtc_secs_now2; + uint16_t aon_rtc_ticks_now; + + do { + aon_rtc_secs_now = HWREG(AON_RTC_BASE + AON_RTC_O_SEC); + aon_rtc_ticks_now = HWREG(AON_RTC_BASE + AON_RTC_O_SUBSEC) >> 16; + aon_rtc_secs_now2 = HWREG(AON_RTC_BASE + AON_RTC_O_SEC); + } while(aon_rtc_secs_now != aon_rtc_secs_now2); + + /* Convert AON RTC ticks to clock tick counter */ + count = (aon_rtc_secs_now * CLOCK_SECOND) + (aon_rtc_ticks_now >> 9); +} +/*---------------------------------------------------------------------------*/ +CCIF clock_time_t +clock_time(void) +{ + update_clock_variable(); + + return (clock_time_t)(count & 0xFFFFFFFF); +} +/*---------------------------------------------------------------------------*/ +void +clock_update(void) +{ + update_clock_variable(); + + if(etimer_pending()) { + etimer_request_poll(); + } +} +/*---------------------------------------------------------------------------*/ +CCIF unsigned long +clock_seconds(void) +{ + bool interrupts_disabled; + uint32_t secs_now; + + interrupts_disabled = IntMasterDisable(); + + secs_now = AONRTCSecGet(); + + /* Re-enable interrupts */ + if(!interrupts_disabled) { + IntMasterEnable(); + } + + return (unsigned long)secs_now; +} +/*---------------------------------------------------------------------------*/ +void +clock_wait(clock_time_t i) +{ + clock_time_t start; + + start = clock_time(); + while(clock_time() - start < (clock_time_t)i); +} +/*---------------------------------------------------------------------------*/ +void +clock_delay_usec(uint16_t len) +{ + uint32_t clock_status; + + if(PRCMPowerDomainStatus(PRCM_DOMAIN_PERIPH) != + PRCM_DOMAIN_POWER_ON) { + power_domain_on(); + } + + clock_status = HWREG(PRCM_BASE + PRCM_O_GPTCLKGR) & PRCM_GPIOCLKGR_CLK_EN; + + PRCMPeripheralRunEnable(PRCM_PERIPH_TIMER0); + PRCMLoadSet(); + while(!PRCMLoadGet()); + + TimerLoadSet(GPT0_BASE, TIMER_B, len); + TimerEnable(GPT0_BASE, TIMER_B); + + /* + * Wait for TBEN to clear. CC26xxware does not provide us with a convenient + * function, hence the direct register access here + */ + while(HWREG(GPT0_BASE + GPT_O_CTL) & GPT_CTL_TBEN); + + if(clock_status == 0) { + PRCMPeripheralRunDisable(PRCM_PERIPH_TIMER0); + PRCMLoadSet(); + while(!PRCMLoadGet()); + } +} +/*---------------------------------------------------------------------------*/ +/** + * \brief Obsolete delay function but we implement it here since some code + * still uses it + */ +void +clock_delay(unsigned int i) +{ + clock_delay_usec(i); +} +/*---------------------------------------------------------------------------*/ +/** + * @} + * @} + */ diff --git a/arch/cpu/simplelink/rtimer-arch.c b/arch/cpu/simplelink/source/rtimer-arch.c similarity index 97% rename from arch/cpu/simplelink/rtimer-arch.c rename to arch/cpu/simplelink/source/rtimer-arch.c index f48cbe312..308094e48 100644 --- a/arch/cpu/simplelink/rtimer-arch.c +++ b/arch/cpu/simplelink/source/rtimer-arch.c @@ -46,6 +46,12 @@ #include + +// FIXME NB TEMPORARY HACK START +#include "radio.h" +const struct radio_driver ieee_mode_driver = { 0 }; +// FIXME NB TEMPORARY HACK END + #define RTIMER_RTC_CH AON_RTC_CH1 static ClockP_Struct gClk; diff --git a/arch/cpu/simplelink/rtimer-arch.h b/arch/cpu/simplelink/source/rtimer-arch.h similarity index 100% rename from arch/cpu/simplelink/rtimer-arch.h rename to arch/cpu/simplelink/source/rtimer-arch.h diff --git a/arch/cpu/simplelink/source/watchdog-arch.c b/arch/cpu/simplelink/source/watchdog-arch.c new file mode 100644 index 000000000..ac137e577 --- /dev/null +++ b/arch/cpu/simplelink/source/watchdog-arch.c @@ -0,0 +1,166 @@ +/* + * Copyright (c) 2014, Texas Instruments Incorporated - http://www.ti.com/ + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** + * \addtogroup cc26xx-clocks + * @{ + * + * \defgroup cc26xx-wdt CC13xx/CC26xx watchdog timer driver + * + * Driver for the CC13xx/CC26xx Watchdog Timer + * + * This file is not called watchdog.c because the filename is in use by + * TI CC26xxware/CC13xxware + * @{ + * + * \file + * Implementation of the CC13xx/CC26xx watchdog driver. + */ +#include +#include + +#include "contiki.h" +#include "dev/watchdog.h" + +#include +#include +/*---------------------------------------------------------------------------*/ +#ifdef CONTIKI_WATCHDOG_CONF_TIMER_TOP +#define CONTIKI_WATCHDOG_TIMER_TOP CONTIKI_WATCHDOG_CONF_TIMER_TOP +#else +#define CONTIKI_WATCHDOG_TIMER_TOP 0xFFFFF +#endif + +#ifdef CONTIKI_WATCHDOG_CONF_LOCK_CONFIG +#define CONTIKI_WATCHDOG_LOCK_CONFIG CONTIKI_WATCHDOG_CONF_LOCK_CONFIG +#else +#define CONTIKI_WATCHDOG_LOCK_CONFIG 1 +#endif + +#define LOCK_INTERRUPTS_DISABLED 0x01 +#define LOCK_REGISTERS_UNLOCKED 0x02 +/*---------------------------------------------------------------------------*/ +static uint32_t +unlock_config(void) +{ + uint32_t ret = 0; + bool int_status; + + if(CONTIKI_WATCHDOG_LOCK_CONFIG) { + int_status = IntMasterDisable(); + + if(WatchdogLockState()) { + ret |= LOCK_REGISTERS_UNLOCKED; + WatchdogUnlock(); + } + + ret |= (int_status) ? (0) : (LOCK_INTERRUPTS_DISABLED); + } + + return ret; +} +/*---------------------------------------------------------------------------*/ +static void +lock_config(uint32_t status) +{ + if(CONTIKI_WATCHDOG_LOCK_CONFIG) { + + if(status & LOCK_REGISTERS_UNLOCKED) { + WatchdogLock(); + } + if(status & LOCK_INTERRUPTS_DISABLED) { + IntMasterEnable(); + } + } +} +/*---------------------------------------------------------------------------*/ +/** + * \brief Initialises the CC26xx WDT + * + * Simply sets the reload counter to a default value. The WDT is not started + * yet. To start it, watchdog_start() must be called. + */ +void +watchdog_init(void) +{ + WatchdogReloadSet(CONTIKI_WATCHDOG_TIMER_TOP); + lock_config(LOCK_REGISTERS_UNLOCKED); +} +/*---------------------------------------------------------------------------*/ +/** + * \brief Starts the CC26xx WDT + */ +void +watchdog_start(void) +{ + uint32_t lock_status = unlock_config(); + + watchdog_periodic(); + WatchdogResetEnable(); + + lock_config(lock_status); +} +/*---------------------------------------------------------------------------*/ +/** + * \brief Refreshes the CC26xx WDT + */ +void +watchdog_periodic(void) +{ + WatchdogReloadSet(CONTIKI_WATCHDOG_TIMER_TOP); + WatchdogIntClear(); +} +/*---------------------------------------------------------------------------*/ +/** + * \brief Stops the WDT such that it won't timeout and cause MCU reset + */ +void +watchdog_stop(void) +{ + uint32_t lock_status = unlock_config(); + + WatchdogResetDisable(); + + lock_config(lock_status); +} +/*---------------------------------------------------------------------------*/ +/** + * \brief Manually trigger a WDT reboot + */ +void +watchdog_reboot(void) +{ + watchdog_start(); + while(1); +} +/*---------------------------------------------------------------------------*/ +/** + * @} + * @} + */ diff --git a/arch/platform/simplelink/platform.c b/arch/platform/simplelink/platform.c index 0a2fdba5c..36d7a8ac1 100644 --- a/arch/platform/simplelink/platform.c +++ b/arch/platform/simplelink/platform.c @@ -88,24 +88,24 @@ unsigned short node_id = 0; /** \brief Board specific iniatialisation */ void board_init(void); /*---------------------------------------------------------------------------*/ -//static void -//fade(unsigned char l) -//{ -// volatile int i; -// int k, j; -// for(k = 0; k < 800; ++k) { -// j = k > 400 ? 800 - k : k; -// -// leds_on(l); -// for(i = 0; i < j; ++i) { -// __asm("nop"); -// } -// leds_off(l); -// for(i = 0; i < 400 - j; ++i) { -// __asm("nop"); -// } -// } -//} +static void +fade(unsigned char l) +{ + volatile int i; + int k, j; + for(k = 0; k < 800; ++k) { + j = k > 400 ? 800 - k : k; + + GPIO_write(l, Board_GPIO_LED_ON); + for(i = 0; i < j; ++i) { + __asm("nop"); + } + GPIO_write(l, Board_GPIO_LED_OFF); + for(i = 0; i < 400 - j; ++i) { + __asm("nop"); + } + } +} /*---------------------------------------------------------------------------*/ //static void //set_rf_params(void) @@ -134,8 +134,6 @@ platform_init_stage_one() GPIO_init(); NoRTOS_start(); - GPIO_write(Board_GPIO_LED0, Board_GPIO_LED_ON); - GPIO_write(Board_GPIO_LED1, Board_GPIO_LED_OFF); // /* Enable flash cache and prefetch. */ // ti_lib_vims_mode_set(VIMS_BASE, VIMS_MODE_ENABLED); // ti_lib_vims_configure(VIMS_BASE, true, true); @@ -152,7 +150,7 @@ platform_init_stage_one() // gpio_interrupt_init(); // // leds_init(); -// fade(LEDS_RED); + fade(Board_GPIO_LED0); // // /* // * Disable I/O pad sleep mode and open I/O latches in the AON IOC interface @@ -165,7 +163,7 @@ platform_init_stage_one() // ti_lib_int_master_enable(); // // soc_rtc_init(); -// fade(LEDS_YELLOW); + fade(Board_GPIO_LED1); } /*---------------------------------------------------------------------------*/ void @@ -186,7 +184,7 @@ platform_init_stage_two() // /* Populate linkaddr_node_addr */ // ieee_addr_cpy_to(linkaddr_node_addr.u8, LINKADDR_SIZE); // -// fade(LEDS_GREEN); + fade(Board_GPIO_LED0); } /*---------------------------------------------------------------------------*/ void @@ -214,7 +212,7 @@ platform_init_stage_three() // LOG_INFO(" Node ID: %d\n", node_id); // // process_start(&sensors_process, NULL); -// fade(LEDS_ORANGE); + fade(Board_GPIO_LED1); } /*---------------------------------------------------------------------------*/ void