From 938a425949a54736863babdad14e6a00261697d6 Mon Sep 17 00:00:00 2001 From: Tommy Sparber Date: Fri, 30 Oct 2015 21:41:59 +1100 Subject: [PATCH] Cleanup trailing spaces and convert tabs to spaces This commit removes trailing spaces and converts tabs to spaces in all files affected by fix-doxygen PR. --- apps/program-handler/program-handler.c | 168 +++--- core/net/ip/uip.h | 133 ++--- core/net/ipv6/sicslowpan.c | 187 +++--- core/net/ipv6/uip-ds6-nbr.c | 20 +- core/net/ipv6/uip-ds6.c | 10 +- core/net/ipv6/uip-nd6.c | 28 +- core/net/ipv6/uip-nd6.h | 4 +- core/net/ipv6/uip6.c | 186 +++--- cpu/arm/aducrf101/Common/ADuCRF101.h | 532 +++++++++--------- cpu/arm/aducrf101/Common/radioeng.c | 380 ++++++------- cpu/arm/at91sam7s/loader/elfloader-arch-otf.h | 8 +- cpu/arm/at91sam7s/loader/elfloader-otf.h | 31 +- cpu/avr/dev/lanc111.c | 20 +- cpu/avr/minileds.c | 47 +- cpu/mc1322x/lib/printf.c | 2 +- cpu/msp430/f1xxx/clock.c | 8 +- cpu/stm32w108/hal/error.h | 2 - cpu/stm32w108/hal/micro/cortexm3/nvm.h | 56 +- cpu/stm32w108/hal/micro/cortexm3/uart.h | 14 +- .../micro/generic/compiler/platform-common.h | 44 +- cpu/stm32w108/hal/micro/micro-common.h | 1 - doc/sicslowpan-doc.txt | 52 +- doc/uip6-doc.txt | 56 +- platform/avr-ravenusb/cdc_task.c | 2 +- platform/avr-ravenusb/rng.c | 10 +- platform/cooja-ip64/contiki-cooja-ip64-main.c | 2 +- platform/cooja/contiki-cooja-main.c | 25 +- platform/wismote/dev/acc-sensor.c | 3 +- platform/wismote/dev/ext-sensor.c | 3 +- 29 files changed, 1001 insertions(+), 1033 deletions(-) diff --git a/apps/program-handler/program-handler.c b/apps/program-handler/program-handler.c index 4173d7c04..d3195084a 100644 --- a/apps/program-handler/program-handler.c +++ b/apps/program-handler/program-handler.c @@ -1,19 +1,19 @@ /* * Copyright (c) 2003, Adam Dunkels. - * All rights reserved. + * All rights reserved. * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided - * with the distribution. + * with the distribution. * 3. The name of the author may not be used to endorse or promote * products derived from this software without specific prior - * written permission. + * written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED @@ -25,7 +25,7 @@ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * This file is part of the Contiki desktop OS * @@ -35,7 +35,7 @@ /** * \file * The program handler, used for loading programs and starting the - * screensaver. + * screensaver. * \author Adam Dunkels * * The Contiki program handler is responsible for the Contiki menu and @@ -45,7 +45,7 @@ * The program handler also is responsible for starting the * screensaver when the CTK detects that it should be started. */ - + #include #include @@ -161,7 +161,7 @@ char program_handler_screensaver[20]; /*-----------------------------------------------------------------------------------*/ void program_handler_add(struct dsc *dsc, char *menuname, - unsigned char desktop) + unsigned char desktop) { contikidsc[contikidsclast++] = dsc; ctk_menuitem_add(&contikimenu, menuname); @@ -228,7 +228,7 @@ program_handler_load(char *name, char *arg) { #ifdef WITH_LOADER_ARCH struct pnarg *pnarg; - + pnarg = pnarg_copy(name, arg); if(pnarg != NULL) { process_post(&program_handler_process, LOADER_EVENT_DISPLAY_NAME, pnarg); @@ -272,17 +272,17 @@ static void make_windows(void) { ctk_window_new(&runwindow, 16, 3, "Run"); - + CTK_WIDGET_ADD(&runwindow, &namelabel); CTK_WIDGET_ADD(&runwindow, &nameentry); CTK_WIDGET_ADD(&runwindow, &loadbutton); - + CTK_WIDGET_FOCUS(&runwindow, &nameentry); - + ctk_dialog_new(&loadingdialog, 25, 1); CTK_WIDGET_ADD(&loadingdialog, &loadingmsg); CTK_WIDGET_ADD(&loadingdialog, &loadingname); - + ctk_dialog_new(&errordialog, 22, 8); CTK_WIDGET_ADD(&errordialog, &errormsg); CTK_WIDGET_ADD(&errordialog, &errorfilelabel); @@ -302,20 +302,20 @@ PROCESS_THREAD(program_handler_process, ev, data) struct dsc **dscp; PROCESS_BEGIN(); - + /* Create the menus */ ctk_menu_add(&contikimenu); #if WITH_LOADER_ARCH runmenuitem = ctk_menuitem_add(&contikimenu, "Run program..."); - + make_windows(); #endif /* WITH_LOADER_ARCH */ #if QUIT_MENU quitmenuitem = ctk_menuitem_add(&contikimenu, "Quit"); #endif /* QUIT_MENU */ - + displayname = NULL; - + #if CTK_CONF_SCREENSAVER program_handler_screensaver[0] = 0; #endif /* CTK_CONF_SCREENSAVER */ @@ -325,106 +325,106 @@ PROCESS_THREAD(program_handler_process, ev, data) if(ev == ctk_signal_button_activate) { #ifdef WITH_LOADER_ARCH if(data == (process_data_t)&loadbutton) { - ctk_window_close(&runwindow); - program_handler_load(name, NULL); + ctk_window_close(&runwindow); + program_handler_load(name, NULL); } else if(data == (process_data_t)&errorokbutton) { - ctk_dialog_close(); + ctk_dialog_close(); } #endif /* WITH_LOADER_ARCH */ #if QUIT_MENU if(data == (process_data_t)&quityesbutton) { - ctk_draw_init(); - exit(EXIT_SUCCESS); + ctk_draw_init(); + exit(EXIT_SUCCESS); } else if(data == (process_data_t)&quitnobutton) { - ctk_dialog_close(); + ctk_dialog_close(); } #endif /* QUIT_MENU */ dscp = &contikidsc[0]; - for(i = 0; i < CTK_MAXMENUITEMS; ++i) { - if(*dscp != NULL + for(i = 0; i < CTK_MAXMENUITEMS; ++i) { + if(*dscp != NULL #if CTK_CONF_ICONS - && data == (process_data_t)(*dscp)->icon + && data == (process_data_t)(*dscp)->icon #endif /* CTK_CONF_ICONS */ - ) { - RUN((*dscp)->prgname, (*dscp)->process, NULL); - break; - } - ++dscp; + ) { + RUN((*dscp)->prgname, (*dscp)->process, NULL); + break; + } + ++dscp; } } else if(ev == ctk_signal_menu_activate) { if((struct ctk_menu *)data == &contikimenu) { #if WITH_LOADER_ARCH - dsc = contikidsc[contikimenu.active]; - if(dsc != NULL) { - RUN(dsc->prgname, dsc->process, NULL); - } else if(contikimenu.active == runmenuitem) { - make_windows(); - ctk_window_close(&runwindow); - ctk_window_open(&runwindow); - CTK_WIDGET_FOCUS(&runwindow, &nameentry); - } + dsc = contikidsc[contikimenu.active]; + if(dsc != NULL) { + RUN(dsc->prgname, dsc->process, NULL); + } else if(contikimenu.active == runmenuitem) { + make_windows(); + ctk_window_close(&runwindow); + ctk_window_open(&runwindow); + CTK_WIDGET_FOCUS(&runwindow, &nameentry); + } #else /* WITH_LOADER_ARCH */ - if(contikidsc[contikimenu.active] != NULL) { - RUN(contikidsc[contikimenu.active]->prgname, - contikidsc[contikimenu.active]->process, - NULL); - } + if(contikidsc[contikimenu.active] != NULL) { + RUN(contikidsc[contikimenu.active]->prgname, + contikidsc[contikimenu.active]->process, + NULL); + } #endif /* WITH_LOADER_ARCH */ #if QUIT_MENU - if(contikimenu.active == quitmenuitem) { - ctk_dialog_new(&quitdialog, 24, 5); - CTK_WIDGET_ADD(&quitdialog, &quitdialoglabel); - CTK_WIDGET_ADD(&quitdialog, &quityesbutton); - CTK_WIDGET_ADD(&quitdialog, &quitnobutton); - CTK_WIDGET_FOCUS(&quitdialog, &quitnobutton); - ctk_dialog_open(&quitdialog); - } + if(contikimenu.active == quitmenuitem) { + ctk_dialog_new(&quitdialog, 24, 5); + CTK_WIDGET_ADD(&quitdialog, &quitdialoglabel); + CTK_WIDGET_ADD(&quitdialog, &quityesbutton); + CTK_WIDGET_ADD(&quitdialog, &quitnobutton); + CTK_WIDGET_FOCUS(&quitdialog, &quitnobutton); + ctk_dialog_open(&quitdialog); + } #endif /* QUIT_MENU */ } #if CTK_CONF_SCREENSAVER } else if(ev == ctk_signal_screensaver_start) { #if WITH_LOADER_ARCH if(program_handler_screensaver[0] != 0) { - program_handler_load(program_handler_screensaver, NULL); + program_handler_load(program_handler_screensaver, NULL); } #endif /* WITH_LOADER_ARCH */ #endif /* CTK_CONF_SCREENSAVER */ } else if(ev == LOADER_EVENT_DISPLAY_NAME) { #if WITH_LOADER_ARCH if(displayname == NULL) { - make_windows(); - - ctk_label_set_text(&loadingname, ((struct pnarg *)data)->name); - ctk_dialog_open(&loadingdialog); - process_post(&program_handler_process, LOADER_EVENT_LOAD, data); - displayname = data; + make_windows(); + + ctk_label_set_text(&loadingname, ((struct pnarg *)data)->name); + ctk_dialog_open(&loadingdialog); + process_post(&program_handler_process, LOADER_EVENT_LOAD, data); + displayname = data; } else { - /* Try again. */ - process_post(&program_handler_process, LOADER_EVENT_DISPLAY_NAME, data); + /* Try again. */ + process_post(&program_handler_process, LOADER_EVENT_DISPLAY_NAME, data); } #endif /* WITH_LOADER_ARCH */ } else if(ev == LOADER_EVENT_LOAD) { #if WITH_LOADER_ARCH if(displayname == data) { - ctk_dialog_close(); - displayname = NULL; - log_message("Loading ", ((struct pnarg *)data)->name); - err = LOADER_LOAD(((struct pnarg *)data)->name, - ((struct pnarg *)data)->arg); - if(err != LOADER_OK) { - make_windows(); - errorfilename[0] = '"'; - strncpy(errorfilename + 1, ((struct pnarg *)data)->name, - sizeof(errorfilename) - 2); - errorfilename[1 + strlen(((struct pnarg *)data)->name)] = '"'; - ctk_label_set_text(&errortype, (char *)errormsgs[err]); - ctk_dialog_open(&errordialog); - log_message((char *)errormsgs[err], errorfilename); - } - pnarg_free(data); + ctk_dialog_close(); + displayname = NULL; + log_message("Loading ", ((struct pnarg *)data)->name); + err = LOADER_LOAD(((struct pnarg *)data)->name, + ((struct pnarg *)data)->arg); + if(err != LOADER_OK) { + make_windows(); + errorfilename[0] = '"'; + strncpy(errorfilename + 1, ((struct pnarg *)data)->name, + sizeof(errorfilename) - 2); + errorfilename[1 + strlen(((struct pnarg *)data)->name)] = '"'; + ctk_label_set_text(&errortype, (char *)errormsgs[err]); + ctk_dialog_open(&errordialog); + log_message((char *)errormsgs[err], errorfilename); + } + pnarg_free(data); } else { - /* Try again. */ - process_post(&program_handler_process, LOADER_EVENT_DISPLAY_NAME, data); + /* Try again. */ + process_post(&program_handler_process, LOADER_EVENT_DISPLAY_NAME, data); } #endif /* WITH_LOADEER_ARCH */ } diff --git a/core/net/ip/uip.h b/core/net/ip/uip.h index 12861cdd9..58f201ced 100644 --- a/core/net/ip/uip.h +++ b/core/net/ip/uip.h @@ -64,17 +64,11 @@ #define UIP_TCPH_LEN 20 /* Size of TCP header */ #define UIP_ICMPH_LEN 4 /* Size of ICMP header */ -#define UIP_IPUDPH_LEN (UIP_UDPH_LEN + UIP_IPH_LEN) /* Size of IP + - * UDP - * header */ -#define UIP_IPTCPH_LEN (UIP_TCPH_LEN + UIP_IPH_LEN) /* Size of IP + - * TCP - * header */ +#define UIP_IPUDPH_LEN (UIP_UDPH_LEN + UIP_IPH_LEN) /* Size of IP + UDP header */ +#define UIP_IPTCPH_LEN (UIP_TCPH_LEN + UIP_IPH_LEN) /* Size of IP + TCP header */ #define UIP_TCPIP_HLEN UIP_IPTCPH_LEN -#define UIP_IPICMPH_LEN (UIP_IPH_LEN + UIP_ICMPH_LEN) /* size of ICMP - + IP header */ -#define UIP_LLIPH_LEN (UIP_LLH_LEN + UIP_IPH_LEN) /* size of L2 - + IP header */ +#define UIP_IPICMPH_LEN (UIP_IPH_LEN + UIP_ICMPH_LEN) /* Size of ICMP + IP header */ +#define UIP_LLIPH_LEN (UIP_LLH_LEN + UIP_IPH_LEN) /* Size of L2 + IP header */ #if NETSTACK_CONF_WITH_IPV6 /** * The sums below are quite used in ND. When used for uip_buf, we @@ -99,12 +93,12 @@ * */ typedef union uip_ip4addr_t { - uint8_t u8[4]; /* Initializer, must come first. */ + uint8_t u8[4]; /* Initializer, must come first. */ uint16_t u16[2]; } uip_ip4addr_t; typedef union uip_ip6addr_t { - uint8_t u8[16]; /* Initializer, must come first. */ + uint8_t u8[16]; /* Initializer, must come first. */ uint16_t u16[8]; } uip_ip6addr_t; @@ -1057,7 +1051,7 @@ struct uip_udp_conn *uip_udp_new(const uip_ipaddr_t *ripaddr, uint16_t rport); * \hideinitializer */ #define uip_ip4addr_cmp(addr1, addr2) ((addr1)->u16[0] == (addr2)->u16[0] && \ - (addr1)->u16[1] == (addr2)->u16[1]) + (addr1)->u16[1] == (addr2)->u16[1]) #define uip_ip6addr_cmp(addr1, addr2) (memcmp(addr1, addr2, sizeof(uip_ip6addr_t)) == 0) #if NETSTACK_CONF_WITH_IPV6 @@ -1358,26 +1352,21 @@ struct uip_conn { uint16_t lport; /**< The local TCP port, in network byte order. */ uint16_t rport; /**< The local remote TCP port, in network byte - order. */ + order. */ uint8_t rcv_nxt[4]; /**< The sequence number that we expect to - receive next. */ - uint8_t snd_nxt[4]; /**< The sequence number that was last sent by - us. */ + receive next. */ + uint8_t snd_nxt[4]; /**< The sequence number that was last sent by us. */ uint16_t len; /**< Length of the data that was previously sent. */ - uint16_t mss; /**< Current maximum segment size for the - connection. */ - uint16_t initialmss; /**< Initial maximum segment size for the - connection. */ - uint8_t sa; /**< Retransmission time-out calculation state - variable. */ - uint8_t sv; /**< Retransmission time-out calculation state - variable. */ + uint16_t mss; /**< Current maximum segment size for the connection. */ + uint16_t initialmss; /**< Initial maximum segment size for the connection. */ + uint8_t sa; /**< Retransmission time-out calculation state variable. */ + uint8_t sv; /**< Retransmission time-out calculation state variable. */ uint8_t rto; /**< Retransmission time-out. */ uint8_t tcpstateflags; /**< TCP state and flags. */ uint8_t timer; /**< The retransmission timer. */ uint8_t nrtx; /**< The number of retransmissions for the last - segment sent. */ + segment sent. */ /** The application state. */ uip_tcp_appstate_t appstate; @@ -1431,9 +1420,9 @@ struct uip_fallback_interface { void (*init)(void); /** * \retval >=0 - * in case of success + * in case of success * \retval <0 - * in case of failure + * in case of failure */ int (*output)(void); }; @@ -1464,51 +1453,43 @@ extern struct uip_stats uip_stat; */ struct uip_stats { struct { - uip_stats_t recv; /**< Number of received packets at the IP - layer. */ - uip_stats_t sent; /**< Number of sent packets at the IP - layer. */ - uip_stats_t forwarded;/**< Number of forwarded packets at the IP - layer. */ - uip_stats_t drop; /**< Number of dropped packets at the IP - layer. */ + uip_stats_t recv; /**< Number of received packets at the IP layer. */ + uip_stats_t sent; /**< Number of sent packets at the IP layer. */ + uip_stats_t forwarded;/**< Number of forwarded packets at the IP layer. */ + uip_stats_t drop; /**< Number of dropped packets at the IP layer. */ uip_stats_t vhlerr; /**< Number of packets dropped due to wrong - IP version or header length. */ + IP version or header length. */ uip_stats_t hblenerr; /**< Number of packets dropped due to wrong - IP length, high byte. */ + IP length, high byte. */ uip_stats_t lblenerr; /**< Number of packets dropped due to wrong - IP length, low byte. */ + IP length, low byte. */ uip_stats_t fragerr; /**< Number of packets dropped because they - were IP fragments. */ + were IP fragments. */ uip_stats_t chkerr; /**< Number of packets dropped due to IP - checksum errors. */ + checksum errors. */ uip_stats_t protoerr; /**< Number of packets dropped because they - were neither ICMP, UDP nor TCP. */ + were neither ICMP, UDP nor TCP. */ } ip; /**< IP statistics. */ struct { uip_stats_t recv; /**< Number of received ICMP packets. */ uip_stats_t sent; /**< Number of sent ICMP packets. */ uip_stats_t drop; /**< Number of dropped ICMP packets. */ - uip_stats_t typeerr; /**< Number of ICMP packets with a wrong - type. */ - uip_stats_t chkerr; /**< Number of ICMP packets with a bad - checksum. */ + uip_stats_t typeerr; /**< Number of ICMP packets with a wrong type. */ + uip_stats_t chkerr; /**< Number of ICMP packets with a bad checksum. */ } icmp; /**< ICMP statistics. */ #if UIP_TCP struct { uip_stats_t recv; /**< Number of recived TCP segments. */ uip_stats_t sent; /**< Number of sent TCP segments. */ uip_stats_t drop; /**< Number of dropped TCP segments. */ - uip_stats_t chkerr; /**< Number of TCP segments with a bad - checksum. */ - uip_stats_t ackerr; /**< Number of TCP segments with a bad ACK - number. */ + uip_stats_t chkerr; /**< Number of TCP segments with a bad checksum. */ + uip_stats_t ackerr; /**< Number of TCP segments with a bad ACK number. */ uip_stats_t rst; /**< Number of received TCP RST (reset) segments. */ uip_stats_t rexmit; /**< Number of retransmitted TCP segments. */ uip_stats_t syndrop; /**< Number of dropped SYNs because too few - connections were available. */ + connections were available. */ uip_stats_t synrst; /**< Number of SYNs for closed ports, - triggering a RST. */ + triggering a RST. */ } tcp; /**< TCP statistics. */ #endif #if UIP_UDP @@ -1517,7 +1498,7 @@ struct uip_stats { uip_stats_t recv; /**< Number of recived UDP segments. */ uip_stats_t sent; /**< Number of sent UDP segments. */ uip_stats_t chkerr; /**< Number of UDP segments with a bad - checksum. */ + checksum. */ } udp; /**< UDP statistics. */ #endif /* UIP_UDP */ #if NETSTACK_CONF_WITH_IPV6 @@ -1554,33 +1535,33 @@ CCIF extern uint8_t uip_flags; functions/macros. */ #define UIP_ACKDATA 1 /* Signifies that the outstanding data was - acked and the application should send - out new data instead of retransmitting - the last data. */ + acked and the application should send + out new data instead of retransmitting + the last data. */ #define UIP_NEWDATA 2 /* Flags the fact that the peer has sent - us new data. */ + us new data. */ #define UIP_REXMIT 4 /* Tells the application to retransmit the - data that was last sent. */ + data that was last sent. */ #define UIP_POLL 8 /* Used for polling the application, to - check if the application has data that - it wants to send. */ + check if the application has data that + it wants to send. */ #define UIP_CLOSE 16 /* The remote host has closed the - connection, thus the connection has - gone away. Or the application signals - that it wants to close the - connection. */ + connection, thus the connection has + gone away. Or the application signals + that it wants to close the + connection. */ #define UIP_ABORT 32 /* The remote host has aborted the - connection, thus the connection has - gone away. Or the application signals - that it wants to abort the - connection. */ + connection, thus the connection has + gone away. Or the application signals + that it wants to abort the + connection. */ #define UIP_CONNECTED 64 /* We have got a connection from a remote host and have set up a new connection for it, or an active connection has been successfully established. */ #define UIP_TIMEDOUT 128 /* The connection has been aborted due to - too many retransmissions. */ + too many retransmissions. */ /** @@ -1606,16 +1587,16 @@ void uip_process(uint8_t flag); the macros defined in this file. */ #define UIP_DATA 1 /* Tells uIP that there is incoming - data in the uip_buf buffer. The - length of the data is stored in the - global variable uip_len. */ + data in the uip_buf buffer. The + length of the data is stored in the + global variable uip_len. */ #define UIP_TIMER 2 /* Tells uIP that the periodic timer - has fired. */ + has fired. */ #define UIP_POLL_REQUEST 3 /* Tells uIP that a connection should - be polled. */ + be polled. */ #define UIP_UDP_SEND_CONN 4 /* Tells uIP that a UDP datagram - should be constructed in the - uip_buf buffer. */ + should be constructed in the + uip_buf buffer. */ #if UIP_UDP #define UIP_UDP_TIMER 5 #endif /* UIP_UDP */ diff --git a/core/net/ipv6/sicslowpan.c b/core/net/ipv6/sicslowpan.c index 3a870a8c5..c546ff038 100644 --- a/core/net/ipv6/sicslowpan.c +++ b/core/net/ipv6/sicslowpan.c @@ -52,9 +52,9 @@ * FOR HC-06 COMPLIANCE TODO: * -Add compression options to UDP, currently only supports * both ports compressed or both ports elided - * + * * -Verify TC/FL compression works - * + * * -Add stateless multicast option */ @@ -317,7 +317,7 @@ set_packet_attrs() /** Addresses contexts for IPHC. */ #if SICSLOWPAN_CONF_MAX_ADDR_CONTEXTS > 0 -static struct sicslowpan_addr_context +static struct sicslowpan_addr_context addr_contexts[SICSLOWPAN_CONF_MAX_ADDR_CONTEXTS]; #endif @@ -381,7 +381,7 @@ addr_context_lookup_by_prefix(uip_ipaddr_t *ipaddr) static struct sicslowpan_addr_context* addr_context_lookup_by_number(uint8_t number) { -/* Remove code to avoid warnings and save flash if no context is used */ +/* Remove code to avoid warnings and save flash if no context is used */ #if SICSLOWPAN_CONF_MAX_ADDR_CONTEXTS > 0 int i; for(i = 0; i < SICSLOWPAN_CONF_MAX_ADDR_CONTEXTS; i++) { @@ -540,11 +540,11 @@ compress_hdr_hc06(linkaddr_t *link_destaddr) * We have to process both in the same time as the offset of traffic class * depends on the presence of version and flow label */ - + /* hc06 format of tc is ECN | DSCP , original is DSCP | ECN */ tmp = (UIP_IP_BUF->vtc << 4) | (UIP_IP_BUF->tcflow >> 4); tmp = ((tmp & 0x03) << 6) | (tmp >> 2); - + if(((UIP_IP_BUF->tcflow & 0x0F) == 0) && (UIP_IP_BUF->flow == 0)) { /* flow label can be compressed */ @@ -585,7 +585,7 @@ compress_hdr_hc06(linkaddr_t *link_destaddr) iphc0 |= SICSLOWPAN_IPHC_NH_C; } #endif /*UIP_CONF_UDP*/ -#ifdef SICSLOWPAN_NH_COMPRESSOR +#ifdef SICSLOWPAN_NH_COMPRESSOR if(SICSLOWPAN_NH_COMPRESSOR.is_compressable(UIP_IP_BUF->proto)) { iphc0 |= SICSLOWPAN_IPHC_NH_C; } @@ -627,7 +627,7 @@ compress_hdr_hc06(linkaddr_t *link_destaddr) != NULL) { /* elide the prefix - indicate by CID and set context + SAC */ PRINTF("IPHC: compressing src with context - setting CID & SAC ctx: %d\n", - context->number); + context->number); iphc1 |= SICSLOWPAN_IPHC_CID | SICSLOWPAN_IPHC_SAC; PACKETBUF_IPHC_BUF[2] |= context->number << 4; /* compession compare with this nodes address (source) */ @@ -636,9 +636,9 @@ compress_hdr_hc06(linkaddr_t *link_destaddr) &UIP_IP_BUF->srcipaddr, &uip_lladdr); /* No context found for this address */ } else if(uip_is_addr_linklocal(&UIP_IP_BUF->srcipaddr) && - UIP_IP_BUF->destipaddr.u16[1] == 0 && - UIP_IP_BUF->destipaddr.u16[2] == 0 && - UIP_IP_BUF->destipaddr.u16[3] == 0) { + UIP_IP_BUF->destipaddr.u16[1] == 0 && + UIP_IP_BUF->destipaddr.u16[2] == 0 && + UIP_IP_BUF->destipaddr.u16[3] == 0) { iphc1 |= compress_addr_64(SICSLOWPAN_IPHC_SAM_BIT, &UIP_IP_BUF->srcipaddr, &uip_lladdr); } else { @@ -684,12 +684,13 @@ compress_hdr_hc06(linkaddr_t *link_destaddr) /* compession compare with link adress (destination) */ iphc1 |= compress_addr_64(SICSLOWPAN_IPHC_DAM_BIT, - &UIP_IP_BUF->destipaddr, (uip_lladdr_t *)link_destaddr); + &UIP_IP_BUF->destipaddr, + (uip_lladdr_t *)link_destaddr); /* No context found for this address */ } else if(uip_is_addr_linklocal(&UIP_IP_BUF->destipaddr) && - UIP_IP_BUF->destipaddr.u16[1] == 0 && - UIP_IP_BUF->destipaddr.u16[2] == 0 && - UIP_IP_BUF->destipaddr.u16[3] == 0) { + UIP_IP_BUF->destipaddr.u16[1] == 0 && + UIP_IP_BUF->destipaddr.u16[2] == 0 && + UIP_IP_BUF->destipaddr.u16[3] == 0) { iphc1 |= compress_addr_64(SICSLOWPAN_IPHC_DAM_BIT, &UIP_IP_BUF->destipaddr, (uip_lladdr_t *)link_destaddr); } else { @@ -706,7 +707,7 @@ compress_hdr_hc06(linkaddr_t *link_destaddr) /* UDP header compression */ if(UIP_IP_BUF->proto == UIP_PROTO_UDP) { PRINTF("IPHC: Uncompressed UDP ports on send side: %x, %x\n", - UIP_HTONS(UIP_UDP_BUF->srcport), UIP_HTONS(UIP_UDP_BUF->destport)); + UIP_HTONS(UIP_UDP_BUF->srcport), UIP_HTONS(UIP_UDP_BUF->destport)); /* Mask out the last 4 bits can be used as a mask */ if(((UIP_HTONS(UIP_UDP_BUF->srcport) & 0xfff0) == SICSLOWPAN_UDP_4_BIT_PORT_MIN) && ((UIP_HTONS(UIP_UDP_BUF->destport) & 0xfff0) == SICSLOWPAN_UDP_4_BIT_PORT_MIN)) { @@ -714,10 +715,10 @@ compress_hdr_hc06(linkaddr_t *link_destaddr) *hc06_ptr = SICSLOWPAN_NHC_UDP_CS_P_11; PRINTF("IPHC: remove 12 b of both source & dest with prefix 0xFOB\n"); *(hc06_ptr + 1) = - (uint8_t)((UIP_HTONS(UIP_UDP_BUF->srcport) - - SICSLOWPAN_UDP_4_BIT_PORT_MIN) << 4) + - (uint8_t)((UIP_HTONS(UIP_UDP_BUF->destport) - - SICSLOWPAN_UDP_4_BIT_PORT_MIN)); + (uint8_t)((UIP_HTONS(UIP_UDP_BUF->srcport) - + SICSLOWPAN_UDP_4_BIT_PORT_MIN) << 4) + + (uint8_t)((UIP_HTONS(UIP_UDP_BUF->destport) - + SICSLOWPAN_UDP_4_BIT_PORT_MIN)); hc06_ptr += 2; } else if((UIP_HTONS(UIP_UDP_BUF->destport) & 0xff00) == SICSLOWPAN_UDP_8_BIT_PORT_MIN) { /* we can compress 8 bits of dest, leave source. */ @@ -725,16 +726,16 @@ compress_hdr_hc06(linkaddr_t *link_destaddr) PRINTF("IPHC: leave source, remove 8 bits of dest with prefix 0xF0\n"); memcpy(hc06_ptr + 1, &UIP_UDP_BUF->srcport, 2); *(hc06_ptr + 3) = - (uint8_t)((UIP_HTONS(UIP_UDP_BUF->destport) - - SICSLOWPAN_UDP_8_BIT_PORT_MIN)); + (uint8_t)((UIP_HTONS(UIP_UDP_BUF->destport) - + SICSLOWPAN_UDP_8_BIT_PORT_MIN)); hc06_ptr += 4; } else if((UIP_HTONS(UIP_UDP_BUF->srcport) & 0xff00) == SICSLOWPAN_UDP_8_BIT_PORT_MIN) { /* we can compress 8 bits of src, leave dest. Copy compressed port */ *hc06_ptr = SICSLOWPAN_NHC_UDP_CS_P_10; PRINTF("IPHC: remove 8 bits of source with prefix 0xF0, leave dest. hch: %i\n", *hc06_ptr); *(hc06_ptr + 1) = - (uint8_t)((UIP_HTONS(UIP_UDP_BUF->srcport) - - SICSLOWPAN_UDP_8_BIT_PORT_MIN)); + (uint8_t)((UIP_HTONS(UIP_UDP_BUF->srcport) - + SICSLOWPAN_UDP_8_BIT_PORT_MIN)); memcpy(hc06_ptr + 2, &UIP_UDP_BUF->destport, 2); hc06_ptr += 4; } else { @@ -811,13 +812,13 @@ uncompress_hdr_hc06(uint16_t ip_len) SICSLOWPAN_IP_BUF->vtc = 0x60 | ((tmp >> 2) & 0x0f); /* ECN rolled down two steps + lowest DSCP bits at top two bits */ SICSLOWPAN_IP_BUF->tcflow = ((tmp >> 2) & 0x30) | (tmp << 6) | - (SICSLOWPAN_IP_BUF->tcflow & 0x0f); + (SICSLOWPAN_IP_BUF->tcflow & 0x0f); } else { /* Traffic class is compressed (set version and no TC)*/ SICSLOWPAN_IP_BUF->vtc = 0x60; /* highest flow label bits + ECN bits */ SICSLOWPAN_IP_BUF->tcflow = (*hc06_ptr & 0x0F) | - ((*hc06_ptr >> 2) & 0x30); + ((*hc06_ptr >> 2) & 0x30); memcpy(&SICSLOWPAN_IP_BUF->flow, hc06_ptr + 1, 2); hc06_ptr += 3; } @@ -908,14 +909,13 @@ uncompress_hdr_hc06(uint16_t ip_len) /* no multicast */ /* Context based */ if(iphc1 & SICSLOWPAN_IPHC_DAC) { - uint8_t dci = (iphc1 & SICSLOWPAN_IPHC_CID) ? - PACKETBUF_IPHC_BUF[2] & 0x0f : 0; + uint8_t dci = (iphc1 & SICSLOWPAN_IPHC_CID) ? PACKETBUF_IPHC_BUF[2] & 0x0f : 0; context = addr_context_lookup_by_number(dci); /* all valid cases below need the context! */ if(context == NULL) { - PRINTF("sicslowpan uncompress_hdr: error context not found\n"); - return; + PRINTF("sicslowpan uncompress_hdr: error context not found\n"); + return; } uncompress_addr(&SICSLOWPAN_IP_BUF->destipaddr, context->prefix, unc_ctxconf[tmp], @@ -939,56 +939,56 @@ uncompress_hdr_hc06(uint16_t ip_len) PRINTF("IPHC: Incoming header value: %i\n", *hc06_ptr); switch(*hc06_ptr & SICSLOWPAN_NHC_UDP_CS_P_11) { case SICSLOWPAN_NHC_UDP_CS_P_00: - /* 1 byte for NHC, 4 byte for ports, 2 bytes chksum */ - memcpy(&SICSLOWPAN_UDP_BUF->srcport, hc06_ptr + 1, 2); - memcpy(&SICSLOWPAN_UDP_BUF->destport, hc06_ptr + 3, 2); - PRINTF("IPHC: Uncompressed UDP ports (ptr+5): %x, %x\n", - UIP_HTONS(SICSLOWPAN_UDP_BUF->srcport), UIP_HTONS(SICSLOWPAN_UDP_BUF->destport)); - hc06_ptr += 5; - break; + /* 1 byte for NHC, 4 byte for ports, 2 bytes chksum */ + memcpy(&SICSLOWPAN_UDP_BUF->srcport, hc06_ptr + 1, 2); + memcpy(&SICSLOWPAN_UDP_BUF->destport, hc06_ptr + 3, 2); + PRINTF("IPHC: Uncompressed UDP ports (ptr+5): %x, %x\n", + UIP_HTONS(SICSLOWPAN_UDP_BUF->srcport), UIP_HTONS(SICSLOWPAN_UDP_BUF->destport)); + hc06_ptr += 5; + break; case SICSLOWPAN_NHC_UDP_CS_P_01: /* 1 byte for NHC + source 16bit inline, dest = 0xF0 + 8 bit inline */ - PRINTF("IPHC: Decompressing destination\n"); - memcpy(&SICSLOWPAN_UDP_BUF->srcport, hc06_ptr + 1, 2); - SICSLOWPAN_UDP_BUF->destport = UIP_HTONS(SICSLOWPAN_UDP_8_BIT_PORT_MIN + (*(hc06_ptr + 3))); - PRINTF("IPHC: Uncompressed UDP ports (ptr+4): %x, %x\n", - UIP_HTONS(SICSLOWPAN_UDP_BUF->srcport), UIP_HTONS(SICSLOWPAN_UDP_BUF->destport)); - hc06_ptr += 4; - break; + PRINTF("IPHC: Decompressing destination\n"); + memcpy(&SICSLOWPAN_UDP_BUF->srcport, hc06_ptr + 1, 2); + SICSLOWPAN_UDP_BUF->destport = UIP_HTONS(SICSLOWPAN_UDP_8_BIT_PORT_MIN + (*(hc06_ptr + 3))); + PRINTF("IPHC: Uncompressed UDP ports (ptr+4): %x, %x\n", + UIP_HTONS(SICSLOWPAN_UDP_BUF->srcport), UIP_HTONS(SICSLOWPAN_UDP_BUF->destport)); + hc06_ptr += 4; + break; case SICSLOWPAN_NHC_UDP_CS_P_10: /* 1 byte for NHC + source = 0xF0 + 8bit inline, dest = 16 bit inline*/ - PRINTF("IPHC: Decompressing source\n"); - SICSLOWPAN_UDP_BUF->srcport = UIP_HTONS(SICSLOWPAN_UDP_8_BIT_PORT_MIN + - (*(hc06_ptr + 1))); - memcpy(&SICSLOWPAN_UDP_BUF->destport, hc06_ptr + 2, 2); - PRINTF("IPHC: Uncompressed UDP ports (ptr+4): %x, %x\n", - UIP_HTONS(SICSLOWPAN_UDP_BUF->srcport), UIP_HTONS(SICSLOWPAN_UDP_BUF->destport)); - hc06_ptr += 4; - break; + PRINTF("IPHC: Decompressing source\n"); + SICSLOWPAN_UDP_BUF->srcport = UIP_HTONS(SICSLOWPAN_UDP_8_BIT_PORT_MIN + + (*(hc06_ptr + 1))); + memcpy(&SICSLOWPAN_UDP_BUF->destport, hc06_ptr + 2, 2); + PRINTF("IPHC: Uncompressed UDP ports (ptr+4): %x, %x\n", + UIP_HTONS(SICSLOWPAN_UDP_BUF->srcport), UIP_HTONS(SICSLOWPAN_UDP_BUF->destport)); + hc06_ptr += 4; + break; case SICSLOWPAN_NHC_UDP_CS_P_11: - /* 1 byte for NHC, 1 byte for ports */ - SICSLOWPAN_UDP_BUF->srcport = UIP_HTONS(SICSLOWPAN_UDP_4_BIT_PORT_MIN + - (*(hc06_ptr + 1) >> 4)); - SICSLOWPAN_UDP_BUF->destport = UIP_HTONS(SICSLOWPAN_UDP_4_BIT_PORT_MIN + - ((*(hc06_ptr + 1)) & 0x0F)); - PRINTF("IPHC: Uncompressed UDP ports (ptr+2): %x, %x\n", - UIP_HTONS(SICSLOWPAN_UDP_BUF->srcport), UIP_HTONS(SICSLOWPAN_UDP_BUF->destport)); - hc06_ptr += 2; - break; + /* 1 byte for NHC, 1 byte for ports */ + SICSLOWPAN_UDP_BUF->srcport = UIP_HTONS(SICSLOWPAN_UDP_4_BIT_PORT_MIN + + (*(hc06_ptr + 1) >> 4)); + SICSLOWPAN_UDP_BUF->destport = UIP_HTONS(SICSLOWPAN_UDP_4_BIT_PORT_MIN + + ((*(hc06_ptr + 1)) & 0x0F)); + PRINTF("IPHC: Uncompressed UDP ports (ptr+2): %x, %x\n", + UIP_HTONS(SICSLOWPAN_UDP_BUF->srcport), UIP_HTONS(SICSLOWPAN_UDP_BUF->destport)); + hc06_ptr += 2; + break; default: - PRINTF("sicslowpan uncompress_hdr: error unsupported UDP compression\n"); - return; + PRINTF("sicslowpan uncompress_hdr: error unsupported UDP compression\n"); + return; } if(!checksum_compressed) { /* has_checksum, default */ - memcpy(&SICSLOWPAN_UDP_BUF->udpchksum, hc06_ptr, 2); - hc06_ptr += 2; - PRINTF("IPHC: sicslowpan uncompress_hdr: checksum included\n"); + memcpy(&SICSLOWPAN_UDP_BUF->udpchksum, hc06_ptr, 2); + hc06_ptr += 2; + PRINTF("IPHC: sicslowpan uncompress_hdr: checksum included\n"); } else { - PRINTF("IPHC: sicslowpan uncompress_hdr: checksum *NOT* included\n"); + PRINTF("IPHC: sicslowpan uncompress_hdr: checksum *NOT* included\n"); } uncomp_hdr_len += UIP_UDPH_LEN; } @@ -1000,7 +1000,7 @@ uncompress_hdr_hc06(uint16_t ip_len) } packetbuf_hdr_len = hc06_ptr - packetbuf_ptr; - + /* IP length field. */ if(ip_len == 0) { int len = packetbuf_datalen() - packetbuf_hdr_len + uncomp_hdr_len - UIP_IPH_LEN; @@ -1012,7 +1012,7 @@ uncompress_hdr_hc06(uint16_t ip_len) SICSLOWPAN_IP_BUF->len[0] = (ip_len - UIP_IPH_LEN) >> 8; SICSLOWPAN_IP_BUF->len[1] = (ip_len - UIP_IPH_LEN) & 0x00FF; } - + /* length field in UDP header */ if(SICSLOWPAN_IP_BUF->proto == UIP_PROTO_UDP) { memcpy(&SICSLOWPAN_UDP_BUF->udplen, &SICSLOWPAN_IP_BUF->len[0], 2); @@ -1144,7 +1144,7 @@ compress_hdr_hc1(linkaddr_t *link_destaddr) UIP_HTONS(UIP_UDP_BUF->destport) < SICSLOWPAN_UDP_PORT_MAX) { /* HC1 encoding */ PACKETBUF_HC1_HC_UDP_PTR[PACKETBUF_HC1_HC_UDP_HC1_ENCODING] = 0xFB; - + /* HC_UDP encoding, ttl, src and dest ports, checksum */ PACKETBUF_HC1_HC_UDP_PTR[PACKETBUF_HC1_HC_UDP_UDP_ENCODING] = 0xE0; PACKETBUF_HC1_HC_UDP_PTR[PACKETBUF_HC1_HC_UDP_TTL] = UIP_IP_BUF->ttl; @@ -1192,17 +1192,17 @@ uncompress_hdr_hc1(uint16_t ip_len) SICSLOWPAN_IP_BUF->vtc = 0x60; SICSLOWPAN_IP_BUF->tcflow = 0; SICSLOWPAN_IP_BUF->flow = 0; - + /* src and dest ip addresses */ uip_ip6addr(&SICSLOWPAN_IP_BUF->srcipaddr, 0xfe80, 0, 0, 0, 0, 0, 0, 0); uip_ds6_set_addr_iid(&SICSLOWPAN_IP_BUF->srcipaddr, - (uip_lladdr_t *)packetbuf_addr(PACKETBUF_ADDR_SENDER)); + (uip_lladdr_t *)packetbuf_addr(PACKETBUF_ADDR_SENDER)); uip_ip6addr(&SICSLOWPAN_IP_BUF->destipaddr, 0xfe80, 0, 0, 0, 0, 0, 0, 0); uip_ds6_set_addr_iid(&SICSLOWPAN_IP_BUF->destipaddr, - (uip_lladdr_t *)packetbuf_addr(PACKETBUF_ADDR_RECEIVER)); - + (uip_lladdr_t *)packetbuf_addr(PACKETBUF_ADDR_RECEIVER)); + uncomp_hdr_len += UIP_IPH_LEN; - + /* Next header field */ switch(PACKETBUF_HC1_PTR[PACKETBUF_HC1_ENCODING] & 0x06) { case SICSLOWPAN_HC1_NH_ICMP6: @@ -1248,7 +1248,7 @@ uncompress_hdr_hc1(uint16_t ip_len) /* this shouldn't happen, drop */ return; } - + /* IP length field. */ if(ip_len == 0) { int len = packetbuf_datalen() - packetbuf_hdr_len + uncomp_hdr_len - UIP_IPH_LEN; @@ -1412,7 +1412,7 @@ output(const uip_lladdr_t *localdest) } else { linkaddr_copy(&dest, (const linkaddr_t *)localdest); } - + PRINTFO("sicslowpan output: sending packet len %d\n", uip_len); if(uip_len >= COMPRESSION_THRESHOLD) { @@ -1512,7 +1512,7 @@ output(const uip_lladdr_t *localdest) /* set processed_ip_out_len to what we already sent from the IP payload*/ processed_ip_out_len = packetbuf_payload_len + uncomp_hdr_len; - + /* * Create following fragments * Datagram tag is already in the buffer, we need to set the @@ -1527,7 +1527,7 @@ output(const uip_lladdr_t *localdest) while(processed_ip_out_len < uip_len) { PRINTFO("sicslowpan output: fragment "); PACKETBUF_FRAG_PTR[PACKETBUF_FRAG_OFFSET] = processed_ip_out_len >> 3; - + /* Copy payload and send */ if(uip_len - processed_ip_out_len < packetbuf_payload_len) { /* last fragment */ @@ -1759,8 +1759,8 @@ input(void) PACKETBUF_HC1_PTR[PACKETBUF_HC1_DISPATCH]); return; } - - + + #if SICSLOWPAN_CONF_FRAG copypayload: #endif /*SICSLOWPAN_CONF_FRAG*/ @@ -1791,7 +1791,7 @@ input(void) } memcpy((uint8_t *)SICSLOWPAN_IP_BUF + uncomp_hdr_len + (uint16_t)(frag_offset << 3), packetbuf_ptr + packetbuf_hdr_len, packetbuf_payload_len); - + /* update processed_ip_in_len if fragment, sicslowpan_len otherwise */ #if SICSLOWPAN_CONF_FRAG @@ -1873,13 +1873,13 @@ sicslowpan_init(void) * The platform contiki-conf.h file can override this using e.g. * #define SICSLOWPAN_CONF_ADDR_CONTEXT_0 {addr_contexts[0].prefix[0]=0xbb;addr_contexts[0].prefix[1]=0xbb;} */ -#if SICSLOWPAN_CONF_MAX_ADDR_CONTEXTS > 0 +#if SICSLOWPAN_CONF_MAX_ADDR_CONTEXTS > 0 addr_contexts[0].used = 1; addr_contexts[0].number = 0; #ifdef SICSLOWPAN_CONF_ADDR_CONTEXT_0 - SICSLOWPAN_CONF_ADDR_CONTEXT_0; + SICSLOWPAN_CONF_ADDR_CONTEXT_0; #else - addr_contexts[0].prefix[0] = 0xaa; + addr_contexts[0].prefix[0] = 0xaa; addr_contexts[0].prefix[1] = 0xaa; #endif #endif /* SICSLOWPAN_CONF_MAX_ADDR_CONTEXTS > 0 */ @@ -1889,23 +1889,22 @@ sicslowpan_init(void) int i; for(i = 1; i < SICSLOWPAN_CONF_MAX_ADDR_CONTEXTS; i++) { #ifdef SICSLOWPAN_CONF_ADDR_CONTEXT_1 - if (i==1) { - addr_contexts[1].used = 1; - addr_contexts[1].number = 1; - SICSLOWPAN_CONF_ADDR_CONTEXT_1; + if (i==1) { + addr_contexts[1].used = 1; + addr_contexts[1].number = 1; + SICSLOWPAN_CONF_ADDR_CONTEXT_1; #ifdef SICSLOWPAN_CONF_ADDR_CONTEXT_2 } else if (i==2) { - addr_contexts[2].used = 1; - addr_contexts[2].number = 2; - SICSLOWPAN_CONF_ADDR_CONTEXT_2; + addr_contexts[2].used = 1; + addr_contexts[2].number = 2; + SICSLOWPAN_CONF_ADDR_CONTEXT_2; #endif } else { addr_contexts[i].used = 0; - } + } #else addr_contexts[i].used = 0; #endif /* SICSLOWPAN_CONF_ADDR_CONTEXT_1 */ - } } #endif /* SICSLOWPAN_CONF_MAX_ADDR_CONTEXTS > 1 */ diff --git a/core/net/ipv6/uip-ds6-nbr.c b/core/net/ipv6/uip-ds6-nbr.c index db14f8647..9bbd1bbd3 100644 --- a/core/net/ipv6/uip-ds6-nbr.c +++ b/core/net/ipv6/uip-ds6-nbr.c @@ -203,18 +203,18 @@ uip_ds6_link_neighbor_callback(int status, int numtx) #if UIP_DS6_LL_NUD /* From RFC4861, page 72, last paragraph of section 7.3.3: * - * "In some cases, link-specific information may indicate that a path to - * a neighbor has failed (e.g., the resetting of a virtual circuit). In - * such cases, link-specific information may be used to purge Neighbor - * Cache entries before the Neighbor Unreachability Detection would do - * so. However, link-specific information MUST NOT be used to confirm - * the reachability of a neighbor; such information does not provide - * end-to-end confirmation between neighboring IP layers." + * "In some cases, link-specific information may indicate that a path to + * a neighbor has failed (e.g., the resetting of a virtual circuit). In + * such cases, link-specific information may be used to purge Neighbor + * Cache entries before the Neighbor Unreachability Detection would do + * so. However, link-specific information MUST NOT be used to confirm + * the reachability of a neighbor; such information does not provide + * end-to-end confirmation between neighboring IP layers." * * However, we assume that receiving a link layer ack ensures the delivery - * of the transmitted packed to the IP stack of the neighbour. This is a - * fair assumption and allows battery powered nodes save some battery by - * not re-testing the state of a neighbour periodically if it + * of the transmitted packed to the IP stack of the neighbour. This is a + * fair assumption and allows battery powered nodes save some battery by + * not re-testing the state of a neighbour periodically if it * acknowledges link packets. */ if(status == MAC_TX_OK) { uip_ds6_nbr_t *nbr; diff --git a/core/net/ipv6/uip-ds6.c b/core/net/ipv6/uip-ds6.c index 148c8aa24..5202a71c5 100644 --- a/core/net/ipv6/uip-ds6.c +++ b/core/net/ipv6/uip-ds6.c @@ -297,9 +297,9 @@ uip_ds6_prefix_t * uip_ds6_prefix_lookup(uip_ipaddr_t *ipaddr, uint8_t ipaddrlen) { if(uip_ds6_list_loop((uip_ds6_element_t *)uip_ds6_prefix_list, - UIP_DS6_PREFIX_NB, sizeof(uip_ds6_prefix_t), - ipaddr, ipaddrlen, - (uip_ds6_element_t **)&locprefix) == FOUND) { + UIP_DS6_PREFIX_NB, sizeof(uip_ds6_prefix_t), + ipaddr, ipaddrlen, + (uip_ds6_element_t **)&locprefix) == FOUND) { return locprefix; } return NULL; @@ -489,8 +489,8 @@ uip_ds6_aaddr_lookup(uip_ipaddr_t *ipaddr) { #if UIP_DS6_AADDR_NB if(uip_ds6_list_loop((uip_ds6_element_t *)uip_ds6_if.aaddr_list, - UIP_DS6_AADDR_NB, sizeof(uip_ds6_aaddr_t), ipaddr, 128, - (uip_ds6_element_t **)&locaaddr) == FOUND) { + UIP_DS6_AADDR_NB, sizeof(uip_ds6_aaddr_t), ipaddr, 128, + (uip_ds6_element_t **)&locaaddr) == FOUND) { return locaaddr; } #endif /* UIP_DS6_AADDR_NB */ diff --git a/core/net/ipv6/uip-nd6.c b/core/net/ipv6/uip-nd6.c index 1b966027a..5d3c0dc8d 100644 --- a/core/net/ipv6/uip-nd6.c +++ b/core/net/ipv6/uip-nd6.c @@ -93,7 +93,7 @@ void uip_log(char *msg); /** \name Pointers to the header structures. * All pointers except UIP_IP_BUF depend on uip_ext_len, which at * packet reception, is the total length of the extension headers. - * + * * The pointer to ND6 options header also depends on nd6_opt_offset, * which we set in each function. * @@ -143,7 +143,7 @@ extract_lladdr_aligned(uip_lladdr_t *dest) { } #endif /* UIP_ND6_SEND_NA || UIP_ND6_SEND_RA || !UIP_CONF_ROUTER */ /*------------------------------------------------------------------*/ -/* create a llao */ +/* create a llao */ static void create_llao(uint8_t *llao, uint8_t type) { llao[UIP_ND6_OPT_TYPE_OFFSET] = type; @@ -361,7 +361,7 @@ uip_nd6_ns_output(uip_ipaddr_t * src, uip_ipaddr_t * dest, uip_ipaddr_t * tgt) UIP_IP_BUF->len[0] = 0; /* length will not be more than 255 */ /* * check if we add a SLLAO option: for DAD, MUST NOT, for NUD, MAY - * (here yes), for Address resolution , MUST + * (here yes), for Address resolution , MUST */ if(!(uip_ds6_is_my_addr(tgt))) { if(src != NULL) { @@ -378,7 +378,7 @@ uip_nd6_ns_output(uip_ipaddr_t * src, uip_ipaddr_t * dest, uip_ipaddr_t * tgt) UIP_ICMPH_LEN + UIP_ND6_NS_LEN + UIP_ND6_OPT_LLAO_LEN; create_llao(&uip_buf[uip_l2_l3_icmp_hdr_len + UIP_ND6_NS_LEN], - UIP_ND6_OPT_SLLAO); + UIP_ND6_OPT_SLLAO); uip_len = UIP_IPH_LEN + UIP_ICMPH_LEN + UIP_ND6_NS_LEN + UIP_ND6_OPT_LLAO_LEN; @@ -437,9 +437,9 @@ na_input(void) PRINTF("\n"); UIP_STAT(++uip_stat.nd6.recv); - /* + /* * booleans. the three last one are not 0 or 1 but 0 or 0x80, 0x40, 0x20 - * but it works. Be careful though, do not use tests such as is_router == 1 + * but it works. Be careful though, do not use tests such as is_router == 1 */ is_llchange = 0; is_router = ((UIP_ND6_NA_BUF->flagsreserved & UIP_ND6_NA_FLAG_ROUTER)); @@ -505,7 +505,7 @@ na_input(void) goto discard; } memcpy(lladdr, &nd6_opt_llao[UIP_ND6_OPT_DATA_OFFSET], - UIP_LLADDR_LEN); + UIP_LLADDR_LEN); if(is_solicited) { nbr->state = NBR_REACHABLE; nbr->nscount = 0; @@ -528,7 +528,7 @@ na_input(void) || nd6_opt_llao == 0) { if(nd6_opt_llao != 0) { memcpy(lladdr, &nd6_opt_llao[UIP_ND6_OPT_DATA_OFFSET], - UIP_LLADDR_LEN); + UIP_LLADDR_LEN); } if(is_solicited) { nbr->state = NBR_REACHABLE; @@ -564,7 +564,7 @@ na_input(void) uip_packetqueue_free(&nbr->packethandle); return; } - + #endif /*UIP_CONF_IPV6_QUEUE_PKT */ discard: @@ -590,7 +590,7 @@ rs_input(void) #if UIP_CONF_IPV6_CHECKS /* - * Check hop limit / icmp code + * Check hop limit / icmp code * target address must not be multicast * if the NA is solicited, dest must not be multicast */ @@ -796,7 +796,7 @@ uip_nd6_rs_output(void) UIP_ICMPH_LEN + UIP_ND6_RS_LEN + UIP_ND6_OPT_LLAO_LEN; create_llao(&uip_buf[uip_l2_l3_icmp_hdr_len + UIP_ND6_RS_LEN], - UIP_ND6_OPT_SLLAO); + UIP_ND6_OPT_SLLAO); } UIP_ICMP_BUF->icmpchksum = 0; @@ -877,9 +877,9 @@ ra_input(void) nbr->state = NBR_STALE; } if(memcmp(&nd6_opt_llao[UIP_ND6_OPT_DATA_OFFSET], - lladdr, UIP_LLADDR_LEN) != 0) { + lladdr, UIP_LLADDR_LEN) != 0) { memcpy(lladdr, &nd6_opt_llao[UIP_ND6_OPT_DATA_OFFSET], - UIP_LLADDR_LEN); + UIP_LLADDR_LEN); nbr->state = NBR_STALE; } nbr->isrouter = 1; @@ -937,7 +937,7 @@ ra_input(void) if((nd6_opt_prefix_info->flagsreserved1 & UIP_ND6_RA_FLAG_AUTONOMOUS) && (nd6_opt_prefix_info->validlt != 0) && (nd6_opt_prefix_info->preflen == UIP_DEFAULT_PREFIX_LEN)) { - + uip_ipaddr_copy(&ipaddr, &nd6_opt_prefix_info->prefix); uip_ds6_set_addr_iid(&ipaddr, &uip_lladdr); addr = uip_ds6_addr_lookup(&ipaddr); diff --git a/core/net/ipv6/uip-nd6.h b/core/net/ipv6/uip-nd6.h index 8b5893328..852443903 100644 --- a/core/net/ipv6/uip-nd6.h +++ b/core/net/ipv6/uip-nd6.h @@ -128,9 +128,9 @@ #endif #ifdef UIP_CONF_ND6_RETRANS_TIMER -#define UIP_ND6_RETRANS_TIMER UIP_CONF_ND6_RETRANS_TIMER +#define UIP_ND6_RETRANS_TIMER UIP_CONF_ND6_RETRANS_TIMER #else -#define UIP_ND6_RETRANS_TIMER 1000 +#define UIP_ND6_RETRANS_TIMER 1000 #endif #define UIP_ND6_DELAY_FIRST_PROBE_TIME 5 diff --git a/core/net/ipv6/uip6.c b/core/net/ipv6/uip6.c index 63858017c..5c524860d 100644 --- a/core/net/ipv6/uip6.c +++ b/core/net/ipv6/uip6.c @@ -103,7 +103,7 @@ void uip_log(char *msg); #if UIP_STATISTICS == 1 struct uip_stats uip_stat; #endif /* UIP_STATISTICS == 1 */ - + /*---------------------------------------------------------------------------*/ /** @@ -299,15 +299,15 @@ uip_add32(uint8_t *op32, uint16_t op16) uip_acc32[2] = op32[2] + (op16 >> 8); uip_acc32[1] = op32[1]; uip_acc32[0] = op32[0]; - + if(uip_acc32[2] < (op16 >> 8)) { ++uip_acc32[1]; if(uip_acc32[1] == 0) { ++uip_acc32[0]; } } - - + + if(uip_acc32[3] < (op16 & 0xff)) { ++uip_acc32[2]; if(uip_acc32[2] == 0) { @@ -332,7 +332,7 @@ chksum(uint16_t sum, const uint8_t *data, uint16_t len) dataptr = data; last_byte = data + len - 1; - + while(dataptr < last_byte) { /* At least two more bytes */ t = (dataptr[0] << 8) + dataptr[1]; sum += t; @@ -341,7 +341,7 @@ chksum(uint16_t sum, const uint8_t *data, uint16_t len) } dataptr += 2; } - + if(dataptr == last_byte) { t = (dataptr[0] << 8) + 0; sum += t; @@ -386,11 +386,11 @@ upper_layer_chksum(uint8_t proto) */ volatile uint16_t upper_layer_len; uint16_t sum; - + upper_layer_len = (((uint16_t)(UIP_IP_BUF->len[0]) << 8) + UIP_IP_BUF->len[1] - uip_ext_len); - + PRINTF("Upper layer checksum len: %d from: %d\n", upper_layer_len, - UIP_IPH_LEN + UIP_LLH_LEN + uip_ext_len); + UIP_IPH_LEN + UIP_LLH_LEN + uip_ext_len); /* First sum pseudoheader. */ /* IP protocol and length fields. This addition cannot carry. */ @@ -401,7 +401,7 @@ upper_layer_chksum(uint8_t proto) /* Sum TCP header and data. */ sum = chksum(sum, &uip_buf[UIP_IPH_LEN + UIP_LLH_LEN + uip_ext_len], upper_layer_len); - + return (sum == 0) ? 0xffff : uip_htons(sum); } /*---------------------------------------------------------------------------*/ @@ -409,7 +409,7 @@ uint16_t uip_icmp6chksum(void) { return upper_layer_chksum(UIP_PROTO_ICMP6); - + } /*---------------------------------------------------------------------------*/ #if UIP_TCP @@ -432,7 +432,7 @@ uip_udpchksum(void) void uip_init(void) { - + uip_ds6_init(); uip_icmp6_init(); uip_nd6_init(); @@ -466,7 +466,7 @@ struct uip_conn * uip_connect(const uip_ipaddr_t *ripaddr, uint16_t rport) { register struct uip_conn *conn, *cconn; - + /* Find an unused local port. */ again: ++lastport; @@ -503,7 +503,7 @@ uip_connect(const uip_ipaddr_t *ripaddr, uint16_t rport) if(conn == 0) { return 0; } - + conn->tcpstateflags = UIP_SYN_SENT; conn->snd_nxt[0] = iss[0]; @@ -517,7 +517,7 @@ uip_connect(const uip_ipaddr_t *ripaddr, uint16_t rport) conn->rcv_nxt[3] = 0; conn->initialmss = conn->mss = UIP_TCP_MSS; - + conn->len = 1; /* TCP length of the SYN is one. */ conn->nrtx = 0; conn->timer = 1; /* Send the SYN next time around. */ @@ -527,7 +527,7 @@ uip_connect(const uip_ipaddr_t *ripaddr, uint16_t rport) conn->lport = uip_htons(lastport); conn->rport = rport; uip_ipaddr_copy(&conn->ripaddr, ripaddr); - + return conn; } #endif /* UIP_TCP && UIP_ACTIVE_OPEN */ @@ -538,14 +538,14 @@ remove_ext_hdr(void) /* Remove ext header before TCP/UDP processing. */ if(uip_ext_len > 0) { PRINTF("Cutting ext-header before processing (extlen: %d, uiplen: %d)\n", - uip_ext_len, uip_len); + uip_ext_len, uip_len); if(uip_len < UIP_IPH_LEN + uip_ext_len) { PRINTF("ERROR: uip_len too short compared to ext len\n"); uip_clear_buf(); return; } memmove(((uint8_t *)UIP_TCP_BUF), (uint8_t *)UIP_TCP_BUF + uip_ext_len, - uip_len - UIP_IPH_LEN - uip_ext_len); + uip_len - UIP_IPH_LEN - uip_ext_len); uip_len -= uip_ext_len; @@ -561,7 +561,7 @@ struct uip_udp_conn * uip_udp_new(const uip_ipaddr_t *ripaddr, uint16_t rport) { register struct uip_udp_conn *conn; - + /* Find an unused local port. */ again: ++lastport; @@ -569,7 +569,7 @@ uip_udp_new(const uip_ipaddr_t *ripaddr, uint16_t rport) if(lastport >= 32000) { lastport = 4096; } - + for(c = 0; c < UIP_UDP_CONNS; ++c) { if(uip_udp_conns[c].lport == uip_htons(lastport)) { goto again; @@ -587,7 +587,7 @@ uip_udp_new(const uip_ipaddr_t *ripaddr, uint16_t rport) if(conn == 0) { return 0; } - + conn->lport = UIP_HTONS(lastport); conn->rport = rport; if(ripaddr == NULL) { @@ -596,7 +596,7 @@ uip_udp_new(const uip_ipaddr_t *ripaddr, uint16_t rport) uip_ipaddr_copy(&conn->ripaddr, ripaddr); } conn->ttl = uip_ds6_if.cur_hop_limit; - + return conn; } #endif /* UIP_UDP */ @@ -668,7 +668,7 @@ uip_reass(void) uint16_t offset=0; uint16_t len; uint16_t i; - + /* If ip_reasstmr is zero, no packet is present in the buffer */ /* We first write the unfragmentable part of IP header into the reassembly buffer. The reset the other reassembly variables. */ @@ -710,9 +710,9 @@ uip_reass(void) PRINTF("dest "); PRINT6ADDR(&FBUF->destipaddr); PRINTF("next %d\n", UIP_IP_BUF->proto); - + } - + /* If the offset or the offset + fragment length overflows the reassembly buffer, we discard the entire packet. */ if(offset > UIP_REASS_BUFSIZE || @@ -744,12 +744,12 @@ uip_reass(void) return uip_len; } } - + /* Copy the fragment into the reassembly buffer, at the right offset. */ memcpy((uint8_t *)FBUF + UIP_IPH_LEN + uip_ext_len + offset, (uint8_t *)UIP_FRAG_BUF + UIP_FRAGH_LEN, len); - + /* Update the bitmap. */ if(offset >> 6 == (offset + len) >> 6) { uip_reassbitmap[offset >> 6] |= @@ -760,18 +760,18 @@ uip_reass(void) bytes in the endpoints and fill the stuff inbetween with 0xff. */ uip_reassbitmap[offset >> 6] |= bitmap_bits[(offset >> 3) & 7]; - + for(i = (1 + (offset >> 6)); i < ((offset + len) >> 6); ++i) { uip_reassbitmap[i] = 0xff; } uip_reassbitmap[(offset + len) >> 6] |= ~bitmap_bits[((offset + len) >> 3) & 7]; } - + /* Finally, we check if we have a full packet in the buffer. We do this by checking if we have the last fragment and if all bits in the bitmap are set. */ - + if(uip_reassflags & UIP_REASS_FLAG_LASTFRAG) { /* Check all bytes up to and including all but the last byte in the bitmap. */ @@ -798,9 +798,9 @@ uip_reass(void) UIP_IP_BUF->len[1] = ((uip_reasslen - UIP_IPH_LEN) & 0xff); PRINTF("REASSEMBLED PAQUET %d (%d)\n", uip_reasslen, (UIP_IP_BUF->len[0] << 8) | UIP_IP_BUF->len[1]); - + return uip_reasslen; - + } } else { PRINTF("Already reassembling another paquet\n"); @@ -831,7 +831,7 @@ uip_reass_over(void) memcpy(UIP_IP_BUF, FBUF, UIP_IPH_LEN); /* copy the header for src and dest address*/ uip_icmp6_error_output(ICMP6_TIME_EXCEEDED, ICMP6_TIME_EXCEED_REASSEMBLY, 0); - + UIP_STAT(++uip_stat.ip.sent); uip_flags = 0; } @@ -881,14 +881,14 @@ ext_hdr_options_process(void) uip_ext_opt_offset += UIP_EXT_HDR_OPT_PADN_BUF->opt_len + 2; break; case UIP_EXT_HDR_OPT_RPL: - /* Fixes situation when a node that is not using RPL - * joins a network which does. The received packages will include the - * RPL header and processed by the "default" case of the switch - * (0x63 & 0xC0 = 0x40). Hence, the packet is discarded as the header - * is considered invalid. - * Using this fix, the header is ignored, and the next header (if - * present) is processed. - */ + /* Fixes situation when a node that is not using RPL + * joins a network which does. The received packages will include the + * RPL header and processed by the "default" case of the switch + * (0x63 & 0xC0 = 0x40). Hence, the packet is discarded as the header + * is considered invalid. + * Using this fix, the header is ignored, and the next header (if + * present) is processed. + */ #if UIP_CONF_IPV6_RPL PRINTF("Processing RPL option\n"); if(rpl_verify_header(uip_ext_opt_offset)) { @@ -949,7 +949,7 @@ uip_process(uint8_t flag) } #endif /* UIP_UDP */ uip_sappdata = uip_appdata = &uip_buf[UIP_IPTCPH_LEN + UIP_LLH_LEN]; - + /* Check if we were invoked because of a poll request for a particular connection. */ if(flag == UIP_POLL_REQUEST) { @@ -974,7 +974,7 @@ uip_process(uint8_t flag) #if UIP_TCP uip_clear_buf(); uip_slen = 0; - + /* Increase the initial sequence number. */ if(++iss[3] == 0) { if(++iss[2] == 0) { @@ -983,7 +983,7 @@ uip_process(uint8_t flag) } } } - + /* * Check if the connection is in a state in which we simply wait * for the connection to time out. If so, we increase the @@ -1009,7 +1009,7 @@ uip_process(uint8_t flag) uip_connr->tcpstateflags == UIP_SYN_RCVD) && uip_connr->nrtx == UIP_MAXSYNRTX)) { uip_connr->tcpstateflags = UIP_CLOSED; - + /* * We call UIP_APPCALL() with uip_flags set to * UIP_TIMEDOUT to inform the application that the @@ -1017,18 +1017,18 @@ uip_process(uint8_t flag) */ uip_flags = UIP_TIMEDOUT; UIP_APPCALL(); - + /* We also send a reset packet to the remote host. */ UIP_TCP_BUF->flags = TCP_RST | TCP_ACK; goto tcp_send_nodata; } - + /* Exponential backoff. */ uip_connr->timer = UIP_RTO << (uip_connr->nrtx > 4? 4: uip_connr->nrtx); ++(uip_connr->nrtx); - + /* * Ok, so we need to retransmit. We do this differently * depending on which state we are in. In ESTABLISHED, we @@ -1042,14 +1042,14 @@ uip_process(uint8_t flag) case UIP_SYN_RCVD: /* In the SYN_RCVD state, we should retransmit our SYNACK. */ goto tcp_send_synack; - + #if UIP_ACTIVE_OPEN case UIP_SYN_SENT: /* In the SYN_SENT state, we retransmit out SYN. */ UIP_TCP_BUF->flags = 0; goto tcp_send_syn; #endif /* UIP_ACTIVE_OPEN */ - + case UIP_ESTABLISHED: /* * In the ESTABLISHED state, we call upon the application @@ -1060,7 +1060,7 @@ uip_process(uint8_t flag) uip_flags = UIP_REXMIT; UIP_APPCALL(); goto apprexmit; - + case UIP_FIN_WAIT_1: case UIP_CLOSING: case UIP_LAST_ACK: @@ -1096,12 +1096,12 @@ uip_process(uint8_t flag) } #endif /* UIP_UDP */ - + /* This is where the input processing starts. */ UIP_STAT(++uip_stat.ip.recv); - + /* Start of IP input header processing code. */ - + /* Check validity of the IP header. */ if((UIP_IP_BUF->vtc & 0xf0) != 0x60) { /* IP version and header length. */ UIP_STAT(++uip_stat.ip.drop); @@ -1117,7 +1117,7 @@ uip_process(uint8_t flag) * the packet has been padded and we set uip_len to the correct * value.. */ - + if((UIP_IP_BUF->len[0] << 8) + UIP_IP_BUF->len[1] <= uip_len) { uip_len = (UIP_IP_BUF->len[0] << 8) + UIP_IP_BUF->len[1] + UIP_IPH_LEN; /* @@ -1135,7 +1135,7 @@ uip_process(uint8_t flag) UIP_LOG("ip: packet shorter than reported in IP header."); goto drop; } - + PRINTF("IPv6 packet received from "); PRINT6ADDR(&UIP_IP_BUF->srcipaddr); PRINTF(" to "); @@ -1168,11 +1168,11 @@ uip_process(uint8_t flag) uip_ext_len += (UIP_EXT_BUF->len << 3) + 8; break; case 1: - PRINTF("Dropping packet after extension header processing\n"); + PRINTF("Dropping packet after extension header processing\n"); /* silently discard */ goto drop; case 2: - PRINTF("Sending error message after extension header processing\n"); + PRINTF("Sending error message after extension header processing\n"); /* send icmp error message (created in ext_hdr_options_process) * and discard*/ goto send; @@ -1417,7 +1417,7 @@ uip_process(uint8_t flag) UIP_LOG("ip6: unrecognized header"); goto send; /* End of headers processing */ - + icmp6_input: /* This is IPv6 ICMPv6 processing code. */ PRINTF("icmp6_input: length %d type: %d \n", uip_len, UIP_ICMP_BUF->type); @@ -1459,14 +1459,14 @@ uip_process(uint8_t flag) UIP_LOG("icmp6: unknown ICMPv6 message."); uip_clear_buf(); } - + if(uip_len > 0) { goto send; } else { goto drop; } /* End of IPv6 ICMP processing. */ - + #if UIP_UDP /* UDP input processing. */ @@ -1475,7 +1475,7 @@ uip_process(uint8_t flag) remove_ext_hdr(); PRINTF("Receiving UDP packet\n"); - + /* UDP processing is really just a hack. We don't do anything to the UDP/IP headers, but let the UDP application do all the hard work. If the application sets uip_slen, it has a packet to @@ -1538,7 +1538,7 @@ uip_process(uint8_t flag) udp_found: PRINTF("In udp_found\n"); UIP_STAT(++uip_stat.udp.recv); - + uip_conn = NULL; uip_flags = UIP_NEWDATA; uip_sappdata = uip_appdata = &uip_buf[UIP_IPUDPH_LEN + UIP_LLH_LEN]; @@ -1597,7 +1597,7 @@ uip_process(uint8_t flag) UIP_STAT(++uip_stat.tcp.recv); PRINTF("Receiving TCP packet\n"); /* Start of TCP input header processing code. */ - + if(uip_tcpchksum() != 0xffff) { /* Compute and check the TCP checksum. */ UIP_STAT(++uip_stat.tcp.drop); @@ -1632,7 +1632,7 @@ uip_process(uint8_t flag) if((UIP_TCP_BUF->flags & TCP_CTL) != TCP_SYN) { goto reset; } - + tmp16 = UIP_TCP_BUF->destport; /* Next, check listening connections. */ for(c = 0; c < UIP_LISTENPORTS; ++c) { @@ -1640,7 +1640,7 @@ uip_process(uint8_t flag) goto found_listen; } } - + /* No matching connection found, so we send a RST packet. */ UIP_STAT(++uip_stat.tcp.synrst); @@ -1652,7 +1652,7 @@ uip_process(uint8_t flag) } UIP_STAT(++uip_stat.tcp.rst); - + UIP_TCP_BUF->flags = TCP_RST | TCP_ACK; uip_len = UIP_IPTCPH_LEN; UIP_TCP_BUF->tcpoffset = 5 << 4; @@ -1661,15 +1661,15 @@ uip_process(uint8_t flag) c = UIP_TCP_BUF->seqno[3]; UIP_TCP_BUF->seqno[3] = UIP_TCP_BUF->ackno[3]; UIP_TCP_BUF->ackno[3] = c; - + c = UIP_TCP_BUF->seqno[2]; UIP_TCP_BUF->seqno[2] = UIP_TCP_BUF->ackno[2]; UIP_TCP_BUF->ackno[2] = c; - + c = UIP_TCP_BUF->seqno[1]; UIP_TCP_BUF->seqno[1] = UIP_TCP_BUF->ackno[1]; UIP_TCP_BUF->ackno[1] = c; - + c = UIP_TCP_BUF->seqno[0]; UIP_TCP_BUF->seqno[0] = UIP_TCP_BUF->ackno[0]; UIP_TCP_BUF->ackno[0] = c; @@ -1684,12 +1684,12 @@ uip_process(uint8_t flag) } } } - + /* Swap port numbers. */ tmp16 = UIP_TCP_BUF->srcport; UIP_TCP_BUF->srcport = UIP_TCP_BUF->destport; UIP_TCP_BUF->destport = tmp16; - + /* Swap IP addresses. */ uip_ipaddr_copy(&UIP_IP_BUF->destipaddr, &UIP_IP_BUF->srcipaddr); uip_ds6_select_src(&UIP_IP_BUF->srcipaddr, &UIP_IP_BUF->destipaddr); @@ -1730,7 +1730,7 @@ uip_process(uint8_t flag) goto drop; } uip_conn = uip_connr; - + /* Fill in the necessary fields for the new connection. */ uip_connr->rto = uip_connr->timer = UIP_RTO; uip_connr->sa = 0; @@ -1771,7 +1771,7 @@ uip_process(uint8_t flag) (uint16_t)uip_buf[UIP_IPTCPH_LEN + UIP_LLH_LEN + 3 + c]; uip_connr->initialmss = uip_connr->mss = tmp16 > UIP_TCP_MSS? UIP_TCP_MSS: tmp16; - + /* And we are done processing options. */ break; } else { @@ -1786,19 +1786,19 @@ uip_process(uint8_t flag) } } } - + /* Our response will be a SYNACK. */ #if UIP_ACTIVE_OPEN tcp_send_synack: UIP_TCP_BUF->flags = TCP_ACK; - + tcp_send_syn: UIP_TCP_BUF->flags |= TCP_SYN; #else /* UIP_ACTIVE_OPEN */ tcp_send_synack: UIP_TCP_BUF->flags = TCP_SYN | TCP_ACK; #endif /* UIP_ACTIVE_OPEN */ - + /* We send out the TCP Maximum Segment Size option with our SYNACK. */ UIP_TCP_BUF->optdata[0] = TCP_OPT_MSS; @@ -1839,9 +1839,9 @@ uip_process(uint8_t flag) receive a SYN, in which case we should retransmit our SYNACK (which is done futher down). */ if(!((((uip_connr->tcpstateflags & UIP_TS_MASK) == UIP_SYN_SENT) && - ((UIP_TCP_BUF->flags & TCP_CTL) == (TCP_SYN | TCP_ACK))) || + ((UIP_TCP_BUF->flags & TCP_CTL) == (TCP_SYN | TCP_ACK))) || (((uip_connr->tcpstateflags & UIP_TS_MASK) == UIP_SYN_RCVD) && - ((UIP_TCP_BUF->flags & TCP_CTL) == TCP_SYN)))) { + ((UIP_TCP_BUF->flags & TCP_CTL) == TCP_SYN)))) { if((uip_len > 0 || ((UIP_TCP_BUF->flags & (TCP_SYN | TCP_FIN)) != 0)) && (UIP_TCP_BUF->seqno[0] != uip_connr->rcv_nxt[0] || UIP_TCP_BUF->seqno[1] != uip_connr->rcv_nxt[1] || @@ -1875,7 +1875,7 @@ uip_process(uint8_t flag) uip_connr->snd_nxt[1] = uip_acc32[1]; uip_connr->snd_nxt[2] = uip_acc32[2]; uip_connr->snd_nxt[3] = uip_acc32[3]; - + /* Do RTT estimation, unless we have done retransmissions. */ if(uip_connr->nrtx == 0) { signed char m; @@ -1899,7 +1899,7 @@ uip_process(uint8_t flag) /* Reset length of outstanding data. */ uip_connr->len = 0; } - + } /* Do different things depending on in what state the connection is. */ @@ -1927,7 +1927,7 @@ uip_process(uint8_t flag) } /* We need to retransmit the SYNACK */ if((UIP_TCP_BUF->flags & TCP_CTL) == TCP_SYN) { - goto tcp_send_synack; + goto tcp_send_synack; } goto drop; #if UIP_ACTIVE_OPEN @@ -1991,7 +1991,7 @@ uip_process(uint8_t flag) uip_conn->tcpstateflags = UIP_CLOSED; goto reset; #endif /* UIP_ACTIVE_OPEN */ - + case UIP_ESTABLISHED: /* In the ESTABLISHED state, we call upon the application to feed data into the uip_buf. If the UIP_ACKDATA flag is set, the @@ -2093,7 +2093,7 @@ uip_process(uint8_t flag) UIP_APPCALL(); appsend: - + if(uip_flags & UIP_ABORT) { uip_slen = 0; uip_connr->tcpstateflags = UIP_CLOSED; @@ -2145,7 +2145,7 @@ uip_process(uint8_t flag) uip_connr->nrtx = 0; apprexmit: uip_appdata = uip_sappdata; - + /* If the application has data to be sent, or if the incoming packet had new data in it, we must send out a packet. */ if(uip_slen > 0 && uip_connr->len > 0) { @@ -2174,7 +2174,7 @@ uip_process(uint8_t flag) UIP_APPCALL(); } break; - + case UIP_FIN_WAIT_1: /* The application has closed the connection, but the remote host hasn't closed its end yet. Thus we do nothing but wait for a @@ -2203,7 +2203,7 @@ uip_process(uint8_t flag) goto tcp_send_ack; } goto drop; - + case UIP_FIN_WAIT_2: if(uip_len > 0) { uip_add_rcv_nxt(uip_len); @@ -2223,7 +2223,7 @@ uip_process(uint8_t flag) case UIP_TIME_WAIT: goto tcp_send_ack; - + case UIP_CLOSING: if(uip_flags & UIP_ACKDATA) { uip_connr->tcpstateflags = UIP_TIME_WAIT; @@ -2231,7 +2231,7 @@ uip_process(uint8_t flag) } } goto drop; - + /* We jump here when we are ready to send the packet, and just want to set the appropriate TCP sequence numbers in the TCP header. */ tcp_send_ack: @@ -2249,12 +2249,12 @@ uip_process(uint8_t flag) packet. */ tcp_send: PRINTF("In tcp_send\n"); - + UIP_TCP_BUF->ackno[0] = uip_connr->rcv_nxt[0]; UIP_TCP_BUF->ackno[1] = uip_connr->rcv_nxt[1]; UIP_TCP_BUF->ackno[2] = uip_connr->rcv_nxt[2]; UIP_TCP_BUF->ackno[3] = uip_connr->rcv_nxt[3]; - + UIP_TCP_BUF->seqno[0] = uip_connr->snd_nxt[0]; UIP_TCP_BUF->seqno[1] = uip_connr->snd_nxt[1]; UIP_TCP_BUF->seqno[2] = uip_connr->snd_nxt[2]; @@ -2288,7 +2288,7 @@ uip_process(uint8_t flag) UIP_IP_BUF->len[1] = ((uip_len - UIP_IPH_LEN) & 0xff); UIP_TCP_BUF->urgp[0] = UIP_TCP_BUF->urgp[1] = 0; - + /* Calculate TCP checksum. */ UIP_TCP_BUF->tcpchksum = 0; UIP_TCP_BUF->tcpchksum = ~(uip_tcpchksum()); @@ -2304,7 +2304,7 @@ uip_process(uint8_t flag) send: PRINTF("Sending packet with length %d (%d)\n", uip_len, (UIP_IP_BUF->len[0] << 8) | UIP_IP_BUF->len[1]); - + UIP_STAT(++uip_stat.ip.sent); /* Return and let the caller do the actual transmission. */ uip_flags = 0; diff --git a/cpu/arm/aducrf101/Common/ADuCRF101.h b/cpu/arm/aducrf101/Common/ADuCRF101.h index 287c6416a..719744c3e 100644 --- a/cpu/arm/aducrf101/Common/ADuCRF101.h +++ b/cpu/arm/aducrf101/Common/ADuCRF101.h @@ -61,7 +61,7 @@ #ifdef __cplusplus extern "C" { -#endif +#endif /* ------------------------- Interrupt Number Definition ------------------------ */ @@ -827,7 +827,7 @@ typedef struct { /*!< pADI_ADC0 Structure #endif // (__NO_MMR_STRUCTS__==0) /* Reset Value for ADCCFG*/ -#define ADCCFG_RVAL 0xA00 +#define ADCCFG_RVAL 0xA00 /* ADCCFG[REF] - Reference select */ #define ADCCFG_REF_BBA (*(volatile unsigned long *) 0x42A00034) @@ -870,7 +870,7 @@ typedef struct { /*!< pADI_ADC0 Structure #define ADCCFG_CHSEL_AGND (0xD << 0 ) /* AGND. Internal ADC ground input for offset calibration. */ /* Reset Value for ADCCON*/ -#define ADCCON_RVAL 0x90 +#define ADCCON_RVAL 0x90 /* ADCCON[REFBUF] - Reference buffer enable bit. */ #define ADCCON_REFBUF_BBA (*(volatile unsigned long *) 0x42A0009C) @@ -916,7 +916,7 @@ typedef struct { /*!< pADI_ADC0 Structure #define ADCCON_START_EN (0x1 << 0 ) /* EN. Start conversion when SOFT conversion mode is selected. This bit does not clear after a single software conversion. */ /* Reset Value for ADCSTA*/ -#define ADCSTA_RVAL 0x0 +#define ADCSTA_RVAL 0x0 /* ADCSTA[READY] - ADC Ready bit */ #define ADCSTA_READY_BBA (*(volatile unsigned long *) 0x42A00100) @@ -926,7 +926,7 @@ typedef struct { /*!< pADI_ADC0 Structure #define ADCSTA_READY_EN (0x1 << 0 ) /* EN. Set by the ADC when a conversion is complete. This bit generates an interrupt if enabled (IEN set in ADCCON). */ /* Reset Value for ADCDAT*/ -#define ADCDAT_RVAL 0x0 +#define ADCDAT_RVAL 0x0 /* ADCDAT[VALUE] - ADC result */ #define ADCDAT_VALUE_MSK (0xFFF << 2 ) @@ -935,13 +935,13 @@ typedef struct { /*!< pADI_ADC0 Structure #define ADCDAT_Value_Reserved_MSK (0x3 << 0 ) /* Reset Value for ADCGN*/ -#define ADCGN_RVAL 0x0 +#define ADCGN_RVAL 0x0 /* ADCGN[VALUE] - Gain */ #define ADCGN_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for ADCOF*/ -#define ADCOF_RVAL 0x0 +#define ADCOF_RVAL 0x0 /* ADCOF[VALUE] - Offset */ #define ADCOF_VALUE_MSK (0xFFFF << 0 ) @@ -972,7 +972,7 @@ typedef struct { /*!< pADI_CLKCTL Structure #endif // (__NO_MMR_STRUCTS__==0) /* Reset Value for CLKCON*/ -#define CLKCON_RVAL 0x0 +#define CLKCON_RVAL 0x0 /* CLKCON[CLKOUT] - GPIO output clock multiplexer select bits. */ #define CLKCON_CLKOUT_MSK (0x7 << 5 ) @@ -1002,7 +1002,7 @@ typedef struct { /*!< pADI_CLKCTL Structure #define CLKCON_CD_DIV128 (0x7 << 0 ) /* DIV128. */ /* Reset Value for XOSCCON*/ -#define XOSCCON_RVAL 0x0 +#define XOSCCON_RVAL 0x0 /* XOSCCON[ENABLE] - Crystal oscillator circuit enable bit. */ #define XOSCCON_ENABLE_BBA (*(volatile unsigned long *) 0x42048200) @@ -1012,7 +1012,7 @@ typedef struct { /*!< pADI_CLKCTL Structure #define XOSCCON_ENABLE_EN (0x1 << 0 ) /* EN. Enables the watch crystal circuitry.(LFXTAL) */ /* Reset Value for CLKACT*/ -#define CLKACT_RVAL 0x3FFF +#define CLKACT_RVAL 0x3FFF /* CLKACT[T1] - T1 clocks enable bit. */ #define CLKACT_T1_BBA (*(volatile unsigned long *) 0x4204902C) @@ -1099,7 +1099,7 @@ typedef struct { /*!< pADI_CLKCTL Structure #define CLKACT_DMA_EN (0x1 << 0 ) /* EN. Enable DMA clock. */ /* Reset Value for CLKPD*/ -#define CLKPD_RVAL 0x3FFF +#define CLKPD_RVAL 0x3FFF /* CLKPD[T1] - T1 clocks enable bit. */ #define CLKPD_T1_BBA (*(volatile unsigned long *) 0x420490AC) @@ -1231,7 +1231,7 @@ typedef struct { /*!< pADI_DMA Structure #endif // (__NO_MMR_STRUCTS__==0) /* Reset Value for DMASTA*/ -#define DMASTA_RVAL 0xD0000 +#define DMASTA_RVAL 0xD0000 /* DMASTA[CHNLSMINUS1] - Number of available DMA channels minus 1. For example, if there are 14 channels available, the register reads back 0xD for these bits. */ #define DMASTA_CHNLSMINUS1_MSK (0x1F << 16 ) @@ -1259,7 +1259,7 @@ typedef struct { /*!< pADI_DMA Structure #define DMASTA_ENABLE_SET (0x1 << 0 ) /* SET. Controller is enabled. */ /* Reset Value for DMACFG*/ -#define DMACFG_RVAL 0x0 +#define DMACFG_RVAL 0x0 /* DMACFG[ENABLE] - Controller enable. */ #define DMACFG_ENABLE_BBA (*(volatile unsigned long *) 0x42200080) @@ -1269,19 +1269,19 @@ typedef struct { /*!< pADI_DMA Structure #define DMACFG_ENABLE_EN (0x1 << 0 ) /* EN. Controller is enabled. */ /* Reset Value for DMAPDBPTR*/ -#define DMAPDBPTR_RVAL 0x0 +#define DMAPDBPTR_RVAL 0x0 /* DMAPDBPTR[CTRLBASEPTR] - Pointer to the base address of the primary data structure. 5 + log (2)M LSBs are reserved and must be written 0. M is the number of channels. */ #define DMAPDBPTR_CTRLBASEPTR_MSK (0xFFFFFFFF << 0 ) /* Reset Value for DMAADBPTR*/ -#define DMAADBPTR_RVAL 0x100 +#define DMAADBPTR_RVAL 0x100 /* DMAADBPTR[ALTCBPTR] - Base address of the alternate data structure. */ #define DMAADBPTR_ALTCBPTR_MSK (0xFFFFFFFF << 0 ) /* Reset Value for DMASWREQ*/ -#define DMASWREQ_RVAL 0x0 +#define DMASWREQ_RVAL 0x0 /* DMASWREQ[SPI0RX] - DMA SPI0 RX. */ #define DMASWREQ_SPI0RX_BBA (*(volatile unsigned long *) 0x422002B4) @@ -1361,7 +1361,7 @@ typedef struct { /*!< pADI_DMA Structure #define DMASWREQ_SPI1TX_EN (0x1 << 0 ) /* EN. Generates a DMA request for SPI1TX. */ /* Reset Value for DMARMSKSET*/ -#define DMARMSKSET_RVAL 0x0 +#define DMARMSKSET_RVAL 0x0 /* DMARMSKSET[SPI0RX] - DMA SPI0 RX. */ #define DMARMSKSET_SPI0RX_BBA (*(volatile unsigned long *) 0x42200434) @@ -1441,7 +1441,7 @@ typedef struct { /*!< pADI_DMA Structure #define DMARMSKSET_SPI1TX_EN (0x1 << 0 ) /* EN. When read: Requests are disabled for SPI1TX When written: Disables peripheral associated with SPI1TX from generating DMA requests. */ /* Reset Value for DMARMSKCLR*/ -#define DMARMSKCLR_RVAL 0x0 +#define DMARMSKCLR_RVAL 0x0 /* DMARMSKCLR[SPI0RX] - DMA SPI0 RX. */ #define DMARMSKCLR_SPI0RX_BBA (*(volatile unsigned long *) 0x422004B4) @@ -1521,7 +1521,7 @@ typedef struct { /*!< pADI_DMA Structure #define DMARMSKCLR_SPI1TX_EN (0x1 << 0 ) /* EN. Enables peripheral associated with SPI1TX to generate DMA requests. */ /* Reset Value for DMAENSET*/ -#define DMAENSET_RVAL 0x0 +#define DMAENSET_RVAL 0x0 /* DMAENSET[SPI0RX] - DMA SPI0 RX */ #define DMAENSET_SPI0RX_BBA (*(volatile unsigned long *) 0x42200534) @@ -1601,7 +1601,7 @@ typedef struct { /*!< pADI_DMA Structure #define DMAENSET_SPI1TX_EN (0x1 << 0 ) /* EN. Enables SPI1TX. */ /* Reset Value for DMAENCLR*/ -#define DMAENCLR_RVAL 0x0 +#define DMAENCLR_RVAL 0x0 /* DMAENCLR[SPI0RX] - DMA SPI0 RX */ #define DMAENCLR_SPI0RX_BBA (*(volatile unsigned long *) 0x422005B4) @@ -1681,7 +1681,7 @@ typedef struct { /*!< pADI_DMA Structure #define DMAENCLR_SPI1TX_EN (0x1 << 0 ) /* EN. Disables SPI1TX. */ /* Reset Value for DMAALTSET*/ -#define DMAALTSET_RVAL 0x0 +#define DMAALTSET_RVAL 0x0 /* DMAALTSET[SPI0RX] - DMA SPI0 RX. */ #define DMAALTSET_SPI0RX_BBA (*(volatile unsigned long *) 0x42200634) @@ -1761,7 +1761,7 @@ typedef struct { /*!< pADI_DMA Structure #define DMAALTSET_SPI1TX_EN (0x1 << 0 ) /* EN. When read: DMA SPI1TX is using the alternate data structure. When written: Selects the alternate data structure for SPI1TX. */ /* Reset Value for DMAALTCLR*/ -#define DMAALTCLR_RVAL 0x0 +#define DMAALTCLR_RVAL 0x0 /* DMAALTCLR[SPI0RX] - DMA SPI0 RX. */ #define DMAALTCLR_SPI0RX_BBA (*(volatile unsigned long *) 0x422006B4) @@ -1841,7 +1841,7 @@ typedef struct { /*!< pADI_DMA Structure #define DMAALTCLR_SPI1TX_EN (0x1 << 0 ) /* EN. Selects the primary data structure for SPI1TX. */ /* Reset Value for DMAPRISET*/ -#define DMAPRISET_RVAL 0x0 +#define DMAPRISET_RVAL 0x0 /* DMAPRISET[SPI0RX] - DMA SPI0 RX. */ #define DMAPRISET_SPI0RX_BBA (*(volatile unsigned long *) 0x42200734) @@ -1921,7 +1921,7 @@ typedef struct { /*!< pADI_DMA Structure #define DMAPRISET_SPI1TX_EN (0x1 << 0 ) /* EN. When read: DMA SPI1TX is using a high priority level. When written: SPI1TX uses the high priority level. */ /* Reset Value for DMAPRICLR*/ -#define DMAPRICLR_RVAL 0x0 +#define DMAPRICLR_RVAL 0x0 /* DMAPRICLR[SPI0RX] - DMA SPI0 RX. */ #define DMAPRICLR_SPI0RX_BBA (*(volatile unsigned long *) 0x422007B4) @@ -2001,7 +2001,7 @@ typedef struct { /*!< pADI_DMA Structure #define DMAPRICLR_SPI1TX_EN (0x1 << 0 ) /* EN. SPI1TX uses the default priority level. */ /* Reset Value for DMAERRCLR*/ -#define DMAERRCLR_RVAL 0x0 +#define DMAERRCLR_RVAL 0x0 /* DMAERRCLR[ERROR] - DMA Bus Error status. */ #define DMAERRCLR_ERROR_BBA (*(volatile unsigned long *) 0x42200980) @@ -2078,7 +2078,7 @@ typedef struct { /*!< pADI_FEE Structure #endif // (__NO_MMR_STRUCTS__==0) /* Reset Value for FEESTA*/ -#define FEESTA_RVAL 0x0 +#define FEESTA_RVAL 0x0 /* FEESTA[SIGNERR] - Kernel space signature check on reset error */ #define FEESTA_SIGNERR_BBA (*(volatile unsigned long *) 0x42050018) @@ -2123,7 +2123,7 @@ typedef struct { /*!< pADI_FEE Structure #define FEESTA_CMDBUSY_SET (0x1 << 0 ) /* SET. Set when the flash block is executing any command entered via the command register. */ /* Reset Value for FEECON0*/ -#define FEECON0_RVAL 0x0 +#define FEECON0_RVAL 0x0 /* FEECON0[WREN] - Write enable bit. */ #define FEECON0_WREN_BBA (*(volatile unsigned long *) 0x42050088) @@ -2147,7 +2147,7 @@ typedef struct { /*!< pADI_FEE Structure #define FEECON0_IENCMD_EN (0x1 << 0 ) /* EN. An interrupt is generated when a command or flash write completes. */ /* Reset Value for FEECMD*/ -#define FEECMD_RVAL 0x0 +#define FEECMD_RVAL 0x0 /* FEECMD[CMD] - Commands supported by the flash controller. */ #define FEECMD_CMD_MSK (0xF << 0 ) @@ -2158,31 +2158,31 @@ typedef struct { /*!< pADI_FEE Structure #define FEECMD_CMD_ABORT (0x4 << 0 ) /* ABORT. If this command is issued, then any command currently in progress is stopped. The status indicates command completed with an error status in FEESTA[5:4]. Note that this is the only command that can be issued while another command is already in progress. This command can also be used to stop a write that may be in progress. If a write is aborted, the address of the location being written can be read via the FEEADRAL/FEEADRAH register. While the flash controller is writing one longword, another longword write may be in the pipeline from the Cortex-M3 or DMA engine (depending on how the software implements writes). Therefore, both writes may need to be aborted. If a write or erase is aborted, then the flash timing is violated and it is not possible to determine if the write or erase completed successfully. To enable this operation, 0xF456 followed by 0xF123 must first be written to FEEKEY (this is to prevent accidental aborts). */ /* Reset Value for FEEADR0L*/ -#define FEEADR0L_RVAL 0x0 +#define FEEADR0L_RVAL 0x0 /* FEEADR0L[VALUE] - Used in conjunction with FEEADR0H, to indicate the page to be erased, or the start of a section to be signed. The address of a memory location inside the page should be stored in FEEADR0L/H, bits[15:0] in FEEADR0L, and bits[17:16] in FEEADR0H. The 9 LSBs of the address are ignored. */ #define FEEADR0L_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for FEEADR0H*/ -#define FEEADR0H_RVAL 0x0 +#define FEEADR0H_RVAL 0x0 /* FEEADR0H[VALUE] - Used in conjunction with FEEADR0L, to indicate the page to be erased, or the start of a section to be signed. The address of a memory location inside the page should be stored in FEEADR0L/H, bits[15:0] in FEEADR0L, and bits[17:16] in FEEADR0H. */ #define FEEADR0H_VALUE_MSK (0x3 << 0 ) /* Reset Value for FEEADR1L*/ -#define FEEADR1L_RVAL 0x0 +#define FEEADR1L_RVAL 0x0 /* FEEADR1L[VALUE] - Used in conjunction with FEEADR1H, to identify the last page used by the Sign command. The address of a memory location inside the page should be stored in FEEADR1L/H, bits[15:0] in FEEADR1L, and bits[17:16] in FEEADR1H. The 9 LSBs of the address are ignored. */ #define FEEADR1L_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for FEEADR1H*/ -#define FEEADR1H_RVAL 0x0 +#define FEEADR1H_RVAL 0x0 /* FEEADR1H[VALUE] - Used in conjunction with FEEADR1L, to identify the last page used by the Sign command. The address of a memory location inside the page should be stored in FEEADR1L/H, bits[15:0] in FEEADR1L, and bits[17:16] in FEEADR1H. */ #define FEEADR1H_VALUE_MSK (0x3 << 0 ) /* Reset Value for FEEKEY*/ -#define FEEKEY_RVAL 0x0 +#define FEEKEY_RVAL 0x0 /* FEEKEY[VALUE] - Enter 0xF456 followed by 0xF123. Returns 0x0 if read. */ #define FEEKEY_VALUE_MSK (0xFFFF << 0 ) @@ -2190,31 +2190,31 @@ typedef struct { /*!< pADI_FEE Structure #define FEEKEY_VALUE_USERKEY2 (0xF123 << 0 ) /* USERKEY2 */ /* Reset Value for FEEPROL*/ -#define FEEPROL_RVAL 0xFFFF +#define FEEPROL_RVAL 0xFFFF /* FEEPROL[VALUE] - Lower 16 bits of the write protection. This register is read only if the write protection in flash has been programmed, i.e. FEEPROH/L have previously been configured to protect pages. */ #define FEEPROL_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for FEEPROH*/ -#define FEEPROH_RVAL 0xFFFF +#define FEEPROH_RVAL 0xFFFF /* FEEPROH[VALUE] - Upper 16 bits of the write protection. This register is read only if the write protection in flash has been programmed, i.e. FEEPROH/L have previously been configured to protect pages. */ #define FEEPROH_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for FEESIGL*/ -#define FEESIGL_RVAL 0xFFFF +#define FEESIGL_RVAL 0xFFFF /* FEESIGL[VALUE] - Lower 16 bits of the signature. Signature[15:0]. */ #define FEESIGL_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for FEESIGH*/ -#define FEESIGH_RVAL 0xFFFF +#define FEESIGH_RVAL 0xFFFF /* FEESIGH[VALUE] - Upper eight bits of the signature. Signature[23:16]. */ #define FEESIGH_VALUE_MSK (0xFF << 0 ) /* Reset Value for FEECON1*/ -#define FEECON1_RVAL 0x1 +#define FEECON1_RVAL 0x1 /* FEECON1[DBG] - Serial Wire debug enable. */ #define FEECON1_DBG_BBA (*(volatile unsigned long *) 0x42050700) @@ -2224,19 +2224,19 @@ typedef struct { /*!< pADI_FEE Structure #define FEECON1_DBG_EN (0x1 << 0 ) /* EN. Enable access via the serial wire debug interface. */ /* Reset Value for FEEADRAL*/ -#define FEEADRAL_RVAL 0x800 +#define FEEADRAL_RVAL 0x800 /* FEEADRAL[VALUE] - Lower 16 bits of the FEEADRA register. If a write is aborted then this will contain the address of the location been written when the write was aborted. */ #define FEEADRAL_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for FEEADRAH*/ -#define FEEADRAH_RVAL 0x2 +#define FEEADRAH_RVAL 0x2 /* FEEADRAH[VALUE] - Upper 16 bits of the FEEADRA register. */ #define FEEADRAH_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for FEEAEN0*/ -#define FEEAEN0_RVAL 0x0 +#define FEEAEN0_RVAL 0x0 /* FEEAEN0[FEE] - Flash controller interrupt abort enable bit */ #define FEEAEN0_FEE_BBA (*(volatile unsigned long *) 0x42050F3C) @@ -2344,7 +2344,7 @@ typedef struct { /*!< pADI_FEE Structure #define FEEAEN0_T2_EN (0x1 << 0 ) /* EN. Timer2 interrupt abort enabled */ /* Reset Value for FEEAEN1*/ -#define FEEAEN1_RVAL 0x0 +#define FEEAEN1_RVAL 0x0 /* FEEAEN1[DMAI2CMRX] - I2C master RX DMA interrupt abort enable bit */ #define FEEAEN1_DMAI2CMRX_BBA (*(volatile unsigned long *) 0x42050FBC) @@ -2445,7 +2445,7 @@ typedef struct { /*!< pADI_FEE Structure #define FEEAEN1_UART_EN (0x1 << 0 ) /* EN. UART interrupt abort enabled. */ /* Reset Value for FEEAEN2*/ -#define FEEAEN2_RVAL 0x0 +#define FEEAEN2_RVAL 0x0 /* FEEAEN2[PWM3] - PWM3 interrupt abort enable bit */ #define FEEAEN2_PWM3_BBA (*(volatile unsigned long *) 0x42051028) @@ -2544,7 +2544,7 @@ typedef struct { /*!< pADI_GP0 Structure #endif // (__NO_MMR_STRUCTS__==0) /* Reset Value for GP0CON*/ -#define GP0CON_RVAL 0x0 +#define GP0CON_RVAL 0x0 /* GP0CON[CON7] - Configuration bits for Px.7 (not available for port 1). */ #define GP0CON_CON7_MSK (0x3 << 14 ) @@ -2595,7 +2595,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP0CON_CON0_SPI1MISO (0x1 << 0 ) /* SPI1MISO. SPI MISO (SPI1) */ /* Reset Value for GP0OEN*/ -#define GP0OEN_RVAL 0x0 +#define GP0OEN_RVAL 0x0 /* GP0OEN[OEN7] - Port pin direction. */ #define GP0OEN_OEN7_BBA (*(volatile unsigned long *) 0x420C009C) @@ -2654,7 +2654,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP0OEN_OEN0_OUT (0x1 << 0 ) /* OUT. Enables the output on corresponding port pin.. */ /* Reset Value for GP0PUL*/ -#define GP0PUL_RVAL 0xFF +#define GP0PUL_RVAL 0xFF /* GP0PUL[PUL7] - Pull Up Enable for port pin. */ #define GP0PUL_PUL7_BBA (*(volatile unsigned long *) 0x420C011C) @@ -2713,7 +2713,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP0PUL_PUL0_EN (0x1 << 0 ) /* EN. Enables the internal pull up on corresponding port pin. */ /* Reset Value for GP0OCE*/ -#define GP0OCE_RVAL 0x0 +#define GP0OCE_RVAL 0x0 /* GP0OCE[OCE7] - Output enable. Sets the GPIO pads on corresponding port to open circuit mode. */ #define GP0OCE_OCE7_BBA (*(volatile unsigned long *) 0x420C019C) @@ -2772,7 +2772,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP0OCE_OCE0_EN (0x1 << 0 ) /* EN */ /* Reset Value for GP0IN*/ -#define GP0IN_RVAL 0xFF +#define GP0IN_RVAL 0xFF /* GP0IN[IN7] - Reflects the level on the corresponding GPIO pins except when in configured in open circuit. */ #define GP0IN_IN7_BBA (*(volatile unsigned long *) 0x420C029C) @@ -2831,7 +2831,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP0IN_IN0_HIGH (0x1 << 0 ) /* HIGH */ /* Reset Value for GP0OUT*/ -#define GP0OUT_RVAL 0x0 +#define GP0OUT_RVAL 0x0 /* GP0OUT[OUT7] - Data out register. */ #define GP0OUT_OUT7_BBA (*(volatile unsigned long *) 0x420C031C) @@ -2890,7 +2890,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP0OUT_OUT0_HIGH (0x1 << 0 ) /* HIGH. Set by user code to drive the corresponding GPIO high. */ /* Reset Value for GP0SET*/ -#define GP0SET_RVAL 0x0 +#define GP0SET_RVAL 0x0 /* GP0SET[SET7] - Set output high for corresponding port pin. */ #define GP0SET_SET7_BBA (*(volatile unsigned long *) 0x420C039C) @@ -2941,7 +2941,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP0SET_SET0_SET (0x1 << 0 ) /* SET. Set by user code to drive the corresponding GPIO high. */ /* Reset Value for GP0CLR*/ -#define GP0CLR_RVAL 0x0 +#define GP0CLR_RVAL 0x0 /* GP0CLR[CLR7] - Set by user code to drive the corresponding GPIO low. */ #define GP0CLR_CLR7_BBA (*(volatile unsigned long *) 0x420C041C) @@ -2992,7 +2992,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP0CLR_CLR0_CLR (0x1 << 0 ) /* CLR */ /* Reset Value for GP0TGL*/ -#define GP0TGL_RVAL 0x0 +#define GP0TGL_RVAL 0x0 /* GP0TGL[TGL7] - Toggle for corresponding port pin. */ #define GP0TGL_TGL7_BBA (*(volatile unsigned long *) 0x420C049C) @@ -3055,7 +3055,7 @@ typedef struct { /*!< pADI_GP0 Structure #endif // (__NO_MMR_STRUCTS__==1) /* Reset Value for GP1CON*/ -#define GP1CON_RVAL 0x0 +#define GP1CON_RVAL 0x0 /* GP1CON[CON6] - Configuration bits for P1.6 */ #define GP1CON_CON6_MSK (0x3 << 12 ) @@ -3100,7 +3100,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP1CON_CON0_PWM2 (0x3 << 0 ) /* PWM2 */ /* Reset Value for GP1OEN*/ -#define GP1OEN_RVAL 0x0 +#define GP1OEN_RVAL 0x0 /* GP1OEN[OEN6] - Port pin direction. */ #define GP1OEN_OEN6_BBA (*(volatile unsigned long *) 0x420C0698) @@ -3152,7 +3152,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP1OEN_OEN0_OUT (0x1 << 0 ) /* OUT. Enables the output on corresponding port pin.. */ /* Reset Value for GP1PUL*/ -#define GP1PUL_RVAL 0x7F +#define GP1PUL_RVAL 0x7F /* GP1PUL[PUL6] - Pull Up Enable for port pin. */ #define GP1PUL_PUL6_BBA (*(volatile unsigned long *) 0x420C0718) @@ -3204,7 +3204,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP1PUL_PUL0_EN (0x1 << 0 ) /* EN. Enables the internal pull up on corresponding port pin. */ /* Reset Value for GP1OCE*/ -#define GP1OCE_RVAL 0x0 +#define GP1OCE_RVAL 0x0 /* GP1OCE[OCE6] - Output enable. Sets the GPIO pads on corresponding port to open circuit mode. */ #define GP1OCE_OCE6_BBA (*(volatile unsigned long *) 0x420C0798) @@ -3256,7 +3256,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP1OCE_OCE0_EN (0x1 << 0 ) /* EN */ /* Reset Value for GP1IN*/ -#define GP1IN_RVAL 0x7F +#define GP1IN_RVAL 0x7F /* GP1IN[IN6] - Reflects the level on the corresponding GPIO pins except when in configured in open circuit. */ #define GP1IN_IN6_BBA (*(volatile unsigned long *) 0x420C0898) @@ -3308,7 +3308,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP1IN_IN0_HIGH (0x1 << 0 ) /* HIGH */ /* Reset Value for GP1OUT*/ -#define GP1OUT_RVAL 0x0 +#define GP1OUT_RVAL 0x0 /* GP1OUT[OUT6] - Output for port pin. */ #define GP1OUT_OUT6_BBA (*(volatile unsigned long *) 0x420C0918) @@ -3360,7 +3360,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP1OUT_OUT0_HIGH (0x1 << 0 ) /* HIGH. Set by user code to drive the corresponding GPIO high. */ /* Reset Value for GP1SET*/ -#define GP1SET_RVAL 0x0 +#define GP1SET_RVAL 0x0 /* GP1SET[SET6] - Set output high for corresponding port pin. */ #define GP1SET_SET6_BBA (*(volatile unsigned long *) 0x420C0998) @@ -3405,7 +3405,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP1SET_SET0_SET (0x1 << 0 ) /* SET. Set by user code to drive the corresponding GPIO high. */ /* Reset Value for GP1CLR*/ -#define GP1CLR_RVAL 0x0 +#define GP1CLR_RVAL 0x0 /* GP1CLR[CLR6] - Set by user code to drive the corresponding GPIO low. */ #define GP1CLR_CLR6_BBA (*(volatile unsigned long *) 0x420C0A18) @@ -3450,7 +3450,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP1CLR_CLR0_CLR (0x1 << 0 ) /* CLR. Set by user code to drive the corresponding GPIO low. */ /* Reset Value for GP1TGL*/ -#define GP1TGL_RVAL 0x0 +#define GP1TGL_RVAL 0x0 /* GP1TGL[TGL6] - Toggle for corresponding port pin. */ #define GP1TGL_TGL6_BBA (*(volatile unsigned long *) 0x420C0A98) @@ -3507,7 +3507,7 @@ typedef struct { /*!< pADI_GP0 Structure #endif // (__NO_MMR_STRUCTS__==1) /* Reset Value for GP2CON*/ -#define GP2CON_RVAL 0x0 +#define GP2CON_RVAL 0x0 /* GP2CON[CON7] - Configuration bits for P2.7 */ #define GP2CON_CON7_MSK (0x3 << 14 ) @@ -3548,7 +3548,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP2CON_CON0_GPIO (0x1 << 0 ) /* GPIO */ /* Reset Value for GP2OEN*/ -#define GP2OEN_RVAL 0x0 +#define GP2OEN_RVAL 0x0 /* GP2OEN[OEN7] - Port pin direction. */ #define GP2OEN_OEN7_BBA (*(volatile unsigned long *) 0x420C0C9C) @@ -3607,7 +3607,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP2OEN_OEN0_OUT (0x1 << 0 ) /* OUT. Enables the output on corresponding port pin. */ /* Reset Value for GP2PUL*/ -#define GP2PUL_RVAL 0xFF +#define GP2PUL_RVAL 0xFF /* GP2PUL[PUL7] - Pull Up Enable for port pin. */ #define GP2PUL_PUL7_BBA (*(volatile unsigned long *) 0x420C0D1C) @@ -3666,7 +3666,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP2PUL_PUL0_EN (0x1 << 0 ) /* EN. Enables the internal pull up on corresponding port pin. */ /* Reset Value for GP2OCE*/ -#define GP2OCE_RVAL 0x0 +#define GP2OCE_RVAL 0x0 /* GP2OCE[OCE7] - Output enable. Sets the GPIO pads on corresponding port to open circuit mode. */ #define GP2OCE_OCE7_BBA (*(volatile unsigned long *) 0x420C0D9C) @@ -3725,7 +3725,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP2OCE_OCE0_EN (0x1 << 0 ) /* EN */ /* Reset Value for GP2IN*/ -#define GP2IN_RVAL 0xFF +#define GP2IN_RVAL 0xFF /* GP2IN[IN7] - Reflects the level on the corresponding GPIO pins except when in configured in open circuit. */ #define GP2IN_IN7_BBA (*(volatile unsigned long *) 0x420C0E9C) @@ -3784,7 +3784,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP2IN_IN0_HIGH (0x1 << 0 ) /* HIGH */ /* Reset Value for GP2OUT*/ -#define GP2OUT_RVAL 0x0 +#define GP2OUT_RVAL 0x0 /* GP2OUT[OUT7] - Output for port pin. */ #define GP2OUT_OUT7_BBA (*(volatile unsigned long *) 0x420C0F1C) @@ -3843,7 +3843,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP2OUT_OUT0_HIGH (0x1 << 0 ) /* HIGH. Set by user code to drive the corresponding GPIO high. */ /* Reset Value for GP2SET*/ -#define GP2SET_RVAL 0x0 +#define GP2SET_RVAL 0x0 /* GP2SET[SET7] - Set output high for corresponding port pin. */ #define GP2SET_SET7_BBA (*(volatile unsigned long *) 0x420C0F9C) @@ -3894,7 +3894,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP2SET_SET0_SET (0x1 << 0 ) /* SET. Set by user code to drive the corresponding GPIO high. */ /* Reset Value for GP2CLR*/ -#define GP2CLR_RVAL 0x0 +#define GP2CLR_RVAL 0x0 /* GP2CLR[CLR7] - Set by user code to drive the corresponding GPIO low. */ #define GP2CLR_CLR7_BBA (*(volatile unsigned long *) 0x420C101C) @@ -3945,7 +3945,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP2CLR_CLR0_CLR (0x1 << 0 ) /* CLR. Set by user code to drive the corresponding GPIO low. */ /* Reset Value for GP2TGL*/ -#define GP2TGL_RVAL 0x0 +#define GP2TGL_RVAL 0x0 /* GP2TGL[TGL7] - Toggle for corresponding port pin. */ #define GP2TGL_TGL7_BBA (*(volatile unsigned long *) 0x420C109C) @@ -4008,7 +4008,7 @@ typedef struct { /*!< pADI_GP0 Structure #endif // (__NO_MMR_STRUCTS__==1) /* Reset Value for GP3CON*/ -#define GP3CON_RVAL 0x0 +#define GP3CON_RVAL 0x0 /* GP3CON[CON7] - Configuration bits for P3.7 */ #define GP3CON_CON7_MSK (0x3 << 14 ) @@ -4049,7 +4049,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP3CON_CON0_PWMTRIP (0x3 << 0 ) /* PWMTRIP */ /* Reset Value for GP3OEN*/ -#define GP3OEN_RVAL 0x0 +#define GP3OEN_RVAL 0x0 /* GP3OEN[OEN7] - Port pin direction. */ #define GP3OEN_OEN7_BBA (*(volatile unsigned long *) 0x420C129C) @@ -4108,7 +4108,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP3OEN_OEN0_OUT (0x1 << 0 ) /* OUT. Enables the output on corresponding port pin. */ /* Reset Value for GP3PUL*/ -#define GP3PUL_RVAL 0xFF +#define GP3PUL_RVAL 0xFF /* GP3PUL[PUL7] - Pull Up Enable for port pin. */ #define GP3PUL_PUL7_BBA (*(volatile unsigned long *) 0x420C131C) @@ -4167,7 +4167,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP3PUL_PUL0_EN (0x1 << 0 ) /* EN. Enables the internal pull up on corresponding port pin. */ /* Reset Value for GP3OCE*/ -#define GP3OCE_RVAL 0x0 +#define GP3OCE_RVAL 0x0 /* GP3OCE[OCE7] - Output enable. Sets the GPIO pads on corresponding port to open circuit mode. */ #define GP3OCE_OCE7_BBA (*(volatile unsigned long *) 0x420C139C) @@ -4226,7 +4226,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP3OCE_OCE0_EN (0x1 << 0 ) /* EN */ /* Reset Value for GP3IN*/ -#define GP3IN_RVAL 0xFF +#define GP3IN_RVAL 0xFF /* GP3IN[IN7] - Reflects the level on the corresponding GPIO pins except when in configured in open circuit. */ #define GP3IN_IN7_BBA (*(volatile unsigned long *) 0x420C149C) @@ -4285,7 +4285,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP3IN_IN0_HIGH (0x1 << 0 ) /* HIGH */ /* Reset Value for GP3OUT*/ -#define GP3OUT_RVAL 0x0 +#define GP3OUT_RVAL 0x0 /* GP3OUT[OUT7] - Output for port pin. */ #define GP3OUT_OUT7_BBA (*(volatile unsigned long *) 0x420C151C) @@ -4344,7 +4344,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP3OUT_OUT0_HIGH (0x1 << 0 ) /* HIGH. Set by user code to drive the corresponding GPIO high. */ /* Reset Value for GP3SET*/ -#define GP3SET_RVAL 0x0 +#define GP3SET_RVAL 0x0 /* GP3SET[SET7] - Set output high for corresponding port pin. */ #define GP3SET_SET7_BBA (*(volatile unsigned long *) 0x420C159C) @@ -4395,7 +4395,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP3SET_SET0_SET (0x1 << 0 ) /* SET. Set by user code to drive the corresponding GPIO high. */ /* Reset Value for GP3CLR*/ -#define GP3CLR_RVAL 0x0 +#define GP3CLR_RVAL 0x0 /* GP3CLR[CLR7] - Set by user code to drive the corresponding GPIO low. */ #define GP3CLR_CLR7_BBA (*(volatile unsigned long *) 0x420C161C) @@ -4446,7 +4446,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP3CLR_CLR0_CLR (0x1 << 0 ) /* CLR. Set by user code to drive the corresponding GPIO low. */ /* Reset Value for GP3TGL*/ -#define GP3TGL_RVAL 0x0 +#define GP3TGL_RVAL 0x0 /* GP3TGL[TGL7] - Toggle for corresponding port pin. */ #define GP3TGL_TGL7_BBA (*(volatile unsigned long *) 0x420C169C) @@ -4509,7 +4509,7 @@ typedef struct { /*!< pADI_GP0 Structure #endif // (__NO_MMR_STRUCTS__==1) /* Reset Value for GP4CON*/ -#define GP4CON_RVAL 0x0 +#define GP4CON_RVAL 0x0 /* GP4CON[CON7] - Configuration bits for P4.7 */ #define GP4CON_CON7_MSK (0x3 << 14 ) @@ -4553,7 +4553,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP4CON_CON0_PWM0 (0x2 << 0 ) /* PWM0 */ /* Reset Value for GP4OEN*/ -#define GP4OEN_RVAL 0x0 +#define GP4OEN_RVAL 0x0 /* GP4OEN[OEN7] - Port pin direction. */ #define GP4OEN_OEN7_BBA (*(volatile unsigned long *) 0x420C189C) @@ -4612,7 +4612,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP4OEN_OEN0_OUT (0x1 << 0 ) /* OUT. Enables the output on corresponding port pin. */ /* Reset Value for GP4PUL*/ -#define GP4PUL_RVAL 0xFF +#define GP4PUL_RVAL 0xFF /* GP4PUL[PUL7] - Pull Up Enable for port pin. */ #define GP4PUL_PUL7_BBA (*(volatile unsigned long *) 0x420C191C) @@ -4671,7 +4671,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP4PUL_PUL0_EN (0x1 << 0 ) /* EN. Enables the internal pull up on corresponding port pin. */ /* Reset Value for GP4OCE*/ -#define GP4OCE_RVAL 0x0 +#define GP4OCE_RVAL 0x0 /* GP4OCE[OCE7] - Output enable. Sets the GPIO pads on corresponding port to open circuit mode. */ #define GP4OCE_OCE7_BBA (*(volatile unsigned long *) 0x420C199C) @@ -4730,7 +4730,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP4OCE_OCE0_EN (0x1 << 0 ) /* EN */ /* Reset Value for GP4IN*/ -#define GP4IN_RVAL 0xFF +#define GP4IN_RVAL 0xFF /* GP4IN[IN7] - Reflects the level on the corresponding GPIO pins except when in configured in open circuit. */ #define GP4IN_IN7_BBA (*(volatile unsigned long *) 0x420C1A9C) @@ -4789,7 +4789,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP4IN_IN0_HIGH (0x1 << 0 ) /* HIGH */ /* Reset Value for GP4OUT*/ -#define GP4OUT_RVAL 0x0 +#define GP4OUT_RVAL 0x0 /* GP4OUT[OUT7] - Output for port pin. */ #define GP4OUT_OUT7_BBA (*(volatile unsigned long *) 0x420C1B1C) @@ -4848,7 +4848,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP4OUT_OUT0_HIGH (0x1 << 0 ) /* HIGH. Set by user code to drive the corresponding GPIO high. */ /* Reset Value for GP4SET*/ -#define GP4SET_RVAL 0x0 +#define GP4SET_RVAL 0x0 /* GP4SET[SET7] - Set output high for corresponding port pin. */ #define GP4SET_SET7_BBA (*(volatile unsigned long *) 0x420C1B9C) @@ -4899,7 +4899,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP4SET_SET0_SET (0x1 << 0 ) /* SET. Set by user code to drive the corresponding GPIO high. */ /* Reset Value for GP4CLR*/ -#define GP4CLR_RVAL 0x0 +#define GP4CLR_RVAL 0x0 /* GP4CLR[CLR7] - Set by user code to drive the corresponding GPIO low. */ #define GP4CLR_CLR7_BBA (*(volatile unsigned long *) 0x420C1C1C) @@ -4950,7 +4950,7 @@ typedef struct { /*!< pADI_GP0 Structure #define GP4CLR_CLR0_CLR (0x1 << 0 ) /* CLR. Set by user code to drive the corresponding GPIO low. */ /* Reset Value for GP4TGL*/ -#define GP4TGL_RVAL 0x0 +#define GP4TGL_RVAL 0x0 /* GP4TGL[TGL7] - Toggle for corresponding port pin. */ #define GP4TGL_TGL7_BBA (*(volatile unsigned long *) 0x420C1C9C) @@ -5017,7 +5017,7 @@ typedef struct { /*!< pADI_GPIOCMN Structure #endif // (__NO_MMR_STRUCTS__==0) /* Reset Value for GPDWN*/ -#define GPDWN_RVAL 0x1 +#define GPDWN_RVAL 0x1 /* GPDWN[DWN1] - Pull down resistor control bit */ #define GPDWN_DWN1_BBA (*(volatile unsigned long *) 0x420C1E04) @@ -5047,7 +5047,7 @@ typedef struct { /*!< pADI_MISC Structure #endif // (__NO_MMR_STRUCTS__==0) /* Reset Value for RFTST*/ -#define RFTST_RVAL 0x0 +#define RFTST_RVAL 0x0 /* RFTST[DIR] - Controls the pin direction in RF test mode. */ #define RFTST_DIR_MSK (0x7FF << 5 ) @@ -5081,7 +5081,7 @@ typedef struct { /*!< pADI_MISC Structure #define RFTST_GPX_EN (0x1 << 0 ) /* EN */ /* Reset Value for SWACT*/ -#define SWACT_RVAL 0x0 +#define SWACT_RVAL 0x0 /* SWACT[ACT] - Serial Wire Activity */ #define SWACT_ACT_BBA (*(volatile unsigned long *) 0x42110600) @@ -5161,7 +5161,7 @@ typedef struct { /*!< pADI_I2C Structure #endif // (__NO_MMR_STRUCTS__==0) /* Reset Value for I2CMCON*/ -#define I2CMCON_RVAL 0x0 +#define I2CMCON_RVAL 0x0 /* I2CMCON[TXDMA] - Enable master Tx DMA request. */ #define I2CMCON_TXDMA_BBA (*(volatile unsigned long *) 0x4206002C) @@ -5241,7 +5241,7 @@ typedef struct { /*!< pADI_I2C Structure #define I2CMCON_MAS_EN (0x1 << 0 ) /* EN. Enable master. */ /* Reset Value for I2CMSTA*/ -#define I2CMSTA_RVAL 0x0 +#define I2CMSTA_RVAL 0x0 /* I2CMSTA[TXUR] - Master transmit FIFO underrun. */ #define I2CMSTA_TXUR_BBA (*(volatile unsigned long *) 0x420600B0) @@ -5327,19 +5327,19 @@ typedef struct { /*!< pADI_I2C Structure #define I2CMSTA_TXFSTA_FULL (0x3 << 0 ) /* FULL. FIFO full. */ /* Reset Value for I2CMRX*/ -#define I2CMRX_RVAL 0x0 +#define I2CMRX_RVAL 0x0 /* I2CMRX[VALUE] - Receive register. This register allows access to the receive data FIFO. The FIFO can hold two bytes. */ #define I2CMRX_VALUE_MSK (0xFF << 0 ) /* Reset Value for I2CMTX*/ -#define I2CMTX_RVAL 0x0 +#define I2CMTX_RVAL 0x0 /* I2CMTX[VALUE] - Transmit register. This register allows access to the transmit data FIFO. The FIFO can hold two bytes. */ #define I2CMTX_VALUE_MSK (0xFF << 0 ) /* Reset Value for I2CMRXCNT*/ -#define I2CMRXCNT_RVAL 0x0 +#define I2CMRXCNT_RVAL 0x0 /* I2CMRXCNT[EXTEND] - Extended read: Use this bit if greater than 256 bytes are required on a read. For example: To receive 412 bytes, write 0x100 (EXTEND = 1) to this register (I2CMRXCNT). Wait for the first byte to be received, then check the I2CMCRXCNT register for every byte received thereafter. When I2CMCRXCNT returns to 0, 256 bytes have been received. Then, write 0x09C (412 - 256 = 156 decimal (equal to 0x9C) – with the EXTEND bit set to 0) to this register (I2CMRXCNT). */ #define I2CMRXCNT_EXTEND_BBA (*(volatile unsigned long *) 0x42060220) @@ -5352,25 +5352,25 @@ typedef struct { /*!< pADI_I2C Structure #define I2CMRXCNT_COUNT_MSK (0xFF << 0 ) /* Reset Value for I2CMCRXCNT*/ -#define I2CMCRXCNT_RVAL 0x0 +#define I2CMCRXCNT_RVAL 0x0 /* I2CMCRXCNT[VALUE] - Current receive count. This register gives the total number of bytes received so far. If 256 bytes are requested, then this register reads 0 when the transaction has completed. */ #define I2CMCRXCNT_VALUE_MSK (0xFF << 0 ) /* Reset Value for I2CADR0*/ -#define I2CADR0_RVAL 0x0 +#define I2CADR0_RVAL 0x0 /* I2CADR0[VALUE] - Address byte. If a 7-bit address is required, then I2CADR0[7:1] is programmed with the address and I2CADR0[0] is programmed with the direction (read or write). If a 10-bit address is required then I2CADR0[7:3] is programmed with '11110', I2CADR0[2:1] is programmed with the two MSBs of the address, and, again, I2CADR0[0] is programmed with the direction bit (read or write). */ #define I2CADR0_VALUE_MSK (0xFF << 0 ) /* Reset Value for I2CADR1*/ -#define I2CADR1_RVAL 0x0 +#define I2CADR1_RVAL 0x0 /* I2CADR1[VALUE] - Address byte. This register is only required when addressing a slave with 10-bit addressing. I2CADR1[7:0] is programmed with the lower eight bits of the address. */ #define I2CADR1_VALUE_MSK (0xFF << 0 ) /* Reset Value for I2CDIV*/ -#define I2CDIV_RVAL 0x1F1F +#define I2CDIV_RVAL 0x1F1F /* I2CDIV[HIGH] - Serial clock high time. This register controls the clock high time. See the serial clock generation section for more details. */ #define I2CDIV_HIGH_MSK (0xFF << 8 ) @@ -5379,7 +5379,7 @@ typedef struct { /*!< pADI_I2C Structure #define I2CDIV_LOW_MSK (0xFF << 0 ) /* Reset Value for I2CSCON*/ -#define I2CSCON_RVAL 0x0 +#define I2CSCON_RVAL 0x0 /* I2CSCON[TXDMA] - Enable slave Tx DMA request. */ #define I2CSCON_TXDMA_BBA (*(volatile unsigned long *) 0x42060538) @@ -5479,7 +5479,7 @@ typedef struct { /*!< pADI_I2C Structure #define I2CSCON_SLV_EN (0x1 << 0 ) /* EN. Enable slave. */ /* Reset Value for I2CSSTA*/ -#define I2CSSTA_RVAL 0x1 +#define I2CSSTA_RVAL 0x1 /* I2CSSTA[START] - Start and matching address. */ #define I2CSSTA_START_BBA (*(volatile unsigned long *) 0x420605B8) @@ -5565,49 +5565,49 @@ typedef struct { /*!< pADI_I2C Structure #define I2CSSTA_TXFSEREQ_SET (0x1 << 0 ) /* SET. Set whenever the slave Tx FIFO is empty. */ /* Reset Value for I2CSRX*/ -#define I2CSRX_RVAL 0x0 +#define I2CSRX_RVAL 0x0 /* I2CSRX[VALUE] - Receive register. */ #define I2CSRX_VALUE_MSK (0xFF << 0 ) /* Reset Value for I2CSTX*/ -#define I2CSTX_RVAL 0x0 +#define I2CSTX_RVAL 0x0 /* I2CSTX[VALUE] - Transmit register. */ #define I2CSTX_VALUE_MSK (0xFF << 0 ) /* Reset Value for I2CALT*/ -#define I2CALT_RVAL 0x0 +#define I2CALT_RVAL 0x0 /* I2CALT[VALUE] - ALT register.This register is used in conjunction with HGC (I2CSCON[3]) to match a master generating a hardware general call. It is used in the case where a master device cannot be programmed with a slave’s address and, instead, the slave must recognize the master’s address. */ #define I2CALT_VALUE_MSK (0xFF << 0 ) /* Reset Value for I2CID0*/ -#define I2CID0_RVAL 0x0 +#define I2CID0_RVAL 0x0 /* I2CID0[VALUE] - Slave ID. */ #define I2CID0_VALUE_MSK (0xFF << 0 ) /* Reset Value for I2CID1*/ -#define I2CID1_RVAL 0x0 +#define I2CID1_RVAL 0x0 /* I2CID1[VALUE] - Slave ID. */ #define I2CID1_VALUE_MSK (0xFF << 0 ) /* Reset Value for I2CID2*/ -#define I2CID2_RVAL 0x0 +#define I2CID2_RVAL 0x0 /* I2CID2[VALUE] - Slave ID. */ #define I2CID2_VALUE_MSK (0xFF << 0 ) /* Reset Value for I2CID3*/ -#define I2CID3_RVAL 0x0 +#define I2CID3_RVAL 0x0 /* I2CID3[VALUE] - Slave ID. */ #define I2CID3_VALUE_MSK (0xFF << 0 ) /* Reset Value for I2CFSTA*/ -#define I2CFSTA_RVAL 0x0 +#define I2CFSTA_RVAL 0x0 /* I2CFSTA[MFLUSH] - Master Transmit FIFO Flush. */ #define I2CFSTA_MFLUSH_BBA (*(volatile unsigned long *) 0x420609A4) @@ -5676,7 +5676,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #endif // (__NO_MMR_STRUCTS__==0) /* Reset Value for EI0CFG*/ -#define EI0CFG_RVAL 0x0 +#define EI0CFG_RVAL 0x0 /* EI0CFG[IRQ3EN] - External interrupt 3 enable bit. */ #define EI0CFG_IRQ3EN_BBA (*(volatile unsigned long *) 0x4204843C) @@ -5739,7 +5739,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define EI0CFG_IRQ0MDE_LOWLEVEL (0x4 << 0 ) /* LOWLEVEL. Low level. */ /* Reset Value for EI1CFG*/ -#define EI1CFG_RVAL 0x0 +#define EI1CFG_RVAL 0x0 /* EI1CFG[IRQ7EN] - External interrupt 7 enable bit. */ #define EI1CFG_IRQ7EN_BBA (*(volatile unsigned long *) 0x420484BC) @@ -5802,7 +5802,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define EI1CFG_IRQ4MDE_LOWLEVEL (0x4 << 0 ) /* LOWLEVEL. Low Level. */ /* Reset Value for EI2CFG*/ -#define EI2CFG_RVAL 0x0 +#define EI2CFG_RVAL 0x0 /* EI2CFG[IRQ8EN] - RF transceiver IRQ enable bit. */ #define EI2CFG_IRQ8EN_BBA (*(volatile unsigned long *) 0x4204850C) @@ -5820,7 +5820,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define EI2CFG_IRQ8MDE_LOWLEVEL (0x4 << 0 ) /* LOWLEVEL. Low level. */ /* Reset Value for EICLR*/ -#define EICLR_RVAL 0x0 +#define EICLR_RVAL 0x0 /* EICLR[IRQ8] - External interrupt 8 (RF transceiver) clear bit. */ #define EICLR_IRQ8_BBA (*(volatile unsigned long *) 0x42048620) @@ -5877,7 +5877,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define EICLR_IRQ0_CLR (0x1 << 0 ) /* CLR. Clear an internal interrupt flag. */ /* Reset Value for NMICLR*/ -#define NMICLR_RVAL 0x0 +#define NMICLR_RVAL 0x0 /* NMICLR[CLEAR] - NMI clear bit. */ #define NMICLR_CLEAR_BBA (*(volatile unsigned long *) 0x42048680) @@ -5939,13 +5939,13 @@ typedef struct { /*!< pADI_INTERRUPT Structure #endif // (__NO_MMR_STRUCTS__==0) /* Reset Value for ICTR*/ -#define ICTR_RVAL 0x1 +#define ICTR_RVAL 0x1 /* ICTR[INTLINESNUM] - Total number of interrupt lines in groups of 32 */ #define ICTR_INTLINESNUM_MSK (0xF << 0 ) /* Reset Value for STCSR*/ -#define STCSR_RVAL 0x0 +#define STCSR_RVAL 0x0 /* STCSR[COUNTFLAG] - Returns 1 if timer counted to 0 since last time this register was read */ #define STCSR_COUNTFLAG_MSK (0x1 << 16 ) @@ -5972,19 +5972,19 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define STCSR_ENABLE_EN (0x1 << 0 ) /* EN */ /* Reset Value for STRVR*/ -#define STRVR_RVAL 0x0 +#define STRVR_RVAL 0x0 /* STRVR[RELOAD] - Value to load into the Current Value register when the counter reaches 0 */ #define STRVR_RELOAD_MSK (0xFFFFFF << 0 ) /* Reset Value for STCVR*/ -#define STCVR_RVAL 0x0 +#define STCVR_RVAL 0x0 /* STCVR[CURRENT] - Current counter value */ #define STCVR_CURRENT_MSK (0xFFFFFFFF << 0 ) /* Reset Value for STCR*/ -#define STCR_RVAL 0x0 +#define STCR_RVAL 0x0 /* STCR[NOREF] - If reads as 1, the Reference clock is not provided */ #define STCR_NOREF_MSK (0x1 << 31 ) @@ -6002,7 +6002,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define STCR_TENMS_MSK (0xFFFFFF << 0 ) /* Reset Value for ISER0*/ -#define ISER0_RVAL 0x0 +#define ISER0_RVAL 0x0 /* ISER0[DMAI2CMRX] - */ #define ISER0_DMAI2CMRX_MSK (0x1 << 30 ) @@ -6179,7 +6179,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define ISER0_T2_EN (0x1 << 0 ) /* EN */ /* Reset Value for ISER1*/ -#define ISER1_RVAL 0x0 +#define ISER1_RVAL 0x0 /* ISER1[PWM3] - */ #define ISER1_PWM3_MSK (0x1 << 9 ) @@ -6230,7 +6230,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define ISER1_DMAADC_EN (0x1 << 2 ) /* EN */ /* Reset Value for ICER0*/ -#define ICER0_RVAL 0x0 +#define ICER0_RVAL 0x0 /* ICER0[DMAI2CMRX] - */ #define ICER0_DMAI2CMRX_MSK (0x1 << 30 ) @@ -6407,7 +6407,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define ICER0_T2_EN (0x1 << 0 ) /* EN */ /* Reset Value for ICER1*/ -#define ICER1_RVAL 0x0 +#define ICER1_RVAL 0x0 /* ICER1[PWM3] - */ #define ICER1_PWM3_MSK (0x1 << 9 ) @@ -6458,7 +6458,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define ICER1_DMAADC_EN (0x1 << 2 ) /* EN */ /* Reset Value for ISPR0*/ -#define ISPR0_RVAL 0x0 +#define ISPR0_RVAL 0x0 /* ISPR0[DMAI2CMRX] - */ #define ISPR0_DMAI2CMRX_MSK (0x1 << 30 ) @@ -6635,7 +6635,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define ISPR0_T2_EN (0x1 << 0 ) /* EN */ /* Reset Value for ISPR1*/ -#define ISPR1_RVAL 0x0 +#define ISPR1_RVAL 0x0 /* ISPR1[PWM3] - */ #define ISPR1_PWM3_MSK (0x1 << 9 ) @@ -6686,7 +6686,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define ISPR1_DMAADC_EN (0x1 << 2 ) /* EN */ /* Reset Value for ICPR0*/ -#define ICPR0_RVAL 0x0 +#define ICPR0_RVAL 0x0 /* ICPR0[DMAI2CMRX] - */ #define ICPR0_DMAI2CMRX_MSK (0x1 << 30 ) @@ -6863,7 +6863,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define ICPR0_T2_EN (0x1 << 0 ) /* EN */ /* Reset Value for ICPR1*/ -#define ICPR1_RVAL 0x0 +#define ICPR1_RVAL 0x0 /* ICPR1[PWM3] - */ #define ICPR1_PWM3_MSK (0x1 << 9 ) @@ -6914,7 +6914,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define ICPR1_DMAADC_EN (0x1 << 2 ) /* EN */ /* Reset Value for IABR0*/ -#define IABR0_RVAL 0x0 +#define IABR0_RVAL 0x0 /* IABR0[DMAI2CMRX] - */ #define IABR0_DMAI2CMRX_MSK (0x1 << 30 ) @@ -7091,7 +7091,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define IABR0_T2_EN (0x1 << 0 ) /* EN */ /* Reset Value for IABR1*/ -#define IABR1_RVAL 0x0 +#define IABR1_RVAL 0x0 /* IABR1[PWM3] - */ #define IABR1_PWM3_MSK (0x1 << 9 ) @@ -7142,7 +7142,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define IABR1_DMAADC_EN (0x1 << 2 ) /* EN */ /* Reset Value for IPR0*/ -#define IPR0_RVAL 0x0 +#define IPR0_RVAL 0x0 /* IPR0[EXTINT2] - */ #define IPR0_EXTINT2_MSK (0xFF << 24 ) @@ -7157,7 +7157,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define IPR0_T2_MSK (0xFF << 0 ) /* Reset Value for IPR1*/ -#define IPR1_RVAL 0x0 +#define IPR1_RVAL 0x0 /* IPR1[EXTINT6] - */ #define IPR1_EXTINT6_MSK (0xFF << 24 ) @@ -7172,7 +7172,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define IPR1_EXTINT3_MSK (0xFF << 0 ) /* Reset Value for IPR2*/ -#define IPR2_RVAL 0x0 +#define IPR2_RVAL 0x0 /* IPR2[T3] - */ #define IPR2_T3_MSK (0xFF << 16 ) @@ -7184,7 +7184,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define IPR2_EXTINT7_MSK (0xFF << 0 ) /* Reset Value for IPR3*/ -#define IPR3_RVAL 0x0 +#define IPR3_RVAL 0x0 /* IPR3[FEE] - */ #define IPR3_FEE_MSK (0xFF << 24 ) @@ -7199,7 +7199,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define IPR3_T0_MSK (0xFF << 0 ) /* Reset Value for IPR4*/ -#define IPR4_RVAL 0x0 +#define IPR4_RVAL 0x0 /* IPR4[I2CS] - */ #define IPR4_I2CS_MSK (0xFF << 24 ) @@ -7214,7 +7214,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define IPR4_UART_MSK (0xFF << 0 ) /* Reset Value for IPR5*/ -#define IPR5_RVAL 0x0 +#define IPR5_RVAL 0x0 /* IPR5[DMASPI1TX] - */ #define IPR5_DMASPI1TX_MSK (0xFF << 24 ) @@ -7226,7 +7226,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define IPR5_I2CM_MSK (0xFF << 0 ) /* Reset Value for IPR6*/ -#define IPR6_RVAL 0x0 +#define IPR6_RVAL 0x0 /* IPR6[DMAI2CSTX] - */ #define IPR6_DMAI2CSTX_MSK (0xFF << 24 ) @@ -7241,7 +7241,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define IPR6_DMASPI1RX_MSK (0xFF << 0 ) /* Reset Value for IPR7*/ -#define IPR7_RVAL 0x0 +#define IPR7_RVAL 0x0 /* IPR7[DMAI2CMRX] - */ #define IPR7_DMAI2CMRX_MSK (0xFF << 16 ) @@ -7253,7 +7253,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define IPR7_DMAI2CSRX_MSK (0xFF << 0 ) /* Reset Value for IPR8*/ -#define IPR8_RVAL 0x0 +#define IPR8_RVAL 0x0 /* IPR8[DMASPI0TX] - */ #define IPR8_DMASPI0TX_MSK (0xFF << 24 ) @@ -7262,7 +7262,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define IPR8_DMAADC_MSK (0xFF << 16 ) /* Reset Value for IPR9*/ -#define IPR9_RVAL 0x0 +#define IPR9_RVAL 0x0 /* IPR9[PWM1] - */ #define IPR9_PWM1_MSK (0xFF << 24 ) @@ -7277,7 +7277,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define IPR9_DMASPI0RX_MSK (0xFF << 0 ) /* Reset Value for IPR10*/ -#define IPR10_RVAL 0x0 +#define IPR10_RVAL 0x0 /* IPR10[PWM3] - */ #define IPR10_PWM3_MSK (0xFF << 8 ) @@ -7286,7 +7286,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define IPR10_PWM2_MSK (0xFF << 0 ) /* Reset Value for CPUID*/ -#define CPUID_RVAL 0x412FC230 +#define CPUID_RVAL 0x412FC230 /* CPUID[IMPLEMENTER] - Indicates implementor */ #define CPUID_IMPLEMENTER_MSK (0xFF << 24 ) @@ -7301,7 +7301,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define CPUID_REVISION_MSK (0xF << 0 ) /* Reset Value for ICSR*/ -#define ICSR_RVAL 0x0 +#define ICSR_RVAL 0x0 /* ICSR[NMIPENDSET] - Setting this bit will activate an NMI */ #define ICSR_NMIPENDSET_MSK (0x1 << 31 ) @@ -7358,7 +7358,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define ICSR_VECTACTIVE_MSK (0x1FF << 0 ) /* Reset Value for VTOR*/ -#define VTOR_RVAL 0x0 +#define VTOR_RVAL 0x0 /* VTOR[TBLBASE] - */ #define VTOR_TBLBASE_MSK (0x1 << 29 ) @@ -7370,7 +7370,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define VTOR_TBLOFF_MSK (0x3FFFFF << 7 ) /* Reset Value for AIRCR*/ -#define AIRCR_RVAL 0xFA050000 +#define AIRCR_RVAL 0xFA050000 /* AIRCR[VECTKEYSTAT] - Reads as 0xFA05 */ #define AIRCR_VECTKEYSTAT_MSK (0xFFFF << 16 ) @@ -7403,7 +7403,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define AIRCR_VECTRESET_EN (0x1 << 0 ) /* EN */ /* Reset Value for SCR*/ -#define SCR_RVAL 0x0 +#define SCR_RVAL 0x0 /* SCR[SEVONPEND] - */ #define SCR_SEVONPEND_MSK (0x1 << 4 ) @@ -7424,7 +7424,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define SCR_SLEEPONEXIT_EN (0x1 << 1 ) /* EN */ /* Reset Value for CCR*/ -#define CCR_RVAL 0x200 +#define CCR_RVAL 0x200 /* CCR[STKALIGN] - */ #define CCR_STKALIGN_MSK (0x1 << 9 ) @@ -7463,7 +7463,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define CCR_NONBASETHRDENA_EN (0x1 << 0 ) /* EN */ /* Reset Value for SHPR1*/ -#define SHPR1_RVAL 0x0 +#define SHPR1_RVAL 0x0 /* SHPR1[PRI7] - Priority of system handler 7 - reserved */ #define SHPR1_PRI7_MSK (0xFF << 24 ) @@ -7478,7 +7478,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define SHPR1_PRI4_MSK (0xFF << 0 ) /* Reset Value for SHPR2*/ -#define SHPR2_RVAL 0x0 +#define SHPR2_RVAL 0x0 /* SHPR2[PRI11] - Priority of system handler 11 - SVCall */ #define SHPR2_PRI11_MSK (0xFF << 24 ) @@ -7493,7 +7493,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define SHPR2_PRI8_MSK (0xFF << 0 ) /* Reset Value for SHPR3*/ -#define SHPR3_RVAL 0x0 +#define SHPR3_RVAL 0x0 /* SHPR3[PRI15] - Priority of system handler 15 - SysTick */ #define SHPR3_PRI15_MSK (0xFF << 24 ) @@ -7508,7 +7508,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define SHPR3_PRI12_MSK (0xFF << 0 ) /* Reset Value for SHCSR*/ -#define SHCSR_RVAL 0x0 +#define SHCSR_RVAL 0x0 /* SHCSR[USGFAULTENA] - Enable for UsageFault */ #define SHCSR_USGFAULTENA_MSK (0x1 << 18 ) @@ -7595,7 +7595,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define SHCSR_MEMFAULTACT_EN (0x1 << 0 ) /* EN */ /* Reset Value for CFSR*/ -#define CFSR_RVAL 0x0 +#define CFSR_RVAL 0x0 /* CFSR[DIVBYZERO] - Divide by zero error */ #define CFSR_DIVBYZERO_MSK (0x1 << 25 ) @@ -7700,7 +7700,7 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define CFSR_IACCVIOL_EN (0x1 << 0 ) /* EN */ /* Reset Value for HFSR*/ -#define HFSR_RVAL 0x0 +#define HFSR_RVAL 0x0 /* HFSR[DEBUGEVT] - Debug event, and the Debug Fault Status Register has been updated. */ #define HFSR_DEBUGEVT_MSK (0x1 << 31 ) @@ -7721,19 +7721,19 @@ typedef struct { /*!< pADI_INTERRUPT Structure #define HFSR_VECTTBL_EN (0x1 << 1 ) /* EN */ /* Reset Value for MMFAR*/ -#define MMFAR_RVAL 0x0 +#define MMFAR_RVAL 0x0 /* MMFAR[ADDRESS] - Data address MPU faulted. */ #define MMFAR_ADDRESS_MSK (0xFFFFFFFF << 0 ) /* Reset Value for BFAR*/ -#define BFAR_RVAL 0x0 +#define BFAR_RVAL 0x0 /* BFAR[ADDRESS] - Updated on precise data access faults */ #define BFAR_ADDRESS_MSK (0xFFFFFFFF << 0 ) /* Reset Value for STIR*/ -#define STIR_RVAL 0x0 +#define STIR_RVAL 0x0 /* STIR[INTID] - The value written in this field is the interrupt to be triggered. */ #define STIR_INTID_MSK (0x3FF << 0 ) @@ -7767,7 +7767,7 @@ typedef struct { /*!< pADI_PWRCTL Structure #endif // (__NO_MMR_STRUCTS__==0) /* Reset Value for PWRMOD*/ -#define PWRMOD_RVAL 0x100 +#define PWRMOD_RVAL 0x100 /* PWRMOD[WICENACK] - WIC Acknowledge, for cortex M3 deep sleep mode */ #define PWRMOD_WICENACK_BBA (*(volatile unsigned long *) 0x4204800C) @@ -7783,7 +7783,7 @@ typedef struct { /*!< pADI_PWRCTL Structure #define PWRMOD_MOD_SHUTDOWN (0x6 << 0 ) /* SHUTDOWN. */ /* Reset Value for PWRKEY*/ -#define PWRKEY_RVAL 0x0 +#define PWRKEY_RVAL 0x0 /* PWRKEY[VALUE] - */ #define PWRKEY_VALUE_MSK (0xFFFF << 0 ) @@ -7791,7 +7791,7 @@ typedef struct { /*!< pADI_PWRCTL Structure #define PWRKEY_VALUE_KEY2 (0xF27B << 0 ) /* KEY2 */ /* Reset Value for PSMCON*/ -#define PSMCON_RVAL 0x3 +#define PSMCON_RVAL 0x3 /* PSMCON[PD] - Power Supply Monitor power down bit. */ #define PSMCON_PD_BBA (*(volatile unsigned long *) 0x42048104) @@ -7801,7 +7801,7 @@ typedef struct { /*!< pADI_PWRCTL Structure #define PSMCON_PD_EN (0x1 << 1 ) /* EN. Power down the PSM. */ /* Reset Value for SRAMRET*/ -#define SRAMRET_RVAL 0x1 +#define SRAMRET_RVAL 0x1 /* SRAMRET[RETAIN] - SRAM retention enable bit */ #define SRAMRET_RETAIN_BBA (*(volatile unsigned long *) 0x42048F00) @@ -7811,7 +7811,7 @@ typedef struct { /*!< pADI_PWRCTL Structure #define SRAMRET_RETAIN_EN (0x1 << 0 ) /* EN. To retain contents of the entire 16 kB of SRAM */ /* Reset Value for SHUTDOWN*/ -#define SHUTDOWN_RVAL 0x0 +#define SHUTDOWN_RVAL 0x0 /* SHUTDOWN[EINT8] - External Interrupt 8 detected during SHUTDOWN mode */ #define SHUTDOWN_EINT8_BBA (*(volatile unsigned long *) 0x42048F88) @@ -7905,7 +7905,7 @@ typedef struct { /*!< pADI_PWM Structure #endif // (__NO_MMR_STRUCTS__==0) /* Reset Value for PWMCON0*/ -#define PWMCON0_RVAL 0x12 +#define PWMCON0_RVAL 0x12 /* PWMCON0[SYNC] - PWM Synchronization. */ #define PWMCON0_SYNC_BBA (*(volatile unsigned long *) 0x4202003C) @@ -8010,7 +8010,7 @@ typedef struct { /*!< pADI_PWM Structure #define PWMCON0_PWMEN_EN (0x1 << 0 ) /* EN. Enables all PWM outputs. */ /* Reset Value for PWMCON1*/ -#define PWMCON1_RVAL 0x0 +#define PWMCON1_RVAL 0x0 /* PWMCON1[TRIPEN] - Enable PWM trip functionality. */ #define PWMCON1_TRIPEN_BBA (*(volatile unsigned long *) 0x42020098) @@ -8020,7 +8020,7 @@ typedef struct { /*!< pADI_PWM Structure #define PWMCON1_TRIPEN_EN (0x1 << 6 ) /* EN. Enable PWM trip functionality. */ /* Reset Value for PWMCLRI*/ -#define PWMCLRI_RVAL 0x0 +#define PWMCLRI_RVAL 0x0 /* PWMCLRI[TRIP] - Clear the latched trip interrupt. This bit always reads 0. */ #define PWMCLRI_TRIP_BBA (*(volatile unsigned long *) 0x42020110) @@ -8053,97 +8053,97 @@ typedef struct { /*!< pADI_PWM Structure #define PWMCLRI_IRQPWM0_EN (0x1 << 0 ) /* EN. Clear the latched IRQPWM0 interrupt. */ /* Reset Value for PWM0COM0*/ -#define PWM0COM0_RVAL 0x0 +#define PWM0COM0_RVAL 0x0 /* PWM0COM0[VALUE] - */ #define PWM0COM0_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for PWM0COM1*/ -#define PWM0COM1_RVAL 0x0 +#define PWM0COM1_RVAL 0x0 /* PWM0COM1[VALUE] - */ #define PWM0COM1_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for PWM0COM2*/ -#define PWM0COM2_RVAL 0x0 +#define PWM0COM2_RVAL 0x0 /* PWM0COM2[VALUE] - */ #define PWM0COM2_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for PWM0LEN*/ -#define PWM0LEN_RVAL 0x0 +#define PWM0LEN_RVAL 0x0 /* PWM0LEN[VALUE] - */ #define PWM0LEN_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for PWM1COM0*/ -#define PWM1COM0_RVAL 0x0 +#define PWM1COM0_RVAL 0x0 /* PWM1COM0[VALUE] - */ #define PWM1COM0_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for PWM1COM1*/ -#define PWM1COM1_RVAL 0x0 +#define PWM1COM1_RVAL 0x0 /* PWM1COM1[VALUE] - */ #define PWM1COM1_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for PWM1COM2*/ -#define PWM1COM2_RVAL 0x0 +#define PWM1COM2_RVAL 0x0 /* PWM1COM2[VALUE] - */ #define PWM1COM2_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for PWM1LEN*/ -#define PWM1LEN_RVAL 0x0 +#define PWM1LEN_RVAL 0x0 /* PWM1LEN[VALUE] - */ #define PWM1LEN_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for PWM2COM0*/ -#define PWM2COM0_RVAL 0x0 +#define PWM2COM0_RVAL 0x0 /* PWM2COM0[VALUE] - */ #define PWM2COM0_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for PWM2COM1*/ -#define PWM2COM1_RVAL 0x0 +#define PWM2COM1_RVAL 0x0 /* PWM2COM1[VALUE] - */ #define PWM2COM1_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for PWM2COM2*/ -#define PWM2COM2_RVAL 0x0 +#define PWM2COM2_RVAL 0x0 /* PWM2COM2[VALUE] - */ #define PWM2COM2_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for PWM2LEN*/ -#define PWM2LEN_RVAL 0x0 +#define PWM2LEN_RVAL 0x0 /* PWM2LEN[VALUE] - */ #define PWM2LEN_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for PWM3COM0*/ -#define PWM3COM0_RVAL 0x0 +#define PWM3COM0_RVAL 0x0 /* PWM3COM0[VALUE] - */ #define PWM3COM0_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for PWM3COM1*/ -#define PWM3COM1_RVAL 0x0 +#define PWM3COM1_RVAL 0x0 /* PWM3COM1[VALUE] - */ #define PWM3COM1_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for PWM3COM2*/ -#define PWM3COM2_RVAL 0x0 +#define PWM3COM2_RVAL 0x0 /* PWM3COM2[VALUE] - */ #define PWM3COM2_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for PWM3LEN*/ -#define PWM3LEN_RVAL 0x0 +#define PWM3LEN_RVAL 0x0 /* PWM3LEN[VALUE] - */ #define PWM3LEN_VALUE_MSK (0xFFFF << 0 ) @@ -8158,7 +8158,7 @@ typedef struct { /*!< pADI_PWM Structure #if (__NO_MMR_STRUCTS__==0) typedef struct { /*!< pADI_RESET Structure */ - + union { __IO uint8_t RSTSTA; /*!< Reset Status */ __IO uint8_t RSTCLR; /*!< Reset Status Clear */ @@ -8170,7 +8170,7 @@ typedef struct { /*!< pADI_RESET Structure #endif // (__NO_MMR_STRUCTS__==0) /* Reset Value for RSTSTA*/ -#define RSTSTA_RVAL 0x3 +#define RSTSTA_RVAL 0x3 /* RSTSTA[SWRST] - Software reset status bit */ #define RSTSTA_SWRST_BBA (*(volatile unsigned long *) 0x42048810) @@ -8208,7 +8208,7 @@ typedef struct { /*!< pADI_RESET Structure #define RSTSTA_PORLV_SET (0x1 << 0 ) /* SET. This bit indicates that the AVDD supply has dropped below the POR trip point, causing a Power On Reset. It is also set when waking up from SHUTDOWN mode. */ /* Reset Value for RSTCLR*/ -#define RSTCLR_RVAL 0x3 +#define RSTCLR_RVAL 0x3 /* RSTCLR[SWRST] - Software reset clear status bit */ #define RSTCLR_SWRST_BBA (*(volatile unsigned long *) 0x42048810) @@ -8280,7 +8280,7 @@ typedef struct { /*!< pADI_SPI0 Structure #endif // (__NO_MMR_STRUCTS__==0) /* Reset Value for SPI0STA*/ -#define SPI0STA_RVAL 0x0 +#define SPI0STA_RVAL 0x0 /* SPI0STA[CSERR] - CS error status bit. This bit generates an interrupt when detecting an abrupt CS desassertion before the full byte of data is transmitted completely. */ #define SPI0STA_CSERR_BBA (*(volatile unsigned long *) 0x42080030) @@ -8348,19 +8348,19 @@ typedef struct { /*!< pADI_SPI0 Structure #define SPI0STA_IRQ_SET (0x1 << 0 ) /* SET. Set to 1 when an SPI0 based interrupt occurs. */ /* Reset Value for SPI0RX*/ -#define SPI0RX_RVAL 0x0 +#define SPI0RX_RVAL 0x0 /* SPI0RX[VALUE] - 8-bit receive register. A read of the RX FIFO returns the next byte to be read from the FIFO. A read of the FIFO when it is empty returns zero. */ #define SPI0RX_VALUE_MSK (0xFF << 0 ) /* Reset Value for SPI0TX*/ -#define SPI0TX_RVAL 0x0 +#define SPI0TX_RVAL 0x0 /* SPI0TX[VALUE] - 8-bit transmit register. A write to the Tx FIFO address space writes data to the next available location in the Tx FIFO. If the FIFO is full, the oldest byte of data in the FIFO is overwritten. A read from this address location return zero. */ #define SPI0TX_VALUE_MSK (0xFF << 0 ) /* Reset Value for SPI0DIV*/ -#define SPI0DIV_RVAL 0x0 +#define SPI0DIV_RVAL 0x0 /* SPI0DIV[BCRST] - Configures the behavior of SPI communication after an abrupt deassertion of CS. This bit should be set in slave and master mode. */ #define SPI0DIV_BCRST_BBA (*(volatile unsigned long *) 0x4208019C) @@ -8373,7 +8373,7 @@ typedef struct { /*!< pADI_SPI0 Structure #define SPI0DIV_DIV_MSK (0x3F << 0 ) /* Reset Value for SPI0CON*/ -#define SPI0CON_RVAL 0x0 +#define SPI0CON_RVAL 0x0 /* SPI0CON[MOD] - IRQ mode bits. When TIM is set these bits configure when the Tx/Rx interrupts occur in a transfer. For a DMA Rx transfer, these bits should be 00. */ #define SPI0CON_MOD_MSK (0x3 << 14 ) @@ -8481,7 +8481,7 @@ typedef struct { /*!< pADI_SPI0 Structure #define SPI0CON_ENABLE_EN (0x1 << 0 ) /* EN. Enable the SPI. */ /* Reset Value for SPI0DMA*/ -#define SPI0DMA_RVAL 0x0 +#define SPI0DMA_RVAL 0x0 /* SPI0DMA[IENRXDMA] - Receive DMA request enable bit. */ #define SPI0DMA_IENRXDMA_BBA (*(volatile unsigned long *) 0x42080288) @@ -8505,7 +8505,7 @@ typedef struct { /*!< pADI_SPI0 Structure #define SPI0DMA_ENABLE_EN (0x1 << 0 ) /* EN. Enable a DMA transfer. Starts the transfer of a master configured to initiate transfer on transmit. */ /* Reset Value for SPI0CNT*/ -#define SPI0CNT_RVAL 0x0 +#define SPI0CNT_RVAL 0x0 /* SPI0CNT[VALUE] - Number of bytes requested by the SPI master during DMA transfer, when configured to initiate a transfer on a read of SPI0RX. This register is only used in DMA, master, Rx mode. */ #define SPI0CNT_VALUE_MSK (0xFF << 0 ) @@ -8521,7 +8521,7 @@ typedef struct { /*!< pADI_SPI0 Structure #endif // (__NO_MMR_STRUCTS__==1) /* Reset Value for SPI1STA*/ -#define SPI1STA_RVAL 0x0 +#define SPI1STA_RVAL 0x0 /* SPI1STA[CSERR] - CS error status bit. This bit generates an interrupt when detecting an abrupt CS desassertion before the full byte of data is transmitted completely. */ #define SPI1STA_CSERR_BBA (*(volatile unsigned long *) 0x42088030) @@ -8589,19 +8589,19 @@ typedef struct { /*!< pADI_SPI0 Structure #define SPI1STA_IRQ_SET (0x1 << 0 ) /* SET. Set to 1 when an SPI1 based interrupt occurs. */ /* Reset Value for SPI1RX*/ -#define SPI1RX_RVAL 0x0 +#define SPI1RX_RVAL 0x0 /* SPI1RX[VALUE] - 8-bit receive register. A read of the RX FIFO returns the next byte to be read from the FIFO. A read of the FIFO when it is empty returns zero. */ #define SPI1RX_VALUE_MSK (0xFF << 0 ) /* Reset Value for SPI1TX*/ -#define SPI1TX_RVAL 0x0 +#define SPI1TX_RVAL 0x0 /* SPI1TX[VALUE] - 8-bit transmit register. A write to the Tx FIFO address space writes data to the next available location in the Tx FIFO. If the FIFO is full, the oldest byte of data in the FIFO is overwritten. A read from this address location return zero. */ #define SPI1TX_VALUE_MSK (0xFF << 0 ) /* Reset Value for SPI1DIV*/ -#define SPI1DIV_RVAL 0x0 +#define SPI1DIV_RVAL 0x0 /* SPI1DIV[BCRST] - Configures the behavior of SPI communication after an abrupt deassertion of CS. This bit should be set in slave and master mode. */ #define SPI1DIV_BCRST_BBA (*(volatile unsigned long *) 0x4208819C) @@ -8614,7 +8614,7 @@ typedef struct { /*!< pADI_SPI0 Structure #define SPI1DIV_DIV_MSK (0x3F << 0 ) /* Reset Value for SPI1CON*/ -#define SPI1CON_RVAL 0x0 +#define SPI1CON_RVAL 0x0 /* SPI1CON[MOD] - IRQ mode bits. When TIM is set these bits configure when the Tx/Rx interrupts occur in a transfer. For a DMA Rx transfer, these bits should be 00. */ #define SPI1CON_MOD_MSK (0x3 << 14 ) @@ -8722,7 +8722,7 @@ typedef struct { /*!< pADI_SPI0 Structure #define SPI1CON_ENABLE_EN (0x1 << 0 ) /* EN. Enable the SPI. */ /* Reset Value for SPI1DMA*/ -#define SPI1DMA_RVAL 0x0 +#define SPI1DMA_RVAL 0x0 /* SPI1DMA[IENRXDMA] - Receive DMA request enable bit. */ #define SPI1DMA_IENRXDMA_BBA (*(volatile unsigned long *) 0x42088288) @@ -8746,7 +8746,7 @@ typedef struct { /*!< pADI_SPI0 Structure #define SPI1DMA_ENABLE_EN (0x1 << 0 ) /* EN. Enable a DMA transfer. Starts the transfer of a master configured to initiate transfer on transmit. */ /* Reset Value for SPI1CNT*/ -#define SPI1CNT_RVAL 0x0 +#define SPI1CNT_RVAL 0x0 /* SPI1CNT[VALUE] - Number of bytes requested by the SPI master during DMA transfer, when configured to initiate a transfer on a read of SPI0RX. This register is only used in DMA, master, Rx mode.. */ #define SPI1CNT_VALUE_MSK (0xFF << 0 ) @@ -8783,19 +8783,19 @@ typedef struct { /*!< pADI_TM0 Structure #endif // (__NO_MMR_STRUCTS__==0) /* Reset Value for T0LD*/ -#define T0LD_RVAL 0x0 +#define T0LD_RVAL 0x0 /* T0LD[VALUE] - Load value. */ #define T0LD_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for T0VAL*/ -#define T0VAL_RVAL 0x0 +#define T0VAL_RVAL 0x0 /* T0VAL[VALUE] - Current counter value. */ #define T0VAL_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for T0CON*/ -#define T0CON_RVAL 0xA +#define T0CON_RVAL 0xA /* T0CON[EVENTEN] - Enable event bit. */ #define T0CON_EVENTEN_BBA (*(volatile unsigned long *) 0x42000130) @@ -8865,7 +8865,7 @@ typedef struct { /*!< pADI_TM0 Structure #define T0CON_PRE_DIV32768 (0x3 << 0 ) /* DIV32768. Source clock/32768. */ /* Reset Value for T0CLRI*/ -#define T0CLRI_RVAL 0x0 +#define T0CLRI_RVAL 0x0 /* T0CLRI[CAP] - Clear captured event interrupt. */ #define T0CLRI_CAP_BBA (*(volatile unsigned long *) 0x42000184) @@ -8880,13 +8880,13 @@ typedef struct { /*!< pADI_TM0 Structure #define T0CLRI_TMOUT_CLR (0x1 << 0 ) /* CLR. Clear a timeout interrupt. This bit always reads 0. */ /* Reset Value for T0CAP*/ -#define T0CAP_RVAL 0x0 +#define T0CAP_RVAL 0x0 /* T0CAP[VALUE] - Capture value. */ #define T0CAP_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for T0STA*/ -#define T0STA_RVAL 0x0 +#define T0STA_RVAL 0x0 /* T0STA[CLRI] - T0CLRI write sync in progress.. */ #define T0STA_CLRI_BBA (*(volatile unsigned long *) 0x4200039C) @@ -8926,19 +8926,19 @@ typedef struct { /*!< pADI_TM0 Structure #endif // (__NO_MMR_STRUCTS__==1) /* Reset Value for T1LD*/ -#define T1LD_RVAL 0x0 +#define T1LD_RVAL 0x0 /* T1LD[VALUE] - Load value. */ #define T1LD_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for T1VAL*/ -#define T1VAL_RVAL 0x0 +#define T1VAL_RVAL 0x0 /* T1VAL[VALUE] - Current counter value. */ #define T1VAL_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for T1CON*/ -#define T1CON_RVAL 0xA +#define T1CON_RVAL 0xA /* T1CON[EVENTEN] - Enable event bit. */ #define T1CON_EVENTEN_BBA (*(volatile unsigned long *) 0x42008130) @@ -9008,7 +9008,7 @@ typedef struct { /*!< pADI_TM0 Structure #define T1CON_PRE_DIV32768 (0x3 << 0 ) /* DIV32768. Source clock/32768. */ /* Reset Value for T1CLRI*/ -#define T1CLRI_RVAL 0x0 +#define T1CLRI_RVAL 0x0 /* T1CLRI[CAP] - Clear captured event interrupt. */ #define T1CLRI_CAP_BBA (*(volatile unsigned long *) 0x42008184) @@ -9023,13 +9023,13 @@ typedef struct { /*!< pADI_TM0 Structure #define T1CLRI_TMOUT_CLR (0x1 << 0 ) /* CLR. Clear a timeout interrupt. This bit always reads 0. */ /* Reset Value for T1CAP*/ -#define T1CAP_RVAL 0x0 +#define T1CAP_RVAL 0x0 /* T1CAP[VALUE] - Capture value. */ #define T1CAP_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for T1STA*/ -#define T1STA_RVAL 0x0 +#define T1STA_RVAL 0x0 /* T1STA[CLRI] - T1CLRI write sync in progress. */ #define T1STA_CLRI_BBA (*(volatile unsigned long *) 0x4200839C) @@ -9069,7 +9069,7 @@ typedef struct { /*!< pADI_TM0 Structure #if (__NO_MMR_STRUCTS__==0) typedef struct { /*!< pADI_UART Structure */ - + union { __IO uint8_t COMTX; /*!< Transmit Holding Register */ __IO uint8_t COMRX; /*!< Receive Buffer Register */ @@ -9105,19 +9105,19 @@ typedef struct { /*!< pADI_UART Structure #endif // (__NO_MMR_STRUCTS__==0) /* Reset Value for COMTX*/ -#define COMTX_RVAL 0x0 +#define COMTX_RVAL 0x0 /* COMTX[VALUE] - Transmit Holding Register */ #define COMTX_VALUE_MSK (0xFF << 0 ) /* Reset Value for COMRX*/ -#define COMRX_RVAL 0x0 +#define COMRX_RVAL 0x0 /* COMRX[VALUE] - Receive Buffer Register */ #define COMRX_VALUE_MSK (0xFF << 0 ) /* Reset Value for COMIEN*/ -#define COMIEN_RVAL 0x0 +#define COMIEN_RVAL 0x0 /* COMIEN[EDMAR] - DMA requests in transmit mode */ #define COMIEN_EDMAR_BBA (*(volatile unsigned long *) 0x420A0094) @@ -9162,7 +9162,7 @@ typedef struct { /*!< pADI_UART Structure #define COMIEN_ERBFI_EN (0x1 << 0 ) /* EN. Enable the receive interrupt. An interrupt is generated when the COMRX register is loaded with the received data. Note that if the COMRX is already full when enabling this bit, an interrupt is generated immediately. */ /* Reset Value for COMIIR*/ -#define COMIIR_RVAL 0x1 +#define COMIIR_RVAL 0x1 /* COMIIR[STA] - Status bits. */ #define COMIIR_STA_MSK (0x3 << 1 ) @@ -9179,7 +9179,7 @@ typedef struct { /*!< pADI_UART Structure #define COMIIR_NINT_SET (0x1 << 0 ) /* SET. There is no interrupt (default). */ /* Reset Value for COMLCR*/ -#define COMLCR_RVAL 0x0 +#define COMLCR_RVAL 0x0 /* COMLCR[BRK] - Set Break. */ #define COMLCR_BRK_BBA (*(volatile unsigned long *) 0x420A0198) @@ -9224,7 +9224,7 @@ typedef struct { /*!< pADI_UART Structure #define COMLCR_WLS_8BITS (0x3 << 0 ) /* 8BITS. 8 bits. */ /* Reset Value for COMMCR*/ -#define COMMCR_RVAL 0x0 +#define COMMCR_RVAL 0x0 /* COMMCR[LOOPBACK] - Loop Back. */ #define COMMCR_LOOPBACK_BBA (*(volatile unsigned long *) 0x420A0210) @@ -9241,7 +9241,7 @@ typedef struct { /*!< pADI_UART Structure #define COMMCR_RTS_EN (0x1 << 1 ) /* EN. Force the RTS output to 0. */ /* Reset Value for COMLSR*/ -#define COMLSR_RVAL 0x60 +#define COMLSR_RVAL 0x60 /* COMLSR[TEMT] - COMTX and Shift Register Empty Status Bit. */ #define COMLSR_TEMT_BBA (*(volatile unsigned long *) 0x420A0298) @@ -9293,7 +9293,7 @@ typedef struct { /*!< pADI_UART Structure #define COMLSR_DR_SET (0x1 << 0 ) /* SET. Set automatically when COMRX is full. */ /* Reset Value for COMMSR*/ -#define COMMSR_RVAL 0x0 +#define COMMSR_RVAL 0x0 /* COMMSR[CTS] - Clear To Send signal status bit. */ #define COMMSR_CTS_BBA (*(volatile unsigned long *) 0x420A0310) @@ -9310,7 +9310,7 @@ typedef struct { /*!< pADI_UART Structure #define COMMSR_DCTS_EN (0x1 << 0 ) /* EN. Set automatically if CTS changed state since COMMSR last read. */ /* Reset Value for COMFBR*/ -#define COMFBR_RVAL 0x0 +#define COMFBR_RVAL 0x0 /* COMFBR[ENABLE] - Fractional baud rate generator enable bit. Used for more accurate baud rate generation. */ #define COMFBR_ENABLE_BBA (*(volatile unsigned long *) 0x420A04BC) @@ -9326,7 +9326,7 @@ typedef struct { /*!< pADI_UART Structure #define COMFBR_DIVN_MSK (0x7FF << 0 ) /* Reset Value for COMDIV*/ -#define COMDIV_RVAL 0x1 +#define COMDIV_RVAL 0x1 /* COMDIV[VALUE] - Sets the baud rate. The COMDIV register should not be 0. */ #define COMDIV_VALUE_MSK (0xFFFF << 0 ) @@ -9390,19 +9390,19 @@ typedef struct { /*!< pADI_WUT Structure #endif // (__NO_MMR_STRUCTS__==0) /* Reset Value for T2VAL0*/ -#define T2VAL0_RVAL 0x0 +#define T2VAL0_RVAL 0x0 /* T2VAL0[VALUE] - Current Wake-Up timer value (bits 15 to 0). */ #define T2VAL0_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for T2VAL1*/ -#define T2VAL1_RVAL 0x0 +#define T2VAL1_RVAL 0x0 /* T2VAL1[VALUE] - Current Wake-Up timer value (bits 31 to 16). */ #define T2VAL1_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for T2CON*/ -#define T2CON_RVAL 0x40 +#define T2CON_RVAL 0x40 /* T2CON[STOPINC] - Allows the user to update the interval register safely. */ #define T2CON_STOPINC_BBA (*(volatile unsigned long *) 0x4204A12C) @@ -9454,49 +9454,49 @@ typedef struct { /*!< pADI_WUT Structure #define T2CON_PRE_DIV32768 (0x3 << 0 ) /* DIV32768. Source clock/32768. */ /* Reset Value for T2INC*/ -#define T2INC_RVAL 0xC8 +#define T2INC_RVAL 0xC8 /* T2INC[VALUE] - Wake-up interval */ #define T2INC_VALUE_MSK (0xFFF << 0 ) /* Reset Value for T2WUFB0*/ -#define T2WUFB0_RVAL 0x1FFF +#define T2WUFB0_RVAL 0x1FFF /* T2WUFB0[VALUE] - Lower 16 bits of Wake-Up Field B */ #define T2WUFB0_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for T2WUFB1*/ -#define T2WUFB1_RVAL 0x0 +#define T2WUFB1_RVAL 0x0 /* T2WUFB1[VALUE] - Upper 16 bits of Wake-Up Field B */ #define T2WUFB1_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for T2WUFC0*/ -#define T2WUFC0_RVAL 0x2FFF +#define T2WUFC0_RVAL 0x2FFF /* T2WUFC0[VALUE] - Lower 16 bits of Wake-Up Field C */ #define T2WUFC0_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for T2WUFC1*/ -#define T2WUFC1_RVAL 0x0 +#define T2WUFC1_RVAL 0x0 /* T2WUFC1[VALUE] - Upper 16 bits of Wake-Up Field C */ #define T2WUFC1_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for T2WUFD0*/ -#define T2WUFD0_RVAL 0x3FFF +#define T2WUFD0_RVAL 0x3FFF /* T2WUFD0[VALUE] - Lower 16 bits of Wake-Up Field D */ #define T2WUFD0_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for T2WUFD1*/ -#define T2WUFD1_RVAL 0x0 +#define T2WUFD1_RVAL 0x0 /* T2WUFD1[VALUE] - Upper 16 bits of Wake-Up Field D */ #define T2WUFD1_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for T2IEN*/ -#define T2IEN_RVAL 0x0 +#define T2IEN_RVAL 0x0 /* T2IEN[ROLL] - Interrupt enable bit when the counter rolls over. Only occurs in free running mode. */ #define T2IEN_ROLL_BBA (*(volatile unsigned long *) 0x4204A510) @@ -9534,7 +9534,7 @@ typedef struct { /*!< pADI_WUT Structure #define T2IEN_WUFA_EN (0x1 << 0 ) /* EN. Generate an interrupt when T2VAL reaches T2WUFA. */ /* Reset Value for T2STA*/ -#define T2STA_RVAL 0x0 +#define T2STA_RVAL 0x0 /* T2STA[CON] - Indicates when a change in the enable bit is synchronized to the 32 kHz clock domain (Done automatically) */ #define T2STA_CON_BBA (*(volatile unsigned long *) 0x4204A5A0) @@ -9586,7 +9586,7 @@ typedef struct { /*!< pADI_WUT Structure #define T2STA_WUFA_SET (0x1 << 0 ) /* SET. Indicates that a comparator interrupt has occurred. */ /* Reset Value for T2CLRI*/ -#define T2CLRI_RVAL 0x0 +#define T2CLRI_RVAL 0x0 /* T2CLRI[ROLL] - Clear interrupt on Rollover. Only occurs in free running mode. */ #define T2CLRI_ROLL_BBA (*(volatile unsigned long *) 0x4204A610) @@ -9619,13 +9619,13 @@ typedef struct { /*!< pADI_WUT Structure #define T2CLRI_WUFA_CLR (0x1 << 0 ) /* CLR. Clear the T2WUFA interrupt flag. */ /* Reset Value for T2WUFA0*/ -#define T2WUFA0_RVAL 0x1900 +#define T2WUFA0_RVAL 0x1900 /* T2WUFA0[VALUE] - Lower 16 bits of Compare Register A */ #define T2WUFA0_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for T2WUFA1*/ -#define T2WUFA1_RVAL 0x0 +#define T2WUFA1_RVAL 0x0 /* T2WUFA1[VALUE] - Upper 16 bits of Compare Register A */ #define T2WUFA1_VALUE_MSK (0xFFFF << 0 ) @@ -9659,19 +9659,19 @@ typedef struct { /*!< pADI_WDT Structure #endif // (__NO_MMR_STRUCTS__==0) /* Reset Value for T3LD*/ -#define T3LD_RVAL 0x1000 +#define T3LD_RVAL 0x1000 /* T3LD[VALUE] - Load value. */ #define T3LD_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for T3VAL*/ -#define T3VAL_RVAL 0x1000 +#define T3VAL_RVAL 0x1000 /* T3VAL[VALUE] - Current counter value. */ #define T3VAL_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for T3CON*/ -#define T3CON_RVAL 0xE9 +#define T3CON_RVAL 0xE9 /* T3CON[MOD] - Timer Mode */ #define T3CON_MOD_BBA (*(volatile unsigned long *) 0x4204B118) @@ -9709,13 +9709,13 @@ typedef struct { /*!< pADI_WDT Structure #define T3CON_PD_EN (0x1 << 0 ) /* EN. The timer stops counting when in hibernate mode. */ /* Reset Value for T3CLRI*/ -#define T3CLRI_RVAL 0x0 +#define T3CLRI_RVAL 0x0 /* T3CLRI[VALUE] - Clear watchdog. */ #define T3CLRI_VALUE_MSK (0xFFFF << 0 ) /* Reset Value for T3STA*/ -#define T3STA_RVAL 0x20 +#define T3STA_RVAL 0x20 /* T3STA[LOCK] - Lock status bit. */ #define T3STA_LOCK_BBA (*(volatile unsigned long *) 0x4204B310) @@ -9772,36 +9772,36 @@ typedef struct { /*!< pADI_WDT Structure *********************************************/ //iEiNr in EiCfg() -#define EXTINT0 0x0 -#define EXTINT1 0x1 -#define EXTINT2 0x2 -#define EXTINT3 0x3 -#define EXTINT4 0x4 -#define EXTINT5 0x5 -#define EXTINT6 0x6 -#define EXTINT7 0x7 -#define EXTINT8 0x8 +#define EXTINT0 0x0 +#define EXTINT1 0x1 +#define EXTINT2 0x2 +#define EXTINT3 0x3 +#define EXTINT4 0x4 +#define EXTINT5 0x5 +#define EXTINT6 0x6 +#define EXTINT7 0x7 +#define EXTINT8 0x8 -//iEnable in EiCfg() -#define INT_DIS 0x0 -#define INT_EN 0x1 +//iEnable in EiCfg() +#define INT_DIS 0x0 +#define INT_EN 0x1 -//iMode in EiCfg() -#define INT_RISE 0x0 -#define INT_FALL 0x1 +//iMode in EiCfg() +#define INT_RISE 0x0 +#define INT_FALL 0x1 #define INT_EDGES 0x2 -#define INT_HIGH 0x3 -#define INT_LOW 0x4 +#define INT_HIGH 0x3 +#define INT_LOW 0x4 //Bit values. -#define BIT0 1 -#define BIT1 2 -#define BIT2 4 -#define BIT3 8 -#define BIT4 0x10 -#define BIT5 0x20 -#define BIT6 0x40 -#define BIT7 0x80 +#define BIT0 1 +#define BIT1 2 +#define BIT2 4 +#define BIT3 8 +#define BIT4 0x10 +#define BIT5 0x20 +#define BIT6 0x40 +#define BIT7 0x80 /* ================================================================================ */ @@ -9868,7 +9868,7 @@ typedef struct { /*!< pADI_WDT Structure #ifdef __cplusplus } -#endif +#endif #endif // __ADUCRF101_H__ diff --git a/cpu/arm/aducrf101/Common/radioeng.c b/cpu/arm/aducrf101/Common/radioeng.c index c4431c832..067013728 100644 --- a/cpu/arm/aducrf101/Common/radioeng.c +++ b/cpu/arm/aducrf101/Common/radioeng.c @@ -49,7 +49,7 @@ #define RADIO_SPI_CLK_FREQ 4000000 // 4 MHz SPI CLK for radio interface #define SYSTEM_UCLK 16000000 // 16 MHz UCLK // Default Radio Parameters -#define DEFAULT_CHNL_FREQ 915000000 +#define DEFAULT_CHNL_FREQ 915000000 #define FREQ_CNVRT_VAL 0.00252061538 // Defines for radio memory mapped areas #define PACKETRAM_START 0x10 @@ -68,14 +68,14 @@ #define MCR_rssi_readback_Adr 0x312 #define MCR_gpio_configure_Adr 0x3fa #define MCR_ext_uc_clk_divide_Adr 0x32e -#define MCR_interrupt_source_0_Adr 0x336 +#define MCR_interrupt_source_0_Adr 0x336 #define MCR_interrupt_source_1_Adr 0x337 // Macros for manual GPIO checking of Radio MISO pin P2.0 (SPI0) -#define RADIO_MISO_IN GP2IN_IN0_BBA +#define RADIO_MISO_IN GP2IN_IN0_BBA // Macros for manual GPIO control of P2.3 (Radio SPI CS) (SPI0) -#define RADIO_CSN_DEASSERT (pADI_GP2->GPSET = GP2SET_SET3) -#define RADIO_CSN_ASSERT (pADI_GP2->GPCLR = GP2CLR_CLR3) +#define RADIO_CSN_DEASSERT (pADI_GP2->GPSET = GP2SET_SET3) +#define RADIO_CSN_ASSERT (pADI_GP2->GPCLR = GP2CLR_CLR3) // Macros for Sending\Receiving single bytes via SPI #define SEND_SPI(x) pADI_SPI0->SPITX = x #define WAIT_SPI_RX while((pADI_SPI0->SPISTA & SPISTA_RXFSTA_MSK) == 0x0); @@ -92,7 +92,7 @@ /*************************************************************************/ /* Radio Command Codes */ /*************************************************************************/ -typedef enum +typedef enum { CMD_SYNC = 0xA2, // Synchronizatio CMD_PHY_OFF = 0xB0, // Transition to state PHY_OFF @@ -137,54 +137,54 @@ typedef enum /*************************************************************************/ /* Radio Configuration Structure */ /*************************************************************************/ -/** +/** \internal Hide from Doxegen \var TyRadioConfiguration **/ typedef struct { - RIE_U8 interrupt_mask_0_r; // 0x100 - RIE_U8 cfg_101_r; // 0x101 - RIE_U8 cfg_102_r; // 0x102 - RIE_U8 cfg_103_r; // 0x103 - RIE_U8 cfg_104_r; // 0x104 - RIE_U8 cfg_105_r; // 0x105 - RIE_U8 cfg_106_r; // 0x106 - RIE_U8 cfg_107_r; // 0x107 - RIE_U8 cfg_108_r; // 0x108 - RIE_U8 channel_freq_0_r; // 0x109 - RIE_U8 channel_freq_1_r; // 0x10A - RIE_U8 channel_freq_2_r; // 0x10B - RIE_U8 cfg_10C_r; // 0x10C - RIE_U8 cfg_10D_r; // 0x10D - RIE_U8 cfg_10E_r; // 0x10E - RIE_U8 cfg_10F_r; // 0x10F - RIE_U8 cfg_110_r; // 0x110 - RIE_U8 cfg_111_r; // 0x111 - RIE_U8 cfg_112_r; // 0x112 - RIE_U8 cfg_113_r; // 0x113 - RIE_U8 radio_cfg_8_r; // 0x114 - RIE_U8 radio_cfg_9_r; // 0x115 - RIE_U8 cfg_116_r; // 0x116 - RIE_U8 cfg_117_r; // 0x117 - RIE_U8 image_reject_cal_phase_r; // 0x118 - RIE_U8 image_reject_cal_amplitude_r; // 0x119 - RIE_U8 cfg_11A_r; // 0x11A - RIE_U8 cfg_11B_r; // 0x11B - RIE_U8 symbol_mode_r; // 0x11C - RIE_U8 cfg_11D_r; // 0x11D - RIE_U8 cfg_11E_r; // 0x11E - RIE_U8 cfg_11F_r; // 0x11F - RIE_U8 cfg_120_r; // 0x120 - RIE_U8 cfg_121_r; // 0x121 - RIE_U8 cfg_122_r; // 0x122 - RIE_U8 cfg_123_r; // 0x123 - RIE_U8 tx_base_adr_r; // 0x124 - RIE_U8 rx_base_adr_r; // 0x125 - RIE_U8 packet_length_control_r; // 0x126 - RIE_U8 packet_length_max_r; // 0x127 - RIE_U8 cfg_128_r; // 0x128 - RIE_U8 cfg_129_r; // 0x129 + RIE_U8 interrupt_mask_0_r; // 0x100 + RIE_U8 cfg_101_r; // 0x101 + RIE_U8 cfg_102_r; // 0x102 + RIE_U8 cfg_103_r; // 0x103 + RIE_U8 cfg_104_r; // 0x104 + RIE_U8 cfg_105_r; // 0x105 + RIE_U8 cfg_106_r; // 0x106 + RIE_U8 cfg_107_r; // 0x107 + RIE_U8 cfg_108_r; // 0x108 + RIE_U8 channel_freq_0_r; // 0x109 + RIE_U8 channel_freq_1_r; // 0x10A + RIE_U8 channel_freq_2_r; // 0x10B + RIE_U8 cfg_10C_r; // 0x10C + RIE_U8 cfg_10D_r; // 0x10D + RIE_U8 cfg_10E_r; // 0x10E + RIE_U8 cfg_10F_r; // 0x10F + RIE_U8 cfg_110_r; // 0x110 + RIE_U8 cfg_111_r; // 0x111 + RIE_U8 cfg_112_r; // 0x112 + RIE_U8 cfg_113_r; // 0x113 + RIE_U8 radio_cfg_8_r; // 0x114 + RIE_U8 radio_cfg_9_r; // 0x115 + RIE_U8 cfg_116_r; // 0x116 + RIE_U8 cfg_117_r; // 0x117 + RIE_U8 image_reject_cal_phase_r; // 0x118 + RIE_U8 image_reject_cal_amplitude_r; // 0x119 + RIE_U8 cfg_11A_r; // 0x11A + RIE_U8 cfg_11B_r; // 0x11B + RIE_U8 symbol_mode_r; // 0x11C + RIE_U8 cfg_11D_r; // 0x11D + RIE_U8 cfg_11E_r; // 0x11E + RIE_U8 cfg_11F_r; // 0x11F + RIE_U8 cfg_120_r; // 0x120 + RIE_U8 cfg_121_r; // 0x121 + RIE_U8 cfg_122_r; // 0x122 + RIE_U8 cfg_123_r; // 0x123 + RIE_U8 tx_base_adr_r; // 0x124 + RIE_U8 rx_base_adr_r; // 0x125 + RIE_U8 packet_length_control_r; // 0x126 + RIE_U8 packet_length_max_r; // 0x127 + RIE_U8 cfg_128_r; // 0x128 + RIE_U8 cfg_129_r; // 0x129 RIE_U8 cfg_12A_r; // 0x12A RIE_U8 cfg_12B_r; // 0x12B RIE_U8 cfg_12C_r; // 0x12C @@ -205,14 +205,14 @@ typedef struct RIE_U8 cfg_13B_r; // 0x13B RIE_U8 cfg_13C_r; // 0x13C RIE_U8 cfg_13D_r; // 0x13D - RIE_U8 cfg_13E_r; // 0x13E - RIE_U8 cfg_13F_r; // 0x13F + RIE_U8 cfg_13E_r; // 0x13E + RIE_U8 cfg_13F_r; // 0x13F } TyRadioConfiguration; /*************************************************************************/ /* Radio Configuration Constants */ /*************************************************************************/ -#define interrupt_mask_0_interrupt_tx_eof (0x1 << 4) -#define interrupt_mask_0_interrupt_crc_correct (0x1 << 2) +#define interrupt_mask_0_interrupt_tx_eof (0x1 << 4) +#define interrupt_mask_0_interrupt_crc_correct (0x1 << 2) #define packet_length_control_length_offset_offset (0) #define packet_length_control_length_offset_minus0 (0x4 << packet_length_control_length_offset_offset) @@ -237,7 +237,7 @@ typedef struct #define radio_cfg_8_pa_power_setting_63 (0xF << radio_cfg_8_pa_power_offset) #define radio_cfg_8_pa_ramp_numbits (3) #define radio_cfg_8_pa_ramp_offset (0) -#define radio_cfg_8_pa_ramp_16 (0x5 << radio_cfg_8_pa_ramp_offset) +#define radio_cfg_8_pa_ramp_16 (0x5 << radio_cfg_8_pa_ramp_offset) #define radio_cfg_9_demod_scheme_offset (0) #define radio_cfg_9_demod_scheme_FSK (0x0 << radio_cfg_9_demod_scheme_offset) @@ -256,13 +256,13 @@ typedef struct /* Local Variables */ /*************************************************************************/ static TyRadioConfiguration RadioConfiguration; -static RIE_BOOL bRadioConfigurationChanged = RIE_FALSE; -static RIE_BOOL bTestModeEnabled = RIE_FALSE; -static RIE_U32 DataRate = 38400; +static RIE_BOOL bRadioConfigurationChanged = RIE_FALSE; +static RIE_BOOL bTestModeEnabled = RIE_FALSE; +static RIE_U32 DataRate = 38400; static volatile RIE_BOOL bPacketTx = RIE_FALSE; static volatile RIE_BOOL bPacketRx = RIE_FALSE; -const RIE_U8 DR_38_4kbps_Dev20kHz_Configuration[] = +const RIE_U8 DR_38_4kbps_Dev20kHz_Configuration[] = { 0x14,0x00,0x00,0x00,0x00,0x00,0x00,0x33,0x00,0x76,0x62,0x21, @@ -272,11 +272,11 @@ const RIE_U8 DR_38_4kbps_Dev20kHz_Configuration[] = 0x40,0x0C,0x00,0x0C,0x00,0x00, 0x10,0x00,0xC3,0x36,0x10,0x10,0x24,0xF0,0x2A,0x00,0x2F,0x19,0x5E,0x46,0x5F,0x78, - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 }; -const RIE_U8 DR_300_0kbps_Dev75_0kHz_Configuration[] = +const RIE_U8 DR_300_0kbps_Dev75_0kHz_Configuration[] = { 0x14,0x00,0x00,0x00,0x00,0x00,0x00,0x33,0x00,0x76,0x62,0x21, @@ -291,7 +291,7 @@ const RIE_U8 DR_300_0kbps_Dev75_0kHz_Configuration[] = -const RIE_U8 DR_1_0kbps_Dev10_0kHz_Configuration[] = +const RIE_U8 DR_1_0kbps_Dev10_0kHz_Configuration[] = { 0x14,0x00,0x00,0x00,0x00,0x00,0x00,0x33,0x00,0x76,0x62,0x21, // 0 1 2 3 4 5 6 7 8 9 A B @@ -312,8 +312,8 @@ static RIE_Responses RadioSendCommandBytes (RIE_U8 * pCmdBytes, RIE_U8 NumBytes); static RIE_Responses RadioSendCommandNoWait (Radio_CmdCodes CmdCode); static RIE_Responses RadioSendCommandWait (Radio_CmdCodes CmdCode); -static RIE_Responses RadioMMapRead (RIE_U32 ulAdr, - RIE_U32 ulLen, +static RIE_Responses RadioMMapRead (RIE_U32 ulAdr, + RIE_U32 ulLen, RIE_U8 * pData); static RIE_Responses RadioMMapWrite (RIE_U32 ulAdr, RIE_U32 ulLen, @@ -337,7 +337,7 @@ static RIE_Responses RadioWaitOnCmdLdr (void); @brief Return the Radio Interface Engine API Version @param pVersion :{} pVersion Storage for Radio Interface Engine API version. - @code + @code RIE_U32 Version; Response = RadioGetAPIVersion(&Version); @endcode @@ -361,8 +361,8 @@ RIE_Responses RadioGetAPIVersion(RIE_U32 *pVersion) - DR_1_0kbps_Dev10_0kHz Base configuration of 1 kbps datarate, 10.0 kHz frequency deviation. - DR_38_4kbps_Dev20kHz Base configuration of 38.4 kbps datarate, 20 kHz frequency deviation. - DR_300_0kbps_Dev75_0kHz Base configuration of 300 kbps datarate, 75 kHz frequency deviation. - @pre - RadioInit() must be called before this function is called. + @pre + RadioInit() must be called before this function is called. @return RIE_Responses Error code. **/ @@ -388,7 +388,7 @@ RIE_Responses RadioSwitchConfig(RIE_BaseConfigs BaseConfig) - DR_1_0kbps_Dev10_0kHz Base configuration of 1 kbps datarate, 10.0 kHz frequency deviation. - DR_38_4kbps_Dev20kHz Base configuration of 38.4 kbps datarate, 20 kHz frequency deviation. - DR_300_0kbps_Dev75_0kHz Base configuration of 300 kbps datarate, 75 kHz frequency deviation. - @note + @note This must be called before any other function is called. @return RIE_Responses Error code. **/ @@ -401,13 +401,13 @@ RIE_Responses RadioInit(RIE_BaseConfigs BaseConfig) NVIC_DisableIRQ(UHFTRX_IRQn); // Initialise GPIO Port 2 for Radio Use - pADI_GP2->GPCON = GP2CON_CON0_SPI0MISO | GP2CON_CON1_SPI0SCLK | - GP2CON_CON2_SPI0MOSI | GP2CON_CON3_GPIO | + pADI_GP2->GPCON = GP2CON_CON0_SPI0MISO | GP2CON_CON1_SPI0SCLK | + GP2CON_CON2_SPI0MOSI | GP2CON_CON3_GPIO | GP2CON_CON4_IRQ8 | GP2CON_CON5_GPIO | GP2CON_CON6_GPIO | GP2CON_CON7_GPIOIRQ7; - pADI_GP2->GPOEN = GP2OEN_OEN0_IN | GP2OEN_OEN1_IN | - GP2OEN_OEN2_IN | GP2OEN_OEN3_OUT | + pADI_GP2->GPOEN = GP2OEN_OEN0_IN | GP2OEN_OEN1_IN | + GP2OEN_OEN2_IN | GP2OEN_OEN3_OUT | GP2OEN_OEN4_IN | GP2OEN_OEN5_IN | GP2OEN_OEN6_IN | GP2OEN_OEN7_IN; @@ -435,8 +435,8 @@ RIE_Responses RadioInit(RIE_BaseConfigs BaseConfig) // we enable the Cortex interrupt handling of it if(Response == RIE_Success) Response = RadioPowerOff(); - // Configure a "high level" radio interrupt ... - pADI_INTERRUPT->EI2CFG = EI2CFG_IRQ8MDE_HIGHLEVEL | EI2CFG_IRQ8EN; + // Configure a "high level" radio interrupt ... + pADI_INTERRUPT->EI2CFG = EI2CFG_IRQ8MDE_HIGHLEVEL | EI2CFG_IRQ8EN; // ... and set it up in the NVIC so that our interrupt handler is called // when the radio wants our attention. Clear any pre-existing condition // before enabling the interrupt. @@ -463,7 +463,7 @@ RIE_Responses RadioInit(RIE_BaseConfigs BaseConfig) /** @fn RIE_U32 RadioDeInit(void) @brief Deinitialise the Radio, and power it down. - @note + @note This can be called independently of all other functions to power down the radio @return RIE_Responses Error code. @@ -477,13 +477,13 @@ RIE_Responses RadioDeInit(void) NVIC_DisableIRQ(UHFTRX_IRQn); // Initialise GPIO Port 2 for Radio Use - pADI_GP2->GPCON = GP2CON_CON0_SPI0MISO | GP2CON_CON1_SPI0SCLK | - GP2CON_CON2_SPI0MOSI | GP2CON_CON3_GPIO | + pADI_GP2->GPCON = GP2CON_CON0_SPI0MISO | GP2CON_CON1_SPI0SCLK | + GP2CON_CON2_SPI0MOSI | GP2CON_CON3_GPIO | GP2CON_CON4_IRQ8 | GP2CON_CON5_GPIO | GP2CON_CON6_GPIO | GP2CON_CON7_GPIOIRQ7; - pADI_GP2->GPOEN = GP2OEN_OEN0_IN | GP2OEN_OEN1_IN | - GP2OEN_OEN2_IN | GP2OEN_OEN3_OUT | + pADI_GP2->GPOEN = GP2OEN_OEN0_IN | GP2OEN_OEN1_IN | + GP2OEN_OEN2_IN | GP2OEN_OEN3_OUT | GP2OEN_OEN4_IN | GP2OEN_OEN5_IN | GP2OEN_OEN6_IN | GP2OEN_OEN7_IN; @@ -512,8 +512,8 @@ RIE_Responses RadioDeInit(void) /** @fn RIE_Responses RadioPowerOff(void) - @brief Shutdown the radio and place it in its lowest power sleep mode. - @pre + @brief Shutdown the radio and place it in its lowest power sleep mode. + @pre RadioInit() must be called before this function is called. @return RIE_Response Error code. **/ @@ -532,14 +532,14 @@ RIE_Responses RadioPowerOff(void) return Response; } -/** +/** @fn RIE_Responses RadioTerminateRadioOp(void) @brief Terminate a currently running radio RX or TX operation. @pre RadioInit() must be called before this function is called. - @code + @code if (RIE_Response == RIE_Success) RIE_Response = RadioRxPacketFixedLen(12); - // Delay for a while waiting for a packet + // Delay for a while waiting for a packet if (RIE_Response == RIE_Success) { // Abort the waiting @@ -557,15 +557,15 @@ RIE_Responses RadioTerminateRadioOp (void) return Response; } -/** +/** @fn RIE_Responses RadioSetFrequency(RIE_U32 Frequency) @brief Set frequency for radio communications - @param Frequency :{431000000-928000000} - - This must be within the available bands of the radio: - - 431000000Hz to 464000000Hz and + @param Frequency :{431000000-928000000} + - This must be within the available bands of the radio: + - 431000000Hz to 464000000Hz and - 862000000Hz to 928000000Hz. @pre RadioInit() must be called before this function is called. - @code + @code if (RIE_Response == RIE_Success) RIE_Response = RadioSetFrequency(915000000); @endcode @@ -584,18 +584,18 @@ RIE_Responses RadioSetFrequency(RIE_U32 Frequency) RadioConfiguration.channel_freq_2_r = (EncodedFrequency >> 16)& 0xFF; if (Frequency >= 862000000) { - RadioConfiguration.image_reject_cal_amplitude_r = 0x07; + RadioConfiguration.image_reject_cal_amplitude_r = 0x07; RadioConfiguration.image_reject_cal_phase_r = 0x16; } else { - RadioConfiguration.image_reject_cal_amplitude_r = 0x03; + RadioConfiguration.image_reject_cal_amplitude_r = 0x03; RadioConfiguration.image_reject_cal_phase_r = 0x08; } return Response; } -/** +/** @fn RIE_Responses RadioSetModulationType(RIE_ModulationTypes ModulationType) @brief Set the Radio Transmitter Modulation Type. Can be FSK_Modulation or GFSK_Modulation. @param ModulationType :{DR_1_0kbps_Dev10_0kHz , DR_38_4kbps_Dev20kHz ,DR_300_0kbps_Dev75_0kHz } @@ -603,7 +603,7 @@ RIE_Responses RadioSetFrequency(RIE_U32 Frequency) - DR_38_4kbps_Dev20kHz Base configuration of 38.4 kbps datarate, 20 kHz frequency deviation. - DR_300_0kbps_Dev75_0kHz Base configuration of 300 kbps datarate, 75 kHz frequency deviation. @pre RadioInit() must be called before this function is called. - @code + @code Response = RadioSetModulationType(GFSK_Modulation); @endcode @note FSK_Modulation is used by default. @@ -636,31 +636,31 @@ RIE_Responses RadioSetModulationType(RIE_ModulationTypes ModulationType) if (ucNewRegVal != RadioConfiguration.radio_cfg_9_r ) { bRadioConfigurationChanged = RIE_TRUE; - RadioConfiguration.radio_cfg_9_r = ucNewRegVal; + RadioConfiguration.radio_cfg_9_r = ucNewRegVal; } } return Response; } -/** - @fn RIE_Responses RadioPayldManchesterEncode(RIE_BOOL bEnable) +/** + @fn RIE_Responses RadioPayldManchesterEncode(RIE_BOOL bEnable) @brief Enable or Disable Manchester Encoding of payload data. - Manchester encoding can be used to ensure a dc-free (zero mean) - transmission. + Manchester encoding can be used to ensure a dc-free (zero mean) + transmission. - A Binary 0 is mapped to 10, and a Binary 1 is mapped to 01. + A Binary 0 is mapped to 10, and a Binary 1 is mapped to 01. + + Manchester encoding and decoding are applied to the payload data + and the CRC. - Manchester encoding and decoding are applied to the payload data - and the CRC. - @param bEnable :{RIE_FALSE,RIE_TRUE} - - RIE_TRUE if Manchester Encoding is to be enabled. + - RIE_TRUE if Manchester Encoding is to be enabled. - RIE_FALSE if disabled. @pre RadioInit() must be called before this function is called. - @code + @code Response = RadioPayldManchesterEncode(RIE_TRUE); @endcode @@ -689,37 +689,37 @@ RIE_Responses RadioPayldManchesterEncode(RIE_BOOL bEnable) if (ucNewRegVal != RadioConfiguration.symbol_mode_r ) { bRadioConfigurationChanged = RIE_TRUE; - RadioConfiguration.symbol_mode_r = ucNewRegVal; + RadioConfiguration.symbol_mode_r = ucNewRegVal; } } return Response; } -/** +/** @fn RIE_Responses RadioPayldDataWhitening(RIE_BOOL bEnable) - @brief Enable or Disable Data Whitening of payload data. + @brief Enable or Disable Data Whitening of payload data. Data whitening can be employed to avoid long runs of 1s or 0s - in the transmitted data stream. + in the transmitted data stream. - This ensures sufficient bit transitions in the packet, which - aids in receiver clock and data recovery because the encoding - breaks up long runs of 1s or 0s in the transmit packet. + This ensures sufficient bit transitions in the packet, which + aids in receiver clock and data recovery because the encoding + breaks up long runs of 1s or 0s in the transmit packet. The data, excluding the preamble and sync word, is automatically - whitened before transmission by XORing the data with an 8-bit - pseudorandom sequence. + whitened before transmission by XORing the data with an 8-bit + pseudorandom sequence. - At the receiver, the data is XORed with the same pseudorandom - sequence, thereby reversing the whitening. + At the receiver, the data is XORed with the same pseudorandom + sequence, thereby reversing the whitening. The linear feedback shift register polynomial used is x7 + x1 + 1. @param bEnable :{RIE_FALSE, RIE_TRUE} - - RIE_TRUE if Manchester Encoding is to be enabled. + - RIE_TRUE if Manchester Encoding is to be enabled. - RIE_FALSE if disabled. @pre RadioInit() must be called before this function is called. - @code + @code Response = RadioPayldDataWhitening(RIE_TRUE); @endcode @@ -748,19 +748,19 @@ RIE_Responses RadioPayldDataWhitening(RIE_BOOL bEnable) if (ucNewRegVal != RadioConfiguration.symbol_mode_r ) { bRadioConfigurationChanged = RIE_TRUE; - RadioConfiguration.symbol_mode_r = ucNewRegVal; + RadioConfiguration.symbol_mode_r = ucNewRegVal; } } return Response; } -/** - @fn RIE_Responses RadioTxPacketFixedLen(RIE_U8 Len, RIE_U8 *pData) - @brief Transmit a fixed length packet. +/** + @fn RIE_Responses RadioTxPacketFixedLen(RIE_U8 Len, RIE_U8 *pData) + @brief Transmit a fixed length packet. @param Len :{1-240} Length of packet to be transmitted. @param pData :{} Data bytes to be transmitted. @pre RadioInit() must be called before this function is called. - @code + @code if (RIE_Response == RIE_Success) RIE_Response = RadioTxSetPA(DifferentialPA,PowerLevel15); if (RIE_Response == RIE_Success) @@ -795,13 +795,13 @@ RIE_Responses RadioTxPacketFixedLen(RIE_U8 Len, RIE_U8 *pData) return Response; } -/** - @fn RIE_Responses RadioTxPacketVariableLen(RIE_U8 Len, RIE_U8 *pData) - @brief Transmit a Variable length packet. +/** + @fn RIE_Responses RadioTxPacketVariableLen(RIE_U8 Len, RIE_U8 *pData) + @brief Transmit a Variable length packet. @param Len :{1-240} Length of packet to be transmitted. @param pData :{} Data bytes to be transmitted. @pre RadioInit() must be called before this function is called. - @code + @code if (RIE_Response == RIE_Success) RIE_Response = RadioTxSetPA(DifferentialPA,PowerLevel15); if (RIE_Response == RIE_Success) @@ -841,12 +841,12 @@ RIE_Responses RadioTxPacketVariableLen(RIE_U8 Len, RIE_U8 *pData) } -/** - @fn RIE_BOOL RadioTxPacketComplete(void) +/** + @fn RIE_BOOL RadioTxPacketComplete(void) @brief Checks if a packet has finished transmitting @pre RadioInit() must be called before this function is called. @pre RadioRxPacketFixedLen() or equivalent should be called first. - @code + @code if (RIE_Response == RIE_Success) RIE_Response = RadioTxSetPA(DifferentialPA,PowerLevel15); if (RIE_Response == RIE_Success) @@ -860,16 +860,16 @@ RIE_BOOL RadioTxPacketComplete (void) return bPacketTx; } -/** - @fn RIE_Responses RadioTxSetPA(RIE_PATypes PAType,RIE_PAPowerLevel Power) - @brief Set PA Type and the Transmit Power Level for Radio Transmission. +/** + @fn RIE_Responses RadioTxSetPA(RIE_PATypes PAType,RIE_PAPowerLevel Power) + @brief Set PA Type and the Transmit Power Level for Radio Transmission. @param PAType :{DifferentialPA, SingleEndedPA} Select Single Ended or Differential PA Type @param Power :{PowerLevel0 ,PowerLevel1 ,PowerLevel2 ,PowerLevel3, PowerLevel4 ,PowerLevel5 ,PowerLevel6 ,PowerLevel7, PowerLevel8 ,PowerLevel9 ,PowerLevel10,PowerLevel11, - PowerLevel12,PowerLevel13,PowerLevel14,PowerLevel15} + PowerLevel12,PowerLevel13,PowerLevel14,PowerLevel15} @pre RadioInit() must be called before this function is called. - @code + @code Response = RadioTxSetPA(SingleEndedPA,PowerLevel8); @endcode @note Differential PA is enabled by default. @@ -940,17 +940,17 @@ RIE_Responses RadioTxSetPA(RIE_PATypes PAType,RIE_PAPowerLevel Power) if (ucNewRegVal != RadioConfiguration.radio_cfg_8_r ) { bRadioConfigurationChanged = RIE_TRUE; - RadioConfiguration.radio_cfg_8_r = ucNewRegVal; + RadioConfiguration.radio_cfg_8_r = ucNewRegVal; } } return Response; } -/** +/** @fn RIE_Responses RadioTxCarrier(void) @brief Transmit a carrier tone using the current radio configuration. @pre RadioInit() must be called before this function is called. - @code + @code Response = RadioTxCarrier(); @endcode @note Terminate this mode by calling RadioTerminateRadioOp(); @@ -973,12 +973,12 @@ RIE_Responses RadioTxCarrier (void) Response = RadioSendCommandWait(CMD_PHY_TX); return Response; } -/** +/** @fn RIE_Responses RadioTxPreamble(void) @brief Transmit a pre-amble (alternating ones and zeros) using the current radio configuration. @pre RadioInit() must be called before this function is called. - @code + @code Response = RadioTxPreamble(); @endcode @note Terminate this mode by calling RadioTerminateRadioOp(); @@ -1002,14 +1002,14 @@ RIE_Responses RadioTxPreamble (void) return Response; } -/** +/** @fn RIE_Responses RadioRxPacketFixedLen(RIE_U8 Len) @brief Enter receive mode and wait for a packet to be received. - Radio will stay in Receive Mode until - 1) A packet is received. + Radio will stay in Receive Mode until + 1) A packet is received. 2) User manually exits Receive Mode with a call to RadioTerminateRadioOp() - + @param Len :{1-240} Fixed Length of packet to be received. @pre RadioInit() must be called before this function is called. @return RIE_Responses Error code @@ -1036,14 +1036,14 @@ RIE_Responses RadioRxPacketFixedLen(RIE_U8 Len) return Response; } -/** +/** @fn RIE_Responses RadioRxPacketVariableLen(void) @brief Enter receive mode and wait for a packet to be received. - Radio will stay in Receive Mode until - 1) A packet is received. + Radio will stay in Receive Mode until + 1) A packet is received. 2) User manually exits Receive Mode with a call to RadioTerminateRadioOp() - + @pre RadioInit() must be called before this function is called. @return RIE_Responses Error code **/ @@ -1067,12 +1067,12 @@ RIE_Responses RadioRxPacketVariableLen(void) return Response; } -/** - @fn RIE_BOOL RadioRxPacketAvailable(void) - @brief Checks if a packet has been received. +/** + @fn RIE_BOOL RadioRxPacketAvailable(void) + @brief Checks if a packet has been received. @pre RadioInit() must be called before this function is called. @pre RadioRxPacketFixedLen() or equivalent should be called first. - @code + @code if (RIE_Response == RIE_Success) RIE_Response = RadioRxPacketFixedLen(12); if (RIE_Response == RIE_Success) @@ -1095,7 +1095,7 @@ RIE_BOOL RadioRxPacketAvailable(void) } -/** +/** @fn RIE_Responses RadioRxPacketRead(RIE_U8 BufferLen,RIE_U8 *pPktLen,RIE_U8 *pData,RIE_S8 *pRSSIdBm) @brief Read the packet that was received by the radio. @param BufferLen :{1-240} Size of passed in buffer @@ -1104,7 +1104,7 @@ RIE_BOOL RadioRxPacketAvailable(void) @param pRSSIdBm :{} RSSI of received packet in dBm. @pre RadioInit() must be called before this function is called. @pre RadioRxPacketFixedLen() or equivalent should be called first. - @code + @code if (RIE_Response == RIE_Success) RIE_Response = RadioRxPacketFixedLen(12); if (RIE_Response == RIE_Success) @@ -1170,13 +1170,13 @@ RIE_Responses RadioRxPacketRead(RIE_U8 BufferLen,RIE_U8 *pPktLen,RIE_U8 *pData,R return Response; } -/** +/** @fn RIE_Responses RadioRxBERTestMode(void) @brief Enter receiver Bit Error Rate (BER) test mode where the clock and data appear on GPIO pins. Clock on P0.6 and Data on P2.6 @pre RadioInit() must be called before this function is called. - @code + @code Response = RadioRxBERTestMode(); @endcode @note Terminate this mode by calling RadioTerminateRadioOp(); @@ -1187,7 +1187,7 @@ RIE_Responses RadioRxBERTestMode(void) RIE_Responses Response = RIE_Success; RIE_U8 Data; // Enables internal radio signals on external pins - // but overrides some of the standard GPIO muxed + // but overrides some of the standard GPIO muxed // functionality (UART?) pADI_MISC->RFTST = 0x7E1; @@ -1211,7 +1211,7 @@ RIE_Responses RadioRxBERTestMode(void) return Response; } -/** +/** @internal Hide from Doxegen @fn RIE_Responses RadioCommitRadioConfig(void) @brief Configures the radio if any changes were made @@ -1247,7 +1247,7 @@ static RIE_Responses RadioCommitRadioConfig(void) } return Response; } -/** +/** @fn RIE_Responses RadioReadState(RadioState *pState) @brief Read the current state @param pState Pointer to return storage of state @@ -1271,7 +1271,7 @@ static RIE_Responses RadioReadState(RadioState *pState) return Response; } -/** +/** @fn RIE_Responses RadioWaitOnState(RadioState FinalState) @brief Wait for Final State to be reached @param FinalState State to wait on @@ -1289,7 +1289,7 @@ static RIE_Responses RadioWaitOnState(RadioState FinalState) return Response; } -/** +/** @fn RIE_Responses RadioWaitOnCmdLdr(void) @brief Wait for Final State to be reached @param FinalState State to wait on @@ -1307,7 +1307,7 @@ static RIE_Responses RadioWaitOnCmdLdr(void) Response = RadioSPIXferByte(SPI_NOP,NULL); if (Response == RIE_Success) Response = RadioSPIXferByte(SPI_NOP,&StatusByte); - RADIO_CSN_DEASSERT; + RADIO_CSN_DEASSERT; NVIC_EnableIRQ (UHFTRX_IRQn); if ((Response == RIE_Success)) if(StatusByte & STATUS_BYTE_CMD_READY) @@ -1317,13 +1317,13 @@ static RIE_Responses RadioWaitOnCmdLdr(void) return Response; } -/** +/** @internal Hide from Doxegen @fn RIE_Responses RadioToOnMode(void) @brief Transition to On Mode - Handle all possible states that the radio could be in - and brings it back to PHY_ON state + Handle all possible states that the radio could be in + and brings it back to PHY_ON state @param None @return RIE_Responses Error code **/ @@ -1365,12 +1365,12 @@ static RIE_Responses RadioToOnMode(void) } return Response; } -/** +/** @internal Hide from Doxegen @fn RIE_Responses RadioToOffMode(void) @brief Transition to Off Mode - Handle all possible states that the radio could be in + Handle all possible states that the radio could be in and bring it back to PHY_OFF state. @param None @@ -1414,7 +1414,7 @@ static RIE_Responses RadioToOffMode(void) } return Response; } -/** +/** @internal Hide from Doxegen @fn RIE_Responses RadioSyncComms (void) @brief Sync comms with the radio @@ -1430,7 +1430,7 @@ static RIE_Responses RadioSyncComms (void) Response = RadioWaitOnCmdLdr(); return Response; } -/** +/** @fn RIE_Responses RadioWaitForPowerUp(void) @brief Wake Up the Part @@ -1444,7 +1444,7 @@ static RIE_Responses RadioWaitForPowerUp(void) RIE_Responses Response = RIE_Success; int i = 0x0; RADIO_CSN_ASSERT; - while (!RADIO_MISO_IN && (i < 1000)) + while (!RADIO_MISO_IN && (i < 1000)) i++; if (1000 == i)// Timed out waiting for MISO high? Response = RIE_RadioSPICommsFail; @@ -1452,7 +1452,7 @@ static RIE_Responses RadioWaitForPowerUp(void) return Response; } -/** +/** \internal Hide from Doxegen \fn void Ext_Int8_Handler(void) \brief Radio Interrupt Handler @@ -1482,7 +1482,7 @@ void Ext_Int8_Handler (void) // Clear the interrupt pADI_INTERRUPT->EICLR = EICLR_IRQ8; } -/** +/** \internal Hide from Doxegen \fn void RadioSPIXferByte(RIE_U8 ucByte,RIE_U8 *pData) \brief Transfer a byte via SPI to the radio and optionally return @@ -1504,13 +1504,13 @@ static RIE_Responses RadioSPIXferByte(RIE_U8 ucByte,RIE_U8 *pData) (void)READ_SPI; return Response; } -/** +/** \internal Hide from Doxegen \fn RIE_Responses RadioSendCommandBytes(RIE_U8 *pCmdBytes,RIE_U8 NumBytes) \brief Send a complete command to the radio. It is neccessary to disable the radio interrupt when doing this - as a command in progress must finish before a radio interrupt + as a command in progress must finish before a radio interrupt can be handled. \param pCmdBytes Pointer to a number of bytes to be transferred. @@ -1531,7 +1531,7 @@ static RIE_Responses RadioSendCommandBytes(RIE_U8 *pCmdBytes,RIE_U8 NumBytes) return Response; } -/** +/** \internal Hide from Doxegen \fn RIE_Responses RadioSendCommandNoWait (Radio_CmdCodes CmdCode ) \brief Send a single byte command to the radio. @@ -1543,7 +1543,7 @@ static RIE_Responses RadioSendCommandNoWait (Radio_CmdCodes CmdCode ) RIE_U8 Command = (RIE_U8)CmdCode; return RadioSendCommandBytes(&Command,0x1); } -/** +/** \internal Hide from Doxegen \fn RIE_Responses RadioSendCommandWait (Radio_CmdCodes CmdCode ) \brief Send a single byte command to the radio. @@ -1561,7 +1561,7 @@ static RIE_Responses RadioSendCommandWait (Radio_CmdCodes CmdCode ) Response = RadioSendCommandBytes(&Command,0x1); return Response; } -/** +/** \fn RIE_Responses RadioMMapRead(RIE_U32 ulAdr, RIE_U32 ulLen, RIE_U8 *pData) \brief Read bytes from specified memory map address \param ulAdr Address to read at. @@ -1575,7 +1575,7 @@ static RIE_Responses RadioMMapRead(RIE_U32 ulAdr, RIE_U32 ulLen, RIE_U8 *pData) NVIC_DisableIRQ(UHFTRX_IRQn); RADIO_CSN_ASSERT; - + if(Response == RIE_Success) // Send first byte (SPI_MEMR_RD + Bytes) Response = RadioSPIXferByte(SPI_MEM_RD | ((ulAdr & 0x700) >> 8),NULL); if(Response == RIE_Success)// Send Second byte remainder of address @@ -1589,7 +1589,7 @@ static RIE_Responses RadioMMapRead(RIE_U32 ulAdr, RIE_U32 ulLen, RIE_U8 *pData) return Response; } -/** +/** \fn RIE_Responses RadioMMapWrite(RIE_U32 ulAdr, RIE_U32 ulLen, RIE_U8 *pData) \brief Read bytes from specified memory map address \param ulAdr Address to read at. @@ -1615,7 +1615,7 @@ static RIE_Responses RadioMMapWrite(RIE_U32 ulAdr,RIE_U32 ulLen,RIE_U8 * pDat return Response; } -/** +/** \internal Hide from Doxegen \fn void SetRadioConfiguration(void) \brief Create a default radio configuration that all base configurations @@ -1654,7 +1654,7 @@ static RIE_Responses SetRadioConfiguration(RIE_BaseConfigs BaseConfig) } return Response; } -/** +/** @internal Hide from Doxegen @fn RIE_Responses RadioConfigure (void) @brief Configure the Radio as per the current configuration @@ -1666,8 +1666,8 @@ RIE_Responses RadioConfigure (void) if(Response == RIE_Success) Response = RadioToOffMode(); if(Response == RIE_Success) // Write the configuration to the radio memory - Response = RadioMMapWrite(BBRAM_START, - sizeof(TyRadioConfiguration), + Response = RadioMMapWrite(BBRAM_START, + sizeof(TyRadioConfiguration), (RIE_U8 *)&RadioConfiguration); if(Response == RIE_Success) // Apply that configuration to the radio Response = RadioSendCommandWait(CMD_CONFIG_DEV); @@ -1677,12 +1677,12 @@ RIE_Responses RadioConfigure (void) } -/** +/** @fn RIE_Responses RadioRadioGetRSSI (RIE_S8 *pRSSIdBm) @brief Return a Received Signal Strength Indicator value @param pRSSIdBm :{} detected RSSI in dBm. @pre RadioInit() must be called before this function is called. - @code + @code RIE_S8 RSSIdBm; if (RIE_Response == RIE_Success) RIE_Response = RadioRadioGetRSSI(&RSSIdBm); @@ -1700,7 +1700,7 @@ RIE_Responses RadioRadioGetRSSI (RIE_S8 *pRSSIdBm) if (Response == RIE_Success) Response = RadioSendCommandWait(CMD_GET_RSSI); if (Response == RIE_Success) - Response = RadioSyncComms(); // + Response = RadioSyncComms(); // if (pRSSIdBm) { if (Response == RIE_Success) @@ -1710,15 +1710,15 @@ RIE_Responses RadioRadioGetRSSI (RIE_S8 *pRSSIdBm) return Response; } -/** - @fn RIE_Responses RadioTxSetPower(RIE_PAPowerLevel Power) - @brief Set the Transmit Power Level for Radio Transmission. +/** + @fn RIE_Responses RadioTxSetPower(RIE_PAPowerLevel Power) + @brief Set the Transmit Power Level for Radio Transmission. @param Power :{PowerLevel0 ,PowerLevel1 ,PowerLevel2 ,PowerLevel3, PowerLevel4 ,PowerLevel5 ,PowerLevel6 ,PowerLevel7, PowerLevel8 ,PowerLevel9 ,PowerLevel10,PowerLevel11, - PowerLevel12,PowerLevel13,PowerLevel14,PowerLevel15} + PowerLevel12,PowerLevel13,PowerLevel14,PowerLevel15} @pre RadioInit() must be called before this function is called. - @code + @code Response = RadioTxSetPower(PowerLevel8); @endcode @note Max TX Power is used by default. @@ -1783,7 +1783,7 @@ RIE_Responses RadioTxSetPower (RIE_PAPowerLevel Power) // Write directly to the MCR in this case and avoid a reconfigure if (Response == RIE_Success) Response = RadioMMapWrite(MCR_pa_level_mcr_Adr, 0x1, (RIE_U8 *)&ucNewRegVal); - RadioConfiguration.radio_cfg_8_r = ucNewRegVal; + RadioConfiguration.radio_cfg_8_r = ucNewRegVal; } } return Response; diff --git a/cpu/arm/at91sam7s/loader/elfloader-arch-otf.h b/cpu/arm/at91sam7s/loader/elfloader-arch-otf.h index 9fe8a77ae..7ddf64c9a 100644 --- a/cpu/arm/at91sam7s/loader/elfloader-arch-otf.h +++ b/cpu/arm/at91sam7s/loader/elfloader-arch-otf.h @@ -89,10 +89,10 @@ * processor. */ int elfloader_arch_relocate(int input_fd, - struct elfloader_output *output, - unsigned int sectionoffset, - char *sectionaddr, - struct elf32_rela *rela, char *addr); + struct elfloader_output *output, + unsigned int sectionoffset, + char *sectionaddr, + struct elf32_rela *rela, char *addr); #endif /* ELFLOADER_ARCH_H_ */ diff --git a/cpu/arm/at91sam7s/loader/elfloader-otf.h b/cpu/arm/at91sam7s/loader/elfloader-otf.h index d3c06c091..dd69383b0 100644 --- a/cpu/arm/at91sam7s/loader/elfloader-otf.h +++ b/cpu/arm/at91sam7s/loader/elfloader-otf.h @@ -37,7 +37,7 @@ * Header file for the Contiki ELF loader. * \author * Adam Dunkels - * Simon Berg + * Simon Berg * */ @@ -132,7 +132,7 @@ * Return value from elfloader_load() indicating that the offset for * a relative addressing mode was too big. */ -#define ELFLOADER_OUTOF_RANGE 9 +#define ELFLOADER_OUTOF_RANGE 9 /** * Return value from elfloader_load() indicating that the relocations @@ -144,13 +144,13 @@ * Return value from elfloader_load() indicating that reading from the * ELF file failed in some way. */ -#define ELFLOADER_INPUT_ERROR 11 +#define ELFLOADER_INPUT_ERROR 11 /** * Return value from elfloader_load() indicating that writing to a segment * failed. */ -#define ELFLOADER_OUTPUT_ERROR 12 +#define ELFLOADER_OUTPUT_ERROR 12 #define ELFLOADER_SEG_TEXT 1 @@ -164,10 +164,10 @@ * This object defines methods (callbacks) for writing the segments to memory. * It can be extended by the user to include any necessary state. */ - struct elfloader_output { const struct elfloader_output_ops *ops; }; + /** * \brief Allocate a new segment * \param input The output object @@ -178,9 +178,8 @@ struct elfloader_output { * The returned address doesn't need to correspond to any real memory, * since it's only used for calculating the relocations. */ - void *elfloader_allocate_segment(struct elfloader_output *output, - unsigned int type, int size); + unsigned int type, int size); /** * \brief Start writing to a new segment @@ -191,15 +190,14 @@ void *elfloader_allocate_segment(struct elfloader_output *output, * \return Returns ELFLOADER_OK if successful, otherwise an error code * */ - int elfloader_start_segment(struct elfloader_output *output, - unsigned int type, void *addr, int size); + unsigned int type, void *addr, int size); + /** * \brief Mark end of segment * \param input The output object * \return Zero if successful */ - int elfloader_end_segment(struct elfloader_output *output); /** @@ -209,9 +207,8 @@ int elfloader_end_segment(struct elfloader_output *output); * \param len Length of data * \return The number of bytes actually written, or negative if failed. */ - int elfloader_write_segment(struct elfloader_output *output, const char *buf, - unsigned int len); + unsigned int len); /** * \brief Get the current offset in the file where the next data will @@ -219,7 +216,6 @@ int elfloader_write_segment(struct elfloader_output *output, const char *buf, * \param input The output object * \return The current offset. */ - unsigned int elfloader_segment_offset(struct elfloader_output *output); #define elfloader_output_alloc_segment(output, type, size) \ @@ -240,12 +236,12 @@ unsigned int elfloader_segment_offset(struct elfloader_output *output); struct elfloader_output_ops { void * (*allocate_segment)(struct elfloader_output *output, - unsigned int type, int size); + unsigned int type, int size); int (*start_segment)(struct elfloader_output *output, - unsigned int type, void *addr, int size); + unsigned int type, void *addr, int size); int (*end_segment)(struct elfloader_output *output); int (*write_segment)(struct elfloader_output *output, const char *buf, - unsigned int len); + unsigned int len); unsigned int (*segment_offset)(struct elfloader_output *output); }; @@ -269,8 +265,7 @@ void elfloader_init(void); * elfloader_loaded_process variable. * */ -int elfloader_load(int input_fd, - struct elfloader_output *output); +int elfloader_load(int input_fd, struct elfloader_output *output); /** * A pointer to the processes loaded with elfloader_load(). diff --git a/cpu/avr/dev/lanc111.c b/cpu/avr/dev/lanc111.c index 60cde63af..72d6d441d 100644 --- a/cpu/avr/dev/lanc111.c +++ b/cpu/avr/dev/lanc111.c @@ -1001,11 +1001,11 @@ static NETBUF *NicGetPacket(void) * Hack alert: Rev A chips never set the odd frame indicator. */ fbc -= 3; - /* nb = NutNetBufAlloc(0, NBAF_DATALINK, fbc);*/ + /* nb = NutNetBufAlloc(0, NBAF_DATALINK, fbc);*/ /* Perform the read. */ -/* if (nb) - NicRead(nb->nb_dl.vp, fbc);*/ + /* if (nb) + NicRead(nb->nb_dl.vp, fbc);*/ } /* Release the packet. */ @@ -1191,12 +1191,12 @@ PROCESS_THREAD(lanc111_process, ev, data) */ imsk = nic_inlb(NIC_MSK); nic_outlb(NIC_MSK, 0); - /* while ((nb = NicGetPacket()) != 0) { - if (nb != (NETBUF *) 0xFFFF) { - ni->ni_rx_packets++; - (*ifn->if_recv) (dev, nb); - } - }*/ + /* while ((nb = NicGetPacket()) != 0) { + if (nb != (NETBUF *) 0xFFFF) { + ni->ni_rx_packets++; + (*ifn->if_recv) (dev, nb); + } + }*/ nic_outlb(NIC_MSK, imsk | INT_RCV | INT_ERCV); } @@ -1351,7 +1351,7 @@ lanc111_init(void) /* Register interrupt handler and enable interrupts. */ /* if (NutRegisterIrqHandler(&LANC111_SIGNAL, NicInterrupt, dev)) - return -1;*/ + return -1;*/ /* * Start the receiver thread. diff --git a/cpu/avr/minileds.c b/cpu/avr/minileds.c index 70694c5dc..f6fffb92d 100644 --- a/cpu/avr/minileds.c +++ b/cpu/avr/minileds.c @@ -1,31 +1,30 @@ /* * Copyright (c) 2006, Swedish Institute of Computer Science - * All rights reserved. + * All rights reserved. * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the Institute nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. * + * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. * /** * \file diff --git a/cpu/mc1322x/lib/printf.c b/cpu/mc1322x/lib/printf.c index c716b5893..53eea5bcf 100644 --- a/cpu/mc1322x/lib/printf.c +++ b/cpu/mc1322x/lib/printf.c @@ -28,7 +28,7 @@ * SUCH DAMAGE. * * This file is part of libmc1322x: see http://mc1322x.devl.org - * for details. + * for details. * * */ diff --git a/cpu/msp430/f1xxx/clock.c b/cpu/msp430/f1xxx/clock.c index b81bb7498..9b2a7562b 100644 --- a/cpu/msp430/f1xxx/clock.c +++ b/cpu/msp430/f1xxx/clock.c @@ -80,15 +80,15 @@ ISR(TIMERA1, timera1) ++count; /* Make sure the CLOCK_CONF_SECOND is a power of two, to ensure - that the modulo operation below becomes a logical and and not - an expensive divide. Algorithm from Wikipedia: - http://en.wikipedia.org/wiki/Power_of_two */ + that the modulo operation below becomes a logical and and not + an expensive divide. Algorithm from Wikipedia: + http://en.wikipedia.org/wiki/Power_of_two */ #if (CLOCK_CONF_SECOND & (CLOCK_CONF_SECOND - 1)) != 0 #error CLOCK_CONF_SECOND must be a power of two (i.e., 1, 2, 4, 8, 16, 32, 64, ...). #error Change CLOCK_CONF_SECOND in contiki-conf.h. #endif if(count % CLOCK_CONF_SECOND == 0) { - ++seconds; + ++seconds; energest_flush(); } last_tar = read_tar(); diff --git a/cpu/stm32w108/hal/error.h b/cpu/stm32w108/hal/error.h index e719fee0c..e3282b029 100644 --- a/cpu/stm32w108/hal/error.h +++ b/cpu/stm32w108/hal/error.h @@ -52,5 +52,3 @@ enum { /**@} // End of addtogroup */ - - diff --git a/cpu/stm32w108/hal/micro/cortexm3/nvm.h b/cpu/stm32w108/hal/micro/cortexm3/nvm.h index d8accaed1..3d0872902 100644 --- a/cpu/stm32w108/hal/micro/cortexm3/nvm.h +++ b/cpu/stm32w108/hal/micro/cortexm3/nvm.h @@ -2,7 +2,7 @@ * @brief Cortex-M3 Non-Volatile Memory data storage system. * See @ref nvm for documentation. * - * The functions in this file return an ::StStatus value. + * The functions in this file return an ::StStatus value. * See error-def.h for definitions of all ::StStatus return values. * * See hal/micro/cortexm3/nvm.h for source code. @@ -27,7 +27,7 @@ * that is a multiple of physical flash pages. There are two pages: LEFT * and RIGHT. The term "flash page" is used to refer to a page of * physical flash. - * + * * NVM data storage works by alternating between two pages: LEFT and RIGHT. * The basic algorithm is driven by a call to halCommonSaveToNvm(). It will: * - erase the inactive page @@ -58,35 +58,35 @@ * is LEFT then the state machine will advance until state 7 and then exit. * If "Read from" is RIGHT, then the state machine will advance until * state 3 and then exit. - * + * * @code * Starting from erased or invalid mgmt, write to LEFT - * State # 0 0 1 2 3 - * Reads from: x x e w L L L + * State # 0 0 1 2 3 + * Reads from: x x e w L L L * Valid xx|xx FF|FF r r 00|FF 00|FF 00|00 * Active xx|xx FF|FF a i 00|FF 00|FF 00|00 * Dead xx|xx FF|FF s t FF|FF FF|00 FF|00 * Spare xx|xx FF|FF e e FF|FF FF|FF FF|FF - * - * + * + * * Starting from LEFT page, transition to RIGHT page: - * State # 3 4 5 6 7 - * Reads from: L e L w R R R + * State # 3 4 5 6 7 + * Reads from: L e L w R R R * Valid 00|00 r 00|FF r 00|00 00|00 00|00 * Active 00|00 a 00|FF i 00|FF 00|FF 00|00 * Dead FF|00 s FF|FF t FF|FF 00|FF 00|FF * Spare FF|FF e FF|FF e FF|FF FF|FF FF|FF - * - * + * + * * Starting from RIGHT page, transition to LEFT page: - * State # 7 8 9 10 3 - * Reads from: R e R w L L L + * State # 7 8 9 10 3 + * Reads from: R e R w L L L * Valid 00|00 r FF|00 r 00|00 00|00 00|00 * Active 00|00 a FF|00 i FF|00 FF|00 00|00 * Dead 00|FF s FF|FF t FF|FF FF|00 FF|00 * Spare FF|FF e FF|FF e FF|FF FF|FF FF|FF * @endcode - * + * * Based on the 10 possible states, there are 5 valid 32bit mgmt words: * - 0xFFFFFFFF * - 0xFFFFFF00 @@ -95,7 +95,7 @@ * - 0xFF00FFFF * The algorithm determines the current state by using these 5 mgmt words * with the 10 possible combinations of LEFT mgmt and RIGHT mgmt. - * + * * Detailed State Description: * - State 0: * In this state the mgmt bytes do not conform to any of the other states @@ -135,8 +135,8 @@ * Once at these states, the current page is marked Valid and Active and * the old page is marked as Dead. The algorithm knows which page to * read from and which page needs to be erased on the next write to the NVM. - * - * + * + * * Notes on algorithm behavior: * - Refer to nvm-def.h for a list of offset/length that define the data * stored in NVM storage space. @@ -189,14 +189,14 @@ /** * @brief Copy the NVM data from flash into the provided RAM location. * It is illegal for the offset to be greater than NVM_DATA_SIZE_B. - * + * * @param data A (RAM) pointer to where the data should be copied. - * + * * @param offset The location from which the data should be copied. Must be * 16bit aligned. - * + * * @param length The length of the data in bytes. Must be 16bit aligned. - * + * * @return An StStatus value indicating the success of the function. * - ST_SUCCESS if the read completed cleanly. * - ST_ERR_FATAL if the NVM storage management indicated an invalid @@ -206,10 +206,10 @@ StStatus halCommonReadFromNvm(void *data, uint32_t offset, uint16_t length); /** * @brief Return the address of the token in NVM - * + * * @param offset The location offset from which the address should be returned - * - * + * + * * @return The address requested */ uint16_t *halCommonGetAddressFromNvm(uint32_t offset); @@ -217,14 +217,14 @@ uint16_t *halCommonGetAddressFromNvm(uint32_t offset); /** * @brief Write the NVM data from the provided location RAM into flash. * It is illegal for the offset to be greater than NVM_DATA_SIZE_B. - * + * * @param data A (RAM) pointer from where the data should be taken. - * + * * @param offset The location to which the data should be written. Must be * 16bit aligned. - * + * * @param length The length of the data in bytes. Must be 16bit aligned. - * + * * @return An StStatus value indicating the success of the function. * - ST_SUCCESS if the write completed cleanly. * - Any other status value is an error code generated by the low level diff --git a/cpu/stm32w108/hal/micro/cortexm3/uart.h b/cpu/stm32w108/hal/micro/cortexm3/uart.h index c15bf051d..48edceea9 100644 --- a/cpu/stm32w108/hal/micro/cortexm3/uart.h +++ b/cpu/stm32w108/hal/micro/cortexm3/uart.h @@ -23,14 +23,14 @@ typedef enum /** * @brief Initialize the UART - * + * * @param baudrate The baudrate which will be used for communication. * Ex: 115200 - * + * * @param databits The number of data bits used for communication. * Valid values are 7 or 8 - * - * @param parity The type of parity used for communication. + * + * @param parity The type of parity used for communication. * See the SerialParity enum for possible values * * @return stopbits The number of stop bits used for communication. @@ -45,9 +45,9 @@ void uartInit(uint32_t baudrate, uint8_t databits, SerialParity parity, uint8_t * instead which does not define fflush(). Therefore, we manually define * fflush() in the low level UART driver. This function simply redirects * to the __write() function with a NULL buffer, triggering a flush. - * + * * @param handle The output stream. Should be set to 'stdout' like normal. - * + * * @return Zero, indicating success. */ size_t fflush(int handle); @@ -61,7 +61,7 @@ size_t fflush(int handle); #define stdout _LLIO_STDOUT #endif /** - * @brief Read the input byte if any. + * @brief Read the input byte if any. */ boolean __io_getcharNonBlocking(uint8_t *data); void __io_putchar( char c ); diff --git a/cpu/stm32w108/hal/micro/generic/compiler/platform-common.h b/cpu/stm32w108/hal/micro/generic/compiler/platform-common.h index 24bbfceaf..db49f35d0 100644 --- a/cpu/stm32w108/hal/micro/generic/compiler/platform-common.h +++ b/cpu/stm32w108/hal/micro/generic/compiler/platform-common.h @@ -1,6 +1,6 @@ -/** +/** * \brief Compiler and Platform specific definitions and typedefs common to - * all platforms. + * all platforms. * * platform-common.h provides PLATFORM_HEADER defaults and common definitions. * This head should never be included directly, it should only be included @@ -20,7 +20,7 @@ * */ - + #ifndef PLATCOMMONOKTOINCLUDE // This header should only be included by a PLATFORM_HEADER #error platform-common.h should not be included directly @@ -29,7 +29,7 @@ #ifndef PLATFORMCOMMON_H_ #define PLATFORMCOMMON_H_ //////////////////////////////////////////////////////////////////////////////// -// Many of the common definitions must be explicitly enabled by the +// Many of the common definitions must be explicitly enabled by the // particular PLATFORM_HEADER being used //////////////////////////////////////////////////////////////////////////////// @@ -69,16 +69,16 @@ //////////////////////////////////////////////////////////////////////////////// #ifdef _HAL_USE_COMMON_DIVMOD_ /** \name Divide and Modulus Operations - * Some platforms can perform divide and modulus operations on 32 bit + * Some platforms can perform divide and modulus operations on 32 bit * quantities more efficiently when the divisor is only a 16 bit quantity. * C compilers will always promote the divisor to 32 bits before performing the - * operation, so the following utility functions are instead required to take + * operation, so the following utility functions are instead required to take * advantage of this optimisation. */ //@{ /** * \brief Provide a portable name for the uint32_t by uint16_t division - * library function (which can perform the division with only a single + * library function (which can perform the division with only a single * assembly instruction on some platforms) */ #define halCommonUDiv32By16(x, y) ((uint16_t) (((uint32_t) (x)) / ((uint16_t) (y)))) @@ -111,12 +111,12 @@ #ifdef _HAL_USE_COMMON_MEMUTILS_ /** \name C Standard Library Memory Utilities * These should be used in place of the standard library functions. - * + * * These functions have the same parameters and expected results as their C * Standard Library equivalents but may take advantage of certain implementation * optimizations. - * - * Unless otherwise noted, these functions are utilized by the StStack and are + * + * Unless otherwise noted, these functions are utilized by the StStack and are * therefore required to be implemented in the HAL. Additionally, unless otherwise * noted, applications that find these functions useful may utilze them. */ @@ -212,22 +212,22 @@ #define SETBIT(reg, bit) reg |= BIT(bit) /** - * \brief Sets the bits in the \c reg register or the byte - * as specified in the bitmask \c bits. + * \brief Sets the bits in the \c reg register or the byte + * as specified in the bitmask \c bits. * @note This is never a single atomic operation. */ #define SETBITS(reg, bits) reg |= (bits) /** - * \brief Clears a bit in the \c reg register or byte. - * @note Assuming \c reg is an IO register, some platforms (such as the AVR) + * \brief Clears a bit in the \c reg register or byte. + * @note Assuming \c reg is an IO register, some platforms (such as the AVR) * can implement this in a single atomic operation. */ #define CLEARBIT(reg, bit) reg &= ~(BIT(bit)) /** - * \brief Clears the bits in the \c reg register or byte - * as specified in the bitmask \c bits. + * \brief Clears the bits in the \c reg register or byte + * as specified in the bitmask \c bits. * @note This is never a single atomic operation. */ #define CLEARBITS(reg, bits) reg &= ~(bits) @@ -238,7 +238,7 @@ #define READBIT(reg, bit) (reg & (BIT(bit))) /** - * \brief Returns the value of the bitmask \c bits within + * \brief Returns the value of the bitmask \c bits within * the register or byte \c reg. */ #define READBITS(reg, bits) (reg & (bits)) @@ -263,13 +263,13 @@ #define HIGH_BYTE(n) ((uint8_t)(LOW_BYTE((n) >> 8))) /** - * \brief Returns the value built from the two \c uint8_t + * \brief Returns the value built from the two \c uint8_t * values \c high and \c low. */ #define HIGH_LOW_TO_INT(high, low) ( \ (( (uint16_t) (high) ) << 8) + \ ( (uint16_t) ( (low) & 0xFF)) \ - ) + ) /** * \brief Returns the low byte of the 32-bit value \c n as an \c uint8_t. @@ -301,21 +301,21 @@ //@{ /** - * \brief Returns the elapsed time between two 8 bit values. + * \brief Returns the elapsed time between two 8 bit values. * Result may not be valid if the time samples differ by more than 127 */ #define elapsedTimeInt8u(oldTime, newTime) \ ((uint8_t) ((uint8_t)(newTime) - (uint8_t)(oldTime))) /** - * \brief Returns the elapsed time between two 16 bit values. + * \brief Returns the elapsed time between two 16 bit values. * Result may not be valid if the time samples differ by more than 32767 */ #define elapsedTimeInt16u(oldTime, newTime) \ ((uint16_t) ((uint16_t)(newTime) - (uint16_t)(oldTime))) /** - * \brief Returns the elapsed time between two 32 bit values. + * \brief Returns the elapsed time between two 32 bit values. * Result may not be valid if the time samples differ by more than 2147483647 */ #define elapsedTimeInt32u(oldTime, newTime) \ diff --git a/cpu/stm32w108/hal/micro/micro-common.h b/cpu/stm32w108/hal/micro/micro-common.h index 9cba68903..03c5ab720 100644 --- a/cpu/stm32w108/hal/micro/micro-common.h +++ b/cpu/stm32w108/hal/micro/micro-common.h @@ -149,4 +149,3 @@ StStatus halBootloaderStart(uint8_t mode, uint8_t channel, uint16_t panId); /** @} END micro group */ /** @} */ - diff --git a/doc/sicslowpan-doc.txt b/doc/sicslowpan-doc.txt index 43f3ea71a..38f9acd4d 100644 --- a/doc/sicslowpan-doc.txt +++ b/doc/sicslowpan-doc.txt @@ -7,11 +7,11 @@ * \defgroup sicslowpan 6LoWPAN implementation * @{ -6lowpan is a Working Group in IETF which defines the use of IPv6 on +6lowpan is a Working Group in IETF which defines the use of IPv6 on IEEE 802.15.4 links. Our implementation is based on RFC4944 Transmission of IPv6 -Packets over IEEE 802.15.4 Networks, draft-hui-6lowpan-interop-00 +Packets over IEEE 802.15.4 Networks, draft-hui-6lowpan-interop-00 Interoperability Test for 6LoWPAN, and draft-hui-6lowpan-hc-01 Compression format for IPv6 datagrams in 6lowpan Networks. @@ -24,7 +24,7 @@ Packets over IEEE 802.15.4 Networks, draft-hui-6lowpan-interop-00 \subsection rfc4944 RFC 4944 RFC4944 defines address configuration mechanisms based on 802.15.4 -16-bit and 64-bit addresses, fragmentation of IPv6 packets below IP +16-bit and 64-bit addresses, fragmentation of IPv6 packets below IP layer, IPv6 and UDP header compression, a mesh header to enable link-layer forwarding in a mesh under topology, and a broadcast header to enable broadcast in a mesh under topology. @@ -32,7 +32,7 @@ broadcast in a mesh under topology. We implement addressing, fragmentation, and header compression. We support the header compression scenarios defined in draft-hui-6lowpan-interop-00. -This draft defines an interoperability scenario which was used between +This draft defines an interoperability scenario which was used between ArchRock and Sensinode implementations. We do not implement mesh under related features, as we target route over @@ -40,8 +40,8 @@ techniques. \subsection hc01 draft-hui-6lowpan-hc-01 -draft-hui-6lowpan-hc-01 defines a stateful header compression mechanism -which should soon deprecate the stateless header compression mechanism +draft-hui-6lowpan-hc-01 defines a stateful header compression mechanism +which should soon deprecate the stateless header compression mechanism defined in RFC4944. It is much more powerfull and flexible, in particular it allows compression of some multicast addresses and of all global unicast addresses. @@ -59,7 +59,7 @@ It is initialized from the MAC %process, which calls sicslowpan_init The main 6lowpan functions are implemented in the sicslowpan.h and sicslowpan.c files. They are used to format packets between the -802.15.4 and the IPv6 layers. +802.15.4 and the IPv6 layers. 6lowpan also creates a few IPv6 and link-layer dependencies which are detailed in the next section. @@ -89,13 +89,13 @@ typedef struct uip_802154_longaddr uip_lladdr_t; \endcode Neighbor Discovery Link Layer Address options
-The format of ND link-layer address options depends on the length of -the link-layer addresses. +The format of ND link-layer address options depends on the length of +the link-layer addresses. 802.15.4 specificities regarding link-layer address options are implemented in uip-nd6.h. \code #define UIP_ND6_OPT_SHORT_LLAO_LEN 8 #define UIP_ND6_OPT_LONG_LLAO_LEN 16 -#define UIP_ND6_OPT_LLAO_LEN UIP_ND6_OPT_LONG_LLAO_LEN +#define UIP_ND6_OPT_LLAO_LEN UIP_ND6_OPT_LONG_LLAO_LEN \endcode Address Autoconfiguration
@@ -105,7 +105,7 @@ the link-layer address. The dependency is reflected in the \code #if (UIP_LLADDR_LEN == 8) memcpy(ipaddr->u8 + 8, lladdr, UIP_LLADDR_LEN); - ipaddr->u8[8] ^= 0x02; + ipaddr->u8[8] ^= 0x02; \endcode \subsection io Packet Input/Output @@ -119,24 +119,24 @@ destination link-layer addresses as two rime addresses. \code packetbuf_copyfrom(&rx_frame.payload, rx_frame.payload_length); packetbuf_set_datalen(rx_frame.payload_length); -packetbuf_set_addr(PACKETBUF_ADDR_RECEIVER, (const rimeaddr_t *)&rx_frame.dest_addr); +packetbuf_set_addr(PACKETBUF_ADDR_RECEIVER, (const rimeaddr_t *)&rx_frame.dest_addr); packetbuf_set_addr(PACKETBUF_ADDR_SENDER, (const rimeaddr_t *)&rx_frame.src_addr); \endcode -It then calls the sicslowpan #input function. Similarly, when the IPv6 layer +It then calls the sicslowpan #input function. Similarly, when the IPv6 layer has a packet to send over the radio, it puts the packet in uip_buf, sets uip_len and calls the sicslowpan #output function. \subsection frag Fragmentation \li #output function: When an IP packet, after header compression, is -too big to fit in a 802.15.4 frame, it is fragmented in several packets -which are sent successively over the radio. The packets are formatted +too big to fit in a 802.15.4 frame, it is fragmented in several packets +which are sent successively over the radio. The packets are formatted as defined in RFC 4944. Only the first fragment contains the IP/UDP compressed or uncompressed header fields. \li #input function: This function takes care of fragment -reassembly. We do not assume that the fragments are received in order. -When reassembly of a packet is ongoing, we discard any non fragmented +reassembly. We do not assume that the fragments are received in order. +When reassembly of a packet is ongoing, we discard any non fragmented packet or fragment from another packet. Reassembly times out after #SICSLOWPAN_REASS_MAXAGE = 20s. @@ -145,7 +145,7 @@ compilation option. \note As we do not support complex buffer allocation mechanism, for now we define a new 1280 bytes buffer (#sicslowpan_buf) to reassemble packets. -At reception, once all the fragments are received, we copy the packet +At reception, once all the fragments are received, we copy the packet to #uip_buf, set #uip_len, and call #tcpip_input. \note #MAC_MAX_PAYLOAD defines the maximum payload @@ -161,7 +161,7 @@ The #SICSLOWPAN_CONF_COMPRESSION compilation option defines the HC1 and IPv6 compression are defined in RFC4944, HC01 in draft-hui-6lowpan-hc. What we call IPv6 compression means sending packets with no compression, and adding the IPv6 dispatch before the IPv6 header.
-If at compile time IPv6 "compression" is chosen, packets sent will never +If at compile time IPv6 "compression" is chosen, packets sent will never be compressed, and compressed packets will not be processed at reception.
If at compile time either HC1 or HC01 are chosen, we will try to compress all fields at sending, and will accept packets compressed with the @@ -170,7 +170,7 @@ Note that HC1 and HC01 supports are mutually exclusive. HC01 should soon deprecate HC1. Compression related functions
-When a packet is received, the #input function is called. Fragmentation +When a packet is received, the #input function is called. Fragmentation issues are handled, then we check the dispatch byte: if it is IPv6, we treat the packet inline. If it is HC1 or HC01, the corresponding decompression function (#uncompress_hdr_hc1 or #uncompress_hdr_hc01) @@ -184,21 +184,21 @@ to compress the packet as much as possible. HC1 comments
In HC1, if the IPv6 flow label is not compressed, we would need to copy the fields after the flow label starting in the middle of a byte (the -flow label is 20 bits long). To avoid this, we compress the packets only +flow label is 20 bits long). To avoid this, we compress the packets only if all fields can be compressed. If we cannot, we use the IPv6 dispatch and send all headers fields inline. This behavior is the one defined in draft-hui-6lowpan-interop-00.
-In the same way, if the packet is an UDP packet, we compress the UDP +In the same way, if the packet is an UDP packet, we compress the UDP header only if all fields can be compressed.
-Note that HC1 can only compress unicast link local addresses. For this +Note that HC1 can only compress unicast link local addresses. For this reason, we recommend using HC01. HC01 comments
-HC01 uses address contexts to enable compression of global unicast +HC01 uses address contexts to enable compression of global unicast addresses. All nodes must share context (namely the global prefixes in use) to compress and uncompress such addresses successfully. The context -number is defined by 2 bits. Context 00 is reserved for the link local -context. Other contexts have to be distributed within the LoWPAN +number is defined by 2 bits. Context 00 is reserved for the link local +context. Other contexts have to be distributed within the LoWPAN dynamically, by means of ND extensions yet to be defined.
Until then, if you want to test global address compression, you need to configure the global contexts manually. diff --git a/doc/uip6-doc.txt b/doc/uip6-doc.txt index 1aec7b493..7c063a1c8 100644 --- a/doc/uip6-doc.txt +++ b/doc/uip6-doc.txt @@ -6,7 +6,7 @@ /** * \defgroup uip6 uIP IPv6 specific features * -The uIP IPv6 stack provides new Internet communication abilities to Contiki. +The uIP IPv6 stack provides new Internet communication abilities to Contiki. This document describes Ipv6 specific features. For features that are common to the IPv4 and IPv6 code please refer to \ref uip "uIP". @@ -21,7 +21,7 @@ for extensions and options, and its new QoS and security capabilities. The uip IPv6 stack implementation targets constrained devices such as sensors. The code size is around 11.5Kbyte and the RAM usage around -1.7Kbyte (see \ref size "below" for more detailed information). +1.7Kbyte (see \ref size "below" for more detailed information). Our implementation follows closely RFC 4294 IPv6 Node Requirements whose goal is to allow "IPv6 to function well and interoperate in a large number of situations and deployments". @@ -38,12 +38,12 @@ http://www.ietf.org/rfc.html. \note The #NETSTACK_CONF_WITH_IPV6 compilation flag is used to enable IPv6. It is also recommended to set #UIP_CONF_IPV6_CHECKS to 1 -if one cannot guarantee that the incoming packets are correctly formed. +if one cannot guarantee that the incoming packets are correctly formed. \subsection ipv6 IPv6 (RFC 2460) The IP packets are processed in the #uip_process function. After a few validity checks on the IPv6 header, the extension headers -are processed until an upper layer (ICMPv6, UDP or TCP) header is found. +are processed until an upper layer (ICMPv6, UDP or TCP) header is found. We support 4 extension headers: \li Hop-by-Hop Options: this header is used to carry optional information that need to be examined only by a packet's destination node. @@ -81,18 +81,18 @@ typedef union uip_ip6addr_t { \endcode We assume that each node has a single interface of type -#uip_ds6_netif_t. +#uip_ds6_netif_t. Each interface can have a configurable number of unicast IPv6 addresses including its link-local address. It also has a solicited-node multicast address. We assume that the unicast -addresses are obtained via \ref autoconf "stateless address autoconfiguration" +addresses are obtained via \ref autoconf "stateless address autoconfiguration" so that the solicited-node address is the same for all the unicast addresses. Indeed, the solicited-node multicast address is formed by combining the prefix FF02::1:FF00:0/104 and the last 24-bits of the corresponding IPv6 address. When using stateless address autoconfiguration these bits are always equal to the last 24-bits of -the link-layer address. +the link-layer address. \subsection multicast Multicast support We do not support applications using multicast. Nevertheless, our node @@ -108,7 +108,7 @@ safely skipped and we do so. other's presence, to determine each other's link-layer addresses, to find routers, and to maintain reachability information about the paths to active neighbors" (citation from the abstract of RFC -4861). +4861). \note In IPv6 terminology, a \em link is a communication medium over which nodes can communicate at the link layer, i.e., the layer @@ -157,7 +157,7 @@ different entry fields. Neighbor discovery processes
\li Address resolution\n Determine the link-layer address of a %neighbor given its IPv6 address.\n --> send a NS (done in #tcpip_ipv6_output). +-> send a NS (done in #tcpip_ipv6_output). \li Neighbor unreachability detection\n Verify that a neighbor is still reachable via a cached link-layer address.\n @@ -183,7 +183,7 @@ Configure an address for an interface by combining a received prefix and the interface ID (see #uip_netif_addr_add). The interface ID is obtained from the link-layer address using #uip_netif_get_interface_id.\n -> Receive a RA with a prefix information option that has the -autonomous flag set. +autonomous flag set. When an interface becomes active, its link-local address is created by combining the FE80::0/64 prefix and the interface ID. DAD is then @@ -196,14 +196,14 @@ performed in #uip_netif_init. \subsection icmpv6 ICMPv6 (RFC 4443) We support ICMPv6 Error messages as well as Echo Reply and Echo Request messages. The application used for sending Echo Requests (see ping6.c) -is not part of the IP stack. +is not part of the IP stack. \note RFC 4443 stipulates that 'Every ICMPv6 error message MUST include as much of the IPv6 offending (invoking) packet as possible'. In a constrained environment this is not very resource friendly. -The ICMPv6 message headers and constants are defined in uip-icmp6.h. +The ICMPv6 message headers and constants are defined in uip-icmp6.h.
@@ -232,16 +232,16 @@ This could be avoided by using callback timers to handle ND and Netif structures
\section compileflags Compile time flags and variables -This section just lists all IPv6 related compile time flags. Each flag +This section just lists all IPv6 related compile time flags. Each flag function is documented in this page in the appropriate section. \code /*Boolean flags*/ -NETSTACK_CONF_WITH_IPV6 +NETSTACK_CONF_WITH_IPV6 UIP_CONF_IPV6_CHECKS -UIP_CONF_IPV6_QUEUE_PKT -UIP_CONF_IPV6_REASSEMBLY +UIP_CONF_IPV6_QUEUE_PKT +UIP_CONF_IPV6_REASSEMBLY /*Integer flags*/ -UIP_CONF_NETIF_MAX_ADDRESSES +UIP_CONF_NETIF_MAX_ADDRESSES NBR_TABLE_CONF_MAX_NEIGHBORS \endcode @@ -252,7 +252,7 @@ The IPv6 code uses the same \ref memory "single global buffer" as the IPv4 code. This buffer should be large enough to contain one packet of maximum size, i.e., #UIP_LINK_MTU = 1280 bytes. When \ref reass "fragment reassembly" is enabled an additional buffer of the -same size is used. +same size is used. The only difference with the IPv4 code is the per %neighbor buffering that is available when #UIP_CONF_IPV6_QUEUE_PKT is set to 1. This @@ -272,20 +272,20 @@ our code. These numbers are obtained using 'avr-gcc 4.2.2 (WinAVR \note The following compilation flags were used: \code -UIP_CONF_IPV6 1 -UIP_CONF_IPV6_CHECKS 1 -UIP_CONF_IPV6_QUEUE_PKT 0 -UIP_CONF_IPV6_REASSEMBLY 0 +UIP_CONF_IPV6 1 +UIP_CONF_IPV6_CHECKS 1 +UIP_CONF_IPV6_QUEUE_PKT 0 +UIP_CONF_IPV6_REASSEMBLY 0 -UIP_NETIF_MAX_ADDRESSES 3 -UIP_ND6_MAX_PREFIXES 3 -UIP_ND6_MAX_NEIGHBORS 4 -UIP_ND6_MAX_DEFROUTER 2 +UIP_NETIF_MAX_ADDRESSES 3 +UIP_ND6_MAX_PREFIXES 3 +UIP_ND6_MAX_NEIGHBORS 4 +UIP_ND6_MAX_DEFROUTER 2 \endcode The total IPv6 code size is approximately 11.5Kbyte and the RAM usage around 1.8Kbyte. For an additional NEIGHBOR count 35bytes, 25 for an additional -PREFIX, 7 for an additional DEFROUTER, and 25 for an additional ADDRESS. +PREFIX, 7 for an additional DEFROUTER, and 25 for an additional ADDRESS.
@@ -345,7 +345,7 @@ We will soon support RFC4944 transmission of IPv6 packets over 802.15.4\n \li ICMPv6 RFC 4443 (MUST): full support \li IPv6 addressing architecture RFC 3513 (MUST): full support \li Privacy extensions for address autoconfiguration RFC 3041 (SHOULD): no support. -\li Default Address Selection RFC 3484 (MUST): full support. +\li Default Address Selection RFC 3484 (MUST): full support. \li MLDv1 (RFC 2710) and MLDv2 (RFC 3810) (conditional MUST applying here): no support. As we run IPv6 over Multicast or broadcast capable links (Ethernet or 802.15.4), the conditional MUST applies. We should be able to send an MLD report when joining a solicited node multicast group at address configuration time. This will be available in a later release. DNS (RFC 1034, 1035, 3152, 3363, 3596) and DHCPv6 (RFC 3315) (conditional MUST)
diff --git a/platform/avr-ravenusb/cdc_task.c b/platform/avr-ravenusb/cdc_task.c index 64af3741e..83798f7ce 100644 --- a/platform/avr-ravenusb/cdc_task.c +++ b/platform/avr-ravenusb/cdc_task.c @@ -103,7 +103,7 @@ void menu_process(char c); extern char usb_busy; //! Counter for USB Serial port -extern U8 tx_counter; +extern U8 tx_counter; //! Timers for LEDs uint8_t led3_timer; diff --git a/platform/avr-ravenusb/rng.c b/platform/avr-ravenusb/rng.c index 83ce3e5b8..ed385d960 100644 --- a/platform/avr-ravenusb/rng.c +++ b/platform/avr-ravenusb/rng.c @@ -66,7 +66,7 @@ extract_random_bit_() { cli(); #ifdef PRR - // Enable ADC module + // Enable ADC module PRR &= ~(1 << PRADC); #endif @@ -100,7 +100,7 @@ extract_random_bit_() { // Toggling the reference voltage // seems to help introduce noise. ADMUX^=(1<ipaddr.u8[i * 2], - lladdr->ipaddr.u8[i * 2 + 1]); + printf("%02x%02x:", lladdr->ipaddr.u8[i * 2], + lladdr->ipaddr.u8[i * 2 + 1]); } printf("%02x%02x\n", lladdr->ipaddr.u8[14], - lladdr->ipaddr.u8[15]); + lladdr->ipaddr.u8[15]); } if(1) { @@ -320,7 +320,7 @@ contiki_init() /* Initialize eeprom */ eeprom_init(); - + /* Start serial process */ serial_line_init(); @@ -417,10 +417,9 @@ JNIEXPORT void JNICALL Java_org_contikios_cooja_corecomm_CLASSNAME_setMemory(JNIEnv *env, jobject obj, jint rel_addr, jint length, jbyteArray mem_arr) { jbyte *mem = (*env)->GetByteArrayElements(env, mem_arr, 0); - memcpy( - (char*) (((long)rel_addr) + referenceVar), - mem, - length); + memcpy((char*) (((long)rel_addr) + referenceVar), + mem, + length); (*env)->ReleaseByteArrayElements(env, mem_arr, mem, 0); } /*---------------------------------------------------------------------------*/ @@ -453,7 +452,7 @@ Java_org_contikios_cooja_corecomm_CLASSNAME_tick(JNIEnv *env, jobject obj) doActionsBeforeTick(); /* Poll etimer process */ - if (etimer_pending()) { + if(etimer_pending()) { etimer_request_poll(); } @@ -481,9 +480,9 @@ Java_org_contikios_cooja_corecomm_CLASSNAME_tick(JNIEnv *env, jobject obj) nextRtimer = rtimer_arch_next() - (rtimer_clock_t) simCurrentTime; if(etimer_pending() && rtimer_arch_pending()) { simNextExpirationTime = MIN(nextEtimer, nextRtimer); - } else if (etimer_pending()) { + } else if(etimer_pending()) { simNextExpirationTime = nextEtimer; - } else if (rtimer_arch_pending()) { + } else if(rtimer_arch_pending()) { simNextExpirationTime = nextRtimer; } } diff --git a/platform/wismote/dev/acc-sensor.c b/platform/wismote/dev/acc-sensor.c index 15ea5fd82..5203526e3 100644 --- a/platform/wismote/dev/acc-sensor.c +++ b/platform/wismote/dev/acc-sensor.c @@ -122,5 +122,4 @@ status(int type) } } /*---------------------------------------------------------------------------*/ -SENSORS_SENSOR(acc_sensor, ACC_SENSOR, - value, configure, status); +SENSORS_SENSOR(acc_sensor, ACC_SENSOR, value, configure, status); diff --git a/platform/wismote/dev/ext-sensor.c b/platform/wismote/dev/ext-sensor.c index a957e5232..b348624e5 100644 --- a/platform/wismote/dev/ext-sensor.c +++ b/platform/wismote/dev/ext-sensor.c @@ -100,5 +100,4 @@ configure(int type, int c) } } /*---------------------------------------------------------------------------*/ -SENSORS_SENSOR(ext_sensor, "Ext", - value, configure, status); +SENSORS_SENSOR(ext_sensor, "Ext", value, configure, status);