Lots of progress!
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@ -89,9 +89,6 @@ then maybe buckbypass sequence... 4 entries from r4+16
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0x402b64 <gBuckByPass_c>: 0x80003000 0x00000018 0x80003048 0x00000f04
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0x402b64 <gBuckByPass_c>: 0x80003000 0x00000018 0x80003048 0x00000f04
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0x402b74 <gBuckByPass_c+16>: 0x00000000 0x000161a8 0x80003048 0x00000ffc
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0x402b74 <gBuckByPass_c+16>: 0x00000000 0x000161a8 0x80003048 0x00000ffc
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RadioInit is (roughly):
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RadioInit is (roughly):
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SMAC_InitFromMemory(gRadioTOCCal1,40);
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SMAC_InitFromMemory(gRadioTOCCal1,40);
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@ -101,6 +98,9 @@ RadioInit is (roughly):
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SMAC_InitFromMemory(gRadioInit_RegReplacement_c,344);
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SMAC_InitFromMemory(gRadioInit_RegReplacement_c,344);
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SMAC_InitFromFlash(0x1F000);
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SMAC_InitFromFlash(0x1F000);
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SMAC_InitFlybackSettings();
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SMAC_InitFlybackSettings();
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SMAC_InitFromMemory(gBuckByPass_c,16);
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fill_ram_struct(&u8RamValues);
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uint8_t i;
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uint8_t i;
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uint8_t buffer_radio_init[16];
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uint8_t buffer_radio_init[16];
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@ -109,6 +109,43 @@ RadioInit is (roughly):
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}
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}
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Some kind of success!
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This replacment works:
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// RadioInit(PLATFORM_CLOCK, gDigitalClock_PN_c, u32LoopDiv); // need this to work
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/* my replacment for RadioInit, flyback and vreg have been separated out */
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radio_init();
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// SMAC_InitFromMemory(gRadioTOCCal1,40);
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// *(volatile uint32_t *)0x80009000 = 0x80050100;
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// SMAC_InitFromMemory(gRadioTOCCal2_24MHz_c,8);
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// SMAC_InitFromMemory(gRadioTOCCal3_c,88);
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// SMAC_InitFromMemory(gRadioTOCCal5,32);
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// SMAC_InitFromMemory(gRadioInit_RegReplacement_c,344);
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SMAC_InitFromFlash(0x1F000);
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// SMAC_InitFlybackSettings();
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flyback_init();
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// SMAC_InitFromMemory(gBuckByPass_c,16);
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vreg_init();
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*((uint32_t *)&u8RamValues) = 0x4c20030a;
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fill_ram_struct(&u8RamValues);
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for(j=0; j<16; j++) {
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// buffer_radio_init[j] = get_ctov(j,u8RamValues[3]);
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buffer_radio_init[j] = get_ctov(j,0x4c); //0x4c loads the right values into buffer_radio_init... but why isn't RamValues correct?
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}
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Which means my radio_init, and vreg_init are good. It also means that
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my intreprtation of buffer_radio_init is correct. It may also mean
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that u8RamValues isn't important since I just set it's value.
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That means I only have InitFromFlash to replace now!
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/*
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/*
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After init from flash and flyback settings
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After init from flash and flyback settings
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ram_init_val - 004055d0
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ram_init_val - 004055d0
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@ -5265,10 +5265,10 @@ Disassembly of section P2:
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403080: 480f ldr r0, [pc, #60] (4030c0 <RadioInit+0x104>) // 6:
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403080: 480f ldr r0, [pc, #60] (4030c0 <RadioInit+0x104>) // 6:
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403082: f000 f881 bl 403188 <fill_ram_struct> // and a call to fill ram struct --- maybe important to the program?
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403082: f000 f881 bl 403188 <fill_ram_struct> // and a call to fill ram struct --- maybe important to the program?
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403086: 2400 movs r4, #0
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403086: 2400 movs r4, #0
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403088: 78e9 ldrb r1, [r5, #3] // appears to be 0x9b
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403088: 78e9 ldrb r1, [r5, #3] // appears to be 0x4c
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40308a: 0620 lsls r0, r4, #24 // clobber high 24 bits
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40308a: 0620 lsls r0, r4, #24 // clobber high 24 bits
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40308c: 0e00 lsrs r0, r0, #24
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40308c: 0e00 lsrs r0, r0, #24
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40308e: f000 f86d bl 40316c <get_ctov> //v=get_ctov(0,0x9b)
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40308e: f000 f86d bl 40316c <get_ctov> //v=get_ctov(0,0x4c)
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403092: 1929 adds r1, r5, r4 // r4 = 0, r5 is &ram_init_val
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403092: 1929 adds r1, r5, r4 // r4 = 0, r5 is &ram_init_val
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403094: 7208 strb r0, [r1, #8]
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403094: 7208 strb r0, [r1, #8]
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403096: 1c64 adds r4, r4, #1 // r4 = r4+1
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403096: 1c64 adds r4, r4, #1 // r4 = r4+1
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@ -5373,7 +5373,7 @@ Disassembly of section P2:
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403168: bfffffff .word 0xbfffffff
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403168: bfffffff .word 0xbfffffff
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0040316c <get_ctov>:
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0040316c <get_ctov>:
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40316c: 4a04 ldr r2, [pc, #16] (403180 <get_ctov+0x14>)
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40316c: 4a04 ldr r2, [pc, #16] (403180 <get_ctov+0x14>) r2=0x00dfbe77
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40316e: 4350 muls r0, r2
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40316e: 4350 muls r0, r2
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403170: 0589 lsls r1, r1, #22
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403170: 0589 lsls r1, r1, #22
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403172: 1840 adds r0, r0, r1
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403172: 1840 adds r0, r0, r1
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@ -61,6 +61,7 @@ void reset_maca(void)
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4030e8: 00ffffff .word 0x00ffffff
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4030e8: 00ffffff .word 0x00ffffff
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*/
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*/
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/* tested and is good */
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#define FLYBACK_BASE 0x80009a000
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#define FLYBACK_BASE 0x80009a000
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void flyback_init(void) {
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void flyback_init(void) {
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uint32_t val8, or;
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uint32_t val8, or;
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@ -128,6 +129,8 @@ const uint32_t addr_reg_rep[MAX_DATA] = { 0x80004118,0x80009204,0x80009208,0x800
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const uint32_t data_reg_rep[MAX_DATA] = { 0x00180012,0x00000605,0x00000504,0x00001111,0x0fc40000,0x20046000,0x4005580c,0x40075801,0x4005d801,0x5a45d800,0x4a45d800,0x40044000,0x00106000,0x00083806,0x00093807,0x0009b804,0x000db800,0x00093802,0x00000015,0x00000002,0x0000000f,0x0000aaa0,0x01002020,0x016800fe,0x8e578248,0x000000dd,0x00000946,0x0000035a,0x00100010,0x00000515,0x00397feb,0x00180358,0x00000455,0x00000001,0x00020003,0x00040014,0x00240034,0x00440144,0x02440344,0x04440544,0x0ee7fc00,0x00000082,0x0000002a };
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const uint32_t data_reg_rep[MAX_DATA] = { 0x00180012,0x00000605,0x00000504,0x00001111,0x0fc40000,0x20046000,0x4005580c,0x40075801,0x4005d801,0x5a45d800,0x4a45d800,0x40044000,0x00106000,0x00083806,0x00093807,0x0009b804,0x000db800,0x00093802,0x00000015,0x00000002,0x0000000f,0x0000aaa0,0x01002020,0x016800fe,0x8e578248,0x000000dd,0x00000946,0x0000035a,0x00100010,0x00000515,0x00397feb,0x00180358,0x00000455,0x00000001,0x00020003,0x00040014,0x00240034,0x00440144,0x02440344,0x04440544,0x0ee7fc00,0x00000082,0x0000002a };
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/* has been tested and it good */
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void vreg_init(void) {
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void vreg_init(void) {
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volatile uint32_t i;
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volatile uint32_t i;
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*(volatile uint32_t *)(0x80003000) = 0x00000018; /* set default state */
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*(volatile uint32_t *)(0x80003000) = 0x00000018; /* set default state */
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@ -137,6 +140,8 @@ void vreg_init(void) {
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*(volatile uint32_t *)(0x80003048) = 0x00000ff8; /* start the regulators */
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*(volatile uint32_t *)(0x80003048) = 0x00000ff8; /* start the regulators */
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}
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}
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/* radio_init has been tested to be good */
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void radio_init(void) {
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void radio_init(void) {
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uint32_t i;
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uint32_t i;
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/* sequence 1 */
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/* sequence 1 */
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