diff --git a/libmc1322x/include/mc1322x.h b/libmc1322x/include/mc1322x.h index 74041e3c9..4bfed6aa2 100644 --- a/libmc1322x/include/mc1322x.h +++ b/libmc1322x/include/mc1322x.h @@ -6,6 +6,7 @@ #include "gpio.h" #include "crm.h" #include "nvm.h" +#include "tmr.h" #include "uart1.h" #include "utils.h" diff --git a/libmc1322x/include/tmr.h b/libmc1322x/include/tmr.h new file mode 100644 index 000000000..073ed6e62 --- /dev/null +++ b/libmc1322x/include/tmr.h @@ -0,0 +1,92 @@ +#include "utils.h" + +/* Timer registers are all 16-bit wide with 16-bit access only */ +#define TMR_OFFSET (0x20) +#define TMR_BASE (0x80007000) +#define TMR0_BASE (TMR_BASE) +#define TMR1_BASE (TMR_BASE + TMR_OFFSET*1) +#define TMR2_BASE (TMR_BASE + TMR_OFFSET*2) +#define TMR3_BASE (TMR_BASE + TMR_OFFSET*3) + +#define TMR_REGOFF_COMP1 (0x0) +#define TMR_REGOFF_COMP2 (0x2) +#define TMR_REGOFF_CAPT (0x4) +#define TMR_REGOFF_LOAD (0x6) +#define TMR_REGOFF_HOLD (0x8) +#define TMR_REGOFF_CNTR (0xa) +#define TMR_REGOFF_CTRL (0xc) +#define TMR_REGOFF_SCTRL (0xe) +#define TMR_REGOFF_CMPLD1 (0x10) +#define TMR_REGOFF_CMPLD2 (0x12) +#define TMR_REGOFF_CSCTRL (0x14) +#define TMR_REGOFF_ENBL (0x1e) + +/* one enable register to rule them all */ +#define TMR_ENBL ((volatile uint16_t *) TMR0_BASE + TMR_REGOFF_ENBL) + +/* Timer 0 registers */ +#define TMR0_COMP1 ((volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_COMP1)) +#define TMR0_COMP_UP TMR0_COMP1 +#define TMR0_COMP2 (TMR0_BASE + TMR_REGOFF_COMP2) +#define TMR0_COMP_DOWN TMR0_COMP2 +#define TMR0_CAPT ((volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_CAPT)) +#define TMR0_LOAD ((volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_LOAD)) +#define TMR0_HOLD ((volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_HOLD)) +#define TMR0_CNTR ((volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_CTRL)) +#define TMR0_CTRL ((volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_CTRL)) +#define TMR0_SCTRL ((volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_SCTRL)) +#define TMR0_CMPLD1 ((volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_CMPLD1)) +#define TMR0_CMPLD2 ((volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_CMPLD2)) +#define TMR0_CSCTRL ((volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_CSCTRL)) + +/* Timer 1 registers */ +#define TMR1_COMP1 ((volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_COMP1)) +#define TMR1_COMP_UP TMR1_COMP1 +#define TMR1_COMP2 ((volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_COMP2)) +#define TMR1_COMP_DOWN TMR1_COMP2 +#define TMR1_CAPT ((volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_CAPT)) +#define TMR1_LOAD ((volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_LOAD)) +#define TMR1_HOLD ((volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_HOLD)) +#define TMR1_CNTR ((volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_CTRL)) +#define TMR1_CTRL ((volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_CTRL)) +#define TMR1_SCTRL ((volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_SCTRL)) +#define TMR1_CMPLD1 ((volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_CMPLD1)) +#define TMR1_CMPLD2 ((volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_CMPLD2)) +#define TMR1_CSCTRL ((volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_CSCTRL)) + +/* Timer 2 registers */ +#define TMR2_COMP1 ((volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_COMP1)) +#define TMR2_COMP_UP TMR2_COMP1 +#define TMR2_COMP2 ((volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_COMP2)) +#define TMR2_COMP_DOWN TMR2_COMP2 +#define TMR2_CAPT ((volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_CAPT)) +#define TMR2_LOAD ((volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_LOAD)) +#define TMR2_HOLD ((volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_HOLD)) +#define TMR2_CNTR ((volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_CTRL)) +#define TMR2_CTRL ((volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_CTRL)) +#define TMR2_SCTRL ((volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_SCTRL)) +#define TMR2_CMPLD1 ((volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_CMPLD1)) +#define TMR2_CMPLD2 ((volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_CMPLD2)) +#define TMR2_CSCTRL ((volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_CSCTRL)) + +/* Timer 3 registers */ +#define TMR3_COMP1 ((volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_COMP1)) +#define TMR3_COMP_UP TMR3_COMP1 +#define TMR3_COMP2 ((volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_COMP2)) +#define TMR3_COMP_DOWN TMR3_COMP2 +#define TMR3_CAPT ((volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_CAPT)) +#define TMR3_LOAD ((volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_LOAD)) +#define TMR3_HOLD ((volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_HOLD)) +#define TMR3_CNTR ((volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_CTRL)) +#define TMR3_CTRL ((volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_CTRL)) +#define TMR3_SCTRL ((volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_SCTRL)) +#define TMR3_CMPLD1 ((volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_CMPLD1)) +#define TMR3_CMPLD2 ((volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_CMPLD2)) +#define TMR3_CSCTRL ((volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_CSCTRL)) + +#define TCF 15 +#define TCF1 4 +#define TCF2 5 + +#define TMR(num, reg) CAT2(TMR,num,_##reg) + diff --git a/tests/Makefile b/tests/Makefile index 0df0403e1..9bbfbd348 100644 --- a/tests/Makefile +++ b/tests/Makefile @@ -6,7 +6,7 @@ MC1322X := .. COBJS := tests.o put.o # all of the target programs to build -TARGETS := blink-red blink-green blink-blue blink-white blink-allio uart1-loopback nvm-read nvm-write romimg flasher +TARGETS := blink-red blink-green blink-blue blink-white blink-allio uart1-loopback nvm-read nvm-write romimg flasher tmr include $(MC1322X)/Makefile.include diff --git a/tests/tests.h b/tests/tests.h index 39fe17f3c..8b27c8658 100644 --- a/tests/tests.h +++ b/tests/tests.h @@ -2,6 +2,7 @@ #define TESTS_H #include "put.h" +#include "led.h" void uart1_init(uint16_t inc, uint16_t mod); void print_welcome(char* testname); diff --git a/tests/tmr.c b/tests/tmr.c index 4cf822dc9..f5558aaf2 100644 --- a/tests/tmr.c +++ b/tests/tmr.c @@ -1,21 +1,15 @@ -#define MBAR_GPIO 0x80000000 -#define GPIO_PAD_DIR0 0x80000000 -#define GPIO_DATA0 0x80000008 -#define UART1_DATA 0x80005008 -#define DELAY 400000 +#include +#include -#include "embedded_types.h" -#include "utils.h" -#include "timer.h" -#include "led.h" +#include "tests.h" +#include "config.h" #define LED LED_YELLOW -__attribute__ ((section ("startup"))) void main(void) { /* pin direction */ - reg32(GPIO_PAD_DIR0) = LED; + *GPIO_PAD_DIR0 = LED; /* timer setup */ /* CTRL */ @@ -28,28 +22,28 @@ void main(void) { #define CO_INIT 0 /* other counters cannot force a re-initialization of this counter */ #define OUT_MODE 0 /* OFLAG is asserted while counter is active */ - reg16(TMR_ENBL) = 0; /* tmrs reset to enabled */ - reg16(TMR0_SCTRL) = 0; - reg16(TMR0_LOAD) = 0; /* reload to zero */ - reg16(TMR0_COMP_UP) = 18750; /* trigger a reload at the end */ - reg16(TMR0_CMPLD1) = 18750; /* compare 1 triggered reload level, 10HZ maybe? */ - reg16(TMR0_CNTR) = 0; /* reset count register */ - reg16(TMR0_CTRL) = (COUNT_MODE<<13) | (PRIME_SRC<<9) | (SEC_SRC<<7) | (ONCE<<6) | (LEN<<5) | (DIR<<4) | (CO_INIT<<3) | (OUT_MODE); - reg16(TMR_ENBL) = 0xf; /* enable all the timers --- why not? */ + *TMR_ENBL = 0; /* tmrs reset to enabled */ + *TMR0_SCTRL = 0; + *TMR0_LOAD = 0; /* reload to zero */ + *TMR0_COMP_UP = 18750; /* trigger a reload at the end */ + *TMR0_CMPLD1 = 18750; /* compare 1 triggered reload level, 10HZ maybe? */ + *TMR0_CNTR = 0; /* reset count register */ + *TMR0_CTRL = (COUNT_MODE<<13) | (PRIME_SRC<<9) | (SEC_SRC<<7) | (ONCE<<6) | (LEN<<5) | (DIR<<4) | (CO_INIT<<3) | (OUT_MODE); + *TMR_ENBL = 0xf; /* enable all the timers --- why not? */ while(1) { /* blink on */ - reg32(GPIO_DATA0) = LED; + *GPIO_DATA0 = LED; - while((reg16(TMR0_SCTRL)>>15) == 0) { continue; } - reg16(TMR0_SCTRL) = 0; /*clear bit 15, and all the others --- should be ok, but clearly not "the right thing to do" */ + while((*TMR0_SCTRL >> 15) == 0) { continue; } + *TMR0_SCTRL = 0; /*clear bit 15, and all the others --- should be ok, but clearly not "the right thing to do" */ /* blink off */ - reg32(GPIO_DATA0) = 0x00000000; + *GPIO_DATA0 = 0x00000000; - while((reg16(TMR0_SCTRL)>>15) == 0) { continue; } - reg16(TMR0_SCTRL) = 0; /*clear bit 15, and all the others --- should be ok, but clearly not "the right thing to do" */ + while((*TMR0_SCTRL >> 15) == 0) { continue; } + *TMR0_SCTRL = 0; /*clear bit 15, and all the others --- should be ok, but clearly not "the right thing to do" */ }; }