repository cleaned
actually noone ever needed the full contiki-ng repository, but it was just forked in order to start developing the project quicklymaster
parent
1fd0ba8d72
commit
d192979eb7
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@ -1,69 +1 @@
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*.a
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*.bin
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*.hex
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*.map
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*.png
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*.log
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*.elf
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*.zip
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*.d
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*.o
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*.e
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*.ihex
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*.pyc
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*~
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build/*
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Makefile.target
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Makefile.*.defines
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tools/doxygen/html
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tools/readthedocs/_build
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patches-*
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tools/serial-io/tunslip6
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tools/serial-io/serialdump
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serialdump-*
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build
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tools/coffee-manager/build/
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tools/coffee-manager/coffee.jar
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COOJA.testlog
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# platform build artifacts
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*.cc2538dk
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*.cooja
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*.jn516x
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*.native
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*.nrf52dk
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*.openmote-cc2538
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*.simplelink
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*.sky
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*.firmware
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*.cc26x0-cc13x0
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*.zoul
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# do not ignore platform makefiles
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!Makefile.cc2538dk
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!Makefile.cooja
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!Makefile.jn516x
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!Makefile.native
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!Makefile.nrf52dk
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!Makefile.openmote-cc2538
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!Makefile.sky
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!Makefile.cc26x0-cc13x0
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!Makefile.zoul
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# other nRF52 build artifacts
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*.jlink
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#test artifacts
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*.testlog
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*.scriptlog
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*.coojalog
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*.summary
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*.err
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summary
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tests/[0-9][0-9]-*/org/
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tests/18-coap-lwm2m/Californium.properties
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tests/18-coap-lwm2m/leshan-server-demo*.jar
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# x86 UEFI files
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cpu/x86/uefi/Makefile.uefi
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cpu/x86/uefi/edk2
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*.swp
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|
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@ -1,3 +0,0 @@
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For contribution guidelines, see [doc:contributing].
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[doc:contributing]: https://github.com/contiki-ng/contiki-ng/wiki/Contributing
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30
LICENSE.md
30
LICENSE.md
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@ -1,30 +0,0 @@
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Copyright (c) (Year), (Name of copyright holder)
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All rights reserved.
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||||
|
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Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions
|
||||
are met:
|
||||
|
||||
1. Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
|
||||
2. Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
|
||||
3. Neither the name of the copyright holder nor the names of its
|
||||
contributors may be used to endorse or promote products derived
|
||||
from this software without specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
OF THE POSSIBILITY OF SUCH DAMAGE.
|
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@ -1,47 +0,0 @@
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# This Makefile contains make variables and rules that are only applicable
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# to builds for embedded devices (i.e. excluding platforms native and cooja).
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# Future extensions to the build system that are of a similar nature (for
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||||
# embedded devices only), can be achieved by extending this Makefile here.
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||||
|
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###
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### Targets using the tools/serial-io
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###
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RLWRAPGOALS = login serialdump serialview
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.PHONY: $(RLWRAPGOALS)
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BAUDRATE ?= 115200
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SERIALDUMP_TIME_FMT ?=
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ifeq ($(HOST_OS),Windows)
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SERIALDUMP = $(SERIAL_DUMP_BIN)
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else
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RLWRAP = $(notdir $(shell which rlwrap))
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||||
ifeq ($(RLWRAP),)
|
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ifneq ($(filter $(RLWRAPGOALS),$(MAKECMDGOALS)),)
|
||||
$(info Running serialdump without rlwrap support.)
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$(info Consider installing rlwarp in order to be able to use command history)
|
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endif
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endif
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||||
SERIALDUMP = $(RLWRAP) $(SERIAL_DUMP_BIN)
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endif
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|
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serialdump: $(SERIAL_DUMP_BIN)
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$(SERIALDUMP) -b$(BAUDRATE) -T$(SERIALDUMP_TIME_FMT) $(PORT) | tee serialdump-`date +%Y%m%d-%H%M`
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|
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serialview: $(SERIAL_DUMP_BIN)
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$(SERIALDUMP) -b$(BAUDRATE) -T$(SERIALDUMP_TIME_FMT) $(PORT)
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|
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login: $(SERIAL_DUMP_BIN)
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$(SERIALDUMP) -b$(BAUDRATE) $(PORT)
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|
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###
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### Targets using tools/motelist
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###
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CONTIKI_NG_MOTELIST_DIR = $(TOOLS_DIR)/motelist
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CONTIKI_NG_MOTELIST = python $(CONTIKI_NG_MOTELIST_DIR)/motelist.py
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|
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.PHONY: motelist-all
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motelist-all:
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$(CONTIKI_NG_MOTELIST)
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@ -1,29 +0,0 @@
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usage:
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@echo "Usage:"
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@echo " make [TARGET=(TARGET)] [BOARD=(BOARD)] [DEFINES=(DEFINES)] [PORT=(PORT)] [target]"
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@echo ""
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@echo "Typical usage:"
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@echo " make [TARGET=(TARGET)] [BOARD=(BOARD)] [all]"
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@echo ""
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@echo " Will build Contiki-NG firmware(s) from the current example dir"
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@echo " for platform TARGET, board BOARD."
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||||
@echo ""
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@echo "Miscellaneous targets:"
|
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@echo " targets Prints list of supported platforms"
|
||||
@echo " boards Prints a list of supported boards for TARGET"
|
||||
@echo " savetarget Saves TARGET and BOARD for future invocations of make"
|
||||
@echo " savedefines Saves DEFINES for future invocations of make"
|
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@echo " clean Removes all compiled files for TARGET"
|
||||
@echo " distclean Removes all compiled files for all TARGETs"
|
||||
@echo " viewconf Prints Contiki-NG build configuration for TARGET"
|
||||
@echo " %.flashprof Shows a Flash/ROM profile of a given firmware (e.g. hello-world.flashprof)"
|
||||
@echo " %.ramprof Shows a RAM profile of a given firmware (e.g. hello-world.ramprof)"
|
||||
@echo " %.o Produces an object file from a given source file (e.g. hello-world.o)"
|
||||
@echo " %.e Produces the pre-processed version of a given source file (e.g. hello-world.e)"
|
||||
@echo " %.s Produces an assembly file from a given source file (e.g. hello-world.s)"
|
||||
@echo " login View the serial output of the device connected to PORT"
|
||||
@echo " serialview Same as login, but prepend serial output with a unix timestamp"
|
||||
@echo " serialdump same as serialview, but also save the output to a file"
|
||||
@echo " motelist-all Prints a list of connected devices"
|
||||
|
||||
help: usage
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@ -1,14 +0,0 @@
|
|||
# This Makefile can be used to identify the selected TARGET used for a
|
||||
# specific build. It can be included by example Makefiles that need to take
|
||||
# decisions based on TARGET. It is also automatically included by the
|
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# top-level Makefile.include.
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|
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ifeq ($(TARGET),)
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-include Makefile.target
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||||
ifeq ($(TARGET),)
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${info TARGET not defined, using target 'native'}
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TARGET=native
|
||||
else
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||||
${info using saved target '$(TARGET)'}
|
||||
endif
|
||||
endif
|
490
Makefile.include
490
Makefile.include
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@ -1,490 +0,0 @@
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# -*- makefile -*-
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ifndef CONTIKI
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${error CONTIKI not defined! You must specify where Contiki resides}
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endif
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||||
|
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# Enable Werror by default. To disable from command line, use make WERROR=0.
|
||||
# Setting this option is also important for tests on Cooja motes to check for warnings.
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WERROR ?= 1
|
||||
|
||||
include $(CONTIKI)/Makefile.identify-target
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||||
|
||||
### Include Makefile.tools to pull in targets that allow us to build tools dir
|
||||
include $(CONTIKI)/Makefile.tools
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||||
|
||||
ifeq ($(DEFINES),)
|
||||
-include Makefile.$(TARGET).defines
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||||
ifneq ($(DEFINES),)
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${info using saved defines '$(DEFINES)'}
|
||||
endif
|
||||
endif
|
||||
|
||||
ifndef HOST_OS
|
||||
ifeq ($(OS),Windows_NT)
|
||||
## TODO: detect more specific Windows set-ups,
|
||||
## e.g. CygWin, MingW, VisualC, Watcom, Interix
|
||||
HOST_OS := Windows
|
||||
else
|
||||
HOST_OS := $(shell uname)
|
||||
endif
|
||||
endif
|
||||
|
||||
#More debug information when running in CI
|
||||
ifdef CI
|
||||
ifeq ($(CI),true)
|
||||
V = 1
|
||||
endif
|
||||
endif
|
||||
|
||||
BUILD_DIR = build
|
||||
BUILD_DIR_TARGET = $(BUILD_DIR)/$(TARGET)
|
||||
BUILD_DIR_BOARD = $(BUILD_DIR_TARGET)/$(BOARD)/$(BUILD_DIR_CONFIG)
|
||||
OBJECTDIR = $(BUILD_DIR_BOARD)/obj
|
||||
|
||||
CONTIKI_NG_TARGET_LIB = $(BUILD_DIR_BOARD)/contiki-ng-$(TARGET).a
|
||||
|
||||
LOWERCASE = -abcdefghijklmnopqrstuvwxyz/
|
||||
UPPERCASE = _ABCDEFGHIJKLMNOPQRSTUVWXYZ_
|
||||
TARGET_UPPERCASE := ${strip ${shell echo $(TARGET) | sed y!$(LOWERCASE)!$(UPPERCASE)!}}
|
||||
CFLAGS += -DCONTIKI=1 -DCONTIKI_TARGET_$(TARGET_UPPERCASE)=1
|
||||
CFLAGS += -DCONTIKI_TARGET_STRING=\"$(TARGET)\"
|
||||
|
||||
CFLAGS += -Wno-unused-const-variable
|
||||
|
||||
LDFLAGS_WERROR ?= -Wl,--fatal-warnings
|
||||
|
||||
ifeq ($(WERROR),1)
|
||||
LDFLAGS += $(LDFLAGS_WERROR)
|
||||
endif
|
||||
|
||||
MODULES += os os/sys os/dev os/lib os/services
|
||||
|
||||
# Automatically include project-conf.h if found
|
||||
ifneq ("$(wildcard project-conf.h)","")
|
||||
CFLAGS += -DPROJECT_CONF_PATH=\"project-conf.h\"
|
||||
endif
|
||||
|
||||
MODULES += os os/net os/net/mac os/net/mac/framer os/net/routing os/storage
|
||||
|
||||
define oname
|
||||
${patsubst %.c,%.o, \
|
||||
${patsubst %.S,%.o, \
|
||||
${patsubst %.s,%.o, \
|
||||
$(1) \
|
||||
}}}
|
||||
endef
|
||||
|
||||
CONTIKI_OBJECTFILES = ${addprefix $(OBJECTDIR)/,${call oname, $(CONTIKI_SOURCEFILES)}}
|
||||
PROJECT_OBJECTFILES = ${addprefix $(OBJECTDIR)/,${call oname, $(PROJECT_SOURCEFILES)}}
|
||||
|
||||
uniq = $(if $1,$(firstword $1) $(call uniq,$(filter-out $(firstword $1),$1)))
|
||||
|
||||
### Include target makefile (TODO Unsafe?)
|
||||
|
||||
# Configurable arch path
|
||||
ARCH_PATH ?= $(CONTIKI)/arch
|
||||
|
||||
target_makefile := $(wildcard $(ARCH_PATH)/platform/$(TARGET)/Makefile.$(TARGET) ${foreach TDIR, $(TARGETDIRS), $(TDIR)/$(TARGET)/Makefile.$(TARGET)})
|
||||
|
||||
# Check if the target makefile exists, and create the object directory if necessary.
|
||||
ifeq ($(strip $(target_makefile)),)
|
||||
${error The target platform "$(TARGET)" does not exist (maybe it was misspelled?)}
|
||||
else
|
||||
ifneq (1, ${words $(target_makefile)})
|
||||
${error More than one TARGET Makefile found: $(target_makefile)}
|
||||
endif
|
||||
include $(target_makefile)
|
||||
endif
|
||||
|
||||
# Decide whether to build or to skip this target for this platform
|
||||
ifneq ("", "$(PLATFORMS_ONLY)")
|
||||
ifeq ("","$(filter $(TARGET), $(PLATFORMS_ONLY))")
|
||||
PLATFORM_ACTION = skip
|
||||
endif
|
||||
endif
|
||||
|
||||
ifneq ("", "$(PLATFORMS_EXCLUDE)")
|
||||
ifneq ("","$(filter $(TARGET), $(PLATFORMS_EXCLUDE))")
|
||||
PLATFORM_ACTION = skip
|
||||
endif
|
||||
endif
|
||||
|
||||
ifneq ($(BOARD),)
|
||||
ifneq ("", "$(BOARDS_ONLY)")
|
||||
ifeq ("","$(filter $(BOARD), $(BOARDS_ONLY))")
|
||||
PLATFORM_ACTION = skip
|
||||
endif
|
||||
endif
|
||||
|
||||
ifneq ("", "$(BOARDS_EXCLUDE)")
|
||||
ifneq ("","$(filter $(BOARD), $(BOARDS_EXCLUDE))")
|
||||
PLATFORM_ACTION = skip
|
||||
endif
|
||||
endif
|
||||
endif # $(BOARD) not empty
|
||||
|
||||
PLATFORM_ACTION ?= build
|
||||
|
||||
# Provide way to create $(OBJECTDIR) if it has been removed by make clean
|
||||
$(OBJECTDIR):
|
||||
$(TRACE_MKDIR)
|
||||
$(Q)mkdir -p $@
|
||||
|
||||
ifneq ($(BOARD),)
|
||||
TARGET_BOARD_UPPERCASE := ${strip ${shell echo $(BOARD) | sed y!$(LOWERCASE)!$(UPPERCASE)!}}
|
||||
CFLAGS += -DCONTIKI_BOARD_$(TARGET_BOARD_UPPERCASE)=1
|
||||
CFLAGS += -DCONTIKI_BOARD_STRING=\"$(BOARD)\"
|
||||
endif
|
||||
|
||||
# Configure MAC layer
|
||||
|
||||
# The different options
|
||||
MAKE_MAC_NULLMAC = 0
|
||||
MAKE_MAC_CSMA = 1
|
||||
MAKE_MAC_TSCH = 2
|
||||
MAKE_MAC_BLE = 3
|
||||
MAKE_MAC_OTHER = 4
|
||||
|
||||
# Make CSMA the default MAC
|
||||
MAKE_MAC ?= MAKE_MAC_CSMA
|
||||
|
||||
ifeq ($(MAKE_MAC),MAKE_MAC_NULLMAC)
|
||||
MODULES+=os/net/mac/nullmac
|
||||
CFLAGS += -DMAC_CONF_WITH_NULLMAC=1
|
||||
endif
|
||||
|
||||
ifeq ($(MAKE_MAC),MAKE_MAC_CSMA)
|
||||
MODULES += os/net/mac/csma
|
||||
CFLAGS += -DMAC_CONF_WITH_CSMA=1
|
||||
endif
|
||||
|
||||
ifeq ($(MAKE_MAC),MAKE_MAC_TSCH)
|
||||
MODULES += os/net/mac/tsch
|
||||
CFLAGS += -DMAC_CONF_WITH_TSCH=1
|
||||
endif
|
||||
|
||||
ifeq ($(MAKE_MAC),MAKE_MAC_BLE)
|
||||
MODULES += os/net/mac/ble
|
||||
CFLAGS += -DMAC_CONF_WITH_BLE=1
|
||||
endif
|
||||
|
||||
ifeq ($(MAKE_MAC),MAKE_MAC_OTHER)
|
||||
CFLAGS += -DMAC_CONF_WITH_OTHER=1
|
||||
endif
|
||||
|
||||
# Configure Network layer
|
||||
|
||||
MAKE_NET_NULLNET = 0
|
||||
MAKE_NET_IPV6 = 1
|
||||
MAKE_NET_OTHER = 2
|
||||
|
||||
# Make IPv6 the default stack
|
||||
MAKE_NET ?= MAKE_NET_IPV6
|
||||
|
||||
ifeq ($(MAKE_NET),MAKE_NET_NULLNET)
|
||||
CFLAGS += -DNETSTACK_CONF_WITH_NULLNET=1
|
||||
MODULES += os/net/nullnet
|
||||
endif
|
||||
|
||||
ifeq ($(MAKE_NET),MAKE_NET_IPV6)
|
||||
CFLAGS += -DNETSTACK_CONF_WITH_IPV6=1
|
||||
MODULES += os/net/ipv6
|
||||
endif
|
||||
|
||||
ifeq ($(MAKE_NET),MAKE_NET_OTHER)
|
||||
CFLAGS += -DNETSTACK_CONF_WITH_OTHER=1
|
||||
endif
|
||||
|
||||
ifeq ($(WITH_IP64),1)
|
||||
MODULES += os/services/ip64
|
||||
endif
|
||||
|
||||
# Configure Routing protocol
|
||||
MAKE_ROUTING_NULLROUTING = 0
|
||||
MAKE_ROUTING_RPL_CLASSIC = 1
|
||||
MAKE_ROUTING_RPL_LITE = 2
|
||||
|
||||
# Default routing protocol: RPL for IPv6, None otherwise
|
||||
ifeq ($(MAKE_NET),MAKE_NET_IPV6)
|
||||
MAKE_ROUTING ?= MAKE_ROUTING_RPL_LITE
|
||||
else
|
||||
MAKE_ROUTING ?= MAKE_ROUTING_NULLROUTING
|
||||
endif
|
||||
|
||||
ifeq ($(MAKE_ROUTING),MAKE_ROUTING_RPL_CLASSIC)
|
||||
CFLAGS += -DROUTING_CONF_RPL_CLASSIC=1
|
||||
MODULES += os/net/routing/rpl-classic
|
||||
else ifeq ($(MAKE_ROUTING),MAKE_ROUTING_RPL_LITE)
|
||||
CFLAGS += -DROUTING_CONF_RPL_LITE=1
|
||||
MODULES += os/net/routing/rpl-lite
|
||||
else ifeq ($(MAKE_ROUTING),MAKE_ROUTING_NULLROUTING)
|
||||
CFLAGS += -DROUTING_CONF_NULLROUTING=1
|
||||
MODULES += os/net/routing/nullrouting
|
||||
endif
|
||||
|
||||
MODULEDIRS = $(MODULES_REL) ${wildcard ${addprefix $(CONTIKI)/, $(MODULES)}}
|
||||
UNIQUEMODULES = $(call uniq,$(MODULEDIRS))
|
||||
MODULES_SOURCES = ${foreach d, $(MODULEDIRS), ${subst ${d}/,,${wildcard $(d)/*.c}}}
|
||||
CONTIKI_SOURCEFILES += $(MODULES_SOURCES)
|
||||
|
||||
# Include module-specific makefiles
|
||||
MODULES_INCLUDES = ${wildcard ${foreach d, $(MODULEDIRS), $(d)/Makefile.${notdir $(d)}}}
|
||||
include $(MODULES_INCLUDES)
|
||||
# Iterate once more: include the modules added from the previous include.
|
||||
# Only works with one level of nested module inclusion.
|
||||
include $(MODULES_INCLUDES)
|
||||
|
||||
# C-include module-specific macros using -imacros
|
||||
MODULES_IMACROS = ${wildcard ${foreach d, $(MODULEDIRS), $(d)/module-macros.h}}
|
||||
ifneq ($(MODULES_IMACROS),)
|
||||
CFLAGS += ${foreach d, $(MODULES_IMACROS), -imacros $(d)}
|
||||
endif
|
||||
|
||||
### Verbosity control. Use make V=1 to get verbose builds.
|
||||
|
||||
ifeq ($(V),1)
|
||||
TRACE_CC =
|
||||
TRACE_LD =
|
||||
TRACE_AR =
|
||||
TRACE_AS =
|
||||
TRACE_OBJCOPY =
|
||||
TRACE_OBJDUMP =
|
||||
TRACE_MKDIR =
|
||||
TRACE_CP =
|
||||
Q=
|
||||
else
|
||||
TRACE_CC = @echo " CC " $<
|
||||
TRACE_LD = @echo " LD " $@
|
||||
TRACE_AR = @echo " AR " $@
|
||||
TRACE_AS = @echo " AS " $<
|
||||
TRACE_OBJCOPY = @echo " OBJCOPY " $< "-->" $@
|
||||
TRACE_OBJDUMP = @echo " OBJDUMP " $< "-->" $@
|
||||
TRACE_MKDIR = @echo " MKDIR " $@
|
||||
TRACE_CP = @echo " CP " $< "-->" $@
|
||||
Q=@
|
||||
endif
|
||||
|
||||
### Forward comma-separated list of arbitrary defines to the compiler
|
||||
|
||||
COMMA := ,
|
||||
CFLAGS += ${addprefix -D,${subst $(COMMA), ,$(DEFINES)}}
|
||||
|
||||
### Setup directory search path for source and header files
|
||||
|
||||
CONTIKI_TARGET_DIRS_CONCAT = ${addprefix ${dir $(target_makefile)}, \
|
||||
$(CONTIKI_TARGET_DIRS)}
|
||||
CONTIKI_CPU_DIRS_CONCAT = ${addprefix $(CONTIKI_CPU)/, \
|
||||
$(CONTIKI_CPU_DIRS)}
|
||||
CONTIKI_ARCH_DIRS = ${addprefix $(CONTIKI)/, arch}
|
||||
|
||||
SOURCEDIRS = . $(PROJECTDIRS) $(CONTIKI_TARGET_DIRS_CONCAT) $(CONTIKI_ARCH_DIRS) \
|
||||
$(CONTIKI_CPU_DIRS_CONCAT) $(CONTIKIDIRS) $(MODULEDIRS) $(EXTERNALDIRS) ${dir $(target_makefile)}
|
||||
|
||||
vpath %.c $(SOURCEDIRS)
|
||||
vpath %.S $(SOURCEDIRS)
|
||||
vpath %.s $(SOURCEDIRS)
|
||||
|
||||
CFLAGS += ${addprefix -I,$(SOURCEDIRS) $(CONTIKI)}
|
||||
|
||||
### Check for a git repo and pass version if found
|
||||
### git.exe in Windows cmd shells may require no stderr redirection
|
||||
ifndef RELSTR
|
||||
RELSTR:=${shell git --git-dir ${CONTIKI}/.git --work-tree ${CONTIKI} describe \
|
||||
--tags --always --dirty}
|
||||
endif
|
||||
|
||||
ifneq ($(RELSTR),)
|
||||
CFLAGS += -DCONTIKI_VERSION_STRING=\"Contiki-NG-$(RELSTR)\"
|
||||
else
|
||||
CFLAGS += -DCONTIKI_VERSION_STRING=\"Contiki-NG\"
|
||||
endif
|
||||
|
||||
### Automatic dependency generation
|
||||
|
||||
ifneq ($(MAKECMDGOALS),clean)
|
||||
-include ${addprefix $(OBJECTDIR)/,$(CONTIKI_SOURCEFILES:.c=.d) \
|
||||
$(PROJECT_SOURCEFILES:.c=.d)}
|
||||
endif
|
||||
|
||||
### See http://make.paulandlesley.org/autodep.html#advanced
|
||||
|
||||
define FINALIZE_DEPENDENCY
|
||||
cp $(@:.o=.d) $(@:.o=.$$$$); \
|
||||
sed -e 's/#.*//' -e 's/^[^:]*: *//' -e 's/ *\\$$//' \
|
||||
-e '/^$$/ d' -e 's/$$/ :/' < $(@:.o=.$$$$) >> $(@:.o=.d); \
|
||||
rm -f $(@:.o=.$$$$)
|
||||
endef
|
||||
|
||||
### Harmonize filename of a .map file, if the platform's build system wants
|
||||
### to create one
|
||||
CONTIKI_NG_PROJECT_MAP = $(BUILD_DIR_BOARD)/$(basename $(notdir $@)).map
|
||||
|
||||
.PHONY: clean distclean usage help targets boards savetarget savedefines viewconf
|
||||
|
||||
clean:
|
||||
-$(Q)rm -f *.d *.e *.o $(CLEAN)
|
||||
-$(Q)rm -rf $(BUILD_DIR_TARGET)
|
||||
-$(Q)rm -f $(addsuffix .$(TARGET), $(CONTIKI_PROJECT))
|
||||
@echo Target $(TARGET) cleaned
|
||||
|
||||
distclean:
|
||||
@for TARG in `ls $(ARCH_PATH)/platform $(TARGETDIRS)`; do \
|
||||
echo Running: $(MAKE) TARGET=$$TARG clean; \
|
||||
$(MAKE) TARGET=$$TARG clean; \
|
||||
done
|
||||
-$(Q)rm -rf $(BUILD_DIR)
|
||||
|
||||
-include $(ARCH_PATH)/platform/$(TARGET)/Makefile.customrules-$(TARGET)
|
||||
|
||||
ifndef CUSTOM_RULE_C_TO_OBJECTDIR_O
|
||||
$(OBJECTDIR)/%.o: %.c | $(OBJECTDIR)
|
||||
$(TRACE_CC)
|
||||
$(Q)$(CC) $(CFLAGS) -MMD -c $< -o $@
|
||||
@$(FINALIZE_DEPENDENCY)
|
||||
endif
|
||||
|
||||
ifndef CUSTOM_RULE_S_TO_OBJECTDIR_O
|
||||
$(OBJECTDIR)/%.o: %.S | $(OBJECTDIR)
|
||||
$(TRACE_AS)
|
||||
$(Q)$(AS) $(ASFLAGS) -o $@ $<
|
||||
$(OBJECTDIR)/%.o: %.s | $(OBJECTDIR)
|
||||
$(TRACE_AS)
|
||||
$(Q)$(AS) $(ASFLAGS) -o $@ $<
|
||||
endif
|
||||
|
||||
ifndef CUSTOM_RULE_C_TO_OBJECTDIR_S
|
||||
$(OBJECTDIR)/%.s: %.c | $(OBJECTDIR)
|
||||
$(TRACE_CC)
|
||||
$(Q)$(CC) $(CFLAGS) -S $< -o $@
|
||||
endif
|
||||
|
||||
ifndef CUSTOM_RULE_C_TO_OBJECTDIR_E
|
||||
$(OBJECTDIR)/%.e: %.c | $(OBJECTDIR)
|
||||
$(TRACE_CC)
|
||||
$(Q)$(CC) $(CFLAGS) -E $< -o $@
|
||||
endif
|
||||
|
||||
ifndef CUSTOM_RULE_C_TO_O
|
||||
%.o: %.c
|
||||
$(TRACE_CC)
|
||||
$(Q)$(CC) $(CFLAGS) -c $< -o $@
|
||||
endif
|
||||
|
||||
ifndef CUSTOM_RULE_C_TO_S
|
||||
%.s: %.c
|
||||
$(TRACE_CC)
|
||||
$(Q)$(CC) $(CFLAGS) -S $< -o $@
|
||||
endif
|
||||
|
||||
ifndef CUSTOM_RULE_C_TO_E
|
||||
%.e: %.c
|
||||
$(TRACE_CC)
|
||||
$(Q)$(CC) $(CFLAGS) -E $< -o $@
|
||||
endif
|
||||
|
||||
ifndef AROPTS
|
||||
AROPTS = rcf
|
||||
endif
|
||||
|
||||
ifndef CUSTOM_RULE_ALLOBJS_TO_TARGETLIB
|
||||
$(CONTIKI_NG_TARGET_LIB): $(CONTIKI_OBJECTFILES)
|
||||
$(TRACE_AR)
|
||||
$(Q)$(AR) $(AROPTS) $@ $^
|
||||
endif
|
||||
|
||||
ifndef LD
|
||||
LD = $(CC)
|
||||
endif
|
||||
|
||||
ifndef CUSTOM_RULE_LINK
|
||||
$(BUILD_DIR_BOARD)/%.$(TARGET): %.o $(PROJECT_OBJECTFILES) $(PROJECT_LIBRARIES) $(CONTIKI_NG_TARGET_LIB)
|
||||
$(TRACE_LD)
|
||||
$(Q)$(LD) $(LDFLAGS) $(TARGET_STARTFILES) ${filter-out %.a,$^} \
|
||||
${filter %.a,$^} $(TARGET_LIBFILES) -o $@
|
||||
endif
|
||||
|
||||
%.$(TARGET): $(BUILD_DIR_BOARD)/%.$(TARGET)
|
||||
$(TRACE_CP)
|
||||
$(Q)cp $< $@
|
||||
|
||||
%.ramprof: %.$(TARGET)
|
||||
$(NM) -S -td --size-sort $< | grep -i " [abdrw] " | cut -d' ' -f2,4
|
||||
|
||||
%.flashprof: %.$(TARGET)
|
||||
$(NM) -S -td --size-sort $< | grep -i " [t] " | cut -d' ' -f2,4
|
||||
|
||||
include $(CONTIKI)/Makefile.help
|
||||
|
||||
targets:
|
||||
@ls $(ARCH_PATH)/platform $(TARGETDIRS)
|
||||
|
||||
boards:
|
||||
ifdef BOARD
|
||||
@echo "$(BOARDS) (current: $(BOARD))"
|
||||
else
|
||||
@echo "Platform has no boards"
|
||||
endif
|
||||
|
||||
savetarget:
|
||||
-@rm -f Makefile.target
|
||||
@echo "saving Makefile.target"
|
||||
@echo >Makefile.target "TARGET = $(TARGET)"
|
||||
ifneq ($(BOARD),)
|
||||
@echo >>Makefile.target "BOARD = $(BOARD)"
|
||||
endif
|
||||
|
||||
savedefines:
|
||||
-@rm -f Makefile.$(TARGET).defines
|
||||
@echo "saving Makefile.$(TARGET).defines"
|
||||
@echo >Makefile.$(TARGET).defines "DEFINES = $(DEFINES)"
|
||||
|
||||
VIEWCONF = $(CONTIKI)/tools/viewconf/viewconf.c
|
||||
viewconf:
|
||||
@echo "----------------- Make variables: --------------"
|
||||
@echo "##### \"TARGET\": ________________________________ $(TARGET)"
|
||||
@echo "##### \"BOARD\": _________________________________ $(BOARD)"
|
||||
@echo "##### \"MAKE_MAC\": ______________________________ $(MAKE_MAC)"
|
||||
@echo "##### \"MAKE_NET\": ______________________________ $(MAKE_NET)"
|
||||
@echo "##### \"MAKE_ROUTING\": __________________________ $(MAKE_ROUTING)"
|
||||
ifdef MAKE_COAP_DTLS_KEYSTORE
|
||||
@echo "##### \"MAKE_COAP_DTLS_KEYSTORE\": _______________ $(MAKE_COAP_DTLS_KEYSTORE)"
|
||||
endif
|
||||
@echo "----------------- C variables: -----------------"
|
||||
$(Q)$(CC) $(CFLAGS) -E $(VIEWCONF) | grep \#\#\#\#\#
|
||||
@echo "------------------------------------------------"
|
||||
@echo "'==' Means the flag is set to a given a value"
|
||||
@echo "'->' Means the flag is unset, but will default to a given value"
|
||||
@echo "'><' Means the flag is unset and has no default value"
|
||||
@echo "To view more Make variables, edit $(CONTIKI)/Makefile.include, rule 'viewconf'"
|
||||
@echo "To view more C variables, edit $(VIEWCONF)"
|
||||
|
||||
### Include Makefile.embedded for relevant platforms, in order to pull in
|
||||
### rules for login, serialview etc
|
||||
ifeq ($(findstring $(TARGET),native cooja),)
|
||||
include $(CONTIKI)/Makefile.embedded
|
||||
endif
|
||||
|
||||
# Don't treat $(BUILD_DIR_BOARD)/%.$(TARGET) and $(TARGET) as intermediate
|
||||
# files because for many platforms they are in fact the primary target.
|
||||
.PRECIOUS: $(BUILD_DIR_BOARD)/%.$(TARGET) %.$(TARGET)
|
||||
|
||||
# Cancel the predefined implict rule for compiling and linking
|
||||
# a single C source into a binary to force GNU make to consider
|
||||
# the match-anything rule below instead.
|
||||
%: %.c
|
||||
|
||||
ifeq ($(PLATFORM_ACTION),skip)
|
||||
# Skip this target.
|
||||
$(CONTIKI_PROJECT):
|
||||
@echo "Skipping $@: not for the '$(TARGET)/$(BOARD)' platform!"
|
||||
%.$(TARGET):
|
||||
@echo "Skipping $@: not for the '$(TARGET)/$(BOARD)' platform!"
|
||||
else
|
||||
# Build this target.
|
||||
# Match-anything pattern rule to allow the project makefiles to
|
||||
# abstract from the actual binary name. It needs to contain some
|
||||
# command in order to be a rule, not just a prerequisite.
|
||||
%: %.$(TARGET)
|
||||
@
|
||||
endif
|
|
@ -1,17 +0,0 @@
|
|||
# Some make rules in the main build system depend on the presence of utilities
|
||||
# under the tools/ dir. For those dependencies, we use this makefile here to
|
||||
# recursively invoke the respective build under tools/.
|
||||
|
||||
TOOLS_DIR = $(CONTIKI)/tools
|
||||
SERIAL_IO_TOOL_DIR = $(TOOLS_DIR)/serial-io
|
||||
|
||||
SERIAL_IO_TOOL_DEPS = $(addprefix $(SERIAL_IO_TOOL_DIR)/, tools-utils.c tools-utils.h)
|
||||
|
||||
TUNSLIP6 = $(SERIAL_IO_TOOL_DIR)/tunslip6
|
||||
SERIAL_DUMP_BIN = $(SERIAL_IO_TOOL_DIR)/serialdump
|
||||
|
||||
$(SERIAL_DUMP_BIN): $(SERIAL_IO_TOOL_DIR)/serialdump.c $(SERIAL_IO_TOOL_DEPS)
|
||||
$(MAKE) -C $(SERIAL_IO_TOOL_DIR) serialdump
|
||||
|
||||
$(TUNSLIP6): $(SERIAL_IO_TOOL_DIR)/tunslip6.c $(SERIAL_IO_TOOL_DEPS)
|
||||
$(MAKE) -C $(SERIAL_IO_TOOL_DIR) tunslip6
|
29
README.md
29
README.md
|
@ -1,29 +0,0 @@
|
|||
# Contiki-NG: The OS for Next Generation IoT Devices
|
||||
|
||||
[![Build Status](https://travis-ci.org/contiki-ng/contiki-ng.svg?branch=master)](https://travis-ci.org/contiki-ng/contiki-ng/branches)
|
||||
[![license](https://img.shields.io/badge/license-3--clause%20bsd-brightgreen.svg)](https://github.com/contiki-ng/contiki-ng/blob/master/LICENSE.md)
|
||||
[![Latest release](https://img.shields.io/github/release/contiki-ng/contiki-ng.svg)](https://github.com/contiki-ng/contiki-ng/releases/latest)
|
||||
[![GitHub Release Date](https://img.shields.io/github/release-date/contiki-ng/contiki-ng.svg)](https://github.com/contiki-ng/contiki-ng/releases/latest)
|
||||
[![Last commit](https://img.shields.io/github/last-commit/contiki-ng/contiki-ng.svg)](https://github.com/contiki-ng/contiki-ng/commit/HEAD)
|
||||
|
||||
Contiki-NG is an open-source, cross-platform operating system for Next-Generation IoT devices. It focuses on dependable (secure and reliable) low-power communication and standard protocols, such as IPv6/6LoWPAN, 6TiSCH, RPL, and CoAP. Contiki-NG comes with extensive documentation, tutorials, a roadmap, release cycle, and well-defined development flow for smooth integration of community contributions.
|
||||
|
||||
Unless explicitly stated otherwise, Contiki-NG sources are distributed under
|
||||
the terms of the [3-clause BSD license](LICENSE.md). This license gives
|
||||
everyone the right to use and distribute the code, either in binary or
|
||||
source code format, as long as the copyright license is retained in
|
||||
the source code.
|
||||
|
||||
Contiki-NG started as a fork of the Contiki OS and retains some of its original features.
|
||||
|
||||
Find out more:
|
||||
|
||||
* GitHub repository: https://github.com/contiki-ng/contiki-ng
|
||||
* Documentation: https://github.com/contiki-ng/contiki-ng/wiki
|
||||
* Web site: http://contiki-ng.org
|
||||
|
||||
Engage with the community:
|
||||
|
||||
* Gitter: https://gitter.im/contiki-ng
|
||||
* Twitter: https://twitter.com/contiki_ng
|
||||
|
|
@ -1,82 +0,0 @@
|
|||
### Verbosity control. Use make V=1 to get verbose builds.
|
||||
### Extends what we already have in the top-level Makefile
|
||||
ifeq ($(V),1)
|
||||
TRACE_SREC_CAT =
|
||||
else
|
||||
TRACE_SREC_CAT = @echo " SREC_CAT " $< "-->" $@
|
||||
endif
|
||||
|
||||
CC = arm-none-eabi-gcc
|
||||
CPP = arm-none-eabi-cpp
|
||||
LD = arm-none-eabi-gcc
|
||||
AR = arm-none-eabi-ar
|
||||
OBJCOPY = arm-none-eabi-objcopy
|
||||
OBJDUMP = arm-none-eabi-objdump
|
||||
NM = arm-none-eabi-nm
|
||||
SIZE = arm-none-eabi-size
|
||||
SREC_CAT = srec_cat
|
||||
|
||||
CFLAGS += -mthumb -mabi=aapcs -mlittle-endian
|
||||
CFLAGS += -Wall
|
||||
CFLAGS += -std=c99
|
||||
CFLAGS += -ffunction-sections -fdata-sections -fno-strict-aliasing
|
||||
CFLAGS += -fshort-enums -fomit-frame-pointer -fno-builtin
|
||||
ifeq ($(WERROR),1)
|
||||
CFLAGS += -Werror
|
||||
endif
|
||||
|
||||
LDFLAGS += -mthumb -mlittle-endian
|
||||
|
||||
OBJDUMP_FLAGS += --disassemble --source --disassembler-options=force-thumb
|
||||
|
||||
### Are we building with code size optimisations?
|
||||
SMALL ?= 1
|
||||
ifeq ($(SMALL),1)
|
||||
CFLAGS += -Os
|
||||
else
|
||||
CFLAGS += -O2
|
||||
endif
|
||||
|
||||
### Use CMSIS from arch/cpu/arm/common
|
||||
CONTIKI_ARM_DIRS += .
|
||||
CONTIKI_CPU_DIRS += $(addprefix ../arm/, $(CONTIKI_ARM_DIRS))
|
||||
|
||||
### Default to use os/lib/dbg-io unless configured to do otherwise
|
||||
MAKE_WITH_LIB_DBG_IO ?= 1
|
||||
|
||||
ifeq ($(MAKE_WITH_LIB_DBG_IO),1)
|
||||
MODULES += os/lib/dbg-io
|
||||
endif
|
||||
|
||||
### CPU-dependent cleanup files
|
||||
CLEAN += *.elf *.bin *.lst *.hex *.i16hex
|
||||
|
||||
OUT_HEX = $(BUILD_DIR_BOARD)/%.hex
|
||||
OUT_I16HEX = $(BUILD_DIR_BOARD)/%.i16hex
|
||||
OUT_BIN = $(BUILD_DIR_BOARD)/%.bin
|
||||
OUT_LST = $(BUILD_DIR_BOARD)/%.lst
|
||||
|
||||
### Don't treat the following files as intermediate
|
||||
.PRECIOUS: $(OUT_ELF) $(OUT_HEX) $(OUT_BIN)
|
||||
|
||||
$(OUT_I16HEX): $(OUT_ELF)
|
||||
$(TRACE_OBJCOPY)
|
||||
$(Q)$(OBJCOPY) -O ihex $< $@
|
||||
|
||||
$(OUT_HEX): $(OUT_I16HEX)
|
||||
$(TRACE_SREC_CAT)
|
||||
$(Q)$(SREC_CAT) $< -intel -o $@ -intel
|
||||
|
||||
$(OUT_BIN): $(OUT_ELF)
|
||||
$(TRACE_OBJCOPY)
|
||||
$(Q)$(OBJCOPY) -O binary $(OBJCOPY_FLAGS) $< $@
|
||||
|
||||
$(OUT_LST): $(OUT_ELF)
|
||||
$(TRACE_OBJDUMP)
|
||||
$(Q)$(OBJDUMP) $(OBJDUMP_FLAGS) $< > $@
|
||||
|
||||
### We don't really need the .hex and .bin for the .$(TARGET) but let's make
|
||||
### sure they get built
|
||||
$(BUILD_DIR_BOARD)/%.$(TARGET): $(OUT_ELF) $(OUT_HEX) $(OUT_BIN)
|
||||
$(TRACE_CP)
|
||||
$(Q)cp $< $@
|
|
@ -1,83 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2017, George Oikonomou - http://www.spd.gr
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \addtogroup arm
|
||||
* @{
|
||||
*
|
||||
* \file
|
||||
* Compiler and data type definitions for all ARM-based CPUs
|
||||
*/
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#ifndef ARM_DEF_
|
||||
#define ARM_DEF_
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#include <stdint.h>
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \name Macros and typedefs
|
||||
*
|
||||
* Those values are not meant to be modified by the user
|
||||
* @{
|
||||
*/
|
||||
#define CLOCK_CONF_SECOND 128
|
||||
|
||||
/* Clock (time) comparison macro */
|
||||
#define CLOCK_LT(a, b) ((signed long)((a) - (b)) < 0)
|
||||
|
||||
/* Platform typedefs */
|
||||
typedef uint32_t clock_time_t;
|
||||
typedef uint32_t uip_stats_t;
|
||||
|
||||
/** @} */
|
||||
|
||||
/*
|
||||
* The stdio.h that ships with the arm-gcc toolchain does this:
|
||||
*
|
||||
* int _EXFUN(putchar, (int));
|
||||
* [...]
|
||||
* #define putchar(x) putc(x, stdout)
|
||||
*
|
||||
* This causes us a lot of trouble: For platforms using this toolchain, every
|
||||
* time we use putchar we need to first #undef putchar. What we do here is to
|
||||
* #undef putchar across the board. The resulting code will cause the linker
|
||||
* to search for a symbol named putchar and this allows us to use the
|
||||
* implementation under os/lib/dbg-io.
|
||||
*
|
||||
* This will fail if stdio.h is included before contiki.h, but it is common
|
||||
* practice to include contiki.h first
|
||||
*/
|
||||
#include <stdio.h>
|
||||
#undef putchar
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#endif /* ARM_DEF_ */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** @} */
|
|
@ -1,10 +0,0 @@
|
|||
|
||||
ifdef SDCARD
|
||||
EFSL_DIR=/home/ksb/packages/efsl/efsl-0.2.8
|
||||
EFSL_SRC= efs.c fat.c sd.c fat.c partition.c ioman.c disc.c fs.c file.c plibc.c extract.c dir.c time.c ls.c ui.c
|
||||
CONTIKI_CPU_DIRS += ../common/SD-card
|
||||
CONTIKIDIRS += $(EFSL_DIR)/src $(EFSL_DIR)/src/interfaces
|
||||
CONTIKI_TARGET_SOURCEFILES += $(EFSL_SRC) cfs-sdcard.c efs-sdcard-arch.c
|
||||
CFLAGS+= -I $(EFSL_DIR)/inc -I $(CONTIKI_CPU_ARM_COMMON)/SD-card
|
||||
|
||||
endif
|
|
@ -1,187 +0,0 @@
|
|||
#include <efs-sdcard.h>
|
||||
#include <sys/process.h>
|
||||
#include <cfs/cfs.h>
|
||||
|
||||
#include <stdio.h>
|
||||
|
||||
|
||||
|
||||
process_event_t sdcard_inserted_event;
|
||||
|
||||
process_event_t sdcard_removed_event;
|
||||
|
||||
|
||||
|
||||
#define MAX_FDS 4
|
||||
|
||||
static File file_descriptors[MAX_FDS];
|
||||
|
||||
static int
|
||||
find_free_fd()
|
||||
{
|
||||
int fd;
|
||||
for (fd = 0; fd < MAX_FDS; fd++) {
|
||||
if (!file_getAttr(&file_descriptors[fd], FILE_STATUS_OPEN)) {
|
||||
return fd;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static File *
|
||||
get_file(int fd)
|
||||
{
|
||||
if (!sdcard_ready()) return 0;
|
||||
if (fd >= MAX_FDS || fd < 0) return NULL;
|
||||
if (!file_getAttr(&file_descriptors[fd], FILE_STATUS_OPEN)) return NULL;
|
||||
return &file_descriptors[fd];
|
||||
}
|
||||
|
||||
int
|
||||
cfs_open (const char *name, int flags)
|
||||
{
|
||||
static int initialized = 0;
|
||||
eint8 mode;
|
||||
int fd;
|
||||
if (!initialized) {
|
||||
int fd;
|
||||
/* Mark all file descriptors as free */
|
||||
for (fd = 0; fd < MAX_FDS; fd++) {
|
||||
file_setAttr(&file_descriptors[fd], FILE_STATUS_OPEN,0);
|
||||
}
|
||||
}
|
||||
if (!sdcard_ready()) return -1;
|
||||
fd = find_free_fd();
|
||||
if (fd < 0) return -1;
|
||||
if (flags == CFS_READ) {
|
||||
mode = MODE_READ;
|
||||
} else {
|
||||
mode = MODE_APPEND;
|
||||
}
|
||||
if (file_fopen(&file_descriptors[fd], efs_sdcard_get_fs(),
|
||||
(char*)name, mode) < 0) {
|
||||
return -1;
|
||||
}
|
||||
return fd;
|
||||
}
|
||||
|
||||
void
|
||||
cfs_close(int fd)
|
||||
{
|
||||
File *file = get_file(fd);
|
||||
if (!file) return;
|
||||
file_fclose(file);
|
||||
fs_flushFs(efs_sdcard_get_fs());
|
||||
}
|
||||
|
||||
int
|
||||
cfs_read (int fd, void *buf, unsigned int len)
|
||||
{
|
||||
File *file = get_file(fd);
|
||||
if (!file) return 0;
|
||||
return file_read(file, len, (euint8*)buf);
|
||||
}
|
||||
|
||||
int
|
||||
cfs_write (int fd, const void *buf, unsigned int len)
|
||||
{
|
||||
File *file = get_file(fd);
|
||||
if (!file) return 0;
|
||||
return file_write(file, len, (euint8*)buf);
|
||||
}
|
||||
|
||||
cfs_offset_t
|
||||
cfs_seek (int fd, cfs_offset_t offset, int whence)
|
||||
{
|
||||
File *file;
|
||||
if (whence != CFS_SEEK_SET) return -1;
|
||||
file = get_file(fd);
|
||||
if (!file) return 0;
|
||||
if (file_setpos(file, offset) != 0) return -1;
|
||||
return file->FilePtr;
|
||||
}
|
||||
|
||||
|
||||
/* Cause a compile time error if expr is false */
|
||||
#ifdef __GNUC__
|
||||
#define COMPILE_TIME_CHECK(expr) \
|
||||
(void) (__builtin_choose_expr ((expr), 0, ((void)0))+3)
|
||||
#else
|
||||
#define COMPILE_TIME_CHECK(expr)
|
||||
#endif
|
||||
|
||||
#define MAX_DIR_LISTS 4
|
||||
DirList dir_lists[MAX_DIR_LISTS];
|
||||
|
||||
static DirList *
|
||||
find_free_dir_list()
|
||||
{
|
||||
unsigned int l;
|
||||
for(l = 0; l < MAX_DIR_LISTS; l++) {
|
||||
if (dir_lists[l].fs == NULL) {
|
||||
return &dir_lists[l];
|
||||
}
|
||||
}
|
||||
return NULL;
|
||||
}
|
||||
|
||||
int
|
||||
cfs_opendir (struct cfs_dir *dirp, const char *name)
|
||||
{
|
||||
DirList *dirs;
|
||||
COMPILE_TIME_CHECK(sizeof(DirList*) <= sizeof(struct cfs_dir));
|
||||
if (!sdcard_ready()) return -1;
|
||||
dirs = find_free_dir_list();
|
||||
if (!dirs) return -1;
|
||||
if (ls_openDir(dirs, efs_sdcard_get_fs(), (eint8*)name) != 0) {
|
||||
dirs->fs = NULL;
|
||||
return -1;
|
||||
}
|
||||
*(DirList**)dirp = dirs;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int
|
||||
cfs_readdir (struct cfs_dir *dirp, struct cfs_dirent *dirent)
|
||||
{
|
||||
euint8 *start;
|
||||
euint8 *end;
|
||||
char *to = dirent->name;
|
||||
DirList *dirs = *(DirList**)dirp;
|
||||
if (!sdcard_ready()) return 1;
|
||||
if (ls_getNext(dirs) != 0) return 1;
|
||||
start = dirs->currentEntry.FileName;
|
||||
end = start + 7;
|
||||
while(end > start) {
|
||||
if (*end > ' ') {
|
||||
end++;
|
||||
break;
|
||||
}
|
||||
end--;
|
||||
}
|
||||
while(start < end) {
|
||||
*to++ = *start++;
|
||||
}
|
||||
start = dirs->currentEntry.FileName + 8;
|
||||
end = start + 3;
|
||||
if (*start > ' ') {
|
||||
*to++ = '.';
|
||||
*to++ = *start++;
|
||||
while(start < end && *start > ' ') {
|
||||
*to++ = *start++;
|
||||
}
|
||||
}
|
||||
*to = '\0';
|
||||
if (dirs->currentEntry.Attribute & ATTR_DIRECTORY) {
|
||||
dirent->size = 0;
|
||||
} else {
|
||||
dirent->size = dirs->currentEntry.FileSize;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
void
|
||||
cfs_closedir (struct cfs_dir *dirp)
|
||||
{
|
||||
(*(DirList**)dirp)->fs = NULL;
|
||||
}
|
|
@ -1,125 +0,0 @@
|
|||
#ifndef EFSL_CONFIG_H_
|
||||
#define EFSL_CONFIG_H_
|
||||
|
||||
/* Close enough */
|
||||
#define HW_ENDPOINT_LPC2000_SD
|
||||
|
||||
/* Memory configuration
|
||||
--------------------
|
||||
|
||||
* Here you must configure wheter your processor can access memory byte
|
||||
* oriented. All x86 processors can do it, AVR's can do it to. Some DSP
|
||||
* or other microcontrollers can't. If you have an 8 bit system you're safe.
|
||||
* If you are really unsure, leave the setting commented out, it will be slower
|
||||
* but it will work for sure.
|
||||
*/
|
||||
|
||||
/* disabled for ARM (mt): #define BYTE_ALIGNMENT */
|
||||
|
||||
/* Cache configuration
|
||||
-------------------
|
||||
|
||||
* Here you must configure how much memory of cache you can/want to use.
|
||||
* The number you put at IOMAN_NUMBUFFER is multiplied by 512. So 1 means
|
||||
* 512 bytes cache, 4 means 2048 bytes cache. More is better.
|
||||
* The number after IOMAN_NUMITERATIONS should be untouched.
|
||||
* The last field (IOMAN_DO_MEMALLOC) is to tell ioman to allocate it's
|
||||
* own memory in it's structure, or not. If you choose to do it yourself
|
||||
* you will have to pass a pointer to the memory as the last argument of
|
||||
* ioman_init.
|
||||
*/
|
||||
/*#define IOMAN_NUMBUFFER 1*/
|
||||
#define IOMAN_NUMBUFFER 6
|
||||
#define IOMAN_NUMITERATIONS 3
|
||||
#define IOMAN_DO_MEMALLOC
|
||||
|
||||
/* Cluster pre-allocation
|
||||
----------------------
|
||||
|
||||
* When writing files, the function that performs the actual write has to
|
||||
* calculate how many clusters it will need for that request. It then allocates
|
||||
* that number of new clusters to the file. Since this involves some calculations
|
||||
* and writing of the FAT, you might find it beneficial to limit the number of
|
||||
* allocations, and allow fwrite to pre-allocate a number of clusters extra.
|
||||
* This setting determines how many clusters will be extra allocated whenever
|
||||
* this is required.
|
||||
* Take in carefull consideration how large your clustersize is, putting 10 here
|
||||
* with a clustersize of 32kb means you might waste 320 kb.
|
||||
* The first option is for preallocating files, the other is used when enlarging
|
||||
* a directory to accomodate more files
|
||||
*/
|
||||
/*#define CLUSTER_PREALLOC_FILE 0*/
|
||||
#define CLUSTER_PREALLOC_FILE 2
|
||||
#define CLUSTER_PREALLOC_DIRECTORY 0
|
||||
|
||||
|
||||
/* Endianess configuration
|
||||
-----------------------
|
||||
|
||||
* Here you can configure wheter your architecture is little or big endian. This
|
||||
* is important since all FAT structures are stored in intel little endian order.
|
||||
* So if you have a big endian system the library has to convert all figures to
|
||||
* big endian in order to work.
|
||||
*/
|
||||
#define LITTLE_ENDIAN
|
||||
|
||||
|
||||
/* Date and Time support
|
||||
---------------------
|
||||
|
||||
* Here you can enable or disable date and time support. If you enable
|
||||
* it you will have to create 6 functions, that are described in the
|
||||
* EFSL manual. If the functions are not present when linking your
|
||||
* program with the library you will get unresolved dependencies.
|
||||
*/
|
||||
/*#define DATE_TIME_SUPPORT*/
|
||||
|
||||
/* Error reporting support
|
||||
-----------------------
|
||||
|
||||
* When you receive an error in userland, it usually only gives limited
|
||||
* information (most likely, fail or success). If error detection and
|
||||
* reporting is important for you, you can enable more detailed error
|
||||
* reporting here. This is optional, the costs are 1 byte per object,
|
||||
* and a small increase in code size.
|
||||
* You can enable error recording for all object, or you can select the
|
||||
* object manually.
|
||||
* For full error reporting use FULL_ERROR_SUPPORT
|
||||
* For only the base-core of the library use BASE_ERROR_SUPPORT
|
||||
* For IO/Man use ERRSUP_IOMAN
|
||||
* For Disc use ERRSUP_IOMAN
|
||||
* For Part use ERRSUP_PARTITION
|
||||
* For Fs use ERRSUP_FILESYSTEM
|
||||
* For File use ERRSUP_FILE
|
||||
*/
|
||||
|
||||
#define FULL_ERROR_SUPPORT
|
||||
/*#define BASE_ERROR_SUPPORT*/
|
||||
|
||||
/* List options
|
||||
------------
|
||||
|
||||
* In this section youcan configure what kind of data you will get from
|
||||
* directory listing requests. Please refer to the documentation for
|
||||
* more information
|
||||
*/
|
||||
|
||||
#define LIST_MAXLENFILENAME 12
|
||||
|
||||
|
||||
|
||||
|
||||
/* Debugging configuration
|
||||
-----------------------
|
||||
|
||||
* Here you can configure the debugging behaviour. Debugging is different
|
||||
* on every platform (see debug.h for more information).
|
||||
* If your hardware has no means of output (printf) dont define any anything,
|
||||
* and nothing will happen. For real world use debugging should be turned off.
|
||||
*/
|
||||
|
||||
/* #define DEBUG */
|
||||
|
||||
#define lpc2000_debug_printf dbg_blocking_printf
|
||||
|
||||
#endif
|
|
@ -1,27 +0,0 @@
|
|||
#ifndef SDCARD_H_KJBBKS6O57__
|
||||
#define SDCARD_H_KJBBKS6O57__
|
||||
|
||||
#include <efs.h>
|
||||
#include <ls.h>
|
||||
#include <sys/process.h>
|
||||
|
||||
PROCESS_NAME(sdcard_process);
|
||||
|
||||
void
|
||||
efs_sdcard_init();
|
||||
|
||||
FileSystem *
|
||||
efs_sdcard_get_fs();
|
||||
|
||||
/* True if a card is ready to read or write */
|
||||
int
|
||||
sdcard_ready();
|
||||
|
||||
extern process_event_t sdcard_inserted_event;
|
||||
|
||||
extern process_event_t sdcard_removed_event;
|
||||
|
||||
void
|
||||
sdcard_event_process(struct process *p);
|
||||
|
||||
#endif /* SDCARD_H_KJBBKS6O57__ */
|
|
@ -1,21 +0,0 @@
|
|||
#ifndef EFSL_SPI_H_6B6MX40N68__
|
||||
#define EFSL_SPI_H_6B6MX40N68__
|
||||
|
||||
#include <types.h>
|
||||
|
||||
struct hwInterface{
|
||||
eint32 sectorCount;
|
||||
};
|
||||
typedef struct hwInterface hwInterface;
|
||||
|
||||
esint8 if_initInterface(hwInterface* file,eint8* opts);
|
||||
esint8 if_readBuf(hwInterface* file,euint32 address,euint8* buf);
|
||||
esint8 if_writeBuf(hwInterface* file,euint32 address,euint8* buf);
|
||||
esint8 if_setPos(hwInterface* file,euint32 address);
|
||||
|
||||
void if_spiInit(hwInterface *iface);
|
||||
void if_spiSetSpeed(euint8 speed);
|
||||
euint8 if_spiSend(hwInterface *iface, euint8 outgoing);
|
||||
|
||||
|
||||
#endif /* EFSL_SPI_H_6B6MX40N68__ */
|
|
@ -1,22 +0,0 @@
|
|||
#ifndef SDCARD_H_KJBBKS6O57__
|
||||
#define SDCARD_H_KJBBKS6O57__
|
||||
|
||||
#include <sys/process.h>
|
||||
|
||||
PROCESS_NAME(sdcard_process);
|
||||
|
||||
void
|
||||
sdcard_init();
|
||||
|
||||
/* True if a card is ready to read or write */
|
||||
int
|
||||
sdcard_ready();
|
||||
|
||||
extern process_event_t sdcard_inserted_event;
|
||||
|
||||
extern process_event_t sdcard_removed_event;
|
||||
|
||||
void
|
||||
sdcard_event_process(struct process *p);
|
||||
|
||||
#endif /* SDCARD_H_KJBBKS6O57__ */
|
|
@ -1,60 +0,0 @@
|
|||
### Put generated sources in a separate directory
|
||||
BUILTSRCDIR = src_$(TARGET)
|
||||
ifeq (${wildcard $(BUILTSRCDIR)},)
|
||||
DUMMY := ${shell mkdir $(BUILTSRCDIR)}
|
||||
endif
|
||||
|
||||
STRUCTGEN = structgen
|
||||
|
||||
MODULES_REL += $(BUILTSRCDIR)
|
||||
|
||||
USB_STRING_DESCRIPTORS ?= $(CONTIKI_CPU_ARM)/common/usb/cdc-acm/string-descriptors.xml
|
||||
|
||||
XMLDIRS=
|
||||
|
||||
USB = usb-arch.c usb-core.c
|
||||
|
||||
ifdef USB_CDC_ACM_CLASS
|
||||
CONTIKI_CPU_DIRS += ../common/usb/cdc-acm
|
||||
USB += cdc-acm.c cdc-acm-descriptors.c cdc-acm-string-descriptors.c
|
||||
XMLDIRS += $(CONTIKI_CPU_ARM)/common/usb/cdc-acm/
|
||||
endif
|
||||
|
||||
ifdef USB_CDC_ETH_CLASS
|
||||
CONTIKI_CPU_DIRS += ../common/usb/cdc-eth
|
||||
USB += cdc-eth.c cdc-eth-descriptors.c cdc-eth-string-descriptors.c dhcps.c
|
||||
XMLDIRS += $(CONTIKI_CPU_ARM)/common/usb/cdc-eth/
|
||||
endif
|
||||
|
||||
ifdef USB_MASS_STORAGE_CLASS
|
||||
CONTIKI_CPU_DIRS += ../common/usb/msc
|
||||
USB += usb-msc-bulk.c usb-rbc.c msc-descriptors-consts.c msc-descriptors.c
|
||||
XMLDIRS += $(CONTIKI_CPU_ARM)/common/usb/msc
|
||||
endif
|
||||
|
||||
ifdef USB_MSC_QIC157
|
||||
CONTIKI_CPU_DIRS += ../common/usb/msc
|
||||
USB += usb-msc-bulk.c usb-qic157.c msc-qic157-descriptors.c msc-qic157-string-descriptors.c
|
||||
XMLDIRS += $(CONTIKI_CPU_ARM)/common/usb/msc
|
||||
endif
|
||||
|
||||
ifdef USB_MSC_STREAMING
|
||||
CONTIKI_CPU_DIRS += ../common/usb/msc
|
||||
USB += usb-msc-bulk.c usb-streaming.c msc-scsi-streaming-descriptors-consts.c msc-scsi-streaming-descriptors.c
|
||||
XMLDIRS += $(CONTIKI_CPU_ARM)/common/usb/msc
|
||||
endif
|
||||
|
||||
ifdef USB_MTP_CLASS
|
||||
CONTIKI_CPU_DIRS += ../common/usb/mtp
|
||||
USB += usb-mtp.c mtp-descriptors-consts.c mtp-descriptors.c
|
||||
STRUCTGENDIRS += $(CONTIKI_CPU_ARM)/common/usb/mtp
|
||||
endif
|
||||
|
||||
vpath %.xml $(XMLDIRS)
|
||||
vpath %.gen.c $(STRUCTGENDIRS)
|
||||
|
||||
%.c: %.xml
|
||||
$(XSLTPROC) $(CONTIKI_CPU_ARM)/common/usb/string-descriptors.xslt $^ >$(BUILTSRCDIR)/$@
|
||||
|
||||
%-consts.c: %.gen.c
|
||||
$(CPP) -I$(CFLAGS) $< | $(STRUCTGEN) --output $(BUILTSRCDIR)/$*-consts.c
|
|
@ -1,126 +0,0 @@
|
|||
#include "descriptors.h"
|
||||
#include <contiki-conf.h>
|
||||
#include <cdc.h>
|
||||
#include <usb-arch.h>
|
||||
|
||||
const struct usb_st_device_descriptor device_descriptor =
|
||||
{
|
||||
sizeof(struct usb_st_device_descriptor),
|
||||
DEVICE,
|
||||
0x0210,
|
||||
CDC,
|
||||
0,
|
||||
0,
|
||||
CTRL_EP_SIZE,
|
||||
0xffff,
|
||||
0xffff,
|
||||
0x0030,
|
||||
2,
|
||||
1,
|
||||
3,
|
||||
1
|
||||
};
|
||||
|
||||
const struct configuration_st {
|
||||
struct usb_st_configuration_descriptor configuration;
|
||||
struct usb_st_interface_descriptor comm;
|
||||
struct usb_cdc_header_func_descriptor header;
|
||||
struct usb_cdc_abstract_ctrl_mgmnt_func_descriptor abstract_ctrl;
|
||||
struct usb_cdc_union_func_descriptor union_descr;
|
||||
struct usb_cdc_call_mgmnt_func_descriptor call_mgmt;
|
||||
#if 1
|
||||
struct usb_st_endpoint_descriptor ep_notification;
|
||||
#endif
|
||||
struct usb_st_interface_descriptor data;
|
||||
struct usb_st_endpoint_descriptor ep_in;
|
||||
struct usb_st_endpoint_descriptor ep_out;
|
||||
} BYTE_ALIGNED configuration_block =
|
||||
{
|
||||
/* Configuration */
|
||||
{
|
||||
sizeof(configuration_block.configuration),
|
||||
CONFIGURATION,
|
||||
sizeof(configuration_block),
|
||||
2,
|
||||
1,
|
||||
0,
|
||||
0x80,
|
||||
50
|
||||
},
|
||||
{
|
||||
sizeof(configuration_block.comm),
|
||||
INTERFACE,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
CDC,
|
||||
ABSTRACT_CONTROL_MODEL,
|
||||
V_25TER_PROTOCOL,
|
||||
0
|
||||
},
|
||||
{
|
||||
sizeof(configuration_block.header),
|
||||
CS_INTERFACE,
|
||||
CDC_FUNC_DESCR_HEADER,
|
||||
0x0110
|
||||
},
|
||||
{
|
||||
sizeof(configuration_block.abstract_ctrl),
|
||||
CS_INTERFACE,
|
||||
CDC_FUNC_DESCR_ABSTRACT_CTRL_MGMNT,
|
||||
0
|
||||
},
|
||||
{
|
||||
sizeof(configuration_block.union_descr),
|
||||
CS_INTERFACE,
|
||||
CDC_FUNC_DESCR_UNION,
|
||||
0, /* Master */
|
||||
{1} /* Slave */
|
||||
},
|
||||
{
|
||||
sizeof(configuration_block.call_mgmt),
|
||||
CS_INTERFACE,
|
||||
CDC_FUNC_DESCR_CALL_MGMNT,
|
||||
0x02,
|
||||
1 /* data interface */
|
||||
},
|
||||
{
|
||||
sizeof(configuration_block.ep_notification),
|
||||
ENDPOINT,
|
||||
0x83,
|
||||
0x03,
|
||||
USB_EP3_SIZE,
|
||||
100
|
||||
},
|
||||
{
|
||||
sizeof(configuration_block.data),
|
||||
INTERFACE,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
CDC_DATA,
|
||||
0,
|
||||
TRANSPARENT_PROTOCOL,
|
||||
0
|
||||
},
|
||||
{
|
||||
sizeof(configuration_block.ep_in),
|
||||
ENDPOINT,
|
||||
0x81,
|
||||
0x02,
|
||||
USB_EP1_SIZE,
|
||||
0
|
||||
},
|
||||
{
|
||||
sizeof(configuration_block.ep_out),
|
||||
ENDPOINT,
|
||||
0x02,
|
||||
0x02,
|
||||
USB_EP2_SIZE,
|
||||
0
|
||||
}
|
||||
|
||||
};
|
||||
|
||||
const struct usb_st_configuration_descriptor* const configuration_head =
|
||||
(const struct usb_st_configuration_descriptor*)&configuration_block;
|
|
@ -1,19 +0,0 @@
|
|||
<?xml version="1.0" encoding="utf-8" ?>
|
||||
<descriptors>
|
||||
<languages>
|
||||
<lang id="en">0x0409</lang>
|
||||
<lang id="sv">0x041d</lang>
|
||||
</languages>
|
||||
<strings>
|
||||
<string> <!-- 1 -->
|
||||
<lang id="en">Serial interface</lang>
|
||||
<lang id="sv">Serieport</lang>
|
||||
</string>
|
||||
<string> <!-- 2 -->
|
||||
<lang>Fluffware</lang>
|
||||
</string>
|
||||
<string> <!-- 3 -->
|
||||
<lang>0.01</lang>
|
||||
</string>
|
||||
</strings>
|
||||
</descriptors>
|
|
@ -1,110 +0,0 @@
|
|||
#include <cdc-acm.h>
|
||||
#include <cdc.h>
|
||||
#include <usb-api.h>
|
||||
#include <usb-core.h>
|
||||
#include <stdio.h>
|
||||
|
||||
static uint8_t usb_ctrl_data_buffer[32];
|
||||
|
||||
static void
|
||||
encapsulated_command(uint8_t *data, unsigned int length)
|
||||
{
|
||||
printf("Got CDC command: length %d\n", length);
|
||||
usb_send_ctrl_status();
|
||||
}
|
||||
static void
|
||||
set_line_encoding(uint8_t *data, unsigned int length)
|
||||
{
|
||||
if (length == 7) {
|
||||
static const char parity_char[] = {'N', 'O', 'E', 'M', 'S'};
|
||||
static const char *stop_bits_str[] = {"1","1.5","2"};
|
||||
const struct usb_cdc_line_coding *coding =
|
||||
(const struct usb_cdc_line_coding *)usb_ctrl_data_buffer;
|
||||
char parity = ((coding->bParityType > 4)
|
||||
? '?' : parity_char[coding->bParityType]);
|
||||
const char *stop_bits = ((coding->bCharFormat > 2)
|
||||
? "?" : stop_bits_str[coding->bCharFormat]);
|
||||
printf("Got CDC line coding: %ld/%d/%c/%s\n",
|
||||
coding->dwDTERate, coding->bDataBits, parity, stop_bits);
|
||||
usb_send_ctrl_status();
|
||||
} else {
|
||||
usb_error_stall();
|
||||
}
|
||||
}
|
||||
|
||||
static unsigned int
|
||||
handle_cdc_acm_requests()
|
||||
{
|
||||
printf("CDC request %02x %02x\n", usb_setup_buffer.bmRequestType, usb_setup_buffer.bRequest);
|
||||
switch(usb_setup_buffer.bmRequestType) {
|
||||
case 0x21: /* CDC interface OUT requests */
|
||||
/* Check if it's the right interface */
|
||||
if (usb_setup_buffer.wIndex != 0) return 0;
|
||||
switch(usb_setup_buffer.bRequest) {
|
||||
case SET_CONTROL_LINE_STATE:
|
||||
if (usb_setup_buffer.wValue & 0x02) {
|
||||
puts("Carrier on");
|
||||
} else {
|
||||
puts("Carrier off");
|
||||
}
|
||||
if (usb_setup_buffer.wValue & 0x01) {
|
||||
puts("DTE on");
|
||||
} else {
|
||||
puts("DTE off");
|
||||
}
|
||||
usb_send_ctrl_status();
|
||||
return 1;
|
||||
|
||||
case SEND_ENCAPSULATED_COMMAND:
|
||||
{
|
||||
unsigned int len = usb_setup_buffer.wLength;
|
||||
if (len > sizeof(usb_ctrl_data_buffer))
|
||||
len = sizeof(usb_ctrl_data_buffer);
|
||||
usb_get_ctrl_data(usb_ctrl_data_buffer, len,
|
||||
encapsulated_command);
|
||||
}
|
||||
|
||||
return 1;
|
||||
|
||||
|
||||
case SET_LINE_CODING:
|
||||
{
|
||||
unsigned int len = usb_setup_buffer.wLength;
|
||||
if (len > sizeof(usb_ctrl_data_buffer))
|
||||
len = sizeof(usb_ctrl_data_buffer);
|
||||
usb_get_ctrl_data(usb_ctrl_data_buffer, len,
|
||||
set_line_encoding);
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
break;
|
||||
case 0xa1: /* CDC interface IN requests */
|
||||
if (usb_setup_buffer.wIndex != 0) return 0;
|
||||
switch(usb_setup_buffer.bRequest) {
|
||||
case GET_ENCAPSULATED_RESPONSE:
|
||||
printf("CDC response");
|
||||
usb_send_ctrl_status();
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct USBRequestHandler cdc_acm_request_handler =
|
||||
{
|
||||
0x21, 0x7f,
|
||||
0x00, 0x00,
|
||||
handle_cdc_acm_requests
|
||||
};
|
||||
|
||||
static struct USBRequestHandlerHook cdc_acm_request_hook =
|
||||
{
|
||||
NULL,
|
||||
&cdc_acm_request_handler
|
||||
};
|
||||
|
||||
void
|
||||
usb_cdc_acm_setup()
|
||||
{
|
||||
usb_register_request_handler(&cdc_acm_request_hook);
|
||||
}
|
|
@ -1,7 +0,0 @@
|
|||
#ifndef CDC_ACM_H_UFV6K50827__
|
||||
#define CDC_ACM_H_UFV6K50827__
|
||||
|
||||
void
|
||||
usb_cdc_acm_setup();
|
||||
|
||||
#endif /* CDC_ACM_H_UFV6K50827__ */
|
|
@ -1,214 +0,0 @@
|
|||
#ifndef CDC_H_K1Q26ESJOC__
|
||||
#define CDC_H_K1Q26ESJOC__
|
||||
#include <usb.h>
|
||||
/* Communication Class */
|
||||
/* Class code */
|
||||
#define CDC 0x02
|
||||
|
||||
/* Interface subclass codes */
|
||||
#define CDC_RESERVED 0x00
|
||||
#define DIRECT_LINE_CONTROL_MODEL 0x01
|
||||
#define ABSTRACT_CONTROL_MODEL 0x02
|
||||
#define TELEPHONE_CONTROL_MODEL 0x03
|
||||
#define MULTI_CHANNEL_CONTROL_MODEL 0x04
|
||||
#define CAPI_CONTROL_MODEL 0x05
|
||||
#define ETHERNET_NETWORKING_CONTROL_MODEL 0x06
|
||||
#define ATM_NETWORKING_CONTROL_MODEL 0x07
|
||||
|
||||
/* Protocols */
|
||||
#define V_25TER_PROTOCOL 0x01
|
||||
|
||||
/* Requests */
|
||||
#define SEND_ENCAPSULATED_COMMAND 0x00
|
||||
#define GET_ENCAPSULATED_RESPONSE 0x01
|
||||
#define SET_COMM_FEATURE 0x02
|
||||
#define GET_COMM_FEATURE 0x03
|
||||
#define CLEAR_COMM_FEATURE 0x04
|
||||
|
||||
#define SET_AUX_LINE_STATE 0x10
|
||||
#define SET_HOOK_STATE 0x11
|
||||
#define PULSE_SETUP 0x12
|
||||
#define SEND_PULSE 0x13
|
||||
#define SET_PULSE_TIME 0x14
|
||||
#define RING_AUX_JACK 0x15
|
||||
|
||||
#define SET_LINE_CODING 0x20
|
||||
#define GET_LINE_CODING 0x21
|
||||
#define SET_CONTROL_LINE_STATE 0x22
|
||||
#define SEND_BREAK 0x23
|
||||
|
||||
#define SET_RINGER_PARMS 0x30
|
||||
#define GET_RINGER_PARMS 0x31
|
||||
#define SET_OPERATION_PARMS 0x32
|
||||
#define GET_OPERATION_PARMS 0x33
|
||||
#define SET_LINE_PARMS 0x34
|
||||
#define GET_LINE_PARMS 0x35
|
||||
#define DIAL_DIGITS 0x36
|
||||
|
||||
#define SET_UNIT_PARAMETER 0x37
|
||||
#define GET_UNIT_PARAMETER 0x38
|
||||
#define CLEAR_UNIT_PARAMETER 0x39
|
||||
|
||||
#define GET_PROFILE 0x3a
|
||||
|
||||
#define SET_ETHERNET_MULTICAST_FILTERS 0x40
|
||||
#define GET_ETHERNET_MULTICAST_FILTERS 0x41
|
||||
#define GET_ETHERNET_POWER_MANAGEMENT_PATTERN_FILTER 0x42
|
||||
#define SET_ETHERNET_POWER_MANAGEMENT_PATTERN_FILTER 0x43
|
||||
#define GET_ETHERNET_STATISTIC 0x44
|
||||
|
||||
#define SET_ATM_D ATA_FORMAT 0x50
|
||||
#define GET_ATM_DEVICE_STATISTICS 0x51
|
||||
#define SET_ATM_DEFAULT_VC 0x52
|
||||
#define GET_ATM_VC_STATISTICS 0x53
|
||||
|
||||
|
||||
/* Notifications */
|
||||
#define NETWORK_CONNECTION 0x00
|
||||
#define RESPONSE_AVAILABLE 0x01
|
||||
|
||||
#define AUX_JACK_HOOK_STATE 0x08
|
||||
#define RING_DETECT 0x09
|
||||
|
||||
#define SERIAL_STATE 0x20
|
||||
|
||||
#define CALL_STATE_CHANGE 0x28
|
||||
#define LINE_STATE_CHANGE 0x29
|
||||
#define CONNECTION_SPEED_CHANGE 0x2a
|
||||
|
||||
/* Data interface */
|
||||
|
||||
/* Class code */
|
||||
#define CDC_DATA 0x0a
|
||||
|
||||
/* Protocols */
|
||||
#define I_430_PROTOCOL 0x30
|
||||
#define ISO_IEC_3_1993_PROTOCOL 0x31
|
||||
#define TRANSPARENT_PROTOCOL 0x32
|
||||
#define Q_921M_PROTOCOL 0x50
|
||||
#define Q_921_PROTOCOL 0x51
|
||||
#define Q_921TM_PROTOCOL 0x52
|
||||
#define V_42BIS_PROTOCOL 0x90
|
||||
#define Q_931_PROTOCOL 0x91
|
||||
#define V_120_PROTOCOL 0x93
|
||||
#define CDC_PROTOCOL 0xfe
|
||||
|
||||
/* Descriptor subtypes */
|
||||
|
||||
#define CDC_FUNC_DESCR_HEADER 0x00
|
||||
#define CDC_FUNC_DESCR_CALL_MGMNT 0x01
|
||||
#define CDC_FUNC_DESCR_ABSTRACT_CTRL_MGMNT 0x02
|
||||
#define CDC_FUNC_DESCR_DIRECT_LINE_MGMNT 0x03
|
||||
#define CDC_FUNC_DESCR_RINGER_MGMNT 0x04
|
||||
#define CDC_FUNC_DESCR_TEL_STATE 0x05
|
||||
#define CDC_FUNC_DESCR_UNION 0x06
|
||||
#define CDC_FUNC_DESCR_COUNTRY 0x07
|
||||
#define CDC_FUNC_DESCR_TEL_MODE 0x08
|
||||
#define CDC_FUNC_DESCR_USB_TERM 0x09
|
||||
#define CDC_FUNC_DESCR_NET_TERM 0x0a
|
||||
#define CDC_FUNC_DESCR_PROTOCOL_UNIT 0x0b
|
||||
#define CDC_FUNC_DESCR_EXTENSION_UNIT 0x0c
|
||||
#define CDC_FUNC_DESCR_MULTICH_MGMNT 0x0d
|
||||
#define CDC_FUNC_DESCR_CAPI_MGMNT 0x0e
|
||||
#define CDC_FUNC_DESCR_ETHERNET 0x0f
|
||||
#define CDC_FUNC_DESCR_ATM 0x10
|
||||
|
||||
|
||||
|
||||
struct usb_cdc_header_func_descriptor
|
||||
{
|
||||
Uchar bLength; /* Size of this descriptor in bytes */
|
||||
Uchar bDescriptorType; /* CS_INTERFACE descriptor type */
|
||||
Uchar bDescriptorSubtype; /* CDC_FUNC_DESCR_HEADER subtype */
|
||||
Uint16 bcdCDC; /* Revision of class specification */
|
||||
} BYTE_ALIGNED;
|
||||
|
||||
struct usb_cdc_call_mgmnt_func_descriptor
|
||||
{
|
||||
Uchar bLength; /* Size of this descriptor in bytes */
|
||||
Uchar bDescriptorType; /* CS_INTERFACE descriptor type */
|
||||
Uchar bDescriptorSubtype; /* CDC_FUNC_DESCR_CALL_MGMNT subtype */
|
||||
Uchar bmCapabilities; /* Capabilities */
|
||||
Uchar bDataInterface; /* Management data interface */
|
||||
} BYTE_ALIGNED;
|
||||
|
||||
struct usb_cdc_abstract_ctrl_mgmnt_func_descriptor
|
||||
{
|
||||
Uchar bLength; /* Size of this descriptor in bytes */
|
||||
Uchar bDescriptorType; /* CS_INTERFACE descriptor type */
|
||||
Uchar bDescriptorSubtype; /* CDC_FUNC_DESCR_ABSTRACT_CTRL_MGMNT subtype*/
|
||||
Uchar bmCapabilities; /* Capabilities */
|
||||
} BYTE_ALIGNED;
|
||||
|
||||
struct usb_cdc_direct_line_mgmnt_func_descriptor
|
||||
{
|
||||
Uchar bLength; /* Size of this descriptor in bytes */
|
||||
Uchar bDescriptorType; /* CS_INTERFACE descriptor type */
|
||||
Uchar bDescriptorSubtype; /* CDC_FUNC_DESCR_DIRECT_LINE_MGMNT subtype*/
|
||||
Uchar bmCapabilities; /* Capabilities */
|
||||
} BYTE_ALIGNED;
|
||||
|
||||
struct usb_cdc_ringer_mgmnt_func_descriptor
|
||||
{
|
||||
Uchar bLength; /* Size of this descriptor in bytes */
|
||||
Uchar bDescriptorType; /* CS_INTERFACE descriptor type */
|
||||
Uchar bDescriptorSubtype; /* CDC_FUNC_DESCR_RINGER_MGMNT subtype*/
|
||||
Uchar bRingerVolSteps; /* Ringer volume steps */
|
||||
Uchar bNumRingerPatterns; /* Number of ringer patterns supported */
|
||||
} BYTE_ALIGNED;
|
||||
|
||||
struct usb_cdc_tel_mode_func_descriptor
|
||||
{
|
||||
Uchar bLength; /* Size of this descriptor in bytes */
|
||||
Uchar bDescriptorType; /* CS_INTERFACE descriptor type */
|
||||
Uchar bDescriptorSubtype; /* CDC_FUNC_DESCR_TEL_MODE subtype*/
|
||||
Uchar bmCapabilities; /* Capabilities */
|
||||
} BYTE_ALIGNED;
|
||||
|
||||
struct usb_cdc_tel_state_func_descriptor
|
||||
{
|
||||
Uchar bLength; /* Size of this descriptor in bytes */
|
||||
Uchar bDescriptorType; /* CS_INTERFACE descriptor type */
|
||||
Uchar bDescriptorSubtype; /* CDC_FUNC_DESCR_TEL_STATE subtype*/
|
||||
Uchar bmCapabilities; /* Capabilities */
|
||||
} BYTE_ALIGNED;
|
||||
|
||||
struct usb_cdc_union_func_descriptor
|
||||
{
|
||||
Uchar bLength; /* Size of this descriptor in bytes */
|
||||
Uchar bDescriptorType; /* CS_INTERFACE descriptor type */
|
||||
Uchar bDescriptorSubtype; /* CDC_FUNC_DESCR_UNION subtype*/
|
||||
Uchar bMasterInterface; /* Master interface for union */
|
||||
Uchar bSlaveInterface[1]; /* Slave interfaces in union */
|
||||
} BYTE_ALIGNED;
|
||||
|
||||
struct usb_cdc_country_func_descriptor
|
||||
{
|
||||
Uchar bLength; /* Size of this descriptor in bytes */
|
||||
Uchar bDescriptorType; /* CS_INTERFACE descriptor type */
|
||||
Uchar bDescriptorSubtype; /* CDC_FUNC_DESCR_COUNTRY subtype*/
|
||||
Uchar iCountryCodeRelDate; /* Release date for country codes */
|
||||
Uint16 wCountryCode[1]; /* Country codes */
|
||||
} BYTE_ALIGNED;
|
||||
|
||||
struct usb_cdc_ethernet_func_descriptor
|
||||
{
|
||||
Uchar bLength; /* Size of this descriptor in bytes */
|
||||
Uchar bDescriptorType; /* CS_INTERFACE descriptor type */
|
||||
Uchar bDescriptorSubtype; /* CDC_FUNC_DESCR_ETHERNET subtype*/
|
||||
Uchar iMACAddress; /* MAC address string descriptor */
|
||||
Uint32 bmEthernetStatistics; /* Supported statistics */
|
||||
Uint16 wMaxSegmentSize;
|
||||
Uint16 wNumberMCFilters; /* Number of multicast filters */
|
||||
Uchar bNumberPowerFilters; /* Number of wake-up pattern filters */;
|
||||
} BYTE_ALIGNED;
|
||||
|
||||
struct usb_cdc_line_coding
|
||||
{
|
||||
Uint32 dwDTERate;
|
||||
Uchar bCharFormat;
|
||||
Uchar bParityType;
|
||||
Uchar bDataBits;
|
||||
} BYTE_ALIGNED;
|
||||
|
||||
#endif /* CDC_H_K1Q26ESJOC__ */
|
|
@ -1,10 +0,0 @@
|
|||
#ifndef DESCRIPTORS_H_RPFUB8O7OV__
|
||||
#define DESCRIPTORS_H_RPFUB8O7OV__
|
||||
|
||||
#ifndef STRUCTGEN
|
||||
#include "usb.h"
|
||||
#endif
|
||||
|
||||
extern const struct usb_st_device_descriptor device_descriptor;
|
||||
extern const struct usb_st_configuration_descriptor* const configuration_head;
|
||||
#endif /* DESCRIPTORS_H_RPFUB8O7OV__ */
|
|
@ -1,72 +0,0 @@
|
|||
#include "descriptors.h"
|
||||
#include "usb-msc-bulk.h"
|
||||
#include <usb-arch.h>
|
||||
|
||||
const struct usb_st_device_descriptor device_descriptor =
|
||||
{
|
||||
sizeof(struct usb_st_device_descriptor),
|
||||
DEVICE,
|
||||
0x0210,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
CTRL_EP_SIZE,
|
||||
0xffff,
|
||||
0xffff,
|
||||
0x0030,
|
||||
2,
|
||||
1,
|
||||
3,
|
||||
1
|
||||
};
|
||||
|
||||
const struct configuration_st {
|
||||
struct usb_st_configuration_descriptor configuration;
|
||||
struct usb_st_interface_descriptor massbulk;
|
||||
struct usb_st_endpoint_descriptor ep_in;
|
||||
struct usb_st_endpoint_descriptor ep_out;
|
||||
} BYTE_ALIGNED configuration_block =
|
||||
{
|
||||
/* Configuration */
|
||||
{
|
||||
sizeof(configuration_block.configuration),
|
||||
CONFIGURATION,
|
||||
sizeof(configuration_block),
|
||||
1,
|
||||
1,
|
||||
0,
|
||||
0x80,
|
||||
50
|
||||
},
|
||||
{
|
||||
sizeof(configuration_block.massbulk),
|
||||
INTERFACE,
|
||||
0,
|
||||
0,
|
||||
2,
|
||||
MASS_STORAGE,
|
||||
MASS_RBC,
|
||||
MASS_BULK_ONLY,
|
||||
0
|
||||
},
|
||||
{
|
||||
sizeof(configuration_block.ep_in),
|
||||
ENDPOINT,
|
||||
0x81,
|
||||
0x02,
|
||||
64,
|
||||
0
|
||||
},
|
||||
{
|
||||
sizeof(configuration_block.ep_out),
|
||||
ENDPOINT,
|
||||
0x02,
|
||||
0x02,
|
||||
64,
|
||||
0
|
||||
}
|
||||
|
||||
};
|
||||
|
||||
const struct usb_st_configuration_descriptor const *configuration_head =
|
||||
(struct usb_st_configuration_descriptor const*)&configuration_block;
|
|
@ -1,17 +0,0 @@
|
|||
<?xml version="1.0" encoding="utf-8" ?>
|
||||
<descriptors>
|
||||
<languages>
|
||||
<lang id="en">0x0409</lang>
|
||||
</languages>
|
||||
<strings>
|
||||
<string> <!-- 1 -->
|
||||
<lang id="en">USB mass storage test</lang>
|
||||
</string>
|
||||
<string> <!-- 2 -->
|
||||
<lang>Fluffware</lang>
|
||||
</string>
|
||||
<string> <!-- 3 -->
|
||||
<lang>F00000000001</lang>
|
||||
</string>
|
||||
</strings>
|
||||
</descriptors>
|
|
@ -1,66 +0,0 @@
|
|||
#ifndef RBC_CONST_H_7YXZF39S33__
|
||||
#define RBC_CONST_H_7YXZF39S33__
|
||||
|
||||
#include <spc2_const.h>
|
||||
|
||||
/* SCSI operation codes */
|
||||
/* Additional commands for RBC */
|
||||
|
||||
#define SCSI_CMD_FORMAT_UNIT 0x04
|
||||
#define SCSI_CMD_READ_10 0x28
|
||||
#define SCSI_CMD_READ_CAPACITY 0x25
|
||||
#define SCSI_CMD_START_STOP_UNIT 0x1B
|
||||
#define SCSI_CMD_SYNCHRONIZE_CACHE 0x35
|
||||
#define SCSI_CMD_TEST_UNIT_READY 0x00
|
||||
#define SCSI_CMD_VERIFY_10 0x2F
|
||||
#define SCSI_CMD_WRITE_10 0x2A
|
||||
|
||||
/* Status codes */
|
||||
/* From SAM-2 */
|
||||
#define SCSI_STATUS_GOOD 0x00
|
||||
#define SCSI_STATUS_CHECK_CONDITION 0x02
|
||||
#define SCSI_STATUS_CONDITION _MET 0x04
|
||||
#define SCSI_STATUS_BUSY 0x08
|
||||
#define SCSI_STATUS_INTERMEDIATE 0x10
|
||||
#define SCSI_STATUS_INTERMEDIATE_CONDITION_MET 0x14
|
||||
#define SCSI_STATUS_RESERVATION_CONFLICT 0x18
|
||||
#define SCSI_STATUS_TASK_SET_FULL 0x28
|
||||
#define SCSI_STATUS_ACA_ACTIVE 0x30
|
||||
#define SCSI_STATUS_TASK_ABORTED 0x40
|
||||
|
||||
/* Sense keys */
|
||||
#define SCSI_SENSE_KEY_NO_SENSE 0x0
|
||||
#define SCSI_SENSE_KEY_RECOVERED_ERROR 0x1
|
||||
#define SCSI_SENSE_KEY_NOT_READY 0x2
|
||||
#define SCSI_SENSE_KEY_MEDIUM_ERROR 0x3
|
||||
#define SCSI_SENSE_KEY_HARDWARE_ERROR 0x4
|
||||
#define SCSI_SENSE_KEY_ILLEGAL_REQUEST 0x5
|
||||
#define SCSI_SENSE_KEY_UNIT_ATTENTION 0x6
|
||||
#define SCSI_SENSE_KEY_DATA_PROTECT 0x7
|
||||
#define SCSI_SENSE_KEY_BLANK_CHECK 0x8
|
||||
#define SCSI_SENSE_KEY_VENDOR_SPECIFIC 0x9
|
||||
#define SCSI_SENSE_KEY_COPY_ABORTED 0xA
|
||||
#define SCSI_SENSE_KEY_ABORTED_COMMAND 0xB
|
||||
#define SCSI_SENSE_KEY_VOLUME_OVERFLOW 0xD
|
||||
#define SCSI_SENSE_KEY_MISCOMPARE 0xE
|
||||
|
||||
/* Additional sense codes */
|
||||
#define SCSI_ASC_NO_SENSE 0x0000
|
||||
#define SCSI_ASC_INVALID_COMMAND_OPERATION 0x2000
|
||||
#define SCSI_ASC_INVALID_FIELD_IN_PARAMETER_LIST 0x2600
|
||||
|
||||
#define SCSI_ASC_INVALID_FIELD_IN_CDB 0x2400
|
||||
|
||||
/* RBC mode page */
|
||||
#define SCSI_MODE_RBC_DEVICE_PAGE 0x06
|
||||
#define SCSI_MODE_WCD 0x01
|
||||
#define SCSI_MODE_READD 0x08
|
||||
#define SCSI_MODE_WRITED 0x04
|
||||
#define SCSI_MODE_FORMATD 0x02
|
||||
#define SCSI_MODE_LOCKD 0x01
|
||||
|
||||
/* WRITE(10) command flags */
|
||||
|
||||
#define SCSI_WRITE_FUA 0x08
|
||||
|
||||
#endif /* RBC_CONST_H_7YXZF39S33__ */
|
|
@ -1,58 +0,0 @@
|
|||
#ifndef RBC_STRUCT_H_10L0HKARRV__
|
||||
#define RBC_STRUCT_H_10L0HKARRV__
|
||||
|
||||
#include <spc2_struct.h>
|
||||
|
||||
struct rbc_read_capacity_cmd
|
||||
{
|
||||
uint8_t op_code;
|
||||
uint8_t reserved1;
|
||||
uint8_t reserved2;
|
||||
uint8_t reserved3;
|
||||
uint8_t reserved4;
|
||||
uint8_t reserved5;
|
||||
uint8_t reserved6;
|
||||
uint8_t reserved7;
|
||||
uint8_t reserved8;
|
||||
uint8_t control;
|
||||
} CC_BYTE_ALIGNED;
|
||||
|
||||
struct rbc_read_capacity_data
|
||||
{
|
||||
uint32_bytes last_logical_block;
|
||||
uint32_bytes block_length;
|
||||
} CC_BYTE_ALIGNED;
|
||||
|
||||
struct rbc_device_parameters_page
|
||||
{
|
||||
struct spc2_mode_page head;
|
||||
uint8_t flags1;
|
||||
uint16_bytes logical_block_size;
|
||||
uint40_bytes num_logical_blocks;
|
||||
uint8_t power_performance;
|
||||
uint8_t flags2;
|
||||
uint8_t reserved;
|
||||
} CC_BYTE_ALIGNED;
|
||||
|
||||
struct rbc_read_cmd
|
||||
{
|
||||
uint8_t op_code;
|
||||
uint8_t reserved1;
|
||||
uint32_bytes logical_block_address;
|
||||
uint8_t reserved2;
|
||||
uint16_bytes transfer_length;
|
||||
uint8_t control;
|
||||
} CC_BYTE_ALIGNED;
|
||||
|
||||
struct rbc_write_cmd
|
||||
{
|
||||
uint8_t op_code;
|
||||
uint8_t flags;
|
||||
uint32_bytes logical_block_address;
|
||||
uint8_t reserved;
|
||||
uint16_bytes transfer_length;
|
||||
uint8_t control;
|
||||
} CC_BYTE_ALIGNED;
|
||||
|
||||
|
||||
#endif /* RBC_STRUCT_H_10L0HKARRV__ */
|
|
@ -1,70 +0,0 @@
|
|||
#ifndef SCSI_COMMAND_H_SR3ALQCZSH__
|
||||
#define SCSI_COMMAND_H_SR3ALQCZSH__
|
||||
|
||||
#define SCSI_CMD_CHANGE_DEFINITION 0x40
|
||||
#define SCSI_CMD_COMPARE 0x39
|
||||
#define SCSI_CMD_COPY 0x18
|
||||
#define SCSI_CMD_COPY_AND_VERIFY 0x3a
|
||||
#define SCSI_CMD_ERASE 0x19
|
||||
#define SCSI_CMD_FORMAT 0x04
|
||||
#define SCSI_CMD_INQUIRY 0x12
|
||||
#define SCSI_CMD_LOAD_UNLOAD 0x1b
|
||||
#define SCSI_CMD_LOCATE 0x2b
|
||||
#define SCSI_CMD_LOCK_UNLOCK_CACHE 0x36
|
||||
#define SCSI_CMD_LOG_SELECT 0x4c
|
||||
#define SCSI_CMD_LOG_SENSE 0x4d
|
||||
#define SCSI_CMD_MODE_SELECT_6 0x15
|
||||
#define SCSI_CMD_MODE_SELECT_10 0x55
|
||||
#define SCSI_CMD_MODE_SENSE_6 0x1a
|
||||
#define SCSI_CMD_MODE_SENSE_10 0x5a
|
||||
#define SCSI_CMD_PREFETCH 0x34
|
||||
#define SCSI_CMD_PREVENT_ALLOW_MEDIUM_REMOVAL 0x1e
|
||||
#define SCSI_CMD_PRINT 0x0a
|
||||
#define SCSI_CMD_READ_6 0x08
|
||||
#define SCSI_CMD_READ_10 0x28
|
||||
#define SCSI_CMD_READ_BLOCK_LIMITS 0x05
|
||||
#define SCSI_CMD_READ_BUFFER 0x3c
|
||||
#define SCSI_CMD_READ_CAPACITY 0x25
|
||||
#define SCSI_CMD_READ_DEFECT_DATA 0x37
|
||||
#define SCSI_CMD_READ_LONG 0x3e
|
||||
#define SCSI_CMD_READ_POSITION 0x34
|
||||
#define SCSI_CMD_READ_REVERSE 0x0f
|
||||
#define SCSI_CMD_REASSIGN BLOCKS 0x07
|
||||
#define SCSI_CMD_RECEIVE_DIAGNOSTIC_RESULTS 0x1c
|
||||
#define SCSI_CMD_RECOVER_BUFFERED_DATA 0x14
|
||||
#define SCSI_CMD_RELEASE_UNIT 0x17
|
||||
#define SCSI_CMD_REQUEST_SENSE 0x03
|
||||
#define SCSI_CMD_RESERVE_UNIT 0x16
|
||||
#define SCSI_CMD_REWIND 0x01
|
||||
#define SCSI_CMD_REZERO_UNIT 0x01
|
||||
#define SCSI_CMD_SEARCH_DATA_EQUAL_10 0x31
|
||||
#define SCSI_CMD_SEARCH_DATA_EQUAL_12 0xb1
|
||||
#define SCSI_CMD_SEARCH_DATA_HIGH_10 0x30
|
||||
#define SCSI_CMD_SEARCH_DATA_HIGH_12 0xb0
|
||||
#define SCSI_CMD_SEARCH_DATA_LOW_10 0x32
|
||||
#define SCSI_CMD_SEARCH_DATA_LOW_12 0xb2
|
||||
#define SCSI_CMD_SEEK_6 0x0B
|
||||
#define SCSI_CMD_SEEK_10 0x2B
|
||||
#define SCSI_CMD_SEND_DIAGNOSTIC 0x1d
|
||||
#define SCSI_CMD_SET_LIMITS 0x33
|
||||
#define SCSI_CMD_SLEW_AND_PRINT 0x0b
|
||||
#define SCSI_CMD_SPACE 0x11
|
||||
#define SCSI_CMD_START_STOP_UNIT 0x1B
|
||||
#define SCSI_CMD_STOP_PRINT 0x1b
|
||||
#define SCSI_CMD_SYNCHRONIZE_CACHE 0x35
|
||||
#define SCSI_CMD_SYNCHRONIZE_BUFFER 0x10
|
||||
#define SCSI_CMD_TEST_UNIT_READY 0x00
|
||||
#define SCSI_CMD_VERIFY 0x13
|
||||
#define SCSI_CMD_WRITE_6 0x0a
|
||||
#define SCSI_CMD_WRITE_10 0x2a
|
||||
#define SCSI_CMD_WRITE_12 0xaa
|
||||
#define SCSI_CMD_WRITE_AND_VERIFY_10 0x2e
|
||||
#define SCSI_CMD_WRITE_AND_VERIFY_12 0xae
|
||||
#define SCSI_CMD_WRITE_BUFFER 0x3b
|
||||
#define SCSI_CMD_WRITE_FILEMARKS 0x10
|
||||
#define SCSI_CMD_WRITE_LONG 0x3f
|
||||
#define SCSI_CMD_WRITE_SAME 0x41
|
||||
|
||||
|
||||
|
||||
#endif /* SCSI_COMMAND_H_SR3ALQCZSH__ */
|
|
@ -1,116 +0,0 @@
|
|||
/* Sense keys */
|
||||
#define SCSI_SENSE_KEY_NO_SENSE 0x0
|
||||
#define SCSI_SENSE_KEY_RECOVERED_ERROR 0x1
|
||||
#define SCSI_SENSE_KEY_NOT_READY 0x2
|
||||
#define SCSI_SENSE_KEY_MEDIUM_ERROR 0x3
|
||||
#define SCSI_SENSE_KEY_HARDWARE_ERROR 0x4
|
||||
#define SCSI_SENSE_KEY_ILLEGAL_REQUEST 0x5
|
||||
#define SCSI_SENSE_KEY_UNIT_ATTENTION 0x6
|
||||
#define SCSI_SENSE_KEY_DATA_PROTECT 0x7
|
||||
#define SCSI_SENSE_KEY_BLANK_CHECK 0x8
|
||||
#define SCSI_SENSE_KEY_VENDOR_SPECIFIC 0x9
|
||||
#define SCSI_SENSE_KEY_COPY_ABORTED 0xA
|
||||
#define SCSI_SENSE_KEY_ABORTED_COMMAND 0xB
|
||||
#define SCSI_SENSE_KEY_VOLUME_OVERFLOW 0xD
|
||||
#define SCSI_SENSE_KEY_MISCOMPARE 0xE
|
||||
|
||||
/* Additional sense codes */
|
||||
#define SCSI_ASC_NO_SENSE 0x0000
|
||||
#define SCSI_ASC_FILEMARK_DETECTED 0x0001
|
||||
#define SCSI_ASC_END_OF_MEDIUM_DETECTED 0x0002
|
||||
#define SCSI_ASC_BEGINNING_OF_MEDIUM_DETECTED 0x0004
|
||||
#define SCSI_ASC_END_OF_DATA_DETECTED 0x0005
|
||||
#define SCSI_ASC_PERIPHERAL_DEVICE_WRITE_FAULT 0x0300
|
||||
#define SCSI_ASC_NO_WRITE_CURRENT 0x0301
|
||||
#define SCSI_ASC_EXCESSIVE_WRITE_ERRORS 0x0302
|
||||
#define SCSI_ASC_NOT_READY_CAUSE_NOT_REPORTABLE 0x0400
|
||||
#define SCSI_ASC_IN_PROCESS_OF_BECOMING_READY 0x0401
|
||||
#define SCSI_ASC_NOT_READY_INITIALIZING_COMMAND_REQUIRED 0x0402
|
||||
#define SCSI_ASC_NOT_READY_MANUAL_INTERVENTION_REQUIRED 0x0403
|
||||
#define SCSI_ASC_NOT_READY_FORMAT_IN_PROGRESS 0x0404
|
||||
#define SCSI_ASC_COMMUNICATION_FAILURE 0x0800
|
||||
#define SCSI_ASC_COMMUNICATION_TIME_OUT 0x0801
|
||||
#define SCSI_ASC_COMMUNICATION_PARITY_ERROR 0x0802
|
||||
#define SCSI_ASC_TRACK_FOLLOWING_ERROR 0x0900
|
||||
#define SCSI_ASC_ERROR_LOG_OVERFLOW 0x0a00
|
||||
#define SCSI_ASC_WRITE_ERROR 0x0c00
|
||||
#define SCSI_ASC_UNRECOVERED_READ_ERROR 0x1100
|
||||
#define SCSI_ASC_READ_RETRIES_EXHAUSTED 0x1101
|
||||
#define SCSI_ASC_ERROR_TOO_LONG_TO_CORRECT 0x1102
|
||||
#define SCSI_ASC_MULTIPLE_READ_ERRORS 0x1103
|
||||
#define SCSI_ASC_INCOMPLETE_BLOCK_READ 0x1108
|
||||
#define SCSI_ASC_NO_GAP_FOUND 0x1109
|
||||
#define SCSI_ASC_MISCORRECTED_ERROR 0x110a
|
||||
#define SCSI_ASC_RECORDED_ENTITY_NOT_FOUND 0x1400
|
||||
#define SCSI_ASC_RECORD_NOT_FOUND 0x1401
|
||||
#define SCSI_ASC_FILEMARK_NOT_FOUND 0x1402
|
||||
#define SCSI_ASC_END_OF_DATA_NOT_FOUND 0x1403
|
||||
#define SCSI_ASC_BLOCK_SEQUENCE_ERROR 0x1404
|
||||
#define SCSI_ASC_RANDOM_POSITIONING_ERROR 0x1500
|
||||
#define SCSI_ASC_MECHANICAL_POSITIONING_ERROR 0x1501
|
||||
#define SCSI_ASC_POSITIONING_ERROR_DETECTED_BY_READ OF_MEDIUM 0x1502
|
||||
#define SCSI_ASC_RECOVERED_DATA_WITH_NO_ERROR_CORRECTION_APPLIED 0x1700
|
||||
#define SCSI_ASC_RECOVERED_DATA_WITH_RETRIES 0x1701
|
||||
#define SCSI_ASC_RECOVERED_DATA_WITH_POSITIVE_HEAD_OFFSET 0x1702
|
||||
#define SCSI_ASC_RECOVERED_DATA_WITH_NEGATIVE_HEAD_OFFSET 0x1703
|
||||
#define SCSI_ASC_RECOVERED_DATA_WITH_ERROR_CORRECTION_APPLIED 0x1800
|
||||
#define SCSI_ASC_DEFECTLIST_ERROR 0x1900
|
||||
#define SCSI_ASC_PARAMETER_LIST_LENGTH_ERROR 0x1a00
|
||||
#define SCSI_ASC_INVALID_COMMAND_OPERATION_CODE 0x2000
|
||||
#define SCSI_ASC_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE 0x2100
|
||||
#define SCSI_ASC_INVALID_FIELD_IN_CDB 0x2400
|
||||
#define SCSI_ASC_LOGICAL_UNIT_NOT_SUPPORTED 0x2500
|
||||
#define SCSI_ASC_INVALID_FIELD_IN_PARAMETER_LIST 0x2600
|
||||
#define SCSI_ASC_PARAMETER_NOT_SUPPORTED 0x2601
|
||||
#define SCSI_ASC_PARAMETER_VALUE_INVALID 0x2602
|
||||
#define SCSI_ASC_THRESHOLD_PARAMETERS_NOT_SUPPORTED 0x2603
|
||||
#define SCSI_ASC_WRITE_PROTECTED 0x2700
|
||||
#define SCSI_ASC_NOT_READY_TO_READY_TRANSITION 0x2800
|
||||
#define SCSI_ASC_PARAMETERS_CHANGED 0x2a00
|
||||
#define SCSI_ASC_MODE_PARAMETERS_CHANGED 0x2a01
|
||||
#define SCSI_ASC_OVERWRITE_ERROR_ON_UPDATE_IN_PLACE 0x2d00
|
||||
#define SCSI_ASC_POWERON_RESET_OR_DEVICE_RESET_OCCURRED 0x2900
|
||||
#define SCSI_ASC_INCOMPATIBLE_MEDIUM_INSTALLED 0x3000
|
||||
#define SCSI_ASC_CANNOT_READ_MEDIUM_UNKNOWN_FORMAT 0x3001
|
||||
#define SCSI_ASC_CANNOT_READ_MEDIUM_INCOMPATIBLE_FORMAT 0x3002
|
||||
#define SCSI_ASC_CLEANING_CARTRIDGE_INSTALLED 0x3003
|
||||
#define SCSI_ASC_MEDIUM_FORMAT_CORRUPTED 0x3100
|
||||
#define SCSI_ASC_TAPE_LENGTH_ERROR 0x3300
|
||||
#define SCSI_ASC_ROUNDED_PARAMETER 0x3700
|
||||
#define SCSI_ASC_SAVING_PARAMETERS_NOT_SUPPORTED 0x3900
|
||||
#define SCSI_ASC_MEDIUM_NOT_PRESENT 0x3a00
|
||||
#define SCSI_ASC_SEQUENTIAL_POSITIONING_ERROR 0x3b00
|
||||
#define SCSI_ASC_TAPE_POSITION_ERROR_AT_BEGINNING_OF_MEDIUM 0x3b01
|
||||
#define SCSI_ASC_TAPE_POSITION_ERROR_AT_END_OF_MEDIUM 0x3b02
|
||||
#define SCSI_ASC_REPOSITION_ERROR 0x3b08
|
||||
#define SCSI_ASC_NOT_SELF_CONFIGURED_YET 0x3e00
|
||||
#define SCSI_ASC_OPERATING_CONDITIONS_HAVE_CHANGED 0x3f00
|
||||
#define SCSI_ASC_MICROCODE_HAS_BEEN_CHANGED 0x3f01
|
||||
#define SCSI_ASC_INQUIRY_DATA_HAS_CHANGED 0x3f03
|
||||
/* 40 NN DIAGNOSTIC FAILURE ON COMPONENT NN (80H-FF H) */
|
||||
#define SCSI_ASC_INTERNAL_FAILURE 0x4400
|
||||
#define SCSI_ASC_UNSUCCESSFUL_DEVICE_RESET 0x4600
|
||||
#define SCSI_ASC_FAILED_SELF_CONFIGURATION 0x4c00
|
||||
#define SCSI_ASC_OVERLAPPED_COMMANDS_ATTEMPTED 0x4e00
|
||||
#define SCSI_ASC_WRITE_APPEND_ERROR 0x5000
|
||||
#define SCSI_ASC_WRITE_APPEND_POSITION_ERROR 0x5001
|
||||
#define SCSI_ASC_POSITION_ERROR_RELATED_TO_TIMING 0x5002
|
||||
#define SCSI_ASC_ERASE_FAILURE 0x5100
|
||||
#define SCSI_ASC_CARTRIDGE_FAULT 0x5200
|
||||
#define SCSI_ASC_MEDIA_LOAD_EJECT_FAILED 0x5300
|
||||
#define SCSI_ASC_UNLOAD_TAPE_FAILURE 0x5301
|
||||
#define SCSI_ASC_MEDIUM_REMOVAL_PREVENTED 0x5302
|
||||
#define SCSI_ASC_OPERATOR_REQUEST_OR_STATE_CHANGE_INPUT 0x5a00
|
||||
#define SCSI_ASC_OPERATOR_MEDIUM_REMOVAL_REQUEST 0x5a01
|
||||
#define SCSI_ASC_OPERATOR_SELECTED_WRITE_PROTECT 0x5a01
|
||||
#define SCSI_ASC_OPERATOR_SELECTED_WRITE_PERMIT 0x5a03
|
||||
#define SCSI_ASC_LOG_EXCEPTION 0x5b00
|
||||
#define SCSI_ASC_THRESHOLD_CONDITION_MET 0x5b01
|
||||
#define SCSI_ASC_LOG_COUNTER_AT_MAXIMUM 0x5b02
|
||||
#define SCSI_ASC_LOG_LIST_CODES_EXHAUSTED 0x5b03
|
||||
/*
|
||||
70 NN DECOMPRES S ION EXCEP TION SHORT ALGORITHM ID OF NN
|
||||
71 00 DECOMPRES S ION EXCEP TION LONG ALGORITHM ID
|
||||
*/
|
||||
|
||||
|
|
@ -1,424 +0,0 @@
|
|||
#include <stdint.h>
|
||||
#include <scsi_sense.h>
|
||||
#include <scsi_command.h>
|
||||
|
||||
#ifndef CC_BYTE_ALIGNED
|
||||
#ifdef __GNUC__
|
||||
#define CC_BYTE_ALIGNED __attribute__ ((packed))
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef CC_BYTE_ALIGNED
|
||||
#define CC_BYTE_ALIGNED
|
||||
#endif
|
||||
|
||||
#define HOST16_TO_BE_BYTES(x) {(((x) >> 8) & 0xff), ((x) & 0xff)}
|
||||
#define HOST24_TO_BE_BYTES(x) {(((x) >> 16) & 0xff), (((x) >> 8) & 0xff), \
|
||||
((x) & 0xff)}
|
||||
#define HOST32_TO_BE_BYTES(x) {(((x) >> 24) & 0xff), (((x) >> 16) & 0xff), \
|
||||
(((x) >> 8) & 0xff), ((x) & 0xff)}
|
||||
#define HOST40_TO_BE_BYTES(x) {(((x) >> 32) & 0xff), (((x) >> 24) & 0xff), (((x) >> 16) & 0xff), \
|
||||
(((x) >> 8) & 0xff), ((x) & 0xff)}
|
||||
|
||||
typedef uint8_t uint40_bytes[5];
|
||||
typedef uint8_t uint32_bytes[4];
|
||||
typedef uint8_t int24_bytes[3];
|
||||
typedef uint8_t uint24_bytes[3];
|
||||
typedef uint8_t uint16_bytes[2];
|
||||
|
||||
inline unsigned long
|
||||
be16_to_host(uint16_bytes bytes)
|
||||
{
|
||||
return bytes[0] << 8 | bytes[1];
|
||||
}
|
||||
|
||||
inline unsigned long
|
||||
be24_to_host(uint24_bytes bytes)
|
||||
{
|
||||
return bytes[0] << 16 | bytes[1] << 8 | bytes[2];
|
||||
}
|
||||
|
||||
inline long
|
||||
signed_be24_to_host(int24_bytes bytes)
|
||||
{
|
||||
return ((bytes[0] << 16 | bytes[1] << 8 | bytes[2]) ^ 0x800000) - 0x800000;
|
||||
}
|
||||
|
||||
|
||||
inline unsigned long
|
||||
be32_to_host(uint32_bytes bytes)
|
||||
{
|
||||
return (be16_to_host(bytes) << 16) | be16_to_host(bytes + 2);
|
||||
}
|
||||
|
||||
|
||||
#define BE16_TO_HOST(bytes) ((bytes)[0] << 8 | (bytes)[1])
|
||||
#define BE32_TO_HOST(bytes) \
|
||||
((BE16_TO_HOST(bytes) << 16) | BE16_TO_HOST((bytes)+2))
|
||||
|
||||
/* Flag field of INQUIRY command */
|
||||
#define SCSI_INQUIRY_FLAG_CMDDT 0x02
|
||||
#define SCSI_INQUIRY_FLAG_EVPD 0x01
|
||||
#define SCSI_INQUIRY_FLAG_LUN(a) ((a)<<5)
|
||||
|
||||
struct scsi_inquiry_cmd
|
||||
{
|
||||
uint8_t op_code;
|
||||
uint8_t flags;
|
||||
uint8_t page;
|
||||
uint8_t reserved;
|
||||
uint8_t allocation_length;
|
||||
uint8_t control;
|
||||
} CC_BYTE_ALIGNED;
|
||||
|
||||
/* Constant for the standard inquiry data */
|
||||
#define SCSI_STD_INQUIRY_CONNECTED 0x00
|
||||
#define SCSI_STD_INQUIRY_NOT_CONNECTED 0x20
|
||||
|
||||
#define SCSI_STD_INQUIRY_VERSION_NONE 0x00
|
||||
#define SCSI_STD_INQUIRY_VERSION_SCSI1 0x01
|
||||
#define SCSI_STD_INQUIRY_VERSION_SCSI2 0x02
|
||||
#define SCSI_STD_INQUIRY_VERSION_SPC2 0x04
|
||||
|
||||
#define SCSI_STD_INQUIRY_RESPONSE_DATA_FORMAT_SCSI1 0x00
|
||||
#define SCSI_STD_INQUIRY_RESPONSE_DATA_FORMAT_SCSI2 0x02
|
||||
|
||||
#define SCSI_STD_INQUIRY_TYPE_DIRECT_ACCESS 0x00
|
||||
#define SCSI_STD_INQUIRY_TYPE_SEQUENTIAL 0x01
|
||||
#define SCSI_STD_INQUIRY_TYPE_PRINTER 0x02
|
||||
#define SCSI_STD_INQUIRY_TYPE_PROCESSOR 0x03
|
||||
#define SCSI_STD_INQUIRY_TYPE_WRITE_ONCE 0x04
|
||||
#define SCSI_STD_INQUIRY_TYPE_CD_ROM 0x05
|
||||
#define SCSI_STD_INQUIRY_TYPE_SCANNER 0x06
|
||||
#define SCSI_STD_INQUIRY_TYPE_OPTICAL 0x07
|
||||
#define SCSI_STD_INQUIRY_TYPE_CHANGER 0x08
|
||||
#define SCSI_STD_INQUIRY_TYPE_COMM 0x09
|
||||
#define SCSI_STD_INQUIRY_TYPE_RAID 0x0C
|
||||
#define SCSI_STD_INQUIRY_TYPE_RBC 0x0E
|
||||
|
||||
#define SCSI_STD_INQUIRY_FLAG1_RMB 0x80
|
||||
|
||||
#define SCSI_STD_INQUIRY_FLAG2_AERC 0x80
|
||||
#define SCSI_STD_INQUIRY_FLAG2_AENC 0x80
|
||||
#define SCSI_STD_INQUIRY_FLAG2_NORMACA 0x20
|
||||
#define SCSI_STD_INQUIRY_FLAG2_HISUP 0x10
|
||||
#define SCSI_STD_INQUIRY_FLAG2_RESPONSE_FORMAT 0x02
|
||||
|
||||
#define SCSI_STD_INQUIRY_FLAG3_SCCS 0x80
|
||||
|
||||
#define SCSI_STD_INQUIRY_FLAG4_BQUE 0x80
|
||||
#define SCSI_STD_INQUIRY_FLAG4_ENCSERV 0x40
|
||||
#define SCSI_STD_INQUIRY_FLAG4_VS 0x20
|
||||
#define SCSI_STD_INQUIRY_FLAG4_MULTIP 0x10
|
||||
#define SCSI_STD_INQUIRY_FLAG4_MCHNGR 0x08
|
||||
#define SCSI_STD_INQUIRY_FLAG4_ADDR16 0x01
|
||||
|
||||
#define SCSI_STD_INQUIRY_FLAG5_RELADR 0x80
|
||||
#define SCSI_STD_INQUIRY_FLAG5_WBUS 0x20
|
||||
#define SCSI_STD_INQUIRY_FLAG5_SYNC 0x10
|
||||
#define SCSI_STD_INQUIRY_FLAG5_LINKED 0x08
|
||||
#define SCSI_STD_INQUIRY_FLAG5_CMDQUE 0x02
|
||||
|
||||
struct scsi_std_inquiry_data
|
||||
{
|
||||
uint8_t device;
|
||||
uint8_t flags1;
|
||||
uint8_t version;
|
||||
uint8_t flags2;
|
||||
uint8_t additional_length;
|
||||
uint8_t flags3;
|
||||
uint8_t flags4;
|
||||
uint8_t flags5;
|
||||
char vendor_id[8];
|
||||
char product_id[16];
|
||||
char product_rev[4];
|
||||
} CC_BYTE_ALIGNED;
|
||||
|
||||
struct scsi_vital_product_data_head
|
||||
{
|
||||
uint8_t device;
|
||||
uint8_t page;
|
||||
uint8_t reserved;
|
||||
uint8_t page_length;
|
||||
} CC_BYTE_ALIGNED;
|
||||
|
||||
struct scsi_identification_descriptor
|
||||
{
|
||||
uint8_t code_set;
|
||||
uint8_t identifier_type;
|
||||
uint8_t reserved;
|
||||
uint8_t identifier_length;
|
||||
};
|
||||
|
||||
struct scsi_request_sense_cmd
|
||||
{
|
||||
uint8_t op_code;
|
||||
uint8_t reserved1;
|
||||
uint8_t reserved2;
|
||||
uint8_t reserved3;
|
||||
uint8_t allocation_length;
|
||||
uint8_t control;
|
||||
} CC_BYTE_ALIGNED;
|
||||
|
||||
#define SCSI_SENSE_CURRENT_ERROR 0x70
|
||||
#define SCSI_SENSE_DEFERRED_ERROR 0x71
|
||||
#define SCSI_SENSE_INFORMATION_VALID 0x80
|
||||
#define SCSI_SENSE_FILEMARK 0x80
|
||||
#define SCSI_SENSE_EOM 0x40
|
||||
#define SCSI_SENSE_ILI 0x20
|
||||
|
||||
struct scsi_sense_data
|
||||
{
|
||||
uint8_t response_code;
|
||||
uint8_t obsolete;
|
||||
uint8_t sense_key;
|
||||
uint8_t information[4];
|
||||
uint8_t additional_length;
|
||||
uint8_t command_specific[4];
|
||||
uint8_t asc;
|
||||
uint8_t ascq;
|
||||
uint8_t unit_code;
|
||||
uint8_t sense_key_specific[3];
|
||||
} CC_BYTE_ALIGNED;
|
||||
|
||||
|
||||
/* Flag field of INQUIRY command */
|
||||
#define SCSI_MODE_SENSE_FLAG_DBD 0x08
|
||||
#define SCSI_MODE_SENSE_FLAG_LUN(a) ((a)<<5)
|
||||
|
||||
#define SCSI_MODE_SENSE_PC_CURRENT 0x00
|
||||
#define SCSI_MODE_SENSE_PC_CHANGEABLE 0x40
|
||||
#define SCSI_MODE_SENSE_PC_DEFAULT 0x80
|
||||
#define SCSI_MODE_SENSE_PC_SAVED 0xc0
|
||||
|
||||
struct scsi_mode_sence_6_cmd
|
||||
{
|
||||
uint8_t op_code;
|
||||
uint8_t flags;
|
||||
uint8_t page_code;
|
||||
uint8_t reserved;
|
||||
uint8_t allocation_length;
|
||||
uint8_t control;
|
||||
} CC_BYTE_ALIGNED;
|
||||
|
||||
struct scsi_mode_select_6_cmd
|
||||
{
|
||||
uint8_t op_code;
|
||||
uint8_t flags;
|
||||
uint8_t reserved1;
|
||||
uint8_t reserved2;
|
||||
uint8_t parameter_list_length;
|
||||
uint8_t control;
|
||||
};
|
||||
|
||||
#define SCSI_MODE_PARAM_WP 0x80
|
||||
#define SCSI_MODE_PARAM_BUFFERED_MODE_SYNC 0x00
|
||||
#define SCSI_MODE_PARAM_BUFFERED_MODE_ASYNC 0x10
|
||||
#define SCSI_MODE_PARAM_BUFFERED_MODE_ALL_SYNC 0x10
|
||||
#define SCSI_MODE_PARAM_SPEED_DEFAULT 0x00
|
||||
#define SCSI_MODE_PARAM_SPEED_LOWEST 0x01
|
||||
#define SCSI_MODE_PARAM_SPEED_HIGHEST 0x0f
|
||||
|
||||
struct scsi_mode_parameter_header_6
|
||||
{
|
||||
uint8_t mode_data_length;
|
||||
uint8_t medium_type;
|
||||
uint8_t device_specific_parameter;
|
||||
uint8_t block_descriptor_length;
|
||||
} CC_BYTE_ALIGNED;
|
||||
|
||||
#define SCSI_DENSITY_9_800 0x01
|
||||
#define SCSI_DENSITY_9_1600 0x02
|
||||
#define SCSI_DENSITY_9_6250 0x03
|
||||
#define SCSI_DENSITY_4_9_8000 0x05
|
||||
#define SCSI_DENSITY_9_3200 0x06
|
||||
#define SCSI_DENSITY_4_6400 0x07
|
||||
#define SCSI_DENSITY_4_8000 0x08
|
||||
#define SCSI_DENSITY_18_37871 0x09
|
||||
#define SCSI_DENSITY_22_6667 0x0a
|
||||
#define SCSI_DENSITY_4_1600 0x0b
|
||||
#define SCSI_DENSITY_24_12690 0x0c
|
||||
#define SCSI_DENSITY_24_25380 0xd
|
||||
#define SCSI_DENSITY_15_10000 0x0f
|
||||
#define SCSI_DENSITY_18_10000 0x10
|
||||
#define SCSI_DENSITY_26_16000 0x11
|
||||
#define SCSI_DENSITY_30_51667 0x12
|
||||
#define SCSI_DENSITY_1_2400 0x13
|
||||
#define SCSI_DENSITY_1_43245 0x14
|
||||
#define SCSI_DENSITY_1_45434 0x15
|
||||
#define SCSI_DENSITY_48_10000 0x16
|
||||
#define SCSI_DENSITY_48_42500 0x17
|
||||
|
||||
|
||||
struct scsi_mode_parameter_block_descriptor
|
||||
{
|
||||
uint8_t density_code;
|
||||
uint24_bytes number_of_blocks;
|
||||
uint8_t reserved;
|
||||
uint24_bytes block_length;
|
||||
} CC_BYTE_ALIGNED;
|
||||
|
||||
|
||||
#define SCSI_MODE_PAGE_PS 0x80
|
||||
#define SCSI_MODE_PAGE_CONTROL_MODE 0x0a
|
||||
#define SCSI_MODE_PAGE_DEVICE_CONFIGURATION 0x10
|
||||
#define SCSI_MODE_PAGE_CONNECT 0x02
|
||||
#define SCSI_MODE_PAGE_MEDIUM_PARTITION_1 0x11
|
||||
#define SCSI_MODE_PAGE_MEDIUM_PARTITION_2 0x12
|
||||
#define SCSI_MODE_PAGE_MEDIUM_PARTITION_3 0x13
|
||||
#define SCSI_MODE_PAGE_MEDIUM_PARTITION_4 0x14
|
||||
#define SCSI_MODE_PAGE_PERIPHERIAL_DEVICE 0x09
|
||||
#define SCSI_MODE_PAGE_RW_ERROR_RECOVERY 0x01
|
||||
#define SCSI_MODE_PAGE_VENDOR_SPECIFIC 0x00
|
||||
#define SCSI_MODE_PAGE_ALL_PAGES 0x3f
|
||||
|
||||
struct scsi_mode_page_header
|
||||
{
|
||||
uint8_t page_code;
|
||||
uint8_t page_length;
|
||||
} CC_BYTE_ALIGNED;
|
||||
|
||||
#define SCSI_MODE_PAGE_CONTROL_FLAGS1_RLEC 0x01
|
||||
#define SCSI_MODE_PAGE_CONTROL_FLAGS2_QERR 0x02
|
||||
#define SCSI_MODE_PAGE_CONTROL_FLAGS2_DQUE 0x02
|
||||
#define SCSI_MODE_PAGE_CONTROL_FLAGS2_RESTRICED_REORDERING 0x00
|
||||
#define SCSI_MODE_PAGE_CONTROL_FLAGS2_UNRESTRICED_REORDERING 0x01
|
||||
#define SCSI_MODE_PAGE_CONTROL_FLAGS3_EECA 0x80
|
||||
#define SCSI_MODE_PAGE_CONTROL_FLAGS3_UAAENP 0x02
|
||||
#define SCSI_MODE_PAGE_CONTROL_FLAGS3_EAENP 0x01
|
||||
|
||||
struct scsi_mode_page_control
|
||||
{
|
||||
struct scsi_mode_page_header header;
|
||||
uint8_t flags1;
|
||||
uint8_t flags2;
|
||||
uint8_t flags3;
|
||||
uint8_t reserved;
|
||||
uint16_bytes ready_AEN_holdoff_period;
|
||||
} CC_BYTE_ALIGNED;
|
||||
|
||||
#define SCSI_MODE_PAGE_CONNECT_FLAGS_DTDC_NONE 0x00
|
||||
#define SCSI_MODE_PAGE_CONNECT_FLAGS_DTDC_TRANSFERRED 0x01
|
||||
#define SCSI_MODE_PAGE_CONNECT_FLAGS_DTDC_COMPLETE 0x03
|
||||
|
||||
struct scsi_mode_page_connect
|
||||
{
|
||||
struct scsi_mode_page_header header;
|
||||
uint8_t buffer_full_ratio;
|
||||
uint8_t buffer_empty_ratio;
|
||||
uint16_bytes bus_inactivity_limit;
|
||||
uint16_bytes disconnect_time_limit;
|
||||
uint16_bytes connect_time_limit;
|
||||
uint16_bytes maximum_burst_size;
|
||||
uint8_t flags;
|
||||
uint8_t reserved[3];
|
||||
} CC_BYTE_ALIGNED;
|
||||
|
||||
struct scsi_mode_page_peripherial_device
|
||||
{
|
||||
struct scsi_mode_page_header header;
|
||||
uint16_bytes interface_identifier;
|
||||
uint8_t reserved[4];
|
||||
uint16_bytes maximum_burst_size;
|
||||
} CC_BYTE_ALIGNED;
|
||||
|
||||
#define SCSI_MODE_PAGE_DEV_CONF_CAF 0x02
|
||||
#define SCSI_MODE_PAGE_DEV_CONF_CAP 0x04
|
||||
#define SCSI_MODE_PAGE_DEV_CONF_FLAGS1_REW 0x01
|
||||
#define SCSI_MODE_PAGE_DEV_CONF_FLAGS1_RBO 0x02
|
||||
#define SCSI_MODE_PAGE_DEV_CONF_FLAGS1_SOCF_IGNORE 0x00
|
||||
#define SCSI_MODE_PAGE_DEV_CONF_FLAGS1_SOCF_1 0x04
|
||||
#define SCSI_MODE_PAGE_DEV_CONF_FLAGS1_SOCF_2 0x08
|
||||
#define SCSI_MODE_PAGE_DEV_CONF_FLAGS1_SOCF_3 0xc0
|
||||
#define SCSI_MODE_PAGE_DEV_CONF_FLAGS1_AVC 0x10
|
||||
#define SCSI_MODE_PAGE_DEV_CONF_FLAGS1_RSMK 0x20
|
||||
#define SCSI_MODE_PAGE_DEV_CONF_FLAGS1_BIS 0x40
|
||||
#define SCSI_MODE_PAGE_DEV_CONF_FLAGS1_DBR 0x40
|
||||
#define SCSI_MODE_PAGE_DEV_CONF_FLAGS2_SEW 0x08
|
||||
#define SCSI_MODE_PAGE_DEV_CONF_FLAGS2_EEG 0x10
|
||||
#define SCSI_MODE_PAGE_DEV_CONF_FLAGS2_EOD_DEFAULT 0x00
|
||||
#define SCSI_MODE_PAGE_DEV_CONF_FLAGS2_EOD_ERASE_AREA 0x20
|
||||
#define SCSI_MODE_PAGE_DEV_CONF_FLAGS2_EOD_SOCF 0x40
|
||||
#define SCSI_MODE_PAGE_DEV_CONF_FLAGS2_EOD_NONE 0x60
|
||||
|
||||
#define SCSI_MODE_PAGE_DEV_CONF_COMPR_NONE 0x00
|
||||
#define SCSI_MODE_PAGE_DEV_CONF_COMPR_DEFAULT 0x01
|
||||
|
||||
struct scsi_mode_page_device_configuration
|
||||
{
|
||||
struct scsi_mode_page_header header;
|
||||
uint8_t active_format;
|
||||
uint8_t active_partition;
|
||||
uint8_t write_buffer_full_ratio;
|
||||
uint8_t read_buffer_empty_ratio;
|
||||
uint16_bytes write_delay_time;
|
||||
uint8_t flags1;
|
||||
uint8_t gap_size;
|
||||
uint8_t flags2;
|
||||
uint24_bytes buffer_size_at_early_warning;
|
||||
uint8_t select_data_compression;
|
||||
uint8_t reserved;
|
||||
};
|
||||
|
||||
struct scsi_read_buffer_limits_cmd
|
||||
{
|
||||
uint8_t op_code;
|
||||
uint8_t lun;
|
||||
uint8_t reserved[3];
|
||||
uint8_t control;
|
||||
} CC_BYTE_ALIGNED;
|
||||
|
||||
struct scsi_read_buffer_limits_data
|
||||
{
|
||||
uint8_t reserved;
|
||||
uint24_bytes maximum_block_length_limit;
|
||||
uint16_bytes minimum_block_length_limit;
|
||||
} CC_BYTE_ALIGNED;
|
||||
|
||||
#define SCSI_READ_FLAGS_FIXED 0x01
|
||||
#define SCSI_READ_FLAGS_SILI 0x02
|
||||
|
||||
struct scsi_read_6_cmd
|
||||
{
|
||||
uint8_t op_code;
|
||||
uint8_t flags;
|
||||
uint24_bytes transfer_length;
|
||||
uint8_t control;
|
||||
} CC_BYTE_ALIGNED;
|
||||
|
||||
#define SCSI_WRITE_FLAGS_FIXED 0x01
|
||||
|
||||
struct scsi_write_6_cmd
|
||||
{
|
||||
uint8_t op_code;
|
||||
uint8_t flags;
|
||||
uint24_bytes transfer_length;
|
||||
uint8_t control;
|
||||
} CC_BYTE_ALIGNED;
|
||||
|
||||
#define SCSI_WRITE_FILEMARKS_FLAGS_IMMED 0x01
|
||||
#define SCSI_WRITE_FILEMARKS_FLAGS_WSMK 0x02
|
||||
|
||||
struct scsi_write_filemarks_6_cmd
|
||||
{
|
||||
uint8_t op_code;
|
||||
uint8_t flags;
|
||||
int24_bytes transfer_length;
|
||||
uint8_t control;
|
||||
} CC_BYTE_ALIGNED;
|
||||
|
||||
#define SCSI_SPACE_FLAGS_CODE 0x07
|
||||
#define SCSI_SPACE_FLAGS_CODE_BLOCKS 0x00
|
||||
#define SCSI_SPACE_FLAGS_CODE_FILEMARKS 0x01
|
||||
#define SCSI_SPACE_FLAGS_CODE_SEQ_FILEMARKS 0x02
|
||||
#define SCSI_SPACE_FLAGS_CODE_END_OF_DATA 0x03
|
||||
#define SCSI_SPACE_FLAGS_CODE_SETMARKS 0x04
|
||||
#define SCSI_SPACE_FLAGS_CODE_SEQ_SETMARKS 0x05
|
||||
|
||||
struct scsi_space_cmd
|
||||
{
|
||||
uint8_t op_code;
|
||||
uint8_t flags;
|
||||
int24_bytes transfer_length;
|
||||
uint8_t control;
|
||||
} CC_BYTE_ALIGNED;
|
|
@ -1,112 +0,0 @@
|
|||
/* SCSI operation codes */
|
||||
/* From SPC-2 */
|
||||
#define SCSI_CMD_EXTENDED_COPY 0x83
|
||||
#define SCSI_CMD_INQUIRY 0x12
|
||||
#define SCSI_CMD_LOG_SELECT 0x4C
|
||||
#define SCSI_CMD_LOG_SENSE 0x4D
|
||||
#define SCSI_CMD_MODE_SELECT_6 0x15
|
||||
#define SCSI_CMD_MODE_SELECT_10 0x55
|
||||
#define SCSI_CMD_MODE_SENSE_6 0x1A
|
||||
#define SCSI_CMD_MODE_SENSE_10 0x5A
|
||||
#define SCSI_CMD_MOVE_MEDIUM_ATTACHED 0xA7
|
||||
#define SCSI_CMD_PERSISTENT_RESERVE_IN 0x5E
|
||||
#define SCSI_CMD_PERSISTENT RESERVE OUT 0x5F
|
||||
#define SCSI_CMD_PREVENT_ALLOW_MEDIUM_REMOVAL 0x1E
|
||||
#define SCSI_CMD_READ_BUFFER 0x3C
|
||||
#define SCSI_CMD_READ_ELEMENT_STATUS_ATTACHED 0xB4
|
||||
#define SCSI_CMD_RECEIVE_COPY_RESULTS 0x84
|
||||
#define SCSI_CMD_RECEIVE_DIAGNOSTIC_RESULTS 0x1C
|
||||
#define SCSI_CMD_RELEASE_10 0x57
|
||||
#define SCSI_CMD_RELEASE_6 0x17
|
||||
#define SCSI_CMD_REPORT_DEVICE_IDENTIFIER 0xA3
|
||||
#define SCSI_CMD_REPORT_LUNS 0xA0
|
||||
#define SCSI_CMD_REQUEST_SENSE 0x03
|
||||
#define SCSI_CMD_RESERVE_10 0x56
|
||||
#define SCSI_CMD_RESERVE_6 0x16
|
||||
#define SCSI_CMD_SEND_DIAGNOSTIC 0x1D
|
||||
#define SCSI_CMD_SET_DEVICE_IDENTIFIER 0xA4
|
||||
#define SCSI_CMD_TEST_UNIT_READY 0x00
|
||||
#define SCSI_CMD_WRITE_BUFFER 0x3B
|
||||
|
||||
/* Flag field of INQUIRY command */
|
||||
#define SCSI_INQUIRY_FLAG_CMDDT 0x02
|
||||
#define SCSI_INQUIRY_FLAG_EVPD 0x01
|
||||
|
||||
/* Constant for the standard inquiry data */
|
||||
#define SCSI_STD_INQUIRY_CONNECTED 0x00
|
||||
#define SCSI_STD_INQUIRY_NOT_CONNECTED 0x20
|
||||
|
||||
#define SCSI_STD_INQUIRY_VERSION_NONE 0x00
|
||||
#define SCSI_STD_INQUIRY_VERSION_SPC2 0x04
|
||||
|
||||
#define SCSI_STD_INQUIRY_TYPE_DIRECT_ACCESS 0x00
|
||||
#define SCSI_STD_INQUIRY_TYPE_SEQUENTIAL 0x01
|
||||
#define SCSI_STD_INQUIRY_TYPE_PRINTER 0x02
|
||||
#define SCSI_STD_INQUIRY_TYPE_PROCESSOR 0x03
|
||||
#define SCSI_STD_INQUIRY_TYPE_WRITE_ONCE 0x04
|
||||
#define SCSI_STD_INQUIRY_TYPE_CD_ROM 0x05
|
||||
#define SCSI_STD_INQUIRY_TYPE_SCANNER 0x06
|
||||
#define SCSI_STD_INQUIRY_TYPE_OPTICAL 0x07
|
||||
#define SCSI_STD_INQUIRY_TYPE_CHANGER 0x08
|
||||
#define SCSI_STD_INQUIRY_TYPE_COMM 0x09
|
||||
#define SCSI_STD_INQUIRY_TYPE_RAID 0x0C
|
||||
#define SCSI_STD_INQUIRY_TYPE_RBC 0x0E
|
||||
|
||||
#define SCSI_STD_INQUIRY_FLAG1_RMB 0x80
|
||||
|
||||
#define SCSI_STD_INQUIRY_FLAG2_AERC 0x80
|
||||
#define SCSI_STD_INQUIRY_FLAG2_NORMACA 0x20
|
||||
#define SCSI_STD_INQUIRY_FLAG2_HISUP 0x10
|
||||
#define SCSI_STD_INQUIRY_FLAG2_RESPONSE_FORMAT 0x02
|
||||
|
||||
#define SCSI_STD_INQUIRY_FLAG3_SCCS 0x80
|
||||
|
||||
#define SCSI_STD_INQUIRY_FLAG4_BQUE 0x80
|
||||
#define SCSI_STD_INQUIRY_FLAG4_ENCSERV 0x40
|
||||
#define SCSI_STD_INQUIRY_FLAG4_VS 0x20
|
||||
#define SCSI_STD_INQUIRY_FLAG4_MULTIP 0x10
|
||||
#define SCSI_STD_INQUIRY_FLAG4_MCHNGR 0x08
|
||||
#define SCSI_STD_INQUIRY_FLAG4_ADDR16 0x01
|
||||
|
||||
#define SCSI_STD_INQUIRY_FLAG5_RELADR 0x80
|
||||
#define SCSI_STD_INQUIRY_FLAG5_WBUS 0x20
|
||||
#define SCSI_STD_INQUIRY_FLAG5_SYNC 0x10
|
||||
#define SCSI_STD_INQUIRY_FLAG5_LINKED 0x08
|
||||
#define SCSI_STD_INQUIRY_FLAG5_CMDQUE 0x02
|
||||
|
||||
#define SCSI_SENSE_CURRENT_ERROR 0x70
|
||||
#define SCSI_SENSE_DEFERRED_ERROR 0x71
|
||||
#define SCSI_SENSE_INFORMATION_VALID 0x80
|
||||
#define SCSI_SENSE_FILEMARK 0x80
|
||||
#define SCSI_SENSE_EOM 0x40
|
||||
#define SCSI_SENSE_ILI 0x20
|
||||
|
||||
#define SCSI_PAGE_DEVICE_IDENTIFICATION 0x83
|
||||
#define SCSI_PAGE_SUPPORTED_PAGES 0x00
|
||||
#define SCSI_PAGE_UNIT_SERIAL_NUMBER 0x80
|
||||
|
||||
#define SCSI_CODE_SET_BINARY 0x01
|
||||
#define SCSI_CODE_SET_ACSII 0x02
|
||||
|
||||
#define SCSI_ASSOCIATION_DEVICE 0x00
|
||||
#define SCSI_ASSOCIATION_PORT 0x10
|
||||
|
||||
#define SCSI_IDENTIFIER_TYPE_NON_UNIQUE 0x00
|
||||
#define SCSI_IDENTIFIER_TYPE_VENDORID 0x01
|
||||
#define SCSI_IDENTIFIER_TYPE_EUI_64 0x02
|
||||
#define SCSI_IDENTIFIER_TYPE_FC_FS 0x03
|
||||
#define SCSI_IDENTIFIER_TYPE_PORT 0x04
|
||||
|
||||
/* Mode parameters */
|
||||
#define SCSI_MODE_PAGE_SP 0x80
|
||||
#define SCSI_MODE_SELECT_PF 0x10
|
||||
#define SCSI_MODE_SELECT_SP 0x01
|
||||
#define SCSI_MODE_SENSE_DBD 0x08
|
||||
#define SCSI_MODE_SENSE_PAGE_CODE_MASK 0x3f
|
||||
#define SCSI_MODE_SENSE_PC_CURRENT 0x00
|
||||
#define SCSI_MODE_SENSE_PC_CHANGEABLE 0x40
|
||||
#define SCSI_MODE_SENSE_PC_DEFAULT 0x80
|
||||
#define SCSI_MODE_SENSE_PC_SAVED 0xc0
|
||||
#define SCSI_MODE_SENSE_ALL_PAGES 0x3f
|
||||
|
||||
|
|
@ -1,139 +0,0 @@
|
|||
#ifndef SPC2_STRUCT_H_6R1KTJP0NJ__
|
||||
#define SPC2_STRUCT_H_6R1KTJP0NJ__
|
||||
|
||||
typedef uint8_t uint40_bytes[5];
|
||||
typedef uint8_t uint32_bytes[4];
|
||||
typedef uint8_t uint16_bytes[2];
|
||||
|
||||
#ifndef CC_BYTE_ALIGNED
|
||||
#ifdef __GNUC__
|
||||
#define CC_BYTE_ALIGNED __attribute__ ((packed))
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef CC_BYTE_ALIGNED
|
||||
#define CC_BYTE_ALIGNED
|
||||
#endif
|
||||
|
||||
#define HOST16_TO_BE_BYTES(x) {(((x) >> 8) & 0xff), ((x) & 0xff)}
|
||||
#define HOST32_TO_BE_BYTES(x) {(((x) >> 24) & 0xff), (((x) >> 16) & 0xff), \
|
||||
(((x) >> 8) & 0xff), ((x) & 0xff)}
|
||||
#define HOST40_TO_BE_BYTES(x) {(((x) >> 32) & 0xff), (((x) >> 24) & 0xff), (((x) >> 16) & 0xff), \
|
||||
(((x) >> 8) & 0xff), ((x) & 0xff)}
|
||||
|
||||
inline unsigned long
|
||||
be16_to_host(uint16_bytes bytes)
|
||||
{
|
||||
return bytes[0] << 8 | bytes[1];
|
||||
}
|
||||
|
||||
inline unsigned long
|
||||
be32_to_host(uint32_bytes bytes)
|
||||
{
|
||||
return (be16_to_host(bytes) << 16) | be16_to_host(bytes + 2);
|
||||
}
|
||||
|
||||
|
||||
#define BE16_TO_HOST(bytes) ((bytes)[0] << 8 | (bytes)[1])
|
||||
#define BE32_TO_HOST(bytes) \
|
||||
((BE16_TO_HOST(bytes) << 16) | BE16_TO_HOST((bytes)+2))
|
||||
struct spc2_inquiry_cmd
|
||||
{
|
||||
uint8_t op_code;
|
||||
uint8_t flags;
|
||||
uint8_t page;
|
||||
uint8_t reserved;
|
||||
uint8_t allocation_length;
|
||||
uint8_t control;
|
||||
} CC_BYTE_ALIGNED;
|
||||
|
||||
struct spc2_std_inquiry_data
|
||||
{
|
||||
uint8_t device;
|
||||
uint8_t flags1;
|
||||
uint8_t version;
|
||||
uint8_t flags2;
|
||||
uint8_t additional_length;
|
||||
uint8_t flags3;
|
||||
uint8_t flags4;
|
||||
uint8_t flags5;
|
||||
char vendor_id[8];
|
||||
char product_id[16];
|
||||
char product_rev[4];
|
||||
} CC_BYTE_ALIGNED;
|
||||
|
||||
struct spc2_vital_product_data_head
|
||||
{
|
||||
uint8_t device;
|
||||
uint8_t page;
|
||||
uint8_t reserved;
|
||||
uint8_t page_length;
|
||||
} CC_BYTE_ALIGNED;
|
||||
|
||||
struct spc2_identification_descriptor
|
||||
{
|
||||
uint8_t code_set;
|
||||
uint8_t identifier_type;
|
||||
uint8_t reserved;
|
||||
uint8_t identifier_length;
|
||||
};
|
||||
|
||||
struct spc2_request_sense_cmd
|
||||
{
|
||||
uint8_t op_code;
|
||||
uint8_t reserved1;
|
||||
uint8_t reserved2;
|
||||
uint8_t reserved3;
|
||||
uint8_t allocation_length;
|
||||
uint8_t control;
|
||||
} CC_BYTE_ALIGNED;
|
||||
|
||||
struct spc2_sense_data
|
||||
{
|
||||
uint8_t response_code;
|
||||
uint8_t obsolete;
|
||||
uint8_t sense_key;
|
||||
uint8_t information[4];
|
||||
uint8_t additional_length;
|
||||
uint8_t command_specific[4];
|
||||
uint8_t asc;
|
||||
uint8_t ascq;
|
||||
uint8_t unit_code;
|
||||
uint8_t sense_key_specific[3];
|
||||
} CC_BYTE_ALIGNED;
|
||||
|
||||
struct spc2_mode_sence_6_cmd
|
||||
{
|
||||
uint8_t op_code;
|
||||
uint8_t flags;
|
||||
uint8_t page_code;
|
||||
uint8_t reserved;
|
||||
uint8_t allocation_length;
|
||||
uint8_t control;
|
||||
} CC_BYTE_ALIGNED;
|
||||
|
||||
struct spc2_mode_select_6_cmd
|
||||
{
|
||||
uint8_t op_code;
|
||||
uint8_t flags;
|
||||
uint8_t reserved1;
|
||||
uint8_t reserved2;
|
||||
uint8_t parameter_list_length;
|
||||
uint8_t control;
|
||||
};
|
||||
|
||||
struct spc2_mode_parameter_header_6
|
||||
{
|
||||
uint8_t mode_data_length;
|
||||
uint8_t medium_type;
|
||||
uint8_t device_specific_parameter;
|
||||
uint8_t block_descriptor_length;
|
||||
} CC_BYTE_ALIGNED;
|
||||
|
||||
struct spc2_mode_page
|
||||
{
|
||||
uint8_t page_code;
|
||||
uint8_t page_length;
|
||||
} CC_BYTE_ALIGNED;
|
||||
|
||||
#endif /* SPC2_STRUCT_H_6R1KTJP0NJ__ */
|
|
@ -1,531 +0,0 @@
|
|||
#include "usb-msc-bulk.h"
|
||||
#include <usb-api.h>
|
||||
#include <usb-core.h>
|
||||
#include <sys/process.h>
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
|
||||
#define DEBUG
|
||||
|
||||
#ifdef DEBUG
|
||||
#define PRINTF(...) printf(__VA_ARGS__)
|
||||
#else
|
||||
#define PRINTF(...)
|
||||
#endif
|
||||
|
||||
static const uint8_t max_lun = 0;
|
||||
|
||||
static USBBuffer data_usb_buffer[USB_MSC_BUFFERS];
|
||||
static unsigned int buffer_lengths[USB_MSC_BUFFERS];
|
||||
|
||||
static unsigned int buf_first = 0; /* First prepared buffer */
|
||||
static unsigned int buf_free = 0; /* First free buffer */
|
||||
static unsigned int buf_submitted = 0; /* Oldest submitted buffer */
|
||||
|
||||
#define USB_BUFFER_ID_UNUSED 0
|
||||
#define USB_BUFFER_ID_CBW 1
|
||||
#define USB_BUFFER_ID_CSW 2
|
||||
#define USB_BUFFER_ID_DATA 3
|
||||
#define USB_BUFFER_ID_DISCARD 4
|
||||
#define USB_BUFFER_ID_HALT 5
|
||||
#define USB_BUFFER_ID_MASK 0x07
|
||||
|
||||
static struct usb_msc_bulk_cbw cbw_buffer;
|
||||
static struct usb_msc_bulk_csw csw_buffer;
|
||||
|
||||
#define BULK_OUT 0x02
|
||||
#define BULK_IN 0x81
|
||||
|
||||
PROCESS(usb_mass_bulk_process, "USB mass storage bulk only process");
|
||||
|
||||
static process_event_t reset_event;
|
||||
|
||||
static struct usb_msc_command_state state;
|
||||
|
||||
/* Handle wrapping */
|
||||
#define PREV_BUF(x) (((x) == 0) ? USB_MSC_BUFFERS - 1 : (x) - 1)
|
||||
#define NEXT_BUF(x) (((x) < (USB_MSC_BUFFERS-1)) ? (x) + 1 : 0)
|
||||
void
|
||||
usb_msc_send_data_buf_flags(const uint8_t *data, unsigned int len,
|
||||
unsigned int flags, uint16_t buf_flags)
|
||||
{
|
||||
USBBuffer *buffer = &data_usb_buffer[buf_free];
|
||||
if (buffer->id != USB_BUFFER_ID_UNUSED) {
|
||||
printf("Data IN buffer busy\n");
|
||||
return;
|
||||
}
|
||||
buffer->flags = USB_BUFFER_NOTIFY | buf_flags;
|
||||
buffer->next = NULL;
|
||||
buffer->data = (uint8_t*)data;
|
||||
buffer->left = len;
|
||||
buffer_lengths[buf_free] = len;
|
||||
buffer->id = USB_BUFFER_ID_DATA | flags;
|
||||
if (buf_free != buf_first) {
|
||||
data_usb_buffer[PREV_BUF(buf_free)].next = buffer;
|
||||
}
|
||||
state.cmd_data_submitted += len;
|
||||
buf_free = NEXT_BUF(buf_free);
|
||||
/* PRINTF("usb_msc_send_data: %d\n", len); */
|
||||
if (flags & USB_MSC_DATA_SEND) {
|
||||
usb_submit_xmit_buffer(BULK_IN, &data_usb_buffer[buf_first]);
|
||||
buf_first = buf_free;
|
||||
/* PRINTF("usb_msc_send_data: sent\n"); */
|
||||
} else if (flags & USB_MSC_DATA_LAST) {
|
||||
/* Cancel transmission */
|
||||
PRINTF("Send last\n");
|
||||
buf_first = buf_free;
|
||||
process_poll(&usb_mass_bulk_process);
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
usb_msc_send_data(const uint8_t *data, unsigned int len, unsigned int flags)
|
||||
{
|
||||
usb_msc_send_data_buf_flags(data, len, flags,0);
|
||||
}
|
||||
|
||||
void
|
||||
usb_msc_receive_data_buf_flags(uint8_t *data, unsigned int len,
|
||||
unsigned int flags, uint16_t buf_flags)
|
||||
{
|
||||
USBBuffer *buffer = &data_usb_buffer[buf_free];
|
||||
if (buffer->id != USB_BUFFER_ID_UNUSED) {
|
||||
printf("Data OUT buffer busy\n");
|
||||
return;
|
||||
}
|
||||
buffer->flags = USB_BUFFER_NOTIFY | buf_flags;
|
||||
buffer->next = NULL;
|
||||
buffer->data = data;
|
||||
buffer->left = len;
|
||||
buffer_lengths[buf_free] = len;
|
||||
buffer->id = USB_BUFFER_ID_DATA | flags;
|
||||
if (buf_free != buf_first) {
|
||||
data_usb_buffer[PREV_BUF(buf_free)].next = buffer;
|
||||
}
|
||||
state.cmd_data_submitted += len;
|
||||
buf_free = NEXT_BUF(buf_free);
|
||||
if (flags & USB_MSC_DATA_RECEIVE) {
|
||||
usb_submit_recv_buffer(BULK_OUT, &data_usb_buffer[buf_first]);
|
||||
buf_first = buf_free;
|
||||
} else if (flags & USB_MSC_DATA_LAST) {
|
||||
usb_discard_all_buffers(BULK_OUT);
|
||||
/* Mark the discarded buffers as unused */
|
||||
while(buf_submitted != PREV_BUF(buf_free)) {
|
||||
data_usb_buffer[buf_submitted].id = USB_BUFFER_ID_UNUSED;
|
||||
buf_submitted = NEXT_BUF(buf_submitted);
|
||||
}
|
||||
buf_first = buf_free;
|
||||
process_poll(&usb_mass_bulk_process);
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
usb_msc_receive_data(uint8_t *data, unsigned int len, unsigned int flags)
|
||||
{
|
||||
usb_msc_receive_data_buf_flags(data,len,flags, 0);
|
||||
}
|
||||
|
||||
static unsigned int
|
||||
handle_mass_bulk_requests()
|
||||
{
|
||||
switch(usb_setup_buffer.bmRequestType) {
|
||||
case 0x21: /* interface OUT requests */
|
||||
switch(usb_setup_buffer.bRequest) {
|
||||
case MASS_BULK_RESET:
|
||||
PRINTF("Mass storage reset\n");
|
||||
process_post(&usb_mass_bulk_process, reset_event, NULL);
|
||||
return 1;
|
||||
}
|
||||
break;
|
||||
case 0xa1: /* interface IN requests */
|
||||
switch(usb_setup_buffer.bRequest) {
|
||||
case MASS_BULK_GET_MAX_LUN:
|
||||
PRINTF("Get LUN\n");
|
||||
usb_send_ctrl_response(&max_lun, sizeof(max_lun));
|
||||
return 1;
|
||||
}
|
||||
break;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct USBRequestHandler mass_bulk_request_handler =
|
||||
{
|
||||
0x21, 0x7f,
|
||||
0x00, 0x00,
|
||||
handle_mass_bulk_requests
|
||||
};
|
||||
|
||||
static struct USBRequestHandlerHook mass_bulk_request_hook =
|
||||
{
|
||||
NULL,
|
||||
&mass_bulk_request_handler
|
||||
};
|
||||
|
||||
static void
|
||||
send_csw(void)
|
||||
{
|
||||
USBBuffer *buffer = &data_usb_buffer[buf_free];
|
||||
if (buffer->id != USB_BUFFER_ID_UNUSED) {
|
||||
printf("CSW buffer busy\n");
|
||||
return;
|
||||
}
|
||||
|
||||
csw_buffer.dCSWSignature = MASS_BULK_CSW_SIGNATURE;
|
||||
csw_buffer.dCSWTag = cbw_buffer.dCBWTag;
|
||||
csw_buffer.dCSWDataResidue =
|
||||
cbw_buffer.dCBWDataTransferLength - state.cmd_data_submitted;
|
||||
csw_buffer.bCSWStatus = state.status;
|
||||
|
||||
buffer->flags = USB_BUFFER_NOTIFY;
|
||||
buffer->next = NULL;
|
||||
buffer->data =(uint8_t*)&csw_buffer ;
|
||||
buffer->left = sizeof(csw_buffer);
|
||||
buffer->id = USB_BUFFER_ID_CSW;
|
||||
if (buf_free != buf_first) {
|
||||
data_usb_buffer[PREV_BUF(buf_free)].next = buffer;
|
||||
}
|
||||
buf_free = NEXT_BUF(buf_free);
|
||||
usb_submit_xmit_buffer(BULK_IN, &data_usb_buffer[buf_first]);
|
||||
buf_first = buf_free;
|
||||
|
||||
PRINTF("CSW sent: %ld\n", sizeof(csw_buffer));
|
||||
}
|
||||
|
||||
static void
|
||||
submit_cbw_buffer(void)
|
||||
{
|
||||
USBBuffer *buffer = &data_usb_buffer[buf_free];
|
||||
if (buffer->id != USB_BUFFER_ID_UNUSED) {
|
||||
printf("CBW buffer busy\n");
|
||||
return;
|
||||
}
|
||||
buffer->flags = USB_BUFFER_NOTIFY;
|
||||
buffer->next = NULL;
|
||||
buffer->data = (uint8_t*)&cbw_buffer;
|
||||
buffer->left = sizeof(cbw_buffer);
|
||||
buffer->id = USB_BUFFER_ID_CBW;
|
||||
if (buf_free != buf_first) {
|
||||
data_usb_buffer[PREV_BUF(buf_free)].next = buffer;
|
||||
}
|
||||
buf_free = NEXT_BUF(buf_free);
|
||||
usb_submit_recv_buffer(BULK_OUT, &data_usb_buffer[buf_first]);
|
||||
PRINTF("CBW submitted: %d\n", buf_first);
|
||||
buf_first = buf_free;
|
||||
}
|
||||
|
||||
static void
|
||||
submit_halt(uint8_t addr)
|
||||
{
|
||||
USBBuffer *buffer = &data_usb_buffer[buf_free];
|
||||
if (buffer->id != USB_BUFFER_ID_UNUSED) {
|
||||
printf("CBW buffer busy\n");
|
||||
return;
|
||||
}
|
||||
buffer->flags = USB_BUFFER_NOTIFY | USB_BUFFER_HALT;
|
||||
buffer->next = NULL;
|
||||
buffer->data = NULL;
|
||||
buffer->left = 0;
|
||||
buffer->id = USB_BUFFER_ID_HALT;
|
||||
if (buf_free != buf_first) {
|
||||
data_usb_buffer[PREV_BUF(buf_free)].next = buffer;
|
||||
}
|
||||
buf_free = NEXT_BUF(buf_free);
|
||||
if (addr & 0x80) {
|
||||
usb_submit_xmit_buffer(addr, &data_usb_buffer[buf_first]);
|
||||
} else {
|
||||
usb_submit_recv_buffer(addr, &data_usb_buffer[buf_first]);
|
||||
}
|
||||
PRINTF("HALT submitted %p\n",buffer);
|
||||
buf_first = buf_free;
|
||||
}
|
||||
|
||||
static USBBuffer *
|
||||
get_next_buffer(uint8_t addr, uint32_t id)
|
||||
{
|
||||
unsigned int events;
|
||||
events = usb_get_ep_events(addr);
|
||||
if (events & USB_EP_EVENT_NOTIFICATION) {
|
||||
USBBuffer *buffer = &data_usb_buffer[buf_submitted];
|
||||
if (!(buffer->flags & USB_BUFFER_SUBMITTED)) {
|
||||
#ifdef DEBUG
|
||||
if (id != (buffer->id & USB_BUFFER_ID_MASK)) {
|
||||
printf("Wrong buffer ID expected %d, got %d\n",
|
||||
(int)id, (int)buffer->id);
|
||||
}
|
||||
#endif
|
||||
if ((buffer->id & USB_BUFFER_ID_MASK) == USB_BUFFER_ID_DATA) {
|
||||
state.cmd_data_transfered +=
|
||||
buffer_lengths[buf_submitted] - buffer->left;
|
||||
}
|
||||
buffer->id = USB_BUFFER_ID_UNUSED;
|
||||
buf_submitted =NEXT_BUF(buf_submitted);
|
||||
return buffer;
|
||||
}
|
||||
}
|
||||
return NULL;
|
||||
}
|
||||
|
||||
PROCESS(usb_mass_bulk_request_process, "USB mass storage request process");
|
||||
|
||||
PROCESS_THREAD(usb_mass_bulk_request_process, ev , data)
|
||||
{
|
||||
PROCESS_BEGIN();
|
||||
reset_state:
|
||||
usb_discard_all_buffers(BULK_OUT);
|
||||
usb_discard_all_buffers(BULK_IN);
|
||||
memset(data_usb_buffer, 0, sizeof(data_usb_buffer));
|
||||
buf_first = 0;
|
||||
buf_free = 0;
|
||||
buf_submitted = 0;
|
||||
submit_cbw_buffer();
|
||||
receive_cbw_state:
|
||||
PRINTF("receive_cbw_state\n");
|
||||
while(1) {
|
||||
PROCESS_WAIT_EVENT();
|
||||
if (ev == reset_event) goto reset_state;
|
||||
if (ev == PROCESS_EVENT_POLL) {
|
||||
USBBuffer *buffer;
|
||||
if ((buffer = get_next_buffer(BULK_OUT, USB_BUFFER_ID_CBW))) {
|
||||
|
||||
/* CBW */
|
||||
if (cbw_buffer.dCBWSignature == MASS_BULK_CBW_SIGNATURE) {
|
||||
usb_msc_handler_status ret;
|
||||
PRINTF("Got CBW seq %d\n",(int)cbw_buffer.dCBWTag);
|
||||
state.command = cbw_buffer.CBWCB;
|
||||
state.command_length = cbw_buffer.bCBWCBLength;
|
||||
state.status = MASS_BULK_CSW_STATUS_FAILED;
|
||||
state.data_cb = NULL;
|
||||
state.cmd_data_submitted = 0;
|
||||
state.cmd_data_transfered = 0;
|
||||
ret = usb_msc_handle_command(&state);
|
||||
if (ret == USB_MSC_HANDLER_OK) {
|
||||
state.status = MASS_BULK_CSW_STATUS_PASSED;
|
||||
} else if (ret == USB_MSC_HANDLER_FAILED) {
|
||||
state.status = MASS_BULK_CSW_STATUS_FAILED;
|
||||
}
|
||||
if (ret != USB_MSC_HANDLER_DELAYED
|
||||
&& buf_submitted == buf_free) {
|
||||
if (cbw_buffer.dCBWDataTransferLength > 0) {
|
||||
/* HALT the apropriate endpoint */
|
||||
if (cbw_buffer.bmCBWFlags & MASS_BULK_CBW_FLAG_IN) {
|
||||
submit_halt(BULK_IN);
|
||||
} else {
|
||||
submit_halt(BULK_OUT);
|
||||
}
|
||||
/* Wait for HALT */
|
||||
while(1) {
|
||||
PROCESS_WAIT_EVENT();
|
||||
if (ev == reset_event) goto reset_state;
|
||||
if (ev == PROCESS_EVENT_POLL) {
|
||||
USBBuffer *buffer =
|
||||
get_next_buffer(BULK_IN, USB_BUFFER_ID_HALT);
|
||||
if (buffer && (buffer->flags & USB_BUFFER_HALT)) break;
|
||||
}
|
||||
}
|
||||
}
|
||||
goto send_csw_state;
|
||||
}
|
||||
if (cbw_buffer.bmCBWFlags & MASS_BULK_CBW_FLAG_IN) {
|
||||
goto send_data_state;
|
||||
} else {
|
||||
goto receive_data_state;
|
||||
}
|
||||
} else {
|
||||
printf("Invalid CBW\n");
|
||||
submit_halt(BULK_IN);
|
||||
submit_halt(BULK_OUT);
|
||||
while(1) {
|
||||
PROCESS_WAIT_EVENT();
|
||||
if (ev == reset_event) goto reset_state;
|
||||
if (ev == PROCESS_EVENT_POLL) {
|
||||
USBBuffer *buffer = get_next_buffer(BULK_IN, USB_BUFFER_ID_HALT);
|
||||
if (buffer && (buffer->flags & USB_BUFFER_HALT)) break;
|
||||
}
|
||||
}
|
||||
while(1) {
|
||||
PROCESS_WAIT_EVENT();
|
||||
if (ev == reset_event) goto reset_state;
|
||||
if (ev == PROCESS_EVENT_POLL) {
|
||||
USBBuffer *buffer = get_next_buffer(BULK_OUT, USB_BUFFER_ID_HALT);
|
||||
if (buffer && (buffer->flags & USB_BUFFER_HALT)) break;
|
||||
}
|
||||
}
|
||||
/* CBW */
|
||||
goto receive_cbw_state;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
send_data_state:
|
||||
PRINTF("send_data_state\n");
|
||||
while(1) {
|
||||
uint8_t id = 0;
|
||||
/* Wait for any data to be sent */
|
||||
while (buf_submitted == buf_free) {
|
||||
PRINTF("Wait data\n");
|
||||
PROCESS_WAIT_EVENT();
|
||||
}
|
||||
#if 0
|
||||
/* Send CSW early to improve throughput, unless we need to HALT
|
||||
the endpoint due to short data */
|
||||
if ((data_usb_buffer[PREV_BUF(buf_free)].id & USB_MSC_DATA_LAST)
|
||||
&& state.cmd_data_submitted == cbw_buffer.dCBWDataTransferLength) {
|
||||
send_csw();
|
||||
}
|
||||
#endif
|
||||
/* Wait until the current buffer is free */
|
||||
while (data_usb_buffer[buf_submitted].flags & USB_BUFFER_SUBMITTED) {
|
||||
PROCESS_WAIT_EVENT();
|
||||
}
|
||||
while (!(data_usb_buffer[buf_submitted].flags & USB_BUFFER_SUBMITTED)) {
|
||||
id = data_usb_buffer[buf_submitted].id;
|
||||
/* PRINTF("id: %02x\n", id); */
|
||||
if (id == USB_BUFFER_ID_UNUSED) break;
|
||||
state.cmd_data_transfered += buffer_lengths[buf_submitted];
|
||||
data_usb_buffer[buf_submitted].id = USB_BUFFER_ID_UNUSED;
|
||||
buf_submitted =NEXT_BUF(buf_submitted);
|
||||
if (id & USB_MSC_DATA_DO_CALLBACK) {
|
||||
if (state.data_cb) {
|
||||
state.data_cb(&state);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
if (id & USB_MSC_DATA_LAST) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (id & USB_MSC_DATA_LAST) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (state.cmd_data_submitted < cbw_buffer.dCBWDataTransferLength) {
|
||||
submit_halt(BULK_IN);
|
||||
while(1) {
|
||||
PROCESS_WAIT_EVENT();
|
||||
if (ev == reset_event) goto reset_state;
|
||||
if (ev == PROCESS_EVENT_POLL) {
|
||||
USBBuffer *buffer = get_next_buffer(BULK_IN , USB_BUFFER_ID_HALT);
|
||||
if (buffer) {
|
||||
if (buffer->flags & USB_BUFFER_HALT) break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
goto send_csw_state;
|
||||
|
||||
receive_data_state:
|
||||
PRINTF("receive_data_state\n");
|
||||
while(1) {
|
||||
uint8_t id = 0;
|
||||
/* Wait for any buffers to be submitted */
|
||||
while (buf_submitted == buf_free) {
|
||||
PROCESS_WAIT_EVENT();
|
||||
}
|
||||
/* Wait until the current buffer is free */
|
||||
while (data_usb_buffer[buf_submitted].flags & USB_BUFFER_SUBMITTED) {
|
||||
PROCESS_WAIT_EVENT();
|
||||
}
|
||||
while (!(data_usb_buffer[buf_submitted].flags & USB_BUFFER_SUBMITTED)) {
|
||||
id = data_usb_buffer[buf_submitted].id;
|
||||
/* PRINTF("id: %02x\n", id); */
|
||||
state.cmd_data_transfered += buffer_lengths[buf_submitted];
|
||||
if (id == USB_BUFFER_ID_UNUSED) break;
|
||||
data_usb_buffer[buf_submitted].id = USB_BUFFER_ID_UNUSED;
|
||||
buf_submitted =NEXT_BUF(buf_submitted);
|
||||
if (id & USB_MSC_DATA_DO_CALLBACK) {
|
||||
if (state.data_cb) {
|
||||
state.data_cb(&state);
|
||||
}
|
||||
}
|
||||
|
||||
if (id & USB_MSC_DATA_LAST) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (id & USB_MSC_DATA_LAST) {
|
||||
break;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
if (state.cmd_data_submitted < cbw_buffer.dCBWDataTransferLength) {
|
||||
submit_halt(BULK_OUT);
|
||||
while(1) {
|
||||
PROCESS_WAIT_EVENT();
|
||||
if (ev == reset_event) goto reset_state;
|
||||
if (ev == PROCESS_EVENT_POLL) {
|
||||
USBBuffer *buffer = get_next_buffer(BULK_OUT, USB_BUFFER_ID_HALT);
|
||||
if (buffer && (buffer->flags & USB_BUFFER_HALT)) break;
|
||||
}
|
||||
}
|
||||
}
|
||||
goto send_csw_state;
|
||||
|
||||
|
||||
send_csw_state:
|
||||
PRINTF("send_csw_state\n");
|
||||
if (data_usb_buffer[PREV_BUF(buf_free)].id != USB_BUFFER_ID_CSW) {
|
||||
send_csw();
|
||||
}
|
||||
submit_cbw_buffer();
|
||||
while(1) {
|
||||
if (ev == reset_event) goto reset_state;
|
||||
PROCESS_WAIT_EVENT();
|
||||
if (ev == PROCESS_EVENT_POLL) {
|
||||
USBBuffer *buffer;
|
||||
if ((buffer = get_next_buffer(BULK_IN, USB_BUFFER_ID_CSW))) {
|
||||
goto receive_cbw_state;
|
||||
}
|
||||
}
|
||||
}
|
||||
goto receive_cbw_state;
|
||||
PROCESS_END();
|
||||
}
|
||||
|
||||
PROCESS_THREAD(usb_mass_bulk_process, ev , data)
|
||||
{
|
||||
PROCESS_BEGIN();
|
||||
reset_event = process_alloc_event();
|
||||
usb_msc_command_handler_init();
|
||||
usb_setup();
|
||||
usb_set_ep_event_process(BULK_IN, &usb_mass_bulk_request_process);
|
||||
usb_set_ep_event_process(BULK_OUT, &usb_mass_bulk_request_process);
|
||||
usb_set_global_event_process(process_current);
|
||||
usb_register_request_handler(&mass_bulk_request_hook);
|
||||
while(1) {
|
||||
PROCESS_WAIT_EVENT();
|
||||
if (ev == PROCESS_EVENT_EXIT) break;
|
||||
if (ev == PROCESS_EVENT_POLL) {
|
||||
unsigned int events = usb_get_global_events();
|
||||
if (events) {
|
||||
if (events & USB_EVENT_CONFIG) {
|
||||
if (usb_get_current_configuration() != 0) {
|
||||
PRINTF("Configured\n");
|
||||
memset(data_usb_buffer, 0, sizeof(data_usb_buffer));
|
||||
usb_setup_bulk_endpoint(BULK_IN);
|
||||
usb_setup_bulk_endpoint(BULK_OUT);
|
||||
process_start(&usb_mass_bulk_request_process,NULL);
|
||||
} else {
|
||||
process_exit(&usb_mass_bulk_request_process);
|
||||
usb_disable_endpoint(BULK_IN);
|
||||
usb_disable_endpoint(BULK_OUT);
|
||||
}
|
||||
}
|
||||
if (events & USB_EVENT_RESET) {
|
||||
PRINTF("RESET\n");
|
||||
process_exit(&usb_mass_bulk_request_process);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
PROCESS_END();
|
||||
}
|
||||
|
||||
void
|
||||
usb_msc_bulk_setup()
|
||||
{
|
||||
process_start(&usb_mass_bulk_process, NULL);
|
||||
}
|
|
@ -1,103 +0,0 @@
|
|||
#ifndef USB_MSC_BULK_H_SHSP6ONHDJ__
|
||||
#define USB_MSC_BULK_H_SHSP6ONHDJ__
|
||||
|
||||
#include <usb.h>
|
||||
#include <stdint.h>
|
||||
#include <msc/msc-defs.h>
|
||||
|
||||
#define USB_MSC_BUFFERS 16
|
||||
|
||||
|
||||
struct usb_msc_bulk_cbw
|
||||
{
|
||||
uint32_t dCBWSignature;
|
||||
uint32_t dCBWTag;
|
||||
uint32_t dCBWDataTransferLength;
|
||||
uint8_t bmCBWFlags;
|
||||
uint8_t bCBWLUN;
|
||||
uint8_t bCBWCBLength;
|
||||
uint8_t CBWCB[16];
|
||||
} BYTE_ALIGNED;
|
||||
|
||||
struct usb_msc_bulk_csw
|
||||
{
|
||||
uint32_t dCSWSignature;
|
||||
uint32_t dCSWTag;
|
||||
uint32_t dCSWDataResidue;
|
||||
uint8_t bCSWStatus;
|
||||
} BYTE_ALIGNED;
|
||||
|
||||
struct usb_msc_command_state
|
||||
{
|
||||
const uint8_t *command;
|
||||
unsigned int command_length;
|
||||
unsigned int status;
|
||||
/* Number of data bytes received or sent */
|
||||
unsigned int cmd_data_transfered;
|
||||
/* Number of data bytes submitted for transmition or reception */
|
||||
unsigned int cmd_data_submitted;
|
||||
/* Set by command handler or callback */
|
||||
void (*data_cb)(struct usb_msc_command_state *state); /* May be NULL */
|
||||
};
|
||||
|
||||
void
|
||||
usb_msc_bulk_setup();
|
||||
|
||||
typedef enum {
|
||||
USB_MSC_HANDLER_OK = 0,
|
||||
USB_MSC_HANDLER_DELAYED,
|
||||
USB_MSC_HANDLER_FAILED
|
||||
} usb_msc_handler_status;
|
||||
|
||||
usb_msc_handler_status
|
||||
usb_msc_handle_command(struct usb_msc_command_state *state);
|
||||
|
||||
void
|
||||
usb_msc_command_handler_init();
|
||||
|
||||
/* Call data_cb when this data has been sent or received */
|
||||
#define USB_MSC_DATA_DO_CALLBACK 0x20
|
||||
|
||||
/* Actually send the data, not just buffer it */
|
||||
#define USB_MSC_DATA_SEND 0x40
|
||||
|
||||
/* Actually receive the data, not just queue buffers for it */
|
||||
#define USB_MSC_DATA_RECEIVE 0x40
|
||||
|
||||
/* The command don't want to send or receive anymore data */
|
||||
#define USB_MSC_DATA_LAST 0x80
|
||||
|
||||
/* Submit a buffer with data to send to the host. Use a callback to be
|
||||
notified when data has been sent. Data is not copied so it must
|
||||
remain constant while sending. */
|
||||
void
|
||||
usb_msc_send_data(const uint8_t *data, unsigned int len, unsigned int flags);
|
||||
|
||||
/* Same as usb_msc_send_data but allows one to set additional flags
|
||||
in USBBuffer */
|
||||
void
|
||||
usb_msc_send_data_buf_flags(const uint8_t *data, unsigned int len,
|
||||
unsigned int flags, uint16_t buf_flags);
|
||||
|
||||
#define USB_MSC_SEND_ABORT() \
|
||||
usb_msc_send_data_buf_flags(NULL, 0, USB_MSC_DATA_LAST, 0)
|
||||
|
||||
/* Submit a buffer for receiving data from the host. Use a callback to
|
||||
be notified when data has arrived. */
|
||||
void
|
||||
usb_msc_receive_data(uint8_t *data, unsigned int len, unsigned int flags);
|
||||
|
||||
/* Same as usb_msc_receive_data but allows one to set additional flags
|
||||
in USBBuffer */
|
||||
void
|
||||
usb_msc_receive_data_buf_flags(uint8_t *data, unsigned int len,
|
||||
unsigned int flags, uint16_t buf_flags);
|
||||
#define USB_MSC_RECEIVE_ABORT() \
|
||||
usb_msc_receive_data_buf_flags(NULL, 0, USB_MSC_DATA_LAST, 0)
|
||||
|
||||
#define USB_MSC_DONE() \
|
||||
usb_msc_send_data_buf_flags(NULL, 0, USB_MSC_DATA_LAST, 0)
|
||||
|
||||
|
||||
|
||||
#endif /* USB_MSC_BULK_H_SHSP6ONHDJ__ */
|
|
@ -1,365 +0,0 @@
|
|||
#include <usb-msc-bulk.h>
|
||||
#include <usb-api.h>
|
||||
#include <usb-core.h>
|
||||
#include <sys/process.h>
|
||||
#include <stdio.h>
|
||||
#include <rbc_const.h>
|
||||
#include <rbc_struct.h>
|
||||
#include <string.h>
|
||||
|
||||
#ifdef DEBUG
|
||||
#define PRINTF(...) printf(__VA_ARGS__)
|
||||
#else
|
||||
#define PRINTF(...)
|
||||
#endif
|
||||
|
||||
#ifndef USB_RBC_NUM_BLOCKS
|
||||
#define USB_RBC_NUM_BLOCKS 32
|
||||
#endif
|
||||
|
||||
static struct spc2_sense_data sense_data =
|
||||
{
|
||||
SCSI_SENSE_CURRENT_ERROR,
|
||||
0,
|
||||
0,
|
||||
{0},
|
||||
(sizeof(struct spc2_sense_data)
|
||||
- offsetof(struct spc2_sense_data, command_specific))
|
||||
};
|
||||
|
||||
static void
|
||||
scsi_error(unsigned int sense_key, unsigned int asc, int32_t info)
|
||||
{
|
||||
sense_data.response_code = SCSI_SENSE_INFORMATION_VALID | SCSI_SENSE_CURRENT_ERROR;
|
||||
sense_data.information[0] = (info >> 24) & 0xff;
|
||||
sense_data.information[1] = (info >> 16) & 0xff;
|
||||
sense_data.information[2] = (info >> 8) & 0xff;
|
||||
sense_data.information[3] = info & 0xff;
|
||||
sense_data.sense_key = sense_key;
|
||||
sense_data.asc = (asc >> 8) & 0xff;
|
||||
sense_data.ascq = asc & 0xff;
|
||||
}
|
||||
|
||||
static void
|
||||
scsi_ok()
|
||||
{
|
||||
sense_data.response_code = SCSI_SENSE_CURRENT_ERROR;
|
||||
sense_data.sense_key = SCSI_SENSE_KEY_NO_SENSE;
|
||||
sense_data.asc = 0x00;
|
||||
sense_data.ascq = 0x00;
|
||||
};
|
||||
|
||||
static const struct spc2_std_inquiry_data std_inquiry_data =
|
||||
{
|
||||
SCSI_STD_INQUIRY_CONNECTED | SCSI_STD_INQUIRY_TYPE_RBC,
|
||||
0,
|
||||
SCSI_STD_INQUIRY_VERSION_SPC2,
|
||||
0,
|
||||
(sizeof(struct spc2_std_inquiry_data)
|
||||
- offsetof(struct spc2_std_inquiry_data, flags3)),
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
{'F','l','u','f','w','a','r','e'},
|
||||
{'T','e','s','t',' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',' '},
|
||||
{'0','.','1',' '}
|
||||
};
|
||||
|
||||
#define UNIT_NAME {'F','l','u','f','f','w','a','r','e',' ', \
|
||||
'P','s','e','u','d','o',' ','D','i','s','k'}
|
||||
#define UNIT_NAME_LENGTH 21
|
||||
|
||||
static const struct
|
||||
{
|
||||
struct spc2_vital_product_data_head head;
|
||||
struct {
|
||||
struct spc2_vital_product_data_head head;
|
||||
char unit_name[UNIT_NAME_LENGTH];
|
||||
} descriptor;
|
||||
} CC_BYTE_ALIGNED device_identification_data =
|
||||
{
|
||||
{
|
||||
SCSI_STD_INQUIRY_CONNECTED | SCSI_STD_INQUIRY_TYPE_RBC,
|
||||
SCSI_PAGE_DEVICE_IDENTIFICATION,
|
||||
0,
|
||||
sizeof(device_identification_data.descriptor),
|
||||
},
|
||||
{
|
||||
{
|
||||
SCSI_CODE_SET_ACSII,
|
||||
SCSI_IDENTIFIER_TYPE_NON_UNIQUE,
|
||||
0,
|
||||
sizeof(device_identification_data.descriptor.unit_name)
|
||||
},
|
||||
UNIT_NAME
|
||||
}
|
||||
};
|
||||
|
||||
|
||||
static const struct
|
||||
{
|
||||
struct spc2_vital_product_data_head head;
|
||||
uint8_t supported[3];
|
||||
} CC_BYTE_ALIGNED supported_pages_data =
|
||||
{
|
||||
{
|
||||
SCSI_STD_INQUIRY_CONNECTED | SCSI_STD_INQUIRY_TYPE_RBC,
|
||||
SCSI_PAGE_SUPPORTED_PAGES,
|
||||
0,
|
||||
sizeof(supported_pages_data.supported),
|
||||
},
|
||||
{SCSI_PAGE_SUPPORTED_PAGES, SCSI_PAGE_UNIT_SERIAL_NUMBER,
|
||||
SCSI_PAGE_DEVICE_IDENTIFICATION}
|
||||
};
|
||||
|
||||
static const struct
|
||||
{
|
||||
struct spc2_vital_product_data_head head;
|
||||
uint8_t serial_number[8];
|
||||
} CC_BYTE_ALIGNED unit_serial_number_data = {
|
||||
{
|
||||
SCSI_STD_INQUIRY_CONNECTED | SCSI_STD_INQUIRY_TYPE_RBC,
|
||||
SCSI_PAGE_SUPPORTED_PAGES,
|
||||
0,
|
||||
sizeof(unit_serial_number_data.serial_number)
|
||||
},
|
||||
{'1','2','3','4','5','6','7','8'}
|
||||
};
|
||||
|
||||
static usb_msc_handler_status
|
||||
handle_inquiry_cmd(struct usb_msc_command_state *state)
|
||||
{
|
||||
struct spc2_inquiry_cmd *cmd = (struct spc2_inquiry_cmd*)state->command;
|
||||
if (cmd->flags & SCSI_INQUIRY_FLAG_CMDDT) {
|
||||
scsi_error(SCSI_SENSE_KEY_ILLEGAL_REQUEST,SCSI_ASC_INVALID_FIELD_IN_CDB,
|
||||
cmd->allocation_length);
|
||||
return USB_MSC_HANDLER_FAILED;
|
||||
}
|
||||
if (cmd->flags & SCSI_INQUIRY_FLAG_EVPD) {
|
||||
PRINTF("Requested page %02x\n", cmd->page);
|
||||
switch (cmd->page) {
|
||||
case SCSI_PAGE_SUPPORTED_PAGES:
|
||||
usb_msc_send_data((uint8_t *)&supported_pages_data,
|
||||
sizeof(supported_pages_data),
|
||||
USB_MSC_DATA_SEND | USB_MSC_DATA_LAST);
|
||||
break;
|
||||
case SCSI_PAGE_DEVICE_IDENTIFICATION:
|
||||
usb_msc_send_data((uint8_t *)&device_identification_data,
|
||||
sizeof(device_identification_data),
|
||||
USB_MSC_DATA_SEND | USB_MSC_DATA_LAST);
|
||||
break;
|
||||
case SCSI_PAGE_UNIT_SERIAL_NUMBER:
|
||||
usb_msc_send_data((uint8_t *)&unit_serial_number_data,
|
||||
sizeof(unit_serial_number_data),
|
||||
USB_MSC_DATA_SEND | USB_MSC_DATA_LAST);
|
||||
break;
|
||||
default:
|
||||
scsi_error(SCSI_SENSE_KEY_ILLEGAL_REQUEST,SCSI_ASC_INVALID_FIELD_IN_CDB,
|
||||
cmd->allocation_length);
|
||||
return USB_MSC_HANDLER_FAILED;
|
||||
}
|
||||
return USB_MSC_HANDLER_OK;
|
||||
} else {
|
||||
if (cmd->page != 0) {
|
||||
scsi_error(SCSI_SENSE_KEY_ILLEGAL_REQUEST,SCSI_ASC_INVALID_FIELD_IN_CDB,
|
||||
cmd->allocation_length);
|
||||
return USB_MSC_HANDLER_FAILED;
|
||||
}
|
||||
usb_msc_send_data((uint8_t *)&std_inquiry_data,
|
||||
sizeof(std_inquiry_data),
|
||||
USB_MSC_DATA_SEND | USB_MSC_DATA_LAST);
|
||||
}
|
||||
return USB_MSC_HANDLER_OK;
|
||||
}
|
||||
|
||||
static usb_msc_handler_status
|
||||
handle_request_sense_cmd(struct usb_msc_command_state *state)
|
||||
{
|
||||
usb_msc_send_data((uint8_t *)&sense_data,
|
||||
sizeof(sense_data),
|
||||
USB_MSC_DATA_SEND | USB_MSC_DATA_LAST);
|
||||
return USB_MSC_HANDLER_OK;
|
||||
}
|
||||
|
||||
static usb_msc_handler_status
|
||||
handle_test_unit_ready_cmd(struct usb_msc_command_state *state)
|
||||
{
|
||||
scsi_ok();
|
||||
return USB_MSC_HANDLER_OK;
|
||||
}
|
||||
|
||||
static const struct rbc_read_capacity_data read_capacity_data =
|
||||
{
|
||||
HOST32_TO_BE_BYTES(USB_RBC_NUM_BLOCKS-1),
|
||||
HOST32_TO_BE_BYTES(512)
|
||||
};
|
||||
|
||||
static usb_msc_handler_status
|
||||
handle_read_capacity(struct usb_msc_command_state *state)
|
||||
{
|
||||
usb_msc_send_data((uint8_t *)&read_capacity_data,
|
||||
sizeof(read_capacity_data),
|
||||
USB_MSC_DATA_SEND | USB_MSC_DATA_LAST);
|
||||
return USB_MSC_HANDLER_OK;
|
||||
}
|
||||
|
||||
static const struct mode_sense_data {
|
||||
struct spc2_mode_parameter_header_6 header;
|
||||
struct rbc_device_parameters_page page;
|
||||
} CC_BYTE_ALIGNED mode_sense_data =
|
||||
{
|
||||
{
|
||||
(sizeof(mode_sense_data)
|
||||
- offsetof(struct mode_sense_data, header.medium_type)),
|
||||
0,0,0
|
||||
},
|
||||
{
|
||||
{SCSI_MODE_RBC_DEVICE_PAGE | SCSI_MODE_PAGE_SP,
|
||||
sizeof(mode_sense_data) - offsetof(struct mode_sense_data, page.flags1)},
|
||||
SCSI_MODE_WCD,
|
||||
HOST16_TO_BE_BYTES(512),
|
||||
HOST40_TO_BE_BYTES((long long)USB_RBC_NUM_BLOCKS),
|
||||
0x80,
|
||||
(SCSI_MODE_FORMATD | SCSI_MODE_LOCKD),
|
||||
0
|
||||
}
|
||||
};
|
||||
|
||||
static usb_msc_handler_status
|
||||
handle_mode_sense(struct usb_msc_command_state *state)
|
||||
{
|
||||
struct spc2_mode_sence_6_cmd *cmd =
|
||||
(struct spc2_mode_sence_6_cmd*)state->command;
|
||||
PRINTF("%ld - %ld - %ld\n", sizeof(struct mode_sense_data), offsetof(struct mode_sense_data, page.flags1),offsetof(struct mode_sense_data, page.reserved));
|
||||
switch(cmd->page_code) {
|
||||
case SCSI_MODE_RBC_DEVICE_PAGE:
|
||||
case SCSI_MODE_SENSE_ALL_PAGES:
|
||||
usb_msc_send_data((uint8_t *)&mode_sense_data,
|
||||
sizeof(mode_sense_data),
|
||||
USB_MSC_DATA_SEND | USB_MSC_DATA_LAST);
|
||||
break;
|
||||
default:
|
||||
scsi_error(SCSI_SENSE_KEY_ILLEGAL_REQUEST,SCSI_ASC_INVALID_FIELD_IN_CDB,
|
||||
cmd->allocation_length);
|
||||
return USB_MSC_HANDLER_FAILED;
|
||||
}
|
||||
return USB_MSC_HANDLER_OK;
|
||||
}
|
||||
|
||||
static usb_msc_handler_status
|
||||
handle_mode_select(struct usb_msc_command_state *state)
|
||||
{
|
||||
/* Can't change anything */
|
||||
return USB_MSC_HANDLER_OK;
|
||||
}
|
||||
static uint8_t disk_blocks[USB_RBC_NUM_BLOCKS][512];
|
||||
|
||||
static usb_msc_handler_status
|
||||
handle_read(struct usb_msc_command_state *state)
|
||||
{
|
||||
struct rbc_read_cmd *cmd = (struct rbc_read_cmd*)state->command;
|
||||
unsigned long lba = be32_to_host(cmd->logical_block_address);
|
||||
unsigned long blocks = be16_to_host(cmd->transfer_length);
|
||||
PRINTF("Requested %ld blocks at %ld\n", blocks, lba);
|
||||
if (lba >= USB_RBC_NUM_BLOCKS || lba + blocks > USB_RBC_NUM_BLOCKS) {
|
||||
scsi_error(SCSI_SENSE_KEY_ILLEGAL_REQUEST,SCSI_ASC_INVALID_FIELD_IN_CDB,
|
||||
blocks);
|
||||
return USB_MSC_HANDLER_FAILED;
|
||||
}
|
||||
usb_msc_send_data((uint8_t *)&disk_blocks[lba], blocks * 512,
|
||||
USB_MSC_DATA_SEND | USB_MSC_DATA_LAST);
|
||||
scsi_ok();
|
||||
return USB_MSC_HANDLER_OK;
|
||||
}
|
||||
|
||||
static void
|
||||
handle_write_done(struct usb_msc_command_state *state)
|
||||
{
|
||||
PRINTF("Wrote data\n");
|
||||
state->status = MASS_BULK_CSW_STATUS_PASSED;
|
||||
scsi_ok();
|
||||
}
|
||||
|
||||
static usb_msc_handler_status
|
||||
handle_write(struct usb_msc_command_state *state)
|
||||
{
|
||||
struct rbc_write_cmd *cmd = (struct rbc_write_cmd*)state->command;
|
||||
unsigned long lba = be32_to_host(cmd->logical_block_address);
|
||||
unsigned long blocks = be16_to_host(cmd->transfer_length);
|
||||
if (lba >= USB_RBC_NUM_BLOCKS || lba + blocks > USB_RBC_NUM_BLOCKS) {
|
||||
scsi_error(SCSI_SENSE_KEY_ILLEGAL_REQUEST,SCSI_ASC_INVALID_FIELD_IN_CDB,
|
||||
blocks);
|
||||
return USB_MSC_HANDLER_FAILED;
|
||||
}
|
||||
PRINTF("Writing %ld blocks at %ld\n", blocks, lba);
|
||||
usb_msc_receive_data(disk_blocks[lba], blocks * 512,
|
||||
USB_MSC_DATA_RECEIVE | USB_MSC_DATA_LAST
|
||||
| USB_MSC_DATA_DO_CALLBACK);
|
||||
state->data_cb = handle_write_done;
|
||||
return USB_MSC_HANDLER_DELAYED;
|
||||
}
|
||||
|
||||
static usb_msc_handler_status
|
||||
handle_start_stop_unit(struct usb_msc_command_state *state)
|
||||
{
|
||||
scsi_ok();
|
||||
return USB_MSC_HANDLER_OK;
|
||||
}
|
||||
|
||||
static usb_msc_handler_status
|
||||
handle_verify(struct usb_msc_command_state *state)
|
||||
{
|
||||
scsi_ok();
|
||||
return USB_MSC_HANDLER_OK;
|
||||
}
|
||||
|
||||
usb_msc_handler_status
|
||||
usb_msc_handle_command(struct usb_msc_command_state *state)
|
||||
{
|
||||
|
||||
usb_msc_handler_status ret;
|
||||
PRINTF("Got CBW %02x\n", state->command[0]);
|
||||
switch(state->command[0]) {
|
||||
case SCSI_CMD_INQUIRY:
|
||||
ret = handle_inquiry_cmd(state);
|
||||
break;
|
||||
case SCSI_CMD_REQUEST_SENSE:
|
||||
ret = handle_request_sense_cmd(state);
|
||||
break;
|
||||
case SCSI_CMD_TEST_UNIT_READY:
|
||||
ret = handle_test_unit_ready_cmd(state);
|
||||
break;
|
||||
case SCSI_CMD_READ_CAPACITY:
|
||||
ret = handle_read_capacity(state);
|
||||
break;
|
||||
case SCSI_CMD_MODE_SENSE_6:
|
||||
ret = handle_mode_sense(state);
|
||||
break;
|
||||
case SCSI_CMD_MODE_SELECT_6:
|
||||
ret = handle_mode_select(state);
|
||||
break;
|
||||
case SCSI_CMD_READ_10:
|
||||
ret = handle_read(state);
|
||||
break;
|
||||
case SCSI_CMD_WRITE_10:
|
||||
ret = handle_write(state);
|
||||
break;
|
||||
case SCSI_CMD_VERIFY_10:
|
||||
ret = handle_verify(state);
|
||||
break;
|
||||
case SCSI_CMD_START_STOP_UNIT:
|
||||
ret = handle_start_stop_unit(state);
|
||||
break;
|
||||
default:
|
||||
printf("Unhandled request: %02x\n", state->command[0]);
|
||||
scsi_error(SCSI_SENSE_KEY_ILLEGAL_REQUEST,
|
||||
SCSI_ASC_INVALID_COMMAND_OPERATION,0);
|
||||
return USB_MSC_HANDLER_FAILED;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
void
|
||||
usb_msc_command_handler_init()
|
||||
{
|
||||
}
|
|
@ -1,15 +0,0 @@
|
|||
<?xml version="1.0" encoding="utf-8" ?>
|
||||
|
||||
<!ELEMENT descriptors (languages, strings)>
|
||||
|
||||
<!ELEMENT languages (lang+) >
|
||||
|
||||
<!ELEMENT lang (#PCDATA) >
|
||||
<!ATTLIST lang
|
||||
id CDATA "all"
|
||||
>
|
||||
|
||||
<!ELEMENT strings (string+) >
|
||||
|
||||
<!ELEMENT string (lang+) >
|
||||
|
|
@ -1,23 +0,0 @@
|
|||
#ifndef STRUCTGEN
|
||||
#include "usb.h"
|
||||
#endif
|
||||
#include <stdint.h>
|
||||
|
||||
struct usb_st_string_language_map
|
||||
{
|
||||
uint16_t lang_id;
|
||||
const struct usb_st_string_descriptor * const *descriptors;
|
||||
};
|
||||
|
||||
struct usb_st_string_languages
|
||||
{
|
||||
uint8_t num_lang;
|
||||
uint8_t max_index;
|
||||
const struct usb_st_language_descriptor *lang_descr;
|
||||
const struct usb_st_string_language_map map[1];
|
||||
};
|
||||
|
||||
extern const struct usb_st_string_languages * const string_languages;
|
||||
|
||||
const uint8_t *
|
||||
usb_class_get_string_descriptor(uint16_t lang, uint8_t index);
|
|
@ -1,129 +0,0 @@
|
|||
<?xml version="1.0" encoding="utf-8" ?>
|
||||
<xsl:stylesheet xmlns:xsl="http://www.w3.org/1999/XSL/Transform" version="1.0">
|
||||
<xsl:output method="text" encoding="iso-8859-1"/>
|
||||
<xsl:template match="descriptors">
|
||||
<xsl:variable name="num_lang" select="count(languages/lang)"/>
|
||||
<xsl:text>#include "string-descriptors.h" </xsl:text>
|
||||
|
||||
<!-- string descriptors -->
|
||||
<xsl:for-each select="strings/string/lang">
|
||||
<xsl:text>static const struct { </xsl:text>
|
||||
<xsl:text> struct usb_st_string_descriptor base; </xsl:text>
|
||||
<xsl:text> Uint16 chars[</xsl:text>
|
||||
<xsl:value-of select="string-length(text()) -1"/>
|
||||
<xsl:text>]; </xsl:text>
|
||||
<xsl:text>} string_descriptor_</xsl:text>
|
||||
<xsl:number count="/descriptors/strings/string" format="1"/>
|
||||
<xsl:text>_</xsl:text>
|
||||
<xsl:choose>
|
||||
<xsl:when test="@id">
|
||||
<xsl:value-of select="@id"/>
|
||||
</xsl:when>
|
||||
<xsl:otherwise>
|
||||
<xsl:text>all</xsl:text>
|
||||
</xsl:otherwise>
|
||||
</xsl:choose>
|
||||
<xsl:text>= {{</xsl:text>
|
||||
<xsl:value-of select="string-length(text())*2 + 2"/>
|
||||
<xsl:text>, 3, {'</xsl:text>
|
||||
<xsl:value-of select="substring(text(), 1,1)"/>
|
||||
<xsl:text>'}}, { </xsl:text>
|
||||
<xsl:call-template name="output-UCS2">
|
||||
<xsl:with-param name="string" select="substring(text(), 2)"/>
|
||||
</xsl:call-template>
|
||||
<xsl:text>}}; </xsl:text>
|
||||
</xsl:for-each>
|
||||
|
||||
<!-- string tables -->
|
||||
<xsl:for-each select="/descriptors/languages/lang">
|
||||
<xsl:variable name="id" select="@id"/>
|
||||
<xsl:text>static const struct usb_st_string_descriptor * string_table_</xsl:text>
|
||||
<xsl:value-of select="$id"/>
|
||||
<xsl:text>[] = { </xsl:text>
|
||||
<xsl:for-each select="/descriptors/strings/string">
|
||||
<xsl:text> &string_descriptor_</xsl:text>
|
||||
<xsl:number count="/descriptors/strings/string" format="1"/>
|
||||
<xsl:text>_</xsl:text>
|
||||
<xsl:choose>
|
||||
<xsl:when test="lang[@id = $id]">
|
||||
<xsl:value-of select="$id"/>
|
||||
</xsl:when>
|
||||
<xsl:when test="lang[@id = 'all' or count(@id) = 0]">
|
||||
<xsl:text>all</xsl:text>
|
||||
</xsl:when>
|
||||
<xsl:otherwise>
|
||||
<xsl:message terminate="yes">
|
||||
<xsl:text>No string found for index </xsl:text>
|
||||
<xsl:number count="/descriptors/strings/string" format="1"/>
|
||||
<xsl:text> and language </xsl:text>
|
||||
<xsl:value-of select="$id"/>
|
||||
</xsl:message>
|
||||
</xsl:otherwise>
|
||||
</xsl:choose>
|
||||
<xsl:text>.base, </xsl:text>
|
||||
</xsl:for-each>
|
||||
<xsl:text>}; </xsl:text>
|
||||
</xsl:for-each>
|
||||
|
||||
<!-- language descriptor -->
|
||||
<xsl:text>static const struct { </xsl:text>
|
||||
<xsl:text> struct usb_st_language_descriptor base; </xsl:text>
|
||||
<xsl:text> Uint16 langs[</xsl:text>
|
||||
<xsl:value-of select="$num_lang -1"/>
|
||||
<xsl:text>]; </xsl:text>
|
||||
<xsl:text>} language_descriptor = { </xsl:text>
|
||||
<xsl:text> {</xsl:text>
|
||||
<xsl:value-of select="$num_lang*2 + 2"/>
|
||||
<xsl:text>, 3, {</xsl:text>
|
||||
<xsl:value-of select="languages/lang[1]/text()"/>
|
||||
<xsl:text>}}, {</xsl:text>
|
||||
<xsl:for-each select="languages/lang[position() > 1]">
|
||||
<xsl:value-of select="text()"/>
|
||||
<xsl:text>, </xsl:text>
|
||||
</xsl:for-each>
|
||||
<xsl:text>}}; </xsl:text>
|
||||
|
||||
<!-- language lookup table -->
|
||||
<xsl:text>static const struct { </xsl:text>
|
||||
<xsl:text> struct usb_st_string_languages base; </xsl:text>
|
||||
<xsl:text> struct usb_st_string_language_map map[</xsl:text>
|
||||
<xsl:value-of select="$num_lang - 1"/>
|
||||
<xsl:text>]; } </xsl:text>
|
||||
<xsl:text>string_languages_full={{</xsl:text>
|
||||
<xsl:value-of select="$num_lang"/>
|
||||
<xsl:text>, </xsl:text>
|
||||
<xsl:value-of select="count(strings/string)"/>
|
||||
<xsl:text>, &language_descriptor.base</xsl:text>
|
||||
<xsl:text>, {{</xsl:text>
|
||||
<xsl:value-of select="languages/lang[1]/text()"/>
|
||||
<xsl:text>, string_table_</xsl:text>
|
||||
<xsl:value-of select="languages/lang[1]/@id"/>
|
||||
<xsl:text>}}}, { </xsl:text>
|
||||
<xsl:for-each select="languages/lang[position() > 1]">
|
||||
<xsl:text> {</xsl:text>
|
||||
<xsl:value-of select="text()"/>
|
||||
<xsl:text>, string_table_</xsl:text>
|
||||
<xsl:value-of select="@id"/>
|
||||
<xsl:text>}, </xsl:text>
|
||||
</xsl:for-each>
|
||||
<xsl:text> } }; </xsl:text>
|
||||
<xsl:text>const struct usb_st_string_languages * const string_languages = &string_languages_full.base; </xsl:text>
|
||||
</xsl:template>
|
||||
|
||||
<xsl:template name="output-UCS2">
|
||||
<xsl:param name="string"/>
|
||||
<xsl:if test="string-length($string) > 0">
|
||||
<xsl:text>'</xsl:text>
|
||||
<xsl:value-of select="substring($string, 1,1)"/>
|
||||
<xsl:text>'</xsl:text>
|
||||
<xsl:if test="string-length($string) > 1">
|
||||
<xsl:text>, </xsl:text>
|
||||
</xsl:if>
|
||||
<xsl:call-template name="output-UCS2">
|
||||
<xsl:with-param name="string" select="substring($string, 2)"/>
|
||||
</xsl:call-template>
|
||||
</xsl:if>
|
||||
</xsl:template>
|
||||
</xsl:stylesheet>
|
||||
|
||||
|
|
@ -1,145 +0,0 @@
|
|||
#ifndef USB_API_H_SYN81IFYBN__
|
||||
#define USB_API_H_SYN81IFYBN__
|
||||
|
||||
#include <sys/process.h>
|
||||
|
||||
typedef struct _USBBuffer USBBuffer;
|
||||
|
||||
struct _USBBuffer
|
||||
{
|
||||
USBBuffer *next; /* Pointer to next buffer in chain */
|
||||
uint8_t *data; /* Where to read/write data next */
|
||||
uint16_t left; /* Remaining length of buffer. */
|
||||
uint16_t flags;
|
||||
uint32_t id; /* User data */
|
||||
};
|
||||
|
||||
/* Buffer owned by the USB code, cleared when done */
|
||||
#define USB_BUFFER_SUBMITTED 0x01
|
||||
|
||||
/* Write a short packet at end of buffer or release buffer when a
|
||||
short packet is received. */
|
||||
#define USB_BUFFER_SHORT_END 0x02
|
||||
|
||||
/* Release buffer as soon as any received data has been written in it. */
|
||||
#define USB_BUFFER_PACKET_END 0x04
|
||||
|
||||
/* Notify the user when the buffer is released */
|
||||
#define USB_BUFFER_NOTIFY 0x08
|
||||
|
||||
/* Packet should be sent to host. */
|
||||
#define USB_BUFFER_IN 0x40
|
||||
|
||||
/* Used for receiving SETUP packets. If a SETUP packet is received and
|
||||
the next buffers doesn't have this flag set, they will be skipped
|
||||
until one is found. The associated buffer must be at least 8 bytes */
|
||||
#define USB_BUFFER_SETUP 0x20
|
||||
|
||||
/* HALT the endpoint at this point. Only valid for bulk and interrupt
|
||||
endpoints */
|
||||
#define USB_BUFFER_HALT 0x100
|
||||
|
||||
/* Flags set by system */
|
||||
|
||||
/* The last packet written to this buffer was short. */
|
||||
#define USB_BUFFER_SHORT_PACKET 0x10
|
||||
|
||||
/* The operation associated with this buffer failed. I.e. it was discarded since it didn't match the received SETUP packet. */
|
||||
#define USB_BUFFER_FAILED 0x80
|
||||
|
||||
/* Architecture specific flags */
|
||||
#define USB_BUFFER_ARCH_FLAG_1 0x1000
|
||||
#define USB_BUFFER_ARCH_FLAG_2 0x2000
|
||||
#define USB_BUFFER_ARCH_FLAG_3 0x4000
|
||||
#define USB_BUFFER_ARCH_FLAG_4 0x8000
|
||||
|
||||
void
|
||||
usb_setup(void);
|
||||
|
||||
|
||||
/* Read only */
|
||||
struct USBRequestHandler
|
||||
{
|
||||
uint8_t request_type;
|
||||
uint8_t request_type_mask;
|
||||
uint8_t request;
|
||||
uint8_t request_mask;
|
||||
/* Returns true if it handled the request, if false let another handler try*/
|
||||
unsigned int (*handler_func)();
|
||||
};
|
||||
|
||||
/* Must be writeable */
|
||||
struct USBRequestHandlerHook
|
||||
{
|
||||
struct USBRequestHandlerHook *next;
|
||||
const struct USBRequestHandler * const handler;
|
||||
};
|
||||
|
||||
void
|
||||
usb_register_request_handler(struct USBRequestHandlerHook *hook);
|
||||
|
||||
void
|
||||
usb_prepend_request_handler(struct USBRequestHandlerHook *hook);
|
||||
|
||||
void
|
||||
usb_setup_bulk_endpoint(uint8_t addr);
|
||||
void
|
||||
usb_setup_interrupt_endpoint(uint8_t addr);
|
||||
|
||||
/* Submit a chain of buffers to be filled with received data. Last
|
||||
buffer must have next set to NULL. */
|
||||
void
|
||||
usb_submit_recv_buffer(uint8_t ep_addr, USBBuffer *buffer);
|
||||
|
||||
/* Submit a chain of buffers to be sent. Last buffer must have next
|
||||
set to NULL. When submitting packets to receive or send data in on
|
||||
a control enpoint, all packets in the data stage must be submitted
|
||||
at the same time. */
|
||||
void
|
||||
usb_submit_xmit_buffer(uint8_t ep_addr, USBBuffer *buffer);
|
||||
|
||||
/* Return true if not all data has been sent to the host */
|
||||
int
|
||||
usb_send_pending(uint8_t ep_addr);
|
||||
|
||||
/* Release all buffers submitted to the endpoint and discard any
|
||||
buffered data. */
|
||||
void
|
||||
usb_discard_all_buffers(uint8_t ep_addr);
|
||||
|
||||
void
|
||||
usb_disable_endpoint(uint8_t addr);
|
||||
|
||||
/* Set or remove a HALT condition on an endpoint */
|
||||
void
|
||||
usb_halt_endpoint(uint8_t addr, int halt);
|
||||
|
||||
/* Select what process should be polled when buffers with the
|
||||
USB_BUFFER_NOTIFY flag set is released from the endpoint */
|
||||
void
|
||||
usb_set_ep_event_process(uint8_t addr, struct process *p);
|
||||
|
||||
/* Select what process should be polled when a global event occurs */
|
||||
void
|
||||
usb_set_global_event_process(struct process *p);
|
||||
|
||||
/* Global events */
|
||||
#define USB_EVENT_CONFIG 0x01
|
||||
#define USB_EVENT_SUSPEND 0x02
|
||||
#define USB_EVENT_RESUME 0x04
|
||||
#define USB_EVENT_RESET 0x08
|
||||
|
||||
/* Returns global events that has occured since last time this
|
||||
function was called */
|
||||
unsigned int
|
||||
usb_get_global_events(void);
|
||||
|
||||
|
||||
#define USB_EP_EVENT_NOTIFICATION 0x01
|
||||
unsigned int
|
||||
usb_get_ep_events(uint8_t addr);
|
||||
|
||||
unsigned int
|
||||
usb_get_current_configuration(void);
|
||||
|
||||
#endif /* USB_API_H_SYN81IFYBN__ */
|
|
@ -1,92 +0,0 @@
|
|||
#ifndef USB_ARCH_H_0Z52ZDP0H6__
|
||||
#define USB_ARCH_H_0Z52ZDP0H6__
|
||||
|
||||
#include <contiki-conf.h>
|
||||
#include <usb-api.h>
|
||||
|
||||
|
||||
/* Includes control endpoint 0 */
|
||||
#ifndef USB_MAX_ENDPOINTS
|
||||
#define USB_MAX_ENDPOINTS 4
|
||||
#endif
|
||||
|
||||
#ifndef CTRL_EP_SIZE
|
||||
#define CTRL_EP_SIZE 8
|
||||
#endif
|
||||
|
||||
#ifndef USB_EP1_SIZE
|
||||
#define USB_EP1_SIZE 8
|
||||
#endif
|
||||
#ifndef USB_EP2_SIZE
|
||||
#define USB_EP2_SIZE 8
|
||||
#endif
|
||||
#ifndef USB_EP3_SIZE
|
||||
#define USB_EP3_SIZE 8
|
||||
#endif
|
||||
#ifndef USB_EP4_SIZE
|
||||
#define USB_EP4_SIZE 0
|
||||
#endif
|
||||
#ifndef USB_EP5_SIZE
|
||||
#define USB_EP5_SIZE 0
|
||||
#endif
|
||||
#ifndef USB_EP6_SIZE
|
||||
#define USB_EP6_SIZE 0
|
||||
#endif
|
||||
#ifndef USB_EP7_SIZE
|
||||
#define USB_EP7_SIZE 0
|
||||
#endif
|
||||
|
||||
|
||||
#ifndef MAX_CTRL_DATA
|
||||
#define MAX_CTRL_DATA 128
|
||||
#endif
|
||||
|
||||
void
|
||||
usb_arch_setup(void);
|
||||
|
||||
void
|
||||
usb_arch_setup_control_endpoint(uint8_t addr);
|
||||
|
||||
void
|
||||
usb_arch_setup_bulk_endpoint(uint8_t addr);
|
||||
|
||||
void
|
||||
usb_arch_setup_interrupt_endpoint(uint8_t addr);
|
||||
|
||||
void
|
||||
usb_arch_disable_endpoint(uint8_t addr);
|
||||
|
||||
void
|
||||
usb_arch_discard_all_buffers(uint8_t addr);
|
||||
|
||||
/* Stall a control endpoint. The stall will be cleared when the next
|
||||
SETUP token arrives. */
|
||||
void
|
||||
usb_arch_control_stall(uint8_t addr);
|
||||
|
||||
/* Set or remove a HALT condition on an endpoint */
|
||||
void
|
||||
usb_arch_halt_endpoint(uint8_t addr, int halt);
|
||||
|
||||
void
|
||||
usb_arch_set_configuration(uint8_t usb_configuration_value);
|
||||
|
||||
uint16_t
|
||||
usb_arch_get_ep_status(uint8_t addr);
|
||||
|
||||
void
|
||||
usb_arch_set_address(uint8_t addr);
|
||||
|
||||
|
||||
/* Select what process should be polled when a global event occurs. Intended for the protocol handler. Applications should use usb_set_global_event_process */
|
||||
void
|
||||
usb_arch_set_global_event_process(struct process *p);
|
||||
|
||||
unsigned int
|
||||
usb_arch_get_global_events(void);
|
||||
|
||||
/* Return true if not all data has been sent to the host */
|
||||
int
|
||||
usb_arch_send_pending(uint8_t ep_addr);
|
||||
|
||||
#endif /* USB_ARCH_H_0Z52ZDP0H6__ */
|
|
@ -1,614 +0,0 @@
|
|||
#include <usb-core.h>
|
||||
#include <usb.h>
|
||||
#include <usb-arch.h>
|
||||
#include <usb-api.h>
|
||||
#include <stdio.h>
|
||||
#include <sys/process.h>
|
||||
#include <stdio.h>
|
||||
#include <descriptors.h>
|
||||
#include <string-descriptors.h>
|
||||
|
||||
#define DEBUG
|
||||
#ifdef DEBUG
|
||||
#define PRINTF(...) printf(__VA_ARGS__)
|
||||
#else
|
||||
#define PRINTF(...)
|
||||
#endif
|
||||
|
||||
|
||||
struct USB_request_st usb_setup_buffer;
|
||||
static USBBuffer ctrl_buffer;
|
||||
|
||||
#define SETUP_ID 1
|
||||
#define OUT_ID 2
|
||||
#define IN_ID 3
|
||||
#define STATUS_OUT_ID 4
|
||||
#define STATUS_IN_ID 5
|
||||
|
||||
static uint16_t usb_device_status;
|
||||
static uint8_t usb_configuration_value;
|
||||
|
||||
static struct USBRequestHandlerHook *usb_request_handler_hooks = NULL;
|
||||
|
||||
static const unsigned char zero_byte = 0;
|
||||
static const unsigned short zero_word = 0;
|
||||
|
||||
static unsigned char usb_flags = 0;
|
||||
#define USB_FLAG_ADDRESS_PENDING 0x01
|
||||
|
||||
static struct process *global_user_event_pocess = NULL;
|
||||
static unsigned int global_user_events = 0;
|
||||
|
||||
void
|
||||
usb_set_global_event_process(struct process *p)
|
||||
{
|
||||
global_user_event_pocess = p;
|
||||
}
|
||||
unsigned int
|
||||
usb_get_global_events(void)
|
||||
{
|
||||
unsigned int e = global_user_events;
|
||||
global_user_events = 0;
|
||||
return e;
|
||||
}
|
||||
|
||||
static void
|
||||
notify_user(unsigned int e)
|
||||
{
|
||||
global_user_events |= e;
|
||||
if (global_user_event_pocess) {
|
||||
process_poll(global_user_event_pocess);
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
usb_send_ctrl_response(const uint8_t *data, unsigned int len)
|
||||
{
|
||||
if (ctrl_buffer.flags & USB_BUFFER_SUBMITTED) return;
|
||||
if (len >= usb_setup_buffer.wLength) {
|
||||
len = usb_setup_buffer.wLength; /* Truncate if too long */
|
||||
}
|
||||
ctrl_buffer.flags = USB_BUFFER_NOTIFY | USB_BUFFER_IN;
|
||||
if (len < usb_setup_buffer.wLength) {
|
||||
ctrl_buffer.flags |= USB_BUFFER_SHORT_END;
|
||||
}
|
||||
ctrl_buffer.next = NULL;
|
||||
ctrl_buffer.data = (uint8_t*)data;
|
||||
ctrl_buffer.left = len;
|
||||
ctrl_buffer.id = IN_ID;
|
||||
usb_submit_xmit_buffer(0,&ctrl_buffer);
|
||||
}
|
||||
|
||||
static uint8_t error_stall = 0;
|
||||
|
||||
void
|
||||
usb_error_stall()
|
||||
{
|
||||
error_stall = 1;
|
||||
usb_arch_control_stall(0);
|
||||
}
|
||||
|
||||
void
|
||||
usb_send_ctrl_status()
|
||||
{
|
||||
if (ctrl_buffer.flags & USB_BUFFER_SUBMITTED) return;
|
||||
ctrl_buffer.flags = USB_BUFFER_NOTIFY | USB_BUFFER_IN;
|
||||
ctrl_buffer.next = NULL;
|
||||
ctrl_buffer.data = NULL;
|
||||
ctrl_buffer.left = 0;
|
||||
ctrl_buffer.id = STATUS_IN_ID;
|
||||
usb_submit_xmit_buffer(0,&ctrl_buffer);
|
||||
}
|
||||
|
||||
static usb_ctrl_data_callback data_callback = NULL;
|
||||
static uint8_t *ctrl_data = NULL;
|
||||
static unsigned int ctrl_data_len = 0;
|
||||
void
|
||||
usb_get_ctrl_data(uint8_t *data, unsigned int length,
|
||||
usb_ctrl_data_callback cb)
|
||||
{
|
||||
if (ctrl_buffer.flags & USB_BUFFER_SUBMITTED) return;
|
||||
PRINTF("usb_get_ctrl_data: %d\n",length);
|
||||
data_callback = cb;
|
||||
ctrl_data = data;
|
||||
ctrl_data_len = length;
|
||||
ctrl_buffer.flags = USB_BUFFER_NOTIFY;
|
||||
ctrl_buffer.next = NULL;
|
||||
ctrl_buffer.data = data;
|
||||
ctrl_buffer.left = length;
|
||||
ctrl_buffer.id = OUT_ID;
|
||||
usb_submit_recv_buffer(0,&ctrl_buffer);
|
||||
}
|
||||
|
||||
#if 0
|
||||
|
||||
void
|
||||
usb_set_user_process(struct process *p)
|
||||
{
|
||||
user_process = p;
|
||||
}
|
||||
#endif
|
||||
|
||||
static void
|
||||
get_device_descriptor()
|
||||
{
|
||||
usb_send_ctrl_response((unsigned char*)&device_descriptor, sizeof(device_descriptor));
|
||||
}
|
||||
|
||||
static void
|
||||
get_string_descriptor()
|
||||
{
|
||||
#if OLD_STRING_DESCR
|
||||
if (LOW_BYTE(usb_setup_buffer.wValue) == 0) {
|
||||
usb_send_ctrl_response((const unsigned char*)string_languages->lang_descr,
|
||||
string_languages->lang_descr->bLength);
|
||||
} else {
|
||||
const struct usb_st_string_descriptor *descriptor;
|
||||
unsigned char l;
|
||||
const struct usb_st_string_descriptor * const *table;
|
||||
const struct usb_st_string_language_map *map;
|
||||
if (LOW_BYTE(usb_setup_buffer.wValue) > string_languages->max_index) {
|
||||
usb_error_stall();
|
||||
return;
|
||||
}
|
||||
l = string_languages->num_lang;
|
||||
map = string_languages->map;
|
||||
table = map->descriptors; /* Use first table if language not found */
|
||||
while (l > 0) {
|
||||
if (map->lang_id == usb_setup_buffer.wIndex) {
|
||||
table = map->descriptors;
|
||||
break;
|
||||
}
|
||||
map++;
|
||||
l--;
|
||||
}
|
||||
PRINTF("Lang id %04x = table %p\n", usb_setup_buffer.wIndex, (void*)table);
|
||||
descriptor = table[LOW_BYTE(usb_setup_buffer.wValue) - 1];
|
||||
usb_send_ctrl_response((const unsigned char*)descriptor,
|
||||
descriptor->bLength);
|
||||
}
|
||||
#else
|
||||
const struct usb_st_string_descriptor *descriptor;
|
||||
descriptor = (struct usb_st_string_descriptor*)
|
||||
usb_class_get_string_descriptor(usb_setup_buffer.wIndex,
|
||||
LOW_BYTE(usb_setup_buffer.wValue));
|
||||
if (!descriptor) {
|
||||
usb_error_stall();
|
||||
return;
|
||||
}
|
||||
usb_send_ctrl_response((const unsigned char*)descriptor,
|
||||
descriptor->bLength);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void
|
||||
get_configuration_descriptor()
|
||||
{
|
||||
usb_send_ctrl_response((unsigned char*)configuration_head,
|
||||
configuration_head->wTotalLength);
|
||||
}
|
||||
|
||||
static void
|
||||
get_configuration()
|
||||
{
|
||||
usb_send_ctrl_response((unsigned char*)&usb_configuration_value,
|
||||
sizeof(usb_configuration_value));
|
||||
}
|
||||
|
||||
/* Returns true if the configuration value changed */
|
||||
static int
|
||||
set_configuration()
|
||||
{
|
||||
notify_user(USB_EVENT_CONFIG);
|
||||
if (usb_configuration_value != LOW_BYTE(usb_setup_buffer.wValue)) {
|
||||
usb_configuration_value = LOW_BYTE(usb_setup_buffer.wValue);
|
||||
usb_arch_set_configuration(usb_configuration_value);
|
||||
usb_send_ctrl_status();
|
||||
return 1;
|
||||
} else {
|
||||
usb_send_ctrl_status();
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
get_device_status()
|
||||
{
|
||||
PRINTF("get_device_status\n");
|
||||
usb_send_ctrl_response((const unsigned char*)&usb_device_status,
|
||||
sizeof(usb_device_status));
|
||||
}
|
||||
|
||||
static void
|
||||
get_endpoint_status()
|
||||
{
|
||||
static uint16_t status;
|
||||
PRINTF("get_endpoint_status\n");
|
||||
if ((usb_setup_buffer.wIndex & 0x7f) == 0) {
|
||||
usb_send_ctrl_response((const unsigned char*)&zero_word,
|
||||
sizeof(zero_word));
|
||||
} else {
|
||||
status = usb_arch_get_ep_status(usb_setup_buffer.wIndex);
|
||||
usb_send_ctrl_response((uint8_t*)&status, sizeof(status));
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
get_interface_status()
|
||||
{
|
||||
PRINTF("get_interface_status\n");
|
||||
usb_send_ctrl_response((const unsigned char*)&zero_word,
|
||||
sizeof(zero_word));
|
||||
}
|
||||
|
||||
static void
|
||||
get_interface()
|
||||
{
|
||||
PRINTF("get_interface\n");
|
||||
if (usb_configuration_value == 0) usb_error_stall();
|
||||
else {
|
||||
usb_send_ctrl_response(&zero_byte,
|
||||
sizeof(zero_byte));
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static unsigned int
|
||||
handle_standard_requests()
|
||||
{
|
||||
switch(usb_setup_buffer.bmRequestType) {
|
||||
case 0x80: /* standard device IN requests */
|
||||
switch(usb_setup_buffer.bRequest) {
|
||||
case GET_DESCRIPTOR:
|
||||
switch (HIGH_BYTE(usb_setup_buffer.wValue)) {
|
||||
case DEVICE:
|
||||
get_device_descriptor();
|
||||
break;
|
||||
case CONFIGURATION:
|
||||
get_configuration_descriptor();
|
||||
break;
|
||||
case STRING:
|
||||
get_string_descriptor();
|
||||
break;
|
||||
default:
|
||||
/* Unknown descriptor */
|
||||
return 0;
|
||||
}
|
||||
break;
|
||||
case GET_CONFIGURATION:
|
||||
get_configuration();
|
||||
break;
|
||||
case GET_STATUS:
|
||||
get_device_status();
|
||||
break;
|
||||
case GET_INTERFACE:
|
||||
get_interface();
|
||||
break;
|
||||
default:
|
||||
return 0;
|
||||
}
|
||||
break;
|
||||
case 0x81: /* standard interface IN requests */
|
||||
switch(usb_setup_buffer.bRequest) {
|
||||
case GET_STATUS:
|
||||
get_interface_status();
|
||||
break;
|
||||
#ifdef HID_ENABLED
|
||||
case GET_DESCRIPTOR:
|
||||
switch (USB_setup_buffer.wValue.byte.high) {
|
||||
case REPORT:
|
||||
get_report_descriptor();
|
||||
break;
|
||||
}
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
return 0;
|
||||
}
|
||||
break;
|
||||
case 0x82: /* standard endpoint IN requests */
|
||||
switch(usb_setup_buffer.bRequest) {
|
||||
case GET_STATUS:
|
||||
get_endpoint_status();
|
||||
break;
|
||||
default:
|
||||
return 0;
|
||||
}
|
||||
break;
|
||||
case 0x00: /* standard device OUT requests */
|
||||
switch(usb_setup_buffer.bRequest) {
|
||||
case SET_ADDRESS:
|
||||
PRINTF("Address: %d\n", LOW_BYTE(usb_setup_buffer.wValue));
|
||||
usb_flags |= USB_FLAG_ADDRESS_PENDING;
|
||||
/* The actual setting of the address is done when the status packet
|
||||
is sent. */
|
||||
usb_send_ctrl_status();
|
||||
break;
|
||||
#if SETABLE_STRING_DESCRIPTORS > 0
|
||||
case SET_DESCRIPTOR:
|
||||
if (usb_setup_buffer.wValue.byte.high == STRING) {
|
||||
set_string_descriptor();
|
||||
} else {
|
||||
return 0;
|
||||
}
|
||||
break;
|
||||
#endif
|
||||
case SET_CONFIGURATION:
|
||||
if (set_configuration()) {
|
||||
#if 0
|
||||
config_msg.data.config = LOW_BYTE(usb_setup_buffer.wValue);
|
||||
notify_user(&config_msg);
|
||||
#endif
|
||||
}
|
||||
break;
|
||||
default:
|
||||
return 0;
|
||||
}
|
||||
break;
|
||||
case 0x01: /* standard interface OUT requests */
|
||||
switch(usb_setup_buffer.bRequest) {
|
||||
case SET_INTERFACE:
|
||||
/* Change interface here if we support more than one */
|
||||
usb_send_ctrl_status();
|
||||
break;
|
||||
default:
|
||||
return 0;
|
||||
}
|
||||
break;
|
||||
case 0x02: /* standard endpoint OUT requests */
|
||||
switch(usb_setup_buffer.bRequest) {
|
||||
case SET_FEATURE:
|
||||
case CLEAR_FEATURE:
|
||||
if (usb_setup_buffer.wValue == ENDPOINT_HALT_FEATURE) {
|
||||
usb_arch_halt_endpoint(usb_setup_buffer.wIndex, usb_setup_buffer.bRequest== SET_FEATURE);
|
||||
usb_send_ctrl_status();
|
||||
} else {
|
||||
usb_error_stall();
|
||||
}
|
||||
break;
|
||||
default:
|
||||
return 0;
|
||||
}
|
||||
break;
|
||||
#ifdef HID_ENABLED
|
||||
case 0xa1: /* class specific interface IN request*/
|
||||
switch(USB_setup_buffer.bRequest) {
|
||||
case GET_HID_REPORT:
|
||||
PRINTF("Get report\n");
|
||||
send_ctrl_response((code u_int8_t*)&zero_byte,
|
||||
sizeof(zero_byte));
|
||||
break;
|
||||
case GET_HID_IDLE:
|
||||
PRINTF("Get idle\n");
|
||||
send_ctrl_response((code u_int8_t*)&zero_byte,
|
||||
sizeof(zero_byte));
|
||||
break;
|
||||
default:
|
||||
return 0;
|
||||
}
|
||||
break;
|
||||
case 0x21: /* class specific interface OUT request*/
|
||||
switch(USB_setup_buffer.bRequest) {
|
||||
case SET_HID_IDLE:
|
||||
PRINTF("Set idle\n");
|
||||
send_ctrl_status();
|
||||
break;
|
||||
default:
|
||||
return 0;
|
||||
}
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
return 0;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
static const struct USBRequestHandler standard_request_handler =
|
||||
{
|
||||
0x00, 0x60,
|
||||
0x00, 0x00,
|
||||
handle_standard_requests
|
||||
};
|
||||
|
||||
static struct USBRequestHandlerHook standard_request_hook =
|
||||
{
|
||||
NULL,
|
||||
&standard_request_handler
|
||||
};
|
||||
|
||||
static void
|
||||
submit_setup(void)
|
||||
{
|
||||
ctrl_buffer.next = NULL;
|
||||
ctrl_buffer.data = (uint8_t*)&usb_setup_buffer;
|
||||
ctrl_buffer.left = sizeof(usb_setup_buffer);
|
||||
ctrl_buffer.flags = (USB_BUFFER_PACKET_END | USB_BUFFER_SETUP
|
||||
| USB_BUFFER_NOTIFY);
|
||||
ctrl_buffer.id = SETUP_ID;
|
||||
usb_submit_recv_buffer(0, &ctrl_buffer);
|
||||
}
|
||||
|
||||
PROCESS(usb_process, "USB");
|
||||
|
||||
PROCESS_THREAD(usb_process, ev , data)
|
||||
{
|
||||
PROCESS_BEGIN();
|
||||
PRINTF("USB process started\n");
|
||||
while(1) {
|
||||
PROCESS_WAIT_EVENT();
|
||||
if (ev == PROCESS_EVENT_EXIT) break;
|
||||
if (ev == PROCESS_EVENT_POLL) {
|
||||
unsigned int events = usb_arch_get_global_events();
|
||||
if (events) {
|
||||
if (events & USB_EVENT_RESET) {
|
||||
submit_setup();
|
||||
usb_configuration_value = 0;
|
||||
notify_user(USB_EVENT_RESET);
|
||||
}
|
||||
if (events & USB_EVENT_SUSPEND) {
|
||||
notify_user(USB_EVENT_SUSPEND);
|
||||
}
|
||||
if (events & USB_EVENT_RESUME) {
|
||||
notify_user(USB_EVENT_RESUME);
|
||||
}
|
||||
|
||||
}
|
||||
events = usb_get_ep_events(0);
|
||||
if (events) {
|
||||
if ((events & USB_EP_EVENT_NOTIFICATION)
|
||||
&& !(ctrl_buffer.flags & USB_BUFFER_SUBMITTED)) {
|
||||
/* PRINTF("Endpoint 0\n"); */
|
||||
if (ctrl_buffer.flags & USB_BUFFER_FAILED) {
|
||||
/* Something went wrong with the buffer, just wait for a
|
||||
new SETUP packet */
|
||||
PRINTF("Discarded\n");
|
||||
submit_setup();
|
||||
} else if (ctrl_buffer.flags & USB_BUFFER_SETUP) {
|
||||
struct USBRequestHandlerHook *hook = usb_request_handler_hooks;
|
||||
|
||||
PRINTF("Setup\n");
|
||||
{
|
||||
unsigned int i;
|
||||
for (i = 0; i< 8; i++) PRINTF(" %02x", ((unsigned char*)&usb_setup_buffer)[i]);
|
||||
PRINTF("\n");
|
||||
}
|
||||
|
||||
while(hook) {
|
||||
const struct USBRequestHandler *handler = hook->handler;
|
||||
/* Check if the handler matches the request */
|
||||
if (((handler->request_type ^ usb_setup_buffer.bmRequestType)
|
||||
& handler->request_type_mask) == 0
|
||||
&& ((handler->request ^ usb_setup_buffer.bRequest)
|
||||
& handler->request_mask) == 0) {
|
||||
if (handler->handler_func()) break;
|
||||
}
|
||||
hook = hook->next;
|
||||
}
|
||||
if (!hook) {
|
||||
/* No handler found */
|
||||
usb_error_stall();
|
||||
PRINTF("Unhandled setup: %02x %02x %04x %04x %04x\n",
|
||||
usb_setup_buffer.bmRequestType, usb_setup_buffer.bRequest,
|
||||
usb_setup_buffer.wValue, usb_setup_buffer.wIndex,
|
||||
usb_setup_buffer.wLength);
|
||||
}
|
||||
/* Check if any handler stalled the pipe, if so prepare for
|
||||
next setup */
|
||||
if (error_stall) {
|
||||
error_stall = 0;
|
||||
submit_setup();
|
||||
}
|
||||
} else {
|
||||
if (ctrl_buffer.id == IN_ID) {
|
||||
/* Receive status stage */
|
||||
PRINTF("Status OUT\n");
|
||||
ctrl_buffer.flags = USB_BUFFER_NOTIFY;
|
||||
ctrl_buffer.next = NULL;
|
||||
ctrl_buffer.data = NULL;
|
||||
ctrl_buffer.left = 0;
|
||||
ctrl_buffer.id = STATUS_OUT_ID;
|
||||
usb_submit_recv_buffer(0,&ctrl_buffer);
|
||||
} else if (ctrl_buffer.id == STATUS_OUT_ID) {
|
||||
PRINTF("Status OUT done\n");
|
||||
submit_setup();
|
||||
} else if (ctrl_buffer.id == STATUS_IN_ID) {
|
||||
PRINTF("Status IN done\n");
|
||||
if (usb_flags & USB_FLAG_ADDRESS_PENDING) {
|
||||
while(usb_send_pending(0));
|
||||
usb_arch_set_address(LOW_BYTE(usb_setup_buffer.wValue));
|
||||
usb_flags &= ~USB_FLAG_ADDRESS_PENDING;
|
||||
}
|
||||
submit_setup();
|
||||
} else if (ctrl_buffer.id == OUT_ID) {
|
||||
PRINTF("OUT\n");
|
||||
if (data_callback) {
|
||||
data_callback(ctrl_data, ctrl_data_len- ctrl_buffer.left);
|
||||
} else {
|
||||
usb_send_ctrl_status();
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
PROCESS_END();
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
usb_setup(void)
|
||||
{
|
||||
usb_arch_setup();
|
||||
process_start(&usb_process, NULL);
|
||||
usb_arch_set_global_event_process(&usb_process);
|
||||
usb_set_ep_event_process(0, &usb_process);
|
||||
|
||||
usb_register_request_handler(&standard_request_hook);
|
||||
}
|
||||
|
||||
void
|
||||
usb_register_request_handler(struct USBRequestHandlerHook *hook)
|
||||
{
|
||||
struct USBRequestHandlerHook **prevp = &usb_request_handler_hooks;
|
||||
/* Find last hook */
|
||||
while(*prevp) {
|
||||
prevp = &(*prevp)->next;
|
||||
}
|
||||
/* Add last */
|
||||
*prevp = hook;
|
||||
hook->next = NULL;
|
||||
}
|
||||
|
||||
void
|
||||
usb_prepend_request_handler(struct USBRequestHandlerHook *hook)
|
||||
{
|
||||
hook->next = usb_request_handler_hooks;
|
||||
usb_request_handler_hooks = hook;
|
||||
}
|
||||
|
||||
|
||||
unsigned int
|
||||
usb_get_current_configuration(void)
|
||||
{
|
||||
return usb_configuration_value;
|
||||
}
|
||||
|
||||
void
|
||||
usb_setup_bulk_endpoint(unsigned char addr)
|
||||
{
|
||||
usb_arch_setup_bulk_endpoint(addr);
|
||||
}
|
||||
|
||||
void
|
||||
usb_setup_interrupt_endpoint(unsigned char addr)
|
||||
{
|
||||
usb_arch_setup_interrupt_endpoint(addr);
|
||||
}
|
||||
|
||||
void
|
||||
usb_disable_endpoint(uint8_t addr)
|
||||
{
|
||||
usb_arch_discard_all_buffers(addr);
|
||||
usb_arch_disable_endpoint(addr);
|
||||
}
|
||||
|
||||
void
|
||||
usb_discard_all_buffers(uint8_t addr)
|
||||
{
|
||||
usb_arch_discard_all_buffers(addr);
|
||||
}
|
||||
|
||||
void
|
||||
usb_halt_endpoint(uint8_t addr, int halt)
|
||||
{
|
||||
usb_arch_halt_endpoint(addr, halt);
|
||||
}
|
||||
|
||||
int
|
||||
usb_send_pending(uint8_t addr)
|
||||
{
|
||||
return usb_arch_send_pending(addr);
|
||||
}
|
||||
|
|
@ -1,23 +0,0 @@
|
|||
#ifndef USB_CORE_H_YIKJDA7S1X__
|
||||
#define USB_CORE_H_YIKJDA7S1X__
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
struct USB_request_st usb_setup_buffer;
|
||||
|
||||
void
|
||||
usb_send_ctrl_response(const uint8_t *data, unsigned int len);
|
||||
|
||||
void
|
||||
usb_error_stall();
|
||||
|
||||
void
|
||||
usb_send_ctrl_status();
|
||||
|
||||
typedef void (*usb_ctrl_data_callback)(uint8_t *data, unsigned int length);
|
||||
|
||||
void
|
||||
usb_get_ctrl_data(uint8_t *data, unsigned int length,
|
||||
usb_ctrl_data_callback cb);
|
||||
|
||||
#endif /* USB_CORE_H_YIKJDA7S1X__ */
|
|
@ -1,185 +0,0 @@
|
|||
#ifndef USB_H_6PFTDPIMZM__
|
||||
#define USB_H_6PFTDPIMZM__
|
||||
#include <stdint.h>
|
||||
|
||||
/* Adapted from usb_kbd_enum.h in c5131-usb-kbd-light-1_0_2 package from
|
||||
Atmel */
|
||||
|
||||
/* These definitions assume a little endian architecture */
|
||||
|
||||
#ifdef __GNUC__
|
||||
#define BYTE_ALIGNED __attribute__ ((__packed__))
|
||||
#else
|
||||
#define BYTE_ALIGNED
|
||||
#endif
|
||||
|
||||
#define LOW_BYTE(x) ((unsigned char)x)
|
||||
#define HIGH_BYTE(x) ((unsigned char)(x>>8))
|
||||
|
||||
typedef uint8_t Uchar;
|
||||
typedef uint16_t Uint16;
|
||||
typedef uint32_t Uint32;
|
||||
|
||||
/*_____ S T A N D A R D R E Q U E S T S __________________________________*/
|
||||
|
||||
#define GET_STATUS 0x00
|
||||
#define GET_DEVICE 0x01
|
||||
#define CLEAR_FEATURE 0x01 /* see FEATURES below */
|
||||
#define GET_STRING 0x03
|
||||
#define SET_FEATURE 0x03 /* see FEATURES below */
|
||||
#define SET_ADDRESS 0x05
|
||||
#define GET_DESCRIPTOR 0x06
|
||||
#define SET_DESCRIPTOR 0x07
|
||||
#define GET_CONFIGURATION 0x08
|
||||
#define SET_CONFIGURATION 0x09
|
||||
#define GET_INTERFACE 0x0A
|
||||
#define SET_INTERFACE 0x0B
|
||||
#define SYNCH_FRAME 0x0C
|
||||
|
||||
#define GET_DEVICE_DESCRIPTOR 1
|
||||
#define GET_CONFIGURATION_DESCRIPTOR 4
|
||||
|
||||
#define REQUEST_DEVICE_STATUS 0x80
|
||||
#define REQUEST_INTERFACE_STATUS 0x81
|
||||
#define REQUEST_ENDPOINT_STATUS 0x82
|
||||
#define ZERO_TYPE 0x00
|
||||
#define INTERFACE_TYPE 0x01
|
||||
#define ENDPOINT_TYPE 0x02
|
||||
|
||||
/*_____ D E S C R I P T O R T Y P E S ____________________________________*/
|
||||
|
||||
#define DEVICE 0x01
|
||||
#define CONFIGURATION 0x02
|
||||
#define STRING 0x03
|
||||
#define INTERFACE 0x04
|
||||
#define ENDPOINT 0x05
|
||||
|
||||
/* HID specific */
|
||||
#define HID 0x21
|
||||
#define REPORT 0x22
|
||||
/* *** */
|
||||
|
||||
/*_____ S T A N D A R D F E A T U R E S __________________________________*/
|
||||
|
||||
#define DEVICE_REMOTE_WAKEUP_FEATURE 0x01
|
||||
#define ENDPOINT_HALT_FEATURE 0x00
|
||||
|
||||
/*_____ D E V I C E S T A T U S ___________________________________________*/
|
||||
|
||||
#define SELF_POWERED 1
|
||||
|
||||
/*_____ D E V I C E S T A T E _____________________________________________*/
|
||||
|
||||
#define ATTACHED 0
|
||||
#define POWERED 1
|
||||
#define DEFAULT 2
|
||||
#define ADDRESSED 3
|
||||
#define CONFIGURED 4
|
||||
#define SUSPENDED 5
|
||||
|
||||
#define USB_CONFIG_BUSPOWERED 0x80
|
||||
#define USB_CONFIG_SELFPOWERED 0x40
|
||||
#define USB_CONFIG_REMOTEWAKEUP 0x20
|
||||
|
||||
/* Class specific */
|
||||
#define CS_INTERFACE 0x24
|
||||
#define CS_ENDPOINT 0x25
|
||||
|
||||
/*_________________________________________________________ S T R U C T _____*/
|
||||
/*_____ U S B D E V I C E R E Q U E S T _________________________________*/
|
||||
|
||||
struct USB_request_st
|
||||
{
|
||||
Uchar bmRequestType; /* Characteristics of the request */
|
||||
Uchar bRequest; /* Specific request */
|
||||
Uint16 wValue;
|
||||
Uint16 wIndex; /* field that varies according to request */
|
||||
Uint16 wLength; /* Number of bytes to transfer if Data */
|
||||
};
|
||||
|
||||
|
||||
/*_____ U S B D E V I C E D E S C R I P T O R ___________________________*/
|
||||
|
||||
struct usb_st_device_descriptor
|
||||
{
|
||||
Uchar bLength; /* Size of this descriptor in bytes */
|
||||
Uchar bDescriptorType; /* DEVICE descriptor type */
|
||||
Uint16 bscUSB; /* Binay Coded Decimal Spec. release */
|
||||
Uchar bDeviceClass; /* Class code assigned by the USB */
|
||||
Uchar bDeviceSubClass; /* Sub-class code assigned by the USB */
|
||||
Uchar bDeviceProtocol; /* Protocol code assigned by the USB */
|
||||
Uchar bMaxPacketSize0; /* Max packet size for EP0 */
|
||||
Uint16 idVendor; /* Vendor ID. ATMEL = 0x03EB */
|
||||
Uint16 idProduct; /* Product ID assigned by the manufacturer */
|
||||
Uint16 bcdDevice; /* Device release number */
|
||||
Uchar iManufacturer; /* Index of manu. string descriptor */
|
||||
Uchar iProduct; /* Index of prod. string descriptor */
|
||||
Uchar iSerialNumber; /* Index of S.N. string descriptor */
|
||||
Uchar bNumConfigurations; /* Number of possible configurations */
|
||||
} BYTE_ALIGNED;
|
||||
|
||||
|
||||
/*_____ U S B C O N F I G U R A T I O N D E S C R I P T O R _____________*/
|
||||
|
||||
struct usb_st_configuration_descriptor
|
||||
{
|
||||
Uchar bLength; /* size of this descriptor in bytes */
|
||||
Uchar bDescriptorType; /* CONFIGURATION descriptor type */
|
||||
Uint16 wTotalLength; /* total length of data returned */
|
||||
Uchar bNumInterfaces; /* number of interfaces for this conf. */
|
||||
Uchar bConfigurationValue; /* value for SetConfiguration resquest */
|
||||
Uchar iConfiguration; /* index of string descriptor */
|
||||
Uchar bmAttibutes; /* Configuration characteristics */
|
||||
Uchar MaxPower; /* maximum power consumption */
|
||||
} BYTE_ALIGNED;
|
||||
|
||||
|
||||
/*_____ U S B I N T E R F A C E D E S C R I P T O R _____________________*/
|
||||
|
||||
struct usb_st_interface_descriptor
|
||||
{
|
||||
Uchar bLength; /* size of this descriptor in bytes */
|
||||
Uchar bDescriptorType; /* INTERFACE descriptor type */
|
||||
Uchar bInterfaceNumber; /* Number of interface */
|
||||
Uchar bAlternateSetting; /* value to select alternate setting */
|
||||
Uchar bNumEndpoints; /* Number of EP except EP 0 */
|
||||
Uchar bInterfaceClass; /* Class code assigned by the USB */
|
||||
Uchar bInterfaceSubClass; /* Sub-class code assigned by the USB */
|
||||
Uchar bInterfaceProtocol; /* Protocol code assigned by the USB */
|
||||
Uchar iInterface; /* Index of string descriptor */
|
||||
} BYTE_ALIGNED;
|
||||
|
||||
|
||||
/*_____ U S B E N D P O I N T D E S C R I P T O R _______________________*/
|
||||
|
||||
struct usb_st_endpoint_descriptor
|
||||
{
|
||||
Uchar bLength; /* Size of this descriptor in bytes */
|
||||
Uchar bDescriptorType; /* ENDPOINT descriptor type */
|
||||
Uchar bEndpointAddress; /* Address of the endpoint */
|
||||
Uchar bmAttributes; /* Endpoint's attributes */
|
||||
Uint16 wMaxPacketSize; /* Maximum packet size for this EP */
|
||||
Uchar bInterval; /* Interval for polling EP in ms */
|
||||
/* Uchar bRefresh; */
|
||||
/* Uchar bSynchAddress; */
|
||||
} BYTE_ALIGNED;
|
||||
|
||||
|
||||
/*_____ U S B S T R I N G D E S C R I P T O R _______________*/
|
||||
|
||||
struct usb_st_string_descriptor
|
||||
{
|
||||
Uchar bLength; /* size of this descriptor in bytes */
|
||||
Uchar bDescriptorType; /* STRING descriptor type */
|
||||
Uint16 wstring[1];/* unicode characters */
|
||||
} BYTE_ALIGNED;
|
||||
|
||||
|
||||
struct usb_st_language_descriptor
|
||||
{
|
||||
Uchar bLength; /* size of this descriptor in bytes */
|
||||
Uchar bDescriptorType; /* STRING descriptor type */
|
||||
Uint16 wlangid[1]; /* language id */
|
||||
} BYTE_ALIGNED;
|
||||
|
||||
#endif /* USB_H_6PFTDPIMZM__ */
|
|
@ -1,734 +0,0 @@
|
|||
/**************************************************************************//**
|
||||
* @file cmsis_armcc.h
|
||||
* @brief CMSIS Cortex-M Core Function/Instruction Header File
|
||||
* @version V4.30
|
||||
* @date 20. October 2015
|
||||
******************************************************************************/
|
||||
/* Copyright (c) 2009 - 2015 ARM LIMITED
|
||||
|
||||
All rights reserved.
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are met:
|
||||
- Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
- Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
- Neither the name of ARM nor the names of its contributors may be used
|
||||
to endorse or promote products derived from this software without
|
||||
specific prior written permission.
|
||||
*
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
POSSIBILITY OF SUCH DAMAGE.
|
||||
---------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
#ifndef __CMSIS_ARMCC_H
|
||||
#define __CMSIS_ARMCC_H
|
||||
|
||||
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677)
|
||||
#error "Please use ARM Compiler Toolchain V4.0.677 or later!"
|
||||
#endif
|
||||
|
||||
/* ########################### Core Function Access ########################### */
|
||||
/** \ingroup CMSIS_Core_FunctionInterface
|
||||
\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
|
||||
@{
|
||||
*/
|
||||
|
||||
/* intrinsic void __enable_irq(); */
|
||||
/* intrinsic void __disable_irq(); */
|
||||
|
||||
/**
|
||||
\brief Get Control Register
|
||||
\details Returns the content of the Control Register.
|
||||
\return Control Register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_CONTROL(void)
|
||||
{
|
||||
register uint32_t __regControl __ASM("control");
|
||||
return(__regControl);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Control Register
|
||||
\details Writes the given value to the Control Register.
|
||||
\param [in] control Control Register value to set
|
||||
*/
|
||||
__STATIC_INLINE void __set_CONTROL(uint32_t control)
|
||||
{
|
||||
register uint32_t __regControl __ASM("control");
|
||||
__regControl = control;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get IPSR Register
|
||||
\details Returns the content of the IPSR Register.
|
||||
\return IPSR Register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_IPSR(void)
|
||||
{
|
||||
register uint32_t __regIPSR __ASM("ipsr");
|
||||
return(__regIPSR);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get APSR Register
|
||||
\details Returns the content of the APSR Register.
|
||||
\return APSR Register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_APSR(void)
|
||||
{
|
||||
register uint32_t __regAPSR __ASM("apsr");
|
||||
return(__regAPSR);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get xPSR Register
|
||||
\details Returns the content of the xPSR Register.
|
||||
\return xPSR Register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_xPSR(void)
|
||||
{
|
||||
register uint32_t __regXPSR __ASM("xpsr");
|
||||
return(__regXPSR);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get Process Stack Pointer
|
||||
\details Returns the current value of the Process Stack Pointer (PSP).
|
||||
\return PSP Register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_PSP(void)
|
||||
{
|
||||
register uint32_t __regProcessStackPointer __ASM("psp");
|
||||
return(__regProcessStackPointer);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Process Stack Pointer
|
||||
\details Assigns the given value to the Process Stack Pointer (PSP).
|
||||
\param [in] topOfProcStack Process Stack Pointer value to set
|
||||
*/
|
||||
__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
|
||||
{
|
||||
register uint32_t __regProcessStackPointer __ASM("psp");
|
||||
__regProcessStackPointer = topOfProcStack;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get Main Stack Pointer
|
||||
\details Returns the current value of the Main Stack Pointer (MSP).
|
||||
\return MSP Register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_MSP(void)
|
||||
{
|
||||
register uint32_t __regMainStackPointer __ASM("msp");
|
||||
return(__regMainStackPointer);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Main Stack Pointer
|
||||
\details Assigns the given value to the Main Stack Pointer (MSP).
|
||||
\param [in] topOfMainStack Main Stack Pointer value to set
|
||||
*/
|
||||
__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
|
||||
{
|
||||
register uint32_t __regMainStackPointer __ASM("msp");
|
||||
__regMainStackPointer = topOfMainStack;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get Priority Mask
|
||||
\details Returns the current state of the priority mask bit from the Priority Mask Register.
|
||||
\return Priority Mask value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_PRIMASK(void)
|
||||
{
|
||||
register uint32_t __regPriMask __ASM("primask");
|
||||
return(__regPriMask);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Priority Mask
|
||||
\details Assigns the given value to the Priority Mask Register.
|
||||
\param [in] priMask Priority Mask
|
||||
*/
|
||||
__STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
|
||||
{
|
||||
register uint32_t __regPriMask __ASM("primask");
|
||||
__regPriMask = (priMask);
|
||||
}
|
||||
|
||||
|
||||
#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)
|
||||
|
||||
/**
|
||||
\brief Enable FIQ
|
||||
\details Enables FIQ interrupts by clearing the F-bit in the CPSR.
|
||||
Can only be executed in Privileged modes.
|
||||
*/
|
||||
#define __enable_fault_irq __enable_fiq
|
||||
|
||||
|
||||
/**
|
||||
\brief Disable FIQ
|
||||
\details Disables FIQ interrupts by setting the F-bit in the CPSR.
|
||||
Can only be executed in Privileged modes.
|
||||
*/
|
||||
#define __disable_fault_irq __disable_fiq
|
||||
|
||||
|
||||
/**
|
||||
\brief Get Base Priority
|
||||
\details Returns the current value of the Base Priority register.
|
||||
\return Base Priority register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_BASEPRI(void)
|
||||
{
|
||||
register uint32_t __regBasePri __ASM("basepri");
|
||||
return(__regBasePri);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Base Priority
|
||||
\details Assigns the given value to the Base Priority register.
|
||||
\param [in] basePri Base Priority value to set
|
||||
*/
|
||||
__STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
|
||||
{
|
||||
register uint32_t __regBasePri __ASM("basepri");
|
||||
__regBasePri = (basePri & 0xFFU);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Base Priority with condition
|
||||
\details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
|
||||
or the new value increases the BASEPRI priority level.
|
||||
\param [in] basePri Base Priority value to set
|
||||
*/
|
||||
__STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
|
||||
{
|
||||
register uint32_t __regBasePriMax __ASM("basepri_max");
|
||||
__regBasePriMax = (basePri & 0xFFU);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get Fault Mask
|
||||
\details Returns the current value of the Fault Mask register.
|
||||
\return Fault Mask register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_FAULTMASK(void)
|
||||
{
|
||||
register uint32_t __regFaultMask __ASM("faultmask");
|
||||
return(__regFaultMask);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Fault Mask
|
||||
\details Assigns the given value to the Fault Mask register.
|
||||
\param [in] faultMask Fault Mask value to set
|
||||
*/
|
||||
__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
|
||||
{
|
||||
register uint32_t __regFaultMask __ASM("faultmask");
|
||||
__regFaultMask = (faultMask & (uint32_t)1);
|
||||
}
|
||||
|
||||
#endif /* (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) */
|
||||
|
||||
|
||||
#if (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U)
|
||||
|
||||
/**
|
||||
\brief Get FPSCR
|
||||
\details Returns the current value of the Floating Point Status/Control register.
|
||||
\return Floating Point Status/Control register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_FPSCR(void)
|
||||
{
|
||||
#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
|
||||
register uint32_t __regfpscr __ASM("fpscr");
|
||||
return(__regfpscr);
|
||||
#else
|
||||
return(0U);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set FPSCR
|
||||
\details Assigns the given value to the Floating Point Status/Control register.
|
||||
\param [in] fpscr Floating Point Status/Control value to set
|
||||
*/
|
||||
__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
|
||||
{
|
||||
#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
|
||||
register uint32_t __regfpscr __ASM("fpscr");
|
||||
__regfpscr = (fpscr);
|
||||
#endif
|
||||
}
|
||||
|
||||
#endif /* (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U) */
|
||||
|
||||
|
||||
|
||||
/*@} end of CMSIS_Core_RegAccFunctions */
|
||||
|
||||
|
||||
/* ########################## Core Instruction Access ######################### */
|
||||
/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
|
||||
Access to dedicated instructions
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
\brief No Operation
|
||||
\details No Operation does nothing. This instruction can be used for code alignment purposes.
|
||||
*/
|
||||
#define __NOP __nop
|
||||
|
||||
|
||||
/**
|
||||
\brief Wait For Interrupt
|
||||
\details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
|
||||
*/
|
||||
#define __WFI __wfi
|
||||
|
||||
|
||||
/**
|
||||
\brief Wait For Event
|
||||
\details Wait For Event is a hint instruction that permits the processor to enter
|
||||
a low-power state until one of a number of events occurs.
|
||||
*/
|
||||
#define __WFE __wfe
|
||||
|
||||
|
||||
/**
|
||||
\brief Send Event
|
||||
\details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
|
||||
*/
|
||||
#define __SEV __sev
|
||||
|
||||
|
||||
/**
|
||||
\brief Instruction Synchronization Barrier
|
||||
\details Instruction Synchronization Barrier flushes the pipeline in the processor,
|
||||
so that all instructions following the ISB are fetched from cache or memory,
|
||||
after the instruction has been completed.
|
||||
*/
|
||||
#define __ISB() do {\
|
||||
__schedule_barrier();\
|
||||
__isb(0xF);\
|
||||
__schedule_barrier();\
|
||||
} while (0U)
|
||||
|
||||
/**
|
||||
\brief Data Synchronization Barrier
|
||||
\details Acts as a special kind of Data Memory Barrier.
|
||||
It completes when all explicit memory accesses before this instruction complete.
|
||||
*/
|
||||
#define __DSB() do {\
|
||||
__schedule_barrier();\
|
||||
__dsb(0xF);\
|
||||
__schedule_barrier();\
|
||||
} while (0U)
|
||||
|
||||
/**
|
||||
\brief Data Memory Barrier
|
||||
\details Ensures the apparent order of the explicit memory operations before
|
||||
and after the instruction, without ensuring their completion.
|
||||
*/
|
||||
#define __DMB() do {\
|
||||
__schedule_barrier();\
|
||||
__dmb(0xF);\
|
||||
__schedule_barrier();\
|
||||
} while (0U)
|
||||
|
||||
/**
|
||||
\brief Reverse byte order (32 bit)
|
||||
\details Reverses the byte order in integer value.
|
||||
\param [in] value Value to reverse
|
||||
\return Reversed value
|
||||
*/
|
||||
#define __REV __rev
|
||||
|
||||
|
||||
/**
|
||||
\brief Reverse byte order (16 bit)
|
||||
\details Reverses the byte order in two unsigned short values.
|
||||
\param [in] value Value to reverse
|
||||
\return Reversed value
|
||||
*/
|
||||
#ifndef __NO_EMBEDDED_ASM
|
||||
__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
|
||||
{
|
||||
rev16 r0, r0
|
||||
bx lr
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
\brief Reverse byte order in signed short value
|
||||
\details Reverses the byte order in a signed short value with sign extension to integer.
|
||||
\param [in] value Value to reverse
|
||||
\return Reversed value
|
||||
*/
|
||||
#ifndef __NO_EMBEDDED_ASM
|
||||
__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
|
||||
{
|
||||
revsh r0, r0
|
||||
bx lr
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief Rotate Right in unsigned value (32 bit)
|
||||
\details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
|
||||
\param [in] value Value to rotate
|
||||
\param [in] value Number of Bits to rotate
|
||||
\return Rotated value
|
||||
*/
|
||||
#define __ROR __ror
|
||||
|
||||
|
||||
/**
|
||||
\brief Breakpoint
|
||||
\details Causes the processor to enter Debug state.
|
||||
Debug tools can use this to investigate system state when the instruction at a particular address is reached.
|
||||
\param [in] value is ignored by the processor.
|
||||
If required, a debugger can use it to store additional information about the breakpoint.
|
||||
*/
|
||||
#define __BKPT(value) __breakpoint(value)
|
||||
|
||||
|
||||
/**
|
||||
\brief Reverse bit order of value
|
||||
\details Reverses the bit order of the given value.
|
||||
\param [in] value Value to reverse
|
||||
\return Reversed value
|
||||
*/
|
||||
#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)
|
||||
#define __RBIT __rbit
|
||||
#else
|
||||
__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
|
||||
{
|
||||
uint32_t result;
|
||||
int32_t s = 4 /*sizeof(v)*/ * 8 - 1; /* extra shift needed at end */
|
||||
|
||||
result = value; /* r will be reversed bits of v; first get LSB of v */
|
||||
for (value >>= 1U; value; value >>= 1U)
|
||||
{
|
||||
result <<= 1U;
|
||||
result |= value & 1U;
|
||||
s--;
|
||||
}
|
||||
result <<= s; /* shift when v's highest bits are zero */
|
||||
return(result);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief Count leading zeros
|
||||
\details Counts the number of leading zeros of a data value.
|
||||
\param [in] value Value to count the leading zeros
|
||||
\return number of leading zeros in value
|
||||
*/
|
||||
#define __CLZ __clz
|
||||
|
||||
|
||||
#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)
|
||||
|
||||
/**
|
||||
\brief LDR Exclusive (8 bit)
|
||||
\details Executes a exclusive LDR instruction for 8 bit value.
|
||||
\param [in] ptr Pointer to data
|
||||
\return value of type uint8_t at (*ptr)
|
||||
*/
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
|
||||
#define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
|
||||
#else
|
||||
#define __LDREXB(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr)) _Pragma("pop")
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief LDR Exclusive (16 bit)
|
||||
\details Executes a exclusive LDR instruction for 16 bit values.
|
||||
\param [in] ptr Pointer to data
|
||||
\return value of type uint16_t at (*ptr)
|
||||
*/
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
|
||||
#define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
|
||||
#else
|
||||
#define __LDREXH(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr)) _Pragma("pop")
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief LDR Exclusive (32 bit)
|
||||
\details Executes a exclusive LDR instruction for 32 bit values.
|
||||
\param [in] ptr Pointer to data
|
||||
\return value of type uint32_t at (*ptr)
|
||||
*/
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
|
||||
#define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
|
||||
#else
|
||||
#define __LDREXW(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr)) _Pragma("pop")
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief STR Exclusive (8 bit)
|
||||
\details Executes a exclusive STR instruction for 8 bit values.
|
||||
\param [in] value Value to store
|
||||
\param [in] ptr Pointer to location
|
||||
\return 0 Function succeeded
|
||||
\return 1 Function failed
|
||||
*/
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
|
||||
#define __STREXB(value, ptr) __strex(value, ptr)
|
||||
#else
|
||||
#define __STREXB(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief STR Exclusive (16 bit)
|
||||
\details Executes a exclusive STR instruction for 16 bit values.
|
||||
\param [in] value Value to store
|
||||
\param [in] ptr Pointer to location
|
||||
\return 0 Function succeeded
|
||||
\return 1 Function failed
|
||||
*/
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
|
||||
#define __STREXH(value, ptr) __strex(value, ptr)
|
||||
#else
|
||||
#define __STREXH(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief STR Exclusive (32 bit)
|
||||
\details Executes a exclusive STR instruction for 32 bit values.
|
||||
\param [in] value Value to store
|
||||
\param [in] ptr Pointer to location
|
||||
\return 0 Function succeeded
|
||||
\return 1 Function failed
|
||||
*/
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
|
||||
#define __STREXW(value, ptr) __strex(value, ptr)
|
||||
#else
|
||||
#define __STREXW(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief Remove the exclusive lock
|
||||
\details Removes the exclusive lock which is created by LDREX.
|
||||
*/
|
||||
#define __CLREX __clrex
|
||||
|
||||
|
||||
/**
|
||||
\brief Signed Saturate
|
||||
\details Saturates a signed value.
|
||||
\param [in] value Value to be saturated
|
||||
\param [in] sat Bit position to saturate to (1..32)
|
||||
\return Saturated value
|
||||
*/
|
||||
#define __SSAT __ssat
|
||||
|
||||
|
||||
/**
|
||||
\brief Unsigned Saturate
|
||||
\details Saturates an unsigned value.
|
||||
\param [in] value Value to be saturated
|
||||
\param [in] sat Bit position to saturate to (0..31)
|
||||
\return Saturated value
|
||||
*/
|
||||
#define __USAT __usat
|
||||
|
||||
|
||||
/**
|
||||
\brief Rotate Right with Extend (32 bit)
|
||||
\details Moves each bit of a bitstring right by one bit.
|
||||
The carry input is shifted in at the left end of the bitstring.
|
||||
\param [in] value Value to rotate
|
||||
\return Rotated value
|
||||
*/
|
||||
#ifndef __NO_EMBEDDED_ASM
|
||||
__attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
|
||||
{
|
||||
rrx r0, r0
|
||||
bx lr
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief LDRT Unprivileged (8 bit)
|
||||
\details Executes a Unprivileged LDRT instruction for 8 bit value.
|
||||
\param [in] ptr Pointer to data
|
||||
\return value of type uint8_t at (*ptr)
|
||||
*/
|
||||
#define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr))
|
||||
|
||||
|
||||
/**
|
||||
\brief LDRT Unprivileged (16 bit)
|
||||
\details Executes a Unprivileged LDRT instruction for 16 bit values.
|
||||
\param [in] ptr Pointer to data
|
||||
\return value of type uint16_t at (*ptr)
|
||||
*/
|
||||
#define __LDRHT(ptr) ((uint16_t) __ldrt(ptr))
|
||||
|
||||
|
||||
/**
|
||||
\brief LDRT Unprivileged (32 bit)
|
||||
\details Executes a Unprivileged LDRT instruction for 32 bit values.
|
||||
\param [in] ptr Pointer to data
|
||||
\return value of type uint32_t at (*ptr)
|
||||
*/
|
||||
#define __LDRT(ptr) ((uint32_t ) __ldrt(ptr))
|
||||
|
||||
|
||||
/**
|
||||
\brief STRT Unprivileged (8 bit)
|
||||
\details Executes a Unprivileged STRT instruction for 8 bit values.
|
||||
\param [in] value Value to store
|
||||
\param [in] ptr Pointer to location
|
||||
*/
|
||||
#define __STRBT(value, ptr) __strt(value, ptr)
|
||||
|
||||
|
||||
/**
|
||||
\brief STRT Unprivileged (16 bit)
|
||||
\details Executes a Unprivileged STRT instruction for 16 bit values.
|
||||
\param [in] value Value to store
|
||||
\param [in] ptr Pointer to location
|
||||
*/
|
||||
#define __STRHT(value, ptr) __strt(value, ptr)
|
||||
|
||||
|
||||
/**
|
||||
\brief STRT Unprivileged (32 bit)
|
||||
\details Executes a Unprivileged STRT instruction for 32 bit values.
|
||||
\param [in] value Value to store
|
||||
\param [in] ptr Pointer to location
|
||||
*/
|
||||
#define __STRT(value, ptr) __strt(value, ptr)
|
||||
|
||||
#endif /* (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) */
|
||||
|
||||
/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
|
||||
|
||||
|
||||
/* ################### Compiler specific Intrinsics ########################### */
|
||||
/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
|
||||
Access to dedicated SIMD instructions
|
||||
@{
|
||||
*/
|
||||
|
||||
#if (__CORTEX_M >= 0x04U) /* only for Cortex-M4 and above */
|
||||
|
||||
#define __SADD8 __sadd8
|
||||
#define __QADD8 __qadd8
|
||||
#define __SHADD8 __shadd8
|
||||
#define __UADD8 __uadd8
|
||||
#define __UQADD8 __uqadd8
|
||||
#define __UHADD8 __uhadd8
|
||||
#define __SSUB8 __ssub8
|
||||
#define __QSUB8 __qsub8
|
||||
#define __SHSUB8 __shsub8
|
||||
#define __USUB8 __usub8
|
||||
#define __UQSUB8 __uqsub8
|
||||
#define __UHSUB8 __uhsub8
|
||||
#define __SADD16 __sadd16
|
||||
#define __QADD16 __qadd16
|
||||
#define __SHADD16 __shadd16
|
||||
#define __UADD16 __uadd16
|
||||
#define __UQADD16 __uqadd16
|
||||
#define __UHADD16 __uhadd16
|
||||
#define __SSUB16 __ssub16
|
||||
#define __QSUB16 __qsub16
|
||||
#define __SHSUB16 __shsub16
|
||||
#define __USUB16 __usub16
|
||||
#define __UQSUB16 __uqsub16
|
||||
#define __UHSUB16 __uhsub16
|
||||
#define __SASX __sasx
|
||||
#define __QASX __qasx
|
||||
#define __SHASX __shasx
|
||||
#define __UASX __uasx
|
||||
#define __UQASX __uqasx
|
||||
#define __UHASX __uhasx
|
||||
#define __SSAX __ssax
|
||||
#define __QSAX __qsax
|
||||
#define __SHSAX __shsax
|
||||
#define __USAX __usax
|
||||
#define __UQSAX __uqsax
|
||||
#define __UHSAX __uhsax
|
||||
#define __USAD8 __usad8
|
||||
#define __USADA8 __usada8
|
||||
#define __SSAT16 __ssat16
|
||||
#define __USAT16 __usat16
|
||||
#define __UXTB16 __uxtb16
|
||||
#define __UXTAB16 __uxtab16
|
||||
#define __SXTB16 __sxtb16
|
||||
#define __SXTAB16 __sxtab16
|
||||
#define __SMUAD __smuad
|
||||
#define __SMUADX __smuadx
|
||||
#define __SMLAD __smlad
|
||||
#define __SMLADX __smladx
|
||||
#define __SMLALD __smlald
|
||||
#define __SMLALDX __smlaldx
|
||||
#define __SMUSD __smusd
|
||||
#define __SMUSDX __smusdx
|
||||
#define __SMLSD __smlsd
|
||||
#define __SMLSDX __smlsdx
|
||||
#define __SMLSLD __smlsld
|
||||
#define __SMLSLDX __smlsldx
|
||||
#define __SEL __sel
|
||||
#define __QADD __qadd
|
||||
#define __QSUB __qsub
|
||||
|
||||
#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
|
||||
((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
|
||||
|
||||
#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
|
||||
((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
|
||||
|
||||
#define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
|
||||
((int64_t)(ARG3) << 32U) ) >> 32U))
|
||||
|
||||
#endif /* (__CORTEX_M >= 0x04) */
|
||||
/*@} end of group CMSIS_SIMD_intrinsics */
|
||||
|
||||
|
||||
#endif /* __CMSIS_ARMCC_H */
|
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
@ -1,811 +0,0 @@
|
|||
/**************************************************************************//**
|
||||
* @file core_cm0.h
|
||||
* @brief CMSIS Cortex-M0 Core Peripheral Access Layer Header File
|
||||
* @version V4.30
|
||||
* @date 20. October 2015
|
||||
******************************************************************************/
|
||||
/* Copyright (c) 2009 - 2015 ARM LIMITED
|
||||
|
||||
All rights reserved.
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are met:
|
||||
- Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
- Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
- Neither the name of ARM nor the names of its contributors may be used
|
||||
to endorse or promote products derived from this software without
|
||||
specific prior written permission.
|
||||
*
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
POSSIBILITY OF SUCH DAMAGE.
|
||||
---------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef __CORE_CM0_H_GENERIC
|
||||
#define __CORE_CM0_H_GENERIC
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
|
||||
CMSIS violates the following MISRA-C:2004 rules:
|
||||
|
||||
\li Required Rule 8.5, object/function definition in header file.<br>
|
||||
Function definitions in header files are used to allow 'inlining'.
|
||||
|
||||
\li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
|
||||
Unions are used for effective representation of core registers.
|
||||
|
||||
\li Advisory Rule 19.7, Function-like macro defined.<br>
|
||||
Function-like macros are used to allow more efficient code.
|
||||
*/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* CMSIS definitions
|
||||
******************************************************************************/
|
||||
/**
|
||||
\ingroup Cortex_M0
|
||||
@{
|
||||
*/
|
||||
|
||||
/* CMSIS CM0 definitions */
|
||||
#define __CM0_CMSIS_VERSION_MAIN (0x04U) /*!< [31:16] CMSIS HAL main version */
|
||||
#define __CM0_CMSIS_VERSION_SUB (0x1EU) /*!< [15:0] CMSIS HAL sub version */
|
||||
#define __CM0_CMSIS_VERSION ((__CM0_CMSIS_VERSION_MAIN << 16U) | \
|
||||
__CM0_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
|
||||
|
||||
#define __CORTEX_M (0x00U) /*!< Cortex-M Core */
|
||||
|
||||
|
||||
#if defined ( __CC_ARM )
|
||||
#define __ASM __asm /*!< asm keyword for ARM Compiler */
|
||||
#define __INLINE __inline /*!< inline keyword for ARM Compiler */
|
||||
#define __STATIC_INLINE static __inline
|
||||
|
||||
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#define __ASM __asm /*!< asm keyword for ARM Compiler */
|
||||
#define __INLINE __inline /*!< inline keyword for ARM Compiler */
|
||||
#define __STATIC_INLINE static __inline
|
||||
|
||||
#elif defined ( __GNUC__ )
|
||||
#define __ASM __asm /*!< asm keyword for GNU Compiler */
|
||||
#define __INLINE inline /*!< inline keyword for GNU Compiler */
|
||||
#define __STATIC_INLINE static inline
|
||||
|
||||
#elif defined ( __ICCARM__ )
|
||||
#define __ASM __asm /*!< asm keyword for IAR Compiler */
|
||||
#define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
|
||||
#define __STATIC_INLINE static inline
|
||||
|
||||
#elif defined ( __TMS470__ )
|
||||
#define __ASM __asm /*!< asm keyword for TI CCS Compiler */
|
||||
#define __STATIC_INLINE static inline
|
||||
|
||||
#elif defined ( __TASKING__ )
|
||||
#define __ASM __asm /*!< asm keyword for TASKING Compiler */
|
||||
#define __INLINE inline /*!< inline keyword for TASKING Compiler */
|
||||
#define __STATIC_INLINE static inline
|
||||
|
||||
#elif defined ( __CSMC__ )
|
||||
#define __packed
|
||||
#define __ASM _asm /*!< asm keyword for COSMIC Compiler */
|
||||
#define __INLINE inline /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */
|
||||
#define __STATIC_INLINE static inline
|
||||
|
||||
#else
|
||||
#error Unknown compiler
|
||||
#endif
|
||||
|
||||
/** __FPU_USED indicates whether an FPU is used or not.
|
||||
This core does not support an FPU at all
|
||||
*/
|
||||
#define __FPU_USED 0U
|
||||
|
||||
#if defined ( __CC_ARM )
|
||||
#if defined __TARGET_FPU_VFP
|
||||
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
|
||||
#endif
|
||||
|
||||
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#if defined __ARM_PCS_VFP
|
||||
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
|
||||
#endif
|
||||
|
||||
#elif defined ( __GNUC__ )
|
||||
#if defined (__VFP_FP__) && !defined(__SOFTFP__)
|
||||
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
|
||||
#endif
|
||||
|
||||
#elif defined ( __ICCARM__ )
|
||||
#if defined __ARMVFP__
|
||||
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
|
||||
#endif
|
||||
|
||||
#elif defined ( __TMS470__ )
|
||||
#if defined __TI_VFP_SUPPORT__
|
||||
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
|
||||
#endif
|
||||
|
||||
#elif defined ( __TASKING__ )
|
||||
#if defined __FPU_VFP__
|
||||
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
|
||||
#endif
|
||||
|
||||
#elif defined ( __CSMC__ )
|
||||
#if ( __CSMC__ & 0x400U)
|
||||
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
#include "core_cmInstr.h" /* Core Instruction Access */
|
||||
#include "core_cmFunc.h" /* Core Function Access */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __CORE_CM0_H_GENERIC */
|
||||
|
||||
#ifndef __CMSIS_GENERIC
|
||||
|
||||
#ifndef __CORE_CM0_H_DEPENDANT
|
||||
#define __CORE_CM0_H_DEPENDANT
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* check device defines and use defaults */
|
||||
#if defined __CHECK_DEVICE_DEFINES
|
||||
#ifndef __CM0_REV
|
||||
#define __CM0_REV 0x0000U
|
||||
#warning "__CM0_REV not defined in device header file; using default!"
|
||||
#endif
|
||||
|
||||
#ifndef __NVIC_PRIO_BITS
|
||||
#define __NVIC_PRIO_BITS 2U
|
||||
#warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
|
||||
#endif
|
||||
|
||||
#ifndef __Vendor_SysTickConfig
|
||||
#define __Vendor_SysTickConfig 0U
|
||||
#warning "__Vendor_SysTickConfig not defined in device header file; using default!"
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* IO definitions (access restrictions to peripheral registers) */
|
||||
/**
|
||||
\defgroup CMSIS_glob_defs CMSIS Global Defines
|
||||
|
||||
<strong>IO Type Qualifiers</strong> are used
|
||||
\li to specify the access to peripheral variables.
|
||||
\li for automatic generation of peripheral register debug information.
|
||||
*/
|
||||
#ifdef __cplusplus
|
||||
#define __I volatile /*!< Defines 'read only' permissions */
|
||||
#else
|
||||
#define __I volatile const /*!< Defines 'read only' permissions */
|
||||
#endif
|
||||
#define __O volatile /*!< Defines 'write only' permissions */
|
||||
#define __IO volatile /*!< Defines 'read / write' permissions */
|
||||
|
||||
/* following defines should be used for structure members */
|
||||
#define __IM volatile const /*! Defines 'read only' structure member permissions */
|
||||
#define __OM volatile /*! Defines 'write only' structure member permissions */
|
||||
#define __IOM volatile /*! Defines 'read / write' structure member permissions */
|
||||
|
||||
/*@} end of group Cortex_M0 */
|
||||
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Register Abstraction
|
||||
Core Register contain:
|
||||
- Core Register
|
||||
- Core NVIC Register
|
||||
- Core SCB Register
|
||||
- Core SysTick Register
|
||||
******************************************************************************/
|
||||
/**
|
||||
\defgroup CMSIS_core_register Defines and Type Definitions
|
||||
\brief Type definitions and defines for Cortex-M processor based devices.
|
||||
*/
|
||||
|
||||
/**
|
||||
\ingroup CMSIS_core_register
|
||||
\defgroup CMSIS_CORE Status and Control Registers
|
||||
\brief Core Register type definitions.
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
\brief Union type to access the Application Program Status Register (APSR).
|
||||
*/
|
||||
typedef union
|
||||
{
|
||||
struct
|
||||
{
|
||||
uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */
|
||||
uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
|
||||
uint32_t C:1; /*!< bit: 29 Carry condition code flag */
|
||||
uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
|
||||
uint32_t N:1; /*!< bit: 31 Negative condition code flag */
|
||||
} b; /*!< Structure used for bit access */
|
||||
uint32_t w; /*!< Type used for word access */
|
||||
} APSR_Type;
|
||||
|
||||
/* APSR Register Definitions */
|
||||
#define APSR_N_Pos 31U /*!< APSR: N Position */
|
||||
#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */
|
||||
|
||||
#define APSR_Z_Pos 30U /*!< APSR: Z Position */
|
||||
#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */
|
||||
|
||||
#define APSR_C_Pos 29U /*!< APSR: C Position */
|
||||
#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */
|
||||
|
||||
#define APSR_V_Pos 28U /*!< APSR: V Position */
|
||||
#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */
|
||||
|
||||
|
||||
/**
|
||||
\brief Union type to access the Interrupt Program Status Register (IPSR).
|
||||
*/
|
||||
typedef union
|
||||
{
|
||||
struct
|
||||
{
|
||||
uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
|
||||
uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
|
||||
} b; /*!< Structure used for bit access */
|
||||
uint32_t w; /*!< Type used for word access */
|
||||
} IPSR_Type;
|
||||
|
||||
/* IPSR Register Definitions */
|
||||
#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */
|
||||
#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */
|
||||
|
||||
|
||||
/**
|
||||
\brief Union type to access the Special-Purpose Program Status Registers (xPSR).
|
||||
*/
|
||||
typedef union
|
||||
{
|
||||
struct
|
||||
{
|
||||
uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
|
||||
uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */
|
||||
uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */
|
||||
uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */
|
||||
uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
|
||||
uint32_t C:1; /*!< bit: 29 Carry condition code flag */
|
||||
uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
|
||||
uint32_t N:1; /*!< bit: 31 Negative condition code flag */
|
||||
} b; /*!< Structure used for bit access */
|
||||
uint32_t w; /*!< Type used for word access */
|
||||
} xPSR_Type;
|
||||
|
||||
/* xPSR Register Definitions */
|
||||
#define xPSR_N_Pos 31U /*!< xPSR: N Position */
|
||||
#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */
|
||||
|
||||
#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */
|
||||
#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */
|
||||
|
||||
#define xPSR_C_Pos 29U /*!< xPSR: C Position */
|
||||
#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */
|
||||
|
||||
#define xPSR_V_Pos 28U /*!< xPSR: V Position */
|
||||
#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */
|
||||
|
||||
#define xPSR_T_Pos 24U /*!< xPSR: T Position */
|
||||
#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */
|
||||
|
||||
#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */
|
||||
#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */
|
||||
|
||||
|
||||
/**
|
||||
\brief Union type to access the Control Registers (CONTROL).
|
||||
*/
|
||||
typedef union
|
||||
{
|
||||
struct
|
||||
{
|
||||
uint32_t _reserved0:1; /*!< bit: 0 Reserved */
|
||||
uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */
|
||||
uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */
|
||||
} b; /*!< Structure used for bit access */
|
||||
uint32_t w; /*!< Type used for word access */
|
||||
} CONTROL_Type;
|
||||
|
||||
/* CONTROL Register Definitions */
|
||||
#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */
|
||||
#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */
|
||||
|
||||
/*@} end of group CMSIS_CORE */
|
||||
|
||||
|
||||
/**
|
||||
\ingroup CMSIS_core_register
|
||||
\defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC)
|
||||
\brief Type definitions for the NVIC Registers
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
\brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
__IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
|
||||
uint32_t RESERVED0[31U];
|
||||
__IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
|
||||
uint32_t RSERVED1[31U];
|
||||
__IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
|
||||
uint32_t RESERVED2[31U];
|
||||
__IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
|
||||
uint32_t RESERVED3[31U];
|
||||
uint32_t RESERVED4[64U];
|
||||
__IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */
|
||||
} NVIC_Type;
|
||||
|
||||
/*@} end of group CMSIS_NVIC */
|
||||
|
||||
|
||||
/**
|
||||
\ingroup CMSIS_core_register
|
||||
\defgroup CMSIS_SCB System Control Block (SCB)
|
||||
\brief Type definitions for the System Control Block Registers
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
\brief Structure type to access the System Control Block (SCB).
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
__IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
|
||||
__IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
|
||||
uint32_t RESERVED0;
|
||||
__IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
|
||||
__IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
|
||||
__IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
|
||||
uint32_t RESERVED1;
|
||||
__IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */
|
||||
__IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
|
||||
} SCB_Type;
|
||||
|
||||
/* SCB CPUID Register Definitions */
|
||||
#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */
|
||||
#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
|
||||
|
||||
#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */
|
||||
#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
|
||||
|
||||
#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */
|
||||
#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
|
||||
|
||||
#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */
|
||||
#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
|
||||
|
||||
#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */
|
||||
#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
|
||||
|
||||
/* SCB Interrupt Control State Register Definitions */
|
||||
#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */
|
||||
#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */
|
||||
|
||||
#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */
|
||||
#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
|
||||
|
||||
#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */
|
||||
#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
|
||||
|
||||
#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */
|
||||
#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
|
||||
|
||||
#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */
|
||||
#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
|
||||
|
||||
#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */
|
||||
#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
|
||||
|
||||
#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */
|
||||
#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
|
||||
|
||||
#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */
|
||||
#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
|
||||
|
||||
#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */
|
||||
#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */
|
||||
|
||||
/* SCB Application Interrupt and Reset Control Register Definitions */
|
||||
#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */
|
||||
#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
|
||||
|
||||
#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */
|
||||
#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
|
||||
|
||||
#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */
|
||||
#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
|
||||
|
||||
#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */
|
||||
#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
|
||||
|
||||
#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */
|
||||
#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
|
||||
|
||||
/* SCB System Control Register Definitions */
|
||||
#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */
|
||||
#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
|
||||
|
||||
#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */
|
||||
#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
|
||||
|
||||
#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */
|
||||
#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
|
||||
|
||||
/* SCB Configuration Control Register Definitions */
|
||||
#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */
|
||||
#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
|
||||
|
||||
#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */
|
||||
#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
|
||||
|
||||
/* SCB System Handler Control and State Register Definitions */
|
||||
#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */
|
||||
#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
|
||||
|
||||
/*@} end of group CMSIS_SCB */
|
||||
|
||||
|
||||
/**
|
||||
\ingroup CMSIS_core_register
|
||||
\defgroup CMSIS_SysTick System Tick Timer (SysTick)
|
||||
\brief Type definitions for the System Timer Registers.
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
\brief Structure type to access the System Timer (SysTick).
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
|
||||
__IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
|
||||
__IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
|
||||
__IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
|
||||
} SysTick_Type;
|
||||
|
||||
/* SysTick Control / Status Register Definitions */
|
||||
#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */
|
||||
#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
|
||||
|
||||
#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */
|
||||
#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
|
||||
|
||||
#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */
|
||||
#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
|
||||
|
||||
#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */
|
||||
#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */
|
||||
|
||||
/* SysTick Reload Register Definitions */
|
||||
#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */
|
||||
#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */
|
||||
|
||||
/* SysTick Current Register Definitions */
|
||||
#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */
|
||||
#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */
|
||||
|
||||
/* SysTick Calibration Register Definitions */
|
||||
#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */
|
||||
#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
|
||||
|
||||
#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */
|
||||
#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
|
||||
|
||||
#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */
|
||||
#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */
|
||||
|
||||
/*@} end of group CMSIS_SysTick */
|
||||
|
||||
|
||||
/**
|
||||
\ingroup CMSIS_core_register
|
||||
\defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
|
||||
\brief Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.
|
||||
Therefore they are not covered by the Cortex-M0 header file.
|
||||
@{
|
||||
*/
|
||||
/*@} end of group CMSIS_CoreDebug */
|
||||
|
||||
|
||||
/**
|
||||
\ingroup CMSIS_core_register
|
||||
\defgroup CMSIS_core_bitfield Core register bit field macros
|
||||
\brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
\brief Mask and shift a bit field value for use in a register bit range.
|
||||
\param[in] field Name of the register bit field.
|
||||
\param[in] value Value of the bit field.
|
||||
\return Masked and shifted value.
|
||||
*/
|
||||
#define _VAL2FLD(field, value) ((value << field ## _Pos) & field ## _Msk)
|
||||
|
||||
/**
|
||||
\brief Mask and shift a register value to extract a bit filed value.
|
||||
\param[in] field Name of the register bit field.
|
||||
\param[in] value Value of register.
|
||||
\return Masked and shifted bit field value.
|
||||
*/
|
||||
#define _FLD2VAL(field, value) ((value & field ## _Msk) >> field ## _Pos)
|
||||
|
||||
/*@} end of group CMSIS_core_bitfield */
|
||||
|
||||
|
||||
/**
|
||||
\ingroup CMSIS_core_register
|
||||
\defgroup CMSIS_core_base Core Definitions
|
||||
\brief Definitions for base addresses, unions, and structures.
|
||||
@{
|
||||
*/
|
||||
|
||||
/* Memory mapping of Cortex-M0 Hardware */
|
||||
#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
|
||||
#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
|
||||
#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
|
||||
#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
|
||||
|
||||
#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
|
||||
#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
|
||||
#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
|
||||
|
||||
|
||||
/*@} */
|
||||
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Hardware Abstraction Layer
|
||||
Core Function Interface contains:
|
||||
- Core NVIC Functions
|
||||
- Core SysTick Functions
|
||||
- Core Register Access Functions
|
||||
******************************************************************************/
|
||||
/**
|
||||
\defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
|
||||
*/
|
||||
|
||||
|
||||
|
||||
/* ########################## NVIC functions #################################### */
|
||||
/**
|
||||
\ingroup CMSIS_Core_FunctionInterface
|
||||
\defgroup CMSIS_Core_NVICFunctions NVIC Functions
|
||||
\brief Functions that manage interrupts and exceptions via the NVIC.
|
||||
@{
|
||||
*/
|
||||
|
||||
/* Interrupt Priorities are WORD accessible only under ARMv6M */
|
||||
/* The following MACROS handle generation of the register offset and byte masks */
|
||||
#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL)
|
||||
#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) )
|
||||
#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) )
|
||||
|
||||
|
||||
/**
|
||||
\brief Get External Interrupt Enable State
|
||||
\details Returns whether a device-specific interrupt is enabled in the NVIC interrupt controller.
|
||||
\param [in] IRQn External interrupt number. Value cannot be negative.
|
||||
\return 0 Interrupt is disabled.
|
||||
\return 1 Interrupt is enabled.
|
||||
*/
|
||||
__STATIC_INLINE uint32_t NVIC_IsIRQEnabled(IRQn_Type IRQn)
|
||||
{
|
||||
return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Enable External Interrupt
|
||||
\details Enables a device-specific interrupt in the NVIC interrupt controller.
|
||||
\param [in] IRQn External interrupt number. Value cannot be negative.
|
||||
*/
|
||||
__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
|
||||
{
|
||||
NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Disable External Interrupt
|
||||
\details Disables a device-specific interrupt in the NVIC interrupt controller.
|
||||
\param [in] IRQn External interrupt number. Value cannot be negative.
|
||||
*/
|
||||
__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
|
||||
{
|
||||
NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get Pending Interrupt
|
||||
\details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt.
|
||||
\param [in] IRQn Interrupt number.
|
||||
\return 0 Interrupt status is not pending.
|
||||
\return 1 Interrupt status is pending.
|
||||
*/
|
||||
__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
|
||||
{
|
||||
return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Pending Interrupt
|
||||
\details Sets the pending bit of an external interrupt.
|
||||
\param [in] IRQn Interrupt number. Value cannot be negative.
|
||||
*/
|
||||
__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
|
||||
{
|
||||
NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Clear Pending Interrupt
|
||||
\details Clears the pending bit of an external interrupt.
|
||||
\param [in] IRQn External interrupt number. Value cannot be negative.
|
||||
*/
|
||||
__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
|
||||
{
|
||||
NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Interrupt Priority
|
||||
\details Sets the priority of an interrupt.
|
||||
\note The priority cannot be set for every core interrupt.
|
||||
\param [in] IRQn Interrupt number.
|
||||
\param [in] priority Priority to set.
|
||||
*/
|
||||
__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
|
||||
{
|
||||
if ((int32_t)(IRQn) < 0)
|
||||
{
|
||||
SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
|
||||
(((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
|
||||
}
|
||||
else
|
||||
{
|
||||
NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
|
||||
(((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get Interrupt Priority
|
||||
\details Reads the priority of an interrupt.
|
||||
The interrupt number can be positive to specify an external (device specific) interrupt,
|
||||
or negative to specify an internal (core) interrupt.
|
||||
\param [in] IRQn Interrupt number.
|
||||
\return Interrupt Priority.
|
||||
Value is aligned automatically to the implemented priority bits of the microcontroller.
|
||||
*/
|
||||
__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
|
||||
{
|
||||
|
||||
if ((int32_t)(IRQn) < 0)
|
||||
{
|
||||
return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
|
||||
}
|
||||
else
|
||||
{
|
||||
return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief System Reset
|
||||
\details Initiates a system reset request to reset the MCU.
|
||||
*/
|
||||
__STATIC_INLINE void NVIC_SystemReset(void)
|
||||
{
|
||||
__DSB(); /* Ensure all outstanding memory accesses included
|
||||
buffered write are completed before reset */
|
||||
SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
|
||||
SCB_AIRCR_SYSRESETREQ_Msk);
|
||||
__DSB(); /* Ensure completion of memory access */
|
||||
|
||||
for(;;) /* wait until reset */
|
||||
{
|
||||
__NOP();
|
||||
}
|
||||
}
|
||||
|
||||
/*@} end of CMSIS_Core_NVICFunctions */
|
||||
|
||||
|
||||
|
||||
/* ################################## SysTick function ############################################ */
|
||||
/**
|
||||
\ingroup CMSIS_Core_FunctionInterface
|
||||
\defgroup CMSIS_Core_SysTickFunctions SysTick Functions
|
||||
\brief Functions that configure the System.
|
||||
@{
|
||||
*/
|
||||
|
||||
#if (__Vendor_SysTickConfig == 0U)
|
||||
|
||||
/**
|
||||
\brief System Tick Configuration
|
||||
\details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
|
||||
Counter is in free running mode to generate periodic interrupts.
|
||||
\param [in] ticks Number of ticks between two interrupts.
|
||||
\return 0 Function succeeded.
|
||||
\return 1 Function failed.
|
||||
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
|
||||
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
|
||||
must contain a vendor-specific implementation of this function.
|
||||
*/
|
||||
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
|
||||
{
|
||||
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
|
||||
{
|
||||
return (1UL); /* Reload value impossible */
|
||||
}
|
||||
|
||||
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
|
||||
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
|
||||
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
|
||||
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
|
||||
SysTick_CTRL_TICKINT_Msk |
|
||||
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
|
||||
return (0UL); /* Function successful */
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
/*@} end of CMSIS_Core_SysTickFunctions */
|
||||
|
||||
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __CORE_CM0_H_DEPENDANT */
|
||||
|
||||
#endif /* __CMSIS_GENERIC */
|
|
@ -1,927 +0,0 @@
|
|||
/**************************************************************************//**
|
||||
* @file core_cm0plus.h
|
||||
* @brief CMSIS Cortex-M0+ Core Peripheral Access Layer Header File
|
||||
* @version V4.30
|
||||
* @date 20. October 2015
|
||||
******************************************************************************/
|
||||
/* Copyright (c) 2009 - 2015 ARM LIMITED
|
||||
|
||||
All rights reserved.
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are met:
|
||||
- Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
- Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
- Neither the name of ARM nor the names of its contributors may be used
|
||||
to endorse or promote products derived from this software without
|
||||
specific prior written permission.
|
||||
*
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
POSSIBILITY OF SUCH DAMAGE.
|
||||
---------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef __CORE_CM0PLUS_H_GENERIC
|
||||
#define __CORE_CM0PLUS_H_GENERIC
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
|
||||
CMSIS violates the following MISRA-C:2004 rules:
|
||||
|
||||
\li Required Rule 8.5, object/function definition in header file.<br>
|
||||
Function definitions in header files are used to allow 'inlining'.
|
||||
|
||||
\li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
|
||||
Unions are used for effective representation of core registers.
|
||||
|
||||
\li Advisory Rule 19.7, Function-like macro defined.<br>
|
||||
Function-like macros are used to allow more efficient code.
|
||||
*/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* CMSIS definitions
|
||||
******************************************************************************/
|
||||
/**
|
||||
\ingroup Cortex_M0_plus
|
||||
@{
|
||||
*/
|
||||
|
||||
/* CMSIS CM0+ definitions */
|
||||
#define __CM0PLUS_CMSIS_VERSION_MAIN (0x04U) /*!< [31:16] CMSIS HAL main version */
|
||||
#define __CM0PLUS_CMSIS_VERSION_SUB (0x1EU) /*!< [15:0] CMSIS HAL sub version */
|
||||
#define __CM0PLUS_CMSIS_VERSION ((__CM0PLUS_CMSIS_VERSION_MAIN << 16U) | \
|
||||
__CM0PLUS_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
|
||||
|
||||
#define __CORTEX_M (0x00U) /*!< Cortex-M Core */
|
||||
|
||||
|
||||
#if defined ( __CC_ARM )
|
||||
#define __ASM __asm /*!< asm keyword for ARM Compiler */
|
||||
#define __INLINE __inline /*!< inline keyword for ARM Compiler */
|
||||
#define __STATIC_INLINE static __inline
|
||||
|
||||
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#define __ASM __asm /*!< asm keyword for ARM Compiler */
|
||||
#define __INLINE __inline /*!< inline keyword for ARM Compiler */
|
||||
#define __STATIC_INLINE static __inline
|
||||
|
||||
#elif defined ( __GNUC__ )
|
||||
#define __ASM __asm /*!< asm keyword for GNU Compiler */
|
||||
#define __INLINE inline /*!< inline keyword for GNU Compiler */
|
||||
#define __STATIC_INLINE static inline
|
||||
|
||||
#elif defined ( __ICCARM__ )
|
||||
#define __ASM __asm /*!< asm keyword for IAR Compiler */
|
||||
#define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
|
||||
#define __STATIC_INLINE static inline
|
||||
|
||||
#elif defined ( __TMS470__ )
|
||||
#define __ASM __asm /*!< asm keyword for TI CCS Compiler */
|
||||
#define __STATIC_INLINE static inline
|
||||
|
||||
#elif defined ( __TASKING__ )
|
||||
#define __ASM __asm /*!< asm keyword for TASKING Compiler */
|
||||
#define __INLINE inline /*!< inline keyword for TASKING Compiler */
|
||||
#define __STATIC_INLINE static inline
|
||||
|
||||
#elif defined ( __CSMC__ )
|
||||
#define __packed
|
||||
#define __ASM _asm /*!< asm keyword for COSMIC Compiler */
|
||||
#define __INLINE inline /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */
|
||||
#define __STATIC_INLINE static inline
|
||||
|
||||
#else
|
||||
#error Unknown compiler
|
||||
#endif
|
||||
|
||||
/** __FPU_USED indicates whether an FPU is used or not.
|
||||
This core does not support an FPU at all
|
||||
*/
|
||||
#define __FPU_USED 0U
|
||||
|
||||
#if defined ( __CC_ARM )
|
||||
#if defined __TARGET_FPU_VFP
|
||||
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
|
||||
#endif
|
||||
|
||||
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#if defined __ARM_PCS_VFP
|
||||
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
|
||||
#endif
|
||||
|
||||
#elif defined ( __GNUC__ )
|
||||
#if defined (__VFP_FP__) && !defined(__SOFTFP__)
|
||||
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
|
||||
#endif
|
||||
|
||||
#elif defined ( __ICCARM__ )
|
||||
#if defined __ARMVFP__
|
||||
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
|
||||
#endif
|
||||
|
||||
#elif defined ( __TMS470__ )
|
||||
#if defined __TI_VFP_SUPPORT__
|
||||
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
|
||||
#endif
|
||||
|
||||
#elif defined ( __TASKING__ )
|
||||
#if defined __FPU_VFP__
|
||||
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
|
||||
#endif
|
||||
|
||||
#elif defined ( __CSMC__ )
|
||||
#if ( __CSMC__ & 0x400U)
|
||||
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
#include "core_cmInstr.h" /* Core Instruction Access */
|
||||
#include "core_cmFunc.h" /* Core Function Access */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __CORE_CM0PLUS_H_GENERIC */
|
||||
|
||||
#ifndef __CMSIS_GENERIC
|
||||
|
||||
#ifndef __CORE_CM0PLUS_H_DEPENDANT
|
||||
#define __CORE_CM0PLUS_H_DEPENDANT
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* check device defines and use defaults */
|
||||
#if defined __CHECK_DEVICE_DEFINES
|
||||
#ifndef __CM0PLUS_REV
|
||||
#define __CM0PLUS_REV 0x0000U
|
||||
#warning "__CM0PLUS_REV not defined in device header file; using default!"
|
||||
#endif
|
||||
|
||||
#ifndef __MPU_PRESENT
|
||||
#define __MPU_PRESENT 0U
|
||||
#warning "__MPU_PRESENT not defined in device header file; using default!"
|
||||
#endif
|
||||
|
||||
#ifndef __VTOR_PRESENT
|
||||
#define __VTOR_PRESENT 0U
|
||||
#warning "__VTOR_PRESENT not defined in device header file; using default!"
|
||||
#endif
|
||||
|
||||
#ifndef __NVIC_PRIO_BITS
|
||||
#define __NVIC_PRIO_BITS 2U
|
||||
#warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
|
||||
#endif
|
||||
|
||||
#ifndef __Vendor_SysTickConfig
|
||||
#define __Vendor_SysTickConfig 0U
|
||||
#warning "__Vendor_SysTickConfig not defined in device header file; using default!"
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* IO definitions (access restrictions to peripheral registers) */
|
||||
/**
|
||||
\defgroup CMSIS_glob_defs CMSIS Global Defines
|
||||
|
||||
<strong>IO Type Qualifiers</strong> are used
|
||||
\li to specify the access to peripheral variables.
|
||||
\li for automatic generation of peripheral register debug information.
|
||||
*/
|
||||
#ifdef __cplusplus
|
||||
#define __I volatile /*!< Defines 'read only' permissions */
|
||||
#else
|
||||
#define __I volatile const /*!< Defines 'read only' permissions */
|
||||
#endif
|
||||
#define __O volatile /*!< Defines 'write only' permissions */
|
||||
#define __IO volatile /*!< Defines 'read / write' permissions */
|
||||
|
||||
/* following defines should be used for structure members */
|
||||
#define __IM volatile const /*! Defines 'read only' structure member permissions */
|
||||
#define __OM volatile /*! Defines 'write only' structure member permissions */
|
||||
#define __IOM volatile /*! Defines 'read / write' structure member permissions */
|
||||
|
||||
/*@} end of group Cortex-M0+ */
|
||||
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Register Abstraction
|
||||
Core Register contain:
|
||||
- Core Register
|
||||
- Core NVIC Register
|
||||
- Core SCB Register
|
||||
- Core SysTick Register
|
||||
- Core MPU Register
|
||||
******************************************************************************/
|
||||
/**
|
||||
\defgroup CMSIS_core_register Defines and Type Definitions
|
||||
\brief Type definitions and defines for Cortex-M processor based devices.
|
||||
*/
|
||||
|
||||
/**
|
||||
\ingroup CMSIS_core_register
|
||||
\defgroup CMSIS_CORE Status and Control Registers
|
||||
\brief Core Register type definitions.
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
\brief Union type to access the Application Program Status Register (APSR).
|
||||
*/
|
||||
typedef union
|
||||
{
|
||||
struct
|
||||
{
|
||||
uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */
|
||||
uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
|
||||
uint32_t C:1; /*!< bit: 29 Carry condition code flag */
|
||||
uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
|
||||
uint32_t N:1; /*!< bit: 31 Negative condition code flag */
|
||||
} b; /*!< Structure used for bit access */
|
||||
uint32_t w; /*!< Type used for word access */
|
||||
} APSR_Type;
|
||||
|
||||
/* APSR Register Definitions */
|
||||
#define APSR_N_Pos 31U /*!< APSR: N Position */
|
||||
#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */
|
||||
|
||||
#define APSR_Z_Pos 30U /*!< APSR: Z Position */
|
||||
#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */
|
||||
|
||||
#define APSR_C_Pos 29U /*!< APSR: C Position */
|
||||
#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */
|
||||
|
||||
#define APSR_V_Pos 28U /*!< APSR: V Position */
|
||||
#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */
|
||||
|
||||
|
||||
/**
|
||||
\brief Union type to access the Interrupt Program Status Register (IPSR).
|
||||
*/
|
||||
typedef union
|
||||
{
|
||||
struct
|
||||
{
|
||||
uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
|
||||
uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
|
||||
} b; /*!< Structure used for bit access */
|
||||
uint32_t w; /*!< Type used for word access */
|
||||
} IPSR_Type;
|
||||
|
||||
/* IPSR Register Definitions */
|
||||
#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */
|
||||
#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */
|
||||
|
||||
|
||||
/**
|
||||
\brief Union type to access the Special-Purpose Program Status Registers (xPSR).
|
||||
*/
|
||||
typedef union
|
||||
{
|
||||
struct
|
||||
{
|
||||
uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
|
||||
uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */
|
||||
uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */
|
||||
uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */
|
||||
uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
|
||||
uint32_t C:1; /*!< bit: 29 Carry condition code flag */
|
||||
uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
|
||||
uint32_t N:1; /*!< bit: 31 Negative condition code flag */
|
||||
} b; /*!< Structure used for bit access */
|
||||
uint32_t w; /*!< Type used for word access */
|
||||
} xPSR_Type;
|
||||
|
||||
/* xPSR Register Definitions */
|
||||
#define xPSR_N_Pos 31U /*!< xPSR: N Position */
|
||||
#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */
|
||||
|
||||
#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */
|
||||
#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */
|
||||
|
||||
#define xPSR_C_Pos 29U /*!< xPSR: C Position */
|
||||
#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */
|
||||
|
||||
#define xPSR_V_Pos 28U /*!< xPSR: V Position */
|
||||
#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */
|
||||
|
||||
#define xPSR_T_Pos 24U /*!< xPSR: T Position */
|
||||
#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */
|
||||
|
||||
#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */
|
||||
#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */
|
||||
|
||||
|
||||
/**
|
||||
\brief Union type to access the Control Registers (CONTROL).
|
||||
*/
|
||||
typedef union
|
||||
{
|
||||
struct
|
||||
{
|
||||
uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */
|
||||
uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */
|
||||
uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */
|
||||
} b; /*!< Structure used for bit access */
|
||||
uint32_t w; /*!< Type used for word access */
|
||||
} CONTROL_Type;
|
||||
|
||||
/* CONTROL Register Definitions */
|
||||
#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */
|
||||
#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */
|
||||
|
||||
#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */
|
||||
#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */
|
||||
|
||||
/*@} end of group CMSIS_CORE */
|
||||
|
||||
|
||||
/**
|
||||
\ingroup CMSIS_core_register
|
||||
\defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC)
|
||||
\brief Type definitions for the NVIC Registers
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
\brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
__IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
|
||||
uint32_t RESERVED0[31U];
|
||||
__IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
|
||||
uint32_t RSERVED1[31U];
|
||||
__IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
|
||||
uint32_t RESERVED2[31U];
|
||||
__IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
|
||||
uint32_t RESERVED3[31U];
|
||||
uint32_t RESERVED4[64U];
|
||||
__IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */
|
||||
} NVIC_Type;
|
||||
|
||||
/*@} end of group CMSIS_NVIC */
|
||||
|
||||
|
||||
/**
|
||||
\ingroup CMSIS_core_register
|
||||
\defgroup CMSIS_SCB System Control Block (SCB)
|
||||
\brief Type definitions for the System Control Block Registers
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
\brief Structure type to access the System Control Block (SCB).
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
__IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
|
||||
__IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
|
||||
#if (__VTOR_PRESENT == 1U)
|
||||
__IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */
|
||||
#else
|
||||
uint32_t RESERVED0;
|
||||
#endif
|
||||
__IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
|
||||
__IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
|
||||
__IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
|
||||
uint32_t RESERVED1;
|
||||
__IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */
|
||||
__IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
|
||||
} SCB_Type;
|
||||
|
||||
/* SCB CPUID Register Definitions */
|
||||
#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */
|
||||
#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
|
||||
|
||||
#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */
|
||||
#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
|
||||
|
||||
#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */
|
||||
#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
|
||||
|
||||
#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */
|
||||
#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
|
||||
|
||||
#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */
|
||||
#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
|
||||
|
||||
/* SCB Interrupt Control State Register Definitions */
|
||||
#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */
|
||||
#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */
|
||||
|
||||
#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */
|
||||
#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
|
||||
|
||||
#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */
|
||||
#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
|
||||
|
||||
#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */
|
||||
#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
|
||||
|
||||
#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */
|
||||
#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
|
||||
|
||||
#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */
|
||||
#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
|
||||
|
||||
#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */
|
||||
#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
|
||||
|
||||
#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */
|
||||
#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
|
||||
|
||||
#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */
|
||||
#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */
|
||||
|
||||
#if (__VTOR_PRESENT == 1U)
|
||||
/* SCB Interrupt Control State Register Definitions */
|
||||
#define SCB_VTOR_TBLOFF_Pos 8U /*!< SCB VTOR: TBLOFF Position */
|
||||
#define SCB_VTOR_TBLOFF_Msk (0xFFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
|
||||
#endif
|
||||
|
||||
/* SCB Application Interrupt and Reset Control Register Definitions */
|
||||
#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */
|
||||
#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
|
||||
|
||||
#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */
|
||||
#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
|
||||
|
||||
#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */
|
||||
#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
|
||||
|
||||
#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */
|
||||
#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
|
||||
|
||||
#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */
|
||||
#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
|
||||
|
||||
/* SCB System Control Register Definitions */
|
||||
#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */
|
||||
#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
|
||||
|
||||
#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */
|
||||
#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
|
||||
|
||||
#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */
|
||||
#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
|
||||
|
||||
/* SCB Configuration Control Register Definitions */
|
||||
#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */
|
||||
#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
|
||||
|
||||
#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */
|
||||
#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
|
||||
|
||||
/* SCB System Handler Control and State Register Definitions */
|
||||
#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */
|
||||
#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
|
||||
|
||||
/*@} end of group CMSIS_SCB */
|
||||
|
||||
|
||||
/**
|
||||
\ingroup CMSIS_core_register
|
||||
\defgroup CMSIS_SysTick System Tick Timer (SysTick)
|
||||
\brief Type definitions for the System Timer Registers.
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
\brief Structure type to access the System Timer (SysTick).
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
|
||||
__IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
|
||||
__IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
|
||||
__IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
|
||||
} SysTick_Type;
|
||||
|
||||
/* SysTick Control / Status Register Definitions */
|
||||
#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */
|
||||
#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
|
||||
|
||||
#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */
|
||||
#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
|
||||
|
||||
#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */
|
||||
#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
|
||||
|
||||
#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */
|
||||
#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */
|
||||
|
||||
/* SysTick Reload Register Definitions */
|
||||
#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */
|
||||
#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */
|
||||
|
||||
/* SysTick Current Register Definitions */
|
||||
#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */
|
||||
#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */
|
||||
|
||||
/* SysTick Calibration Register Definitions */
|
||||
#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */
|
||||
#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
|
||||
|
||||
#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */
|
||||
#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
|
||||
|
||||
#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */
|
||||
#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */
|
||||
|
||||
/*@} end of group CMSIS_SysTick */
|
||||
|
||||
#if (__MPU_PRESENT == 1U)
|
||||
/**
|
||||
\ingroup CMSIS_core_register
|
||||
\defgroup CMSIS_MPU Memory Protection Unit (MPU)
|
||||
\brief Type definitions for the Memory Protection Unit (MPU)
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
\brief Structure type to access the Memory Protection Unit (MPU).
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
__IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */
|
||||
__IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */
|
||||
__IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */
|
||||
__IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */
|
||||
__IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */
|
||||
} MPU_Type;
|
||||
|
||||
/* MPU Type Register Definitions */
|
||||
#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */
|
||||
#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */
|
||||
|
||||
#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */
|
||||
#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */
|
||||
|
||||
#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */
|
||||
#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */
|
||||
|
||||
/* MPU Control Register Definitions */
|
||||
#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */
|
||||
#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */
|
||||
|
||||
#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */
|
||||
#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */
|
||||
|
||||
#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */
|
||||
#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */
|
||||
|
||||
/* MPU Region Number Register Definitions */
|
||||
#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */
|
||||
#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */
|
||||
|
||||
/* MPU Region Base Address Register Definitions */
|
||||
#define MPU_RBAR_ADDR_Pos 8U /*!< MPU RBAR: ADDR Position */
|
||||
#define MPU_RBAR_ADDR_Msk (0xFFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */
|
||||
|
||||
#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */
|
||||
#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */
|
||||
|
||||
#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */
|
||||
#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */
|
||||
|
||||
/* MPU Region Attribute and Size Register Definitions */
|
||||
#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */
|
||||
#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */
|
||||
|
||||
#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */
|
||||
#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */
|
||||
|
||||
#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */
|
||||
#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */
|
||||
|
||||
#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */
|
||||
#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */
|
||||
|
||||
#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */
|
||||
#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */
|
||||
|
||||
#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */
|
||||
#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */
|
||||
|
||||
#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */
|
||||
#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */
|
||||
|
||||
#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */
|
||||
#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */
|
||||
|
||||
#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */
|
||||
#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */
|
||||
|
||||
#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */
|
||||
#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */
|
||||
|
||||
/*@} end of group CMSIS_MPU */
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\ingroup CMSIS_core_register
|
||||
\defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
|
||||
\brief Cortex-M0+ Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.
|
||||
Therefore they are not covered by the Cortex-M0+ header file.
|
||||
@{
|
||||
*/
|
||||
/*@} end of group CMSIS_CoreDebug */
|
||||
|
||||
|
||||
/**
|
||||
\ingroup CMSIS_core_register
|
||||
\defgroup CMSIS_core_bitfield Core register bit field macros
|
||||
\brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
\brief Mask and shift a bit field value for use in a register bit range.
|
||||
\param[in] field Name of the register bit field.
|
||||
\param[in] value Value of the bit field.
|
||||
\return Masked and shifted value.
|
||||
*/
|
||||
#define _VAL2FLD(field, value) ((value << field ## _Pos) & field ## _Msk)
|
||||
|
||||
/**
|
||||
\brief Mask and shift a register value to extract a bit filed value.
|
||||
\param[in] field Name of the register bit field.
|
||||
\param[in] value Value of register.
|
||||
\return Masked and shifted bit field value.
|
||||
*/
|
||||
#define _FLD2VAL(field, value) ((value & field ## _Msk) >> field ## _Pos)
|
||||
|
||||
/*@} end of group CMSIS_core_bitfield */
|
||||
|
||||
|
||||
/**
|
||||
\ingroup CMSIS_core_register
|
||||
\defgroup CMSIS_core_base Core Definitions
|
||||
\brief Definitions for base addresses, unions, and structures.
|
||||
@{
|
||||
*/
|
||||
|
||||
/* Memory mapping of Cortex-M0+ Hardware */
|
||||
#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
|
||||
#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
|
||||
#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
|
||||
#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
|
||||
|
||||
#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
|
||||
#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
|
||||
#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
|
||||
|
||||
#if (__MPU_PRESENT == 1U)
|
||||
#define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */
|
||||
#define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */
|
||||
#endif
|
||||
|
||||
/*@} */
|
||||
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Hardware Abstraction Layer
|
||||
Core Function Interface contains:
|
||||
- Core NVIC Functions
|
||||
- Core SysTick Functions
|
||||
- Core Register Access Functions
|
||||
******************************************************************************/
|
||||
/**
|
||||
\defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
|
||||
*/
|
||||
|
||||
|
||||
|
||||
/* ########################## NVIC functions #################################### */
|
||||
/**
|
||||
\ingroup CMSIS_Core_FunctionInterface
|
||||
\defgroup CMSIS_Core_NVICFunctions NVIC Functions
|
||||
\brief Functions that manage interrupts and exceptions via the NVIC.
|
||||
@{
|
||||
*/
|
||||
|
||||
/* Interrupt Priorities are WORD accessible only under ARMv6M */
|
||||
/* The following MACROS handle generation of the register offset and byte masks */
|
||||
#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL)
|
||||
#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) )
|
||||
#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) )
|
||||
|
||||
|
||||
/**
|
||||
\brief Get External Interrupt Enable State
|
||||
\details Returns whether a device-specific interrupt is enabled in the NVIC interrupt controller.
|
||||
\param [in] IRQn External interrupt number. Value cannot be negative.
|
||||
\return 0 Interrupt is disabled.
|
||||
\return 1 Interrupt is enabled.
|
||||
*/
|
||||
__STATIC_INLINE uint32_t NVIC_IsIRQEnabled(IRQn_Type IRQn)
|
||||
{
|
||||
return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Enable External Interrupt
|
||||
\details Enables a device-specific interrupt in the NVIC interrupt controller.
|
||||
\param [in] IRQn External interrupt number. Value cannot be negative.
|
||||
*/
|
||||
__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
|
||||
{
|
||||
NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Disable External Interrupt
|
||||
\details Disables a device-specific interrupt in the NVIC interrupt controller.
|
||||
\param [in] IRQn External interrupt number. Value cannot be negative.
|
||||
*/
|
||||
__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
|
||||
{
|
||||
NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get Pending Interrupt
|
||||
\details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt.
|
||||
\param [in] IRQn Interrupt number.
|
||||
\return 0 Interrupt status is not pending.
|
||||
\return 1 Interrupt status is pending.
|
||||
*/
|
||||
__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
|
||||
{
|
||||
return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Pending Interrupt
|
||||
\details Sets the pending bit of an external interrupt.
|
||||
\param [in] IRQn Interrupt number. Value cannot be negative.
|
||||
*/
|
||||
__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
|
||||
{
|
||||
NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Clear Pending Interrupt
|
||||
\details Clears the pending bit of an external interrupt.
|
||||
\param [in] IRQn External interrupt number. Value cannot be negative.
|
||||
*/
|
||||
__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
|
||||
{
|
||||
NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Interrupt Priority
|
||||
\details Sets the priority of an interrupt.
|
||||
\note The priority cannot be set for every core interrupt.
|
||||
\param [in] IRQn Interrupt number.
|
||||
\param [in] priority Priority to set.
|
||||
*/
|
||||
__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
|
||||
{
|
||||
if ((int32_t)(IRQn) < 0)
|
||||
{
|
||||
SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
|
||||
(((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
|
||||
}
|
||||
else
|
||||
{
|
||||
NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
|
||||
(((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get Interrupt Priority
|
||||
\details Reads the priority of an interrupt.
|
||||
The interrupt number can be positive to specify an external (device specific) interrupt,
|
||||
or negative to specify an internal (core) interrupt.
|
||||
\param [in] IRQn Interrupt number.
|
||||
\return Interrupt Priority.
|
||||
Value is aligned automatically to the implemented priority bits of the microcontroller.
|
||||
*/
|
||||
__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
|
||||
{
|
||||
|
||||
if ((int32_t)(IRQn) < 0)
|
||||
{
|
||||
return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
|
||||
}
|
||||
else
|
||||
{
|
||||
return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief System Reset
|
||||
\details Initiates a system reset request to reset the MCU.
|
||||
*/
|
||||
__STATIC_INLINE void NVIC_SystemReset(void)
|
||||
{
|
||||
__DSB(); /* Ensure all outstanding memory accesses included
|
||||
buffered write are completed before reset */
|
||||
SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
|
||||
SCB_AIRCR_SYSRESETREQ_Msk);
|
||||
__DSB(); /* Ensure completion of memory access */
|
||||
|
||||
for(;;) /* wait until reset */
|
||||
{
|
||||
__NOP();
|
||||
}
|
||||
}
|
||||
|
||||
/*@} end of CMSIS_Core_NVICFunctions */
|
||||
|
||||
|
||||
|
||||
/* ################################## SysTick function ############################################ */
|
||||
/**
|
||||
\ingroup CMSIS_Core_FunctionInterface
|
||||
\defgroup CMSIS_Core_SysTickFunctions SysTick Functions
|
||||
\brief Functions that configure the System.
|
||||
@{
|
||||
*/
|
||||
|
||||
#if (__Vendor_SysTickConfig == 0U)
|
||||
|
||||
/**
|
||||
\brief System Tick Configuration
|
||||
\details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
|
||||
Counter is in free running mode to generate periodic interrupts.
|
||||
\param [in] ticks Number of ticks between two interrupts.
|
||||
\return 0 Function succeeded.
|
||||
\return 1 Function failed.
|
||||
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
|
||||
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
|
||||
must contain a vendor-specific implementation of this function.
|
||||
*/
|
||||
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
|
||||
{
|
||||
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
|
||||
{
|
||||
return (1UL); /* Reload value impossible */
|
||||
}
|
||||
|
||||
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
|
||||
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
|
||||
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
|
||||
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
|
||||
SysTick_CTRL_TICKINT_Msk |
|
||||
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
|
||||
return (0UL); /* Function successful */
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
/*@} end of CMSIS_Core_SysTickFunctions */
|
||||
|
||||
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __CORE_CM0PLUS_H_DEPENDANT */
|
||||
|
||||
#endif /* __CMSIS_GENERIC */
|
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
@ -1,87 +0,0 @@
|
|||
/**************************************************************************//**
|
||||
* @file core_cmFunc.h
|
||||
* @brief CMSIS Cortex-M Core Function Access Header File
|
||||
* @version V4.30
|
||||
* @date 20. October 2015
|
||||
******************************************************************************/
|
||||
/* Copyright (c) 2009 - 2015 ARM LIMITED
|
||||
|
||||
All rights reserved.
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are met:
|
||||
- Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
- Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
- Neither the name of ARM nor the names of its contributors may be used
|
||||
to endorse or promote products derived from this software without
|
||||
specific prior written permission.
|
||||
*
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
POSSIBILITY OF SUCH DAMAGE.
|
||||
---------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef __CORE_CMFUNC_H
|
||||
#define __CORE_CMFUNC_H
|
||||
|
||||
|
||||
/* ########################### Core Function Access ########################### */
|
||||
/** \ingroup CMSIS_Core_FunctionInterface
|
||||
\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
|
||||
@{
|
||||
*/
|
||||
|
||||
/*------------------ RealView Compiler -----------------*/
|
||||
#if defined ( __CC_ARM )
|
||||
#include "cmsis_armcc.h"
|
||||
|
||||
/*------------------ ARM Compiler V6 -------------------*/
|
||||
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#include "cmsis_armcc_V6.h"
|
||||
|
||||
/*------------------ GNU Compiler ----------------------*/
|
||||
#elif defined ( __GNUC__ )
|
||||
#include "cmsis_gcc.h"
|
||||
|
||||
/*------------------ ICC Compiler ----------------------*/
|
||||
#elif defined ( __ICCARM__ )
|
||||
#include <cmsis_iar.h>
|
||||
|
||||
/*------------------ TI CCS Compiler -------------------*/
|
||||
#elif defined ( __TMS470__ )
|
||||
#include <cmsis_ccs.h>
|
||||
|
||||
/*------------------ TASKING Compiler ------------------*/
|
||||
#elif defined ( __TASKING__ )
|
||||
/*
|
||||
* The CMSIS functions have been implemented as intrinsics in the compiler.
|
||||
* Please use "carm -?i" to get an up to date list of all intrinsics,
|
||||
* Including the CMSIS ones.
|
||||
*/
|
||||
|
||||
/*------------------ COSMIC Compiler -------------------*/
|
||||
#elif defined ( __CSMC__ )
|
||||
#include <cmsis_csm.h>
|
||||
|
||||
#endif
|
||||
|
||||
/*@} end of CMSIS_Core_RegAccFunctions */
|
||||
|
||||
#endif /* __CORE_CMFUNC_H */
|
|
@ -1,87 +0,0 @@
|
|||
/**************************************************************************//**
|
||||
* @file core_cmInstr.h
|
||||
* @brief CMSIS Cortex-M Core Instruction Access Header File
|
||||
* @version V4.30
|
||||
* @date 20. October 2015
|
||||
******************************************************************************/
|
||||
/* Copyright (c) 2009 - 2015 ARM LIMITED
|
||||
|
||||
All rights reserved.
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are met:
|
||||
- Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
- Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
- Neither the name of ARM nor the names of its contributors may be used
|
||||
to endorse or promote products derived from this software without
|
||||
specific prior written permission.
|
||||
*
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
POSSIBILITY OF SUCH DAMAGE.
|
||||
---------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef __CORE_CMINSTR_H
|
||||
#define __CORE_CMINSTR_H
|
||||
|
||||
|
||||
/* ########################## Core Instruction Access ######################### */
|
||||
/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
|
||||
Access to dedicated instructions
|
||||
@{
|
||||
*/
|
||||
|
||||
/*------------------ RealView Compiler -----------------*/
|
||||
#if defined ( __CC_ARM )
|
||||
#include "cmsis_armcc.h"
|
||||
|
||||
/*------------------ ARM Compiler V6 -------------------*/
|
||||
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#include "cmsis_armcc_V6.h"
|
||||
|
||||
/*------------------ GNU Compiler ----------------------*/
|
||||
#elif defined ( __GNUC__ )
|
||||
#include "cmsis_gcc.h"
|
||||
|
||||
/*------------------ ICC Compiler ----------------------*/
|
||||
#elif defined ( __ICCARM__ )
|
||||
#include <cmsis_iar.h>
|
||||
|
||||
/*------------------ TI CCS Compiler -------------------*/
|
||||
#elif defined ( __TMS470__ )
|
||||
#include <cmsis_ccs.h>
|
||||
|
||||
/*------------------ TASKING Compiler ------------------*/
|
||||
#elif defined ( __TASKING__ )
|
||||
/*
|
||||
* The CMSIS functions have been implemented as intrinsics in the compiler.
|
||||
* Please use "carm -?i" to get an up to date list of all intrinsics,
|
||||
* Including the CMSIS ones.
|
||||
*/
|
||||
|
||||
/*------------------ COSMIC Compiler -------------------*/
|
||||
#elif defined ( __CSMC__ )
|
||||
#include <cmsis_csm.h>
|
||||
|
||||
#endif
|
||||
|
||||
/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
|
||||
|
||||
#endif /* __CORE_CMINSTR_H */
|
|
@ -1,96 +0,0 @@
|
|||
/**************************************************************************//**
|
||||
* @file core_cmSimd.h
|
||||
* @brief CMSIS Cortex-M SIMD Header File
|
||||
* @version V4.30
|
||||
* @date 20. October 2015
|
||||
******************************************************************************/
|
||||
/* Copyright (c) 2009 - 2015 ARM LIMITED
|
||||
|
||||
All rights reserved.
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are met:
|
||||
- Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
- Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
- Neither the name of ARM nor the names of its contributors may be used
|
||||
to endorse or promote products derived from this software without
|
||||
specific prior written permission.
|
||||
*
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
POSSIBILITY OF SUCH DAMAGE.
|
||||
---------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef __CORE_CMSIMD_H
|
||||
#define __CORE_CMSIMD_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
|
||||
/* ################### Compiler specific Intrinsics ########################### */
|
||||
/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
|
||||
Access to dedicated SIMD instructions
|
||||
@{
|
||||
*/
|
||||
|
||||
/*------------------ RealView Compiler -----------------*/
|
||||
#if defined ( __CC_ARM )
|
||||
#include "cmsis_armcc.h"
|
||||
|
||||
/*------------------ ARM Compiler V6 -------------------*/
|
||||
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#include "cmsis_armcc_V6.h"
|
||||
|
||||
/*------------------ GNU Compiler ----------------------*/
|
||||
#elif defined ( __GNUC__ )
|
||||
#include "cmsis_gcc.h"
|
||||
|
||||
/*------------------ ICC Compiler ----------------------*/
|
||||
#elif defined ( __ICCARM__ )
|
||||
#include <cmsis_iar.h>
|
||||
|
||||
/*------------------ TI CCS Compiler -------------------*/
|
||||
#elif defined ( __TMS470__ )
|
||||
#include <cmsis_ccs.h>
|
||||
|
||||
/*------------------ TASKING Compiler ------------------*/
|
||||
#elif defined ( __TASKING__ )
|
||||
/*
|
||||
* The CMSIS functions have been implemented as intrinsics in the compiler.
|
||||
* Please use "carm -?i" to get an up to date list of all intrinsics,
|
||||
* Including the CMSIS ones.
|
||||
*/
|
||||
|
||||
/*------------------ COSMIC Compiler -------------------*/
|
||||
#elif defined ( __CSMC__ )
|
||||
#include <cmsis_csm.h>
|
||||
|
||||
#endif
|
||||
|
||||
/*@} end of group CMSIS_SIMD_intrinsics */
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __CORE_CMSIMD_H */
|
|
@ -1,926 +0,0 @@
|
|||
/**************************************************************************//**
|
||||
* @file core_sc000.h
|
||||
* @brief CMSIS SC000 Core Peripheral Access Layer Header File
|
||||
* @version V4.30
|
||||
* @date 20. October 2015
|
||||
******************************************************************************/
|
||||
/* Copyright (c) 2009 - 2015 ARM LIMITED
|
||||
|
||||
All rights reserved.
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are met:
|
||||
- Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
- Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
- Neither the name of ARM nor the names of its contributors may be used
|
||||
to endorse or promote products derived from this software without
|
||||
specific prior written permission.
|
||||
*
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
POSSIBILITY OF SUCH DAMAGE.
|
||||
---------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef __CORE_SC000_H_GENERIC
|
||||
#define __CORE_SC000_H_GENERIC
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
|
||||
CMSIS violates the following MISRA-C:2004 rules:
|
||||
|
||||
\li Required Rule 8.5, object/function definition in header file.<br>
|
||||
Function definitions in header files are used to allow 'inlining'.
|
||||
|
||||
\li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
|
||||
Unions are used for effective representation of core registers.
|
||||
|
||||
\li Advisory Rule 19.7, Function-like macro defined.<br>
|
||||
Function-like macros are used to allow more efficient code.
|
||||
*/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* CMSIS definitions
|
||||
******************************************************************************/
|
||||
/**
|
||||
\ingroup SC000
|
||||
@{
|
||||
*/
|
||||
|
||||
/* CMSIS SC000 definitions */
|
||||
#define __SC000_CMSIS_VERSION_MAIN (0x04U) /*!< [31:16] CMSIS HAL main version */
|
||||
#define __SC000_CMSIS_VERSION_SUB (0x1EU) /*!< [15:0] CMSIS HAL sub version */
|
||||
#define __SC000_CMSIS_VERSION ((__SC000_CMSIS_VERSION_MAIN << 16U) | \
|
||||
__SC000_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
|
||||
|
||||
#define __CORTEX_SC (000U) /*!< Cortex secure core */
|
||||
|
||||
|
||||
#if defined ( __CC_ARM )
|
||||
#define __ASM __asm /*!< asm keyword for ARM Compiler */
|
||||
#define __INLINE __inline /*!< inline keyword for ARM Compiler */
|
||||
#define __STATIC_INLINE static __inline
|
||||
|
||||
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#define __ASM __asm /*!< asm keyword for ARM Compiler */
|
||||
#define __INLINE __inline /*!< inline keyword for ARM Compiler */
|
||||
#define __STATIC_INLINE static __inline
|
||||
|
||||
#elif defined ( __GNUC__ )
|
||||
#define __ASM __asm /*!< asm keyword for GNU Compiler */
|
||||
#define __INLINE inline /*!< inline keyword for GNU Compiler */
|
||||
#define __STATIC_INLINE static inline
|
||||
|
||||
#elif defined ( __ICCARM__ )
|
||||
#define __ASM __asm /*!< asm keyword for IAR Compiler */
|
||||
#define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
|
||||
#define __STATIC_INLINE static inline
|
||||
|
||||
#elif defined ( __TMS470__ )
|
||||
#define __ASM __asm /*!< asm keyword for TI CCS Compiler */
|
||||
#define __STATIC_INLINE static inline
|
||||
|
||||
#elif defined ( __TASKING__ )
|
||||
#define __ASM __asm /*!< asm keyword for TASKING Compiler */
|
||||
#define __INLINE inline /*!< inline keyword for TASKING Compiler */
|
||||
#define __STATIC_INLINE static inline
|
||||
|
||||
#elif defined ( __CSMC__ )
|
||||
#define __packed
|
||||
#define __ASM _asm /*!< asm keyword for COSMIC Compiler */
|
||||
#define __INLINE inline /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */
|
||||
#define __STATIC_INLINE static inline
|
||||
|
||||
#else
|
||||
#error Unknown compiler
|
||||
#endif
|
||||
|
||||
/** __FPU_USED indicates whether an FPU is used or not.
|
||||
This core does not support an FPU at all
|
||||
*/
|
||||
#define __FPU_USED 0U
|
||||
|
||||
#if defined ( __CC_ARM )
|
||||
#if defined __TARGET_FPU_VFP
|
||||
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
|
||||
#endif
|
||||
|
||||
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#if defined __ARM_PCS_VFP
|
||||
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
|
||||
#endif
|
||||
|
||||
#elif defined ( __GNUC__ )
|
||||
#if defined (__VFP_FP__) && !defined(__SOFTFP__)
|
||||
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
|
||||
#endif
|
||||
|
||||
#elif defined ( __ICCARM__ )
|
||||
#if defined __ARMVFP__
|
||||
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
|
||||
#endif
|
||||
|
||||
#elif defined ( __TMS470__ )
|
||||
#if defined __TI_VFP_SUPPORT__
|
||||
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
|
||||
#endif
|
||||
|
||||
#elif defined ( __TASKING__ )
|
||||
#if defined __FPU_VFP__
|
||||
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
|
||||
#endif
|
||||
|
||||
#elif defined ( __CSMC__ )
|
||||
#if ( __CSMC__ & 0x400U)
|
||||
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
#include "core_cmInstr.h" /* Core Instruction Access */
|
||||
#include "core_cmFunc.h" /* Core Function Access */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __CORE_SC000_H_GENERIC */
|
||||
|
||||
#ifndef __CMSIS_GENERIC
|
||||
|
||||
#ifndef __CORE_SC000_H_DEPENDANT
|
||||
#define __CORE_SC000_H_DEPENDANT
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* check device defines and use defaults */
|
||||
#if defined __CHECK_DEVICE_DEFINES
|
||||
#ifndef __SC000_REV
|
||||
#define __SC000_REV 0x0000U
|
||||
#warning "__SC000_REV not defined in device header file; using default!"
|
||||
#endif
|
||||
|
||||
#ifndef __MPU_PRESENT
|
||||
#define __MPU_PRESENT 0U
|
||||
#warning "__MPU_PRESENT not defined in device header file; using default!"
|
||||
#endif
|
||||
|
||||
#ifndef __NVIC_PRIO_BITS
|
||||
#define __NVIC_PRIO_BITS 2U
|
||||
#warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
|
||||
#endif
|
||||
|
||||
#ifndef __Vendor_SysTickConfig
|
||||
#define __Vendor_SysTickConfig 0U
|
||||
#warning "__Vendor_SysTickConfig not defined in device header file; using default!"
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* IO definitions (access restrictions to peripheral registers) */
|
||||
/**
|
||||
\defgroup CMSIS_glob_defs CMSIS Global Defines
|
||||
|
||||
<strong>IO Type Qualifiers</strong> are used
|
||||
\li to specify the access to peripheral variables.
|
||||
\li for automatic generation of peripheral register debug information.
|
||||
*/
|
||||
#ifdef __cplusplus
|
||||
#define __I volatile /*!< Defines 'read only' permissions */
|
||||
#else
|
||||
#define __I volatile const /*!< Defines 'read only' permissions */
|
||||
#endif
|
||||
#define __O volatile /*!< Defines 'write only' permissions */
|
||||
#define __IO volatile /*!< Defines 'read / write' permissions */
|
||||
|
||||
/* following defines should be used for structure members */
|
||||
#define __IM volatile const /*! Defines 'read only' structure member permissions */
|
||||
#define __OM volatile /*! Defines 'write only' structure member permissions */
|
||||
#define __IOM volatile /*! Defines 'read / write' structure member permissions */
|
||||
|
||||
/*@} end of group SC000 */
|
||||
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Register Abstraction
|
||||
Core Register contain:
|
||||
- Core Register
|
||||
- Core NVIC Register
|
||||
- Core SCB Register
|
||||
- Core SysTick Register
|
||||
- Core MPU Register
|
||||
******************************************************************************/
|
||||
/**
|
||||
\defgroup CMSIS_core_register Defines and Type Definitions
|
||||
\brief Type definitions and defines for Cortex-M processor based devices.
|
||||
*/
|
||||
|
||||
/**
|
||||
\ingroup CMSIS_core_register
|
||||
\defgroup CMSIS_CORE Status and Control Registers
|
||||
\brief Core Register type definitions.
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
\brief Union type to access the Application Program Status Register (APSR).
|
||||
*/
|
||||
typedef union
|
||||
{
|
||||
struct
|
||||
{
|
||||
uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */
|
||||
uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
|
||||
uint32_t C:1; /*!< bit: 29 Carry condition code flag */
|
||||
uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
|
||||
uint32_t N:1; /*!< bit: 31 Negative condition code flag */
|
||||
} b; /*!< Structure used for bit access */
|
||||
uint32_t w; /*!< Type used for word access */
|
||||
} APSR_Type;
|
||||
|
||||
/* APSR Register Definitions */
|
||||
#define APSR_N_Pos 31U /*!< APSR: N Position */
|
||||
#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */
|
||||
|
||||
#define APSR_Z_Pos 30U /*!< APSR: Z Position */
|
||||
#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */
|
||||
|
||||
#define APSR_C_Pos 29U /*!< APSR: C Position */
|
||||
#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */
|
||||
|
||||
#define APSR_V_Pos 28U /*!< APSR: V Position */
|
||||
#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */
|
||||
|
||||
|
||||
/**
|
||||
\brief Union type to access the Interrupt Program Status Register (IPSR).
|
||||
*/
|
||||
typedef union
|
||||
{
|
||||
struct
|
||||
{
|
||||
uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
|
||||
uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
|
||||
} b; /*!< Structure used for bit access */
|
||||
uint32_t w; /*!< Type used for word access */
|
||||
} IPSR_Type;
|
||||
|
||||
/* IPSR Register Definitions */
|
||||
#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */
|
||||
#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */
|
||||
|
||||
|
||||
/**
|
||||
\brief Union type to access the Special-Purpose Program Status Registers (xPSR).
|
||||
*/
|
||||
typedef union
|
||||
{
|
||||
struct
|
||||
{
|
||||
uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
|
||||
uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */
|
||||
uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */
|
||||
uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */
|
||||
uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
|
||||
uint32_t C:1; /*!< bit: 29 Carry condition code flag */
|
||||
uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
|
||||
uint32_t N:1; /*!< bit: 31 Negative condition code flag */
|
||||
} b; /*!< Structure used for bit access */
|
||||
uint32_t w; /*!< Type used for word access */
|
||||
} xPSR_Type;
|
||||
|
||||
/* xPSR Register Definitions */
|
||||
#define xPSR_N_Pos 31U /*!< xPSR: N Position */
|
||||
#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */
|
||||
|
||||
#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */
|
||||
#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */
|
||||
|
||||
#define xPSR_C_Pos 29U /*!< xPSR: C Position */
|
||||
#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */
|
||||
|
||||
#define xPSR_V_Pos 28U /*!< xPSR: V Position */
|
||||
#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */
|
||||
|
||||
#define xPSR_T_Pos 24U /*!< xPSR: T Position */
|
||||
#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */
|
||||
|
||||
#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */
|
||||
#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */
|
||||
|
||||
|
||||
/**
|
||||
\brief Union type to access the Control Registers (CONTROL).
|
||||
*/
|
||||
typedef union
|
||||
{
|
||||
struct
|
||||
{
|
||||
uint32_t _reserved0:1; /*!< bit: 0 Reserved */
|
||||
uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */
|
||||
uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */
|
||||
} b; /*!< Structure used for bit access */
|
||||
uint32_t w; /*!< Type used for word access */
|
||||
} CONTROL_Type;
|
||||
|
||||
/* CONTROL Register Definitions */
|
||||
#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */
|
||||
#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */
|
||||
|
||||
/*@} end of group CMSIS_CORE */
|
||||
|
||||
|
||||
/**
|
||||
\ingroup CMSIS_core_register
|
||||
\defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC)
|
||||
\brief Type definitions for the NVIC Registers
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
\brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
__IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
|
||||
uint32_t RESERVED0[31U];
|
||||
__IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
|
||||
uint32_t RSERVED1[31U];
|
||||
__IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
|
||||
uint32_t RESERVED2[31U];
|
||||
__IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
|
||||
uint32_t RESERVED3[31U];
|
||||
uint32_t RESERVED4[64U];
|
||||
__IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */
|
||||
} NVIC_Type;
|
||||
|
||||
/*@} end of group CMSIS_NVIC */
|
||||
|
||||
|
||||
/**
|
||||
\ingroup CMSIS_core_register
|
||||
\defgroup CMSIS_SCB System Control Block (SCB)
|
||||
\brief Type definitions for the System Control Block Registers
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
\brief Structure type to access the System Control Block (SCB).
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
__IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
|
||||
__IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
|
||||
__IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */
|
||||
__IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
|
||||
__IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
|
||||
__IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
|
||||
uint32_t RESERVED0[1U];
|
||||
__IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */
|
||||
__IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
|
||||
uint32_t RESERVED1[154U];
|
||||
__IOM uint32_t SFCR; /*!< Offset: 0x290 (R/W) Security Features Control Register */
|
||||
} SCB_Type;
|
||||
|
||||
/* SCB CPUID Register Definitions */
|
||||
#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */
|
||||
#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
|
||||
|
||||
#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */
|
||||
#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
|
||||
|
||||
#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */
|
||||
#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
|
||||
|
||||
#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */
|
||||
#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
|
||||
|
||||
#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */
|
||||
#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
|
||||
|
||||
/* SCB Interrupt Control State Register Definitions */
|
||||
#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */
|
||||
#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */
|
||||
|
||||
#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */
|
||||
#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
|
||||
|
||||
#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */
|
||||
#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
|
||||
|
||||
#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */
|
||||
#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
|
||||
|
||||
#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */
|
||||
#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
|
||||
|
||||
#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */
|
||||
#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
|
||||
|
||||
#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */
|
||||
#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
|
||||
|
||||
#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */
|
||||
#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
|
||||
|
||||
#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */
|
||||
#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */
|
||||
|
||||
/* SCB Interrupt Control State Register Definitions */
|
||||
#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */
|
||||
#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
|
||||
|
||||
/* SCB Application Interrupt and Reset Control Register Definitions */
|
||||
#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */
|
||||
#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
|
||||
|
||||
#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */
|
||||
#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
|
||||
|
||||
#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */
|
||||
#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
|
||||
|
||||
#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */
|
||||
#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
|
||||
|
||||
#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */
|
||||
#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
|
||||
|
||||
/* SCB System Control Register Definitions */
|
||||
#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */
|
||||
#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
|
||||
|
||||
#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */
|
||||
#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
|
||||
|
||||
#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */
|
||||
#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
|
||||
|
||||
/* SCB Configuration Control Register Definitions */
|
||||
#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */
|
||||
#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
|
||||
|
||||
#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */
|
||||
#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
|
||||
|
||||
/* SCB System Handler Control and State Register Definitions */
|
||||
#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */
|
||||
#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
|
||||
|
||||
/*@} end of group CMSIS_SCB */
|
||||
|
||||
|
||||
/**
|
||||
\ingroup CMSIS_core_register
|
||||
\defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
|
||||
\brief Type definitions for the System Control and ID Register not in the SCB
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
\brief Structure type to access the System Control and ID Register not in the SCB.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t RESERVED0[2U];
|
||||
__IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */
|
||||
} SCnSCB_Type;
|
||||
|
||||
/* Auxiliary Control Register Definitions */
|
||||
#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */
|
||||
#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */
|
||||
|
||||
/*@} end of group CMSIS_SCnotSCB */
|
||||
|
||||
|
||||
/**
|
||||
\ingroup CMSIS_core_register
|
||||
\defgroup CMSIS_SysTick System Tick Timer (SysTick)
|
||||
\brief Type definitions for the System Timer Registers.
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
\brief Structure type to access the System Timer (SysTick).
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
|
||||
__IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
|
||||
__IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
|
||||
__IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
|
||||
} SysTick_Type;
|
||||
|
||||
/* SysTick Control / Status Register Definitions */
|
||||
#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */
|
||||
#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
|
||||
|
||||
#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */
|
||||
#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
|
||||
|
||||
#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */
|
||||
#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
|
||||
|
||||
#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */
|
||||
#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */
|
||||
|
||||
/* SysTick Reload Register Definitions */
|
||||
#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */
|
||||
#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */
|
||||
|
||||
/* SysTick Current Register Definitions */
|
||||
#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */
|
||||
#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */
|
||||
|
||||
/* SysTick Calibration Register Definitions */
|
||||
#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */
|
||||
#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
|
||||
|
||||
#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */
|
||||
#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
|
||||
|
||||
#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */
|
||||
#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */
|
||||
|
||||
/*@} end of group CMSIS_SysTick */
|
||||
|
||||
#if (__MPU_PRESENT == 1U)
|
||||
/**
|
||||
\ingroup CMSIS_core_register
|
||||
\defgroup CMSIS_MPU Memory Protection Unit (MPU)
|
||||
\brief Type definitions for the Memory Protection Unit (MPU)
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
\brief Structure type to access the Memory Protection Unit (MPU).
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
__IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */
|
||||
__IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */
|
||||
__IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */
|
||||
__IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */
|
||||
__IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */
|
||||
} MPU_Type;
|
||||
|
||||
/* MPU Type Register Definitions */
|
||||
#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */
|
||||
#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */
|
||||
|
||||
#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */
|
||||
#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */
|
||||
|
||||
#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */
|
||||
#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */
|
||||
|
||||
/* MPU Control Register Definitions */
|
||||
#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */
|
||||
#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */
|
||||
|
||||
#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */
|
||||
#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */
|
||||
|
||||
#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */
|
||||
#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */
|
||||
|
||||
/* MPU Region Number Register Definitions */
|
||||
#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */
|
||||
#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */
|
||||
|
||||
/* MPU Region Base Address Register Definitions */
|
||||
#define MPU_RBAR_ADDR_Pos 8U /*!< MPU RBAR: ADDR Position */
|
||||
#define MPU_RBAR_ADDR_Msk (0xFFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */
|
||||
|
||||
#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */
|
||||
#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */
|
||||
|
||||
#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */
|
||||
#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */
|
||||
|
||||
/* MPU Region Attribute and Size Register Definitions */
|
||||
#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */
|
||||
#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */
|
||||
|
||||
#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */
|
||||
#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */
|
||||
|
||||
#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */
|
||||
#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */
|
||||
|
||||
#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */
|
||||
#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */
|
||||
|
||||
#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */
|
||||
#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */
|
||||
|
||||
#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */
|
||||
#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */
|
||||
|
||||
#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */
|
||||
#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */
|
||||
|
||||
#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */
|
||||
#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */
|
||||
|
||||
#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */
|
||||
#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */
|
||||
|
||||
#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */
|
||||
#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */
|
||||
|
||||
/*@} end of group CMSIS_MPU */
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\ingroup CMSIS_core_register
|
||||
\defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
|
||||
\brief SC000 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.
|
||||
Therefore they are not covered by the SC000 header file.
|
||||
@{
|
||||
*/
|
||||
/*@} end of group CMSIS_CoreDebug */
|
||||
|
||||
|
||||
/**
|
||||
\ingroup CMSIS_core_register
|
||||
\defgroup CMSIS_core_bitfield Core register bit field macros
|
||||
\brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
\brief Mask and shift a bit field value for use in a register bit range.
|
||||
\param[in] field Name of the register bit field.
|
||||
\param[in] value Value of the bit field.
|
||||
\return Masked and shifted value.
|
||||
*/
|
||||
#define _VAL2FLD(field, value) ((value << field ## _Pos) & field ## _Msk)
|
||||
|
||||
/**
|
||||
\brief Mask and shift a register value to extract a bit filed value.
|
||||
\param[in] field Name of the register bit field.
|
||||
\param[in] value Value of register.
|
||||
\return Masked and shifted bit field value.
|
||||
*/
|
||||
#define _FLD2VAL(field, value) ((value & field ## _Msk) >> field ## _Pos)
|
||||
|
||||
/*@} end of group CMSIS_core_bitfield */
|
||||
|
||||
|
||||
/**
|
||||
\ingroup CMSIS_core_register
|
||||
\defgroup CMSIS_core_base Core Definitions
|
||||
\brief Definitions for base addresses, unions, and structures.
|
||||
@{
|
||||
*/
|
||||
|
||||
/* Memory mapping of SC000 Hardware */
|
||||
#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
|
||||
#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
|
||||
#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
|
||||
#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
|
||||
|
||||
#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */
|
||||
#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
|
||||
#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
|
||||
#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
|
||||
|
||||
#if (__MPU_PRESENT == 1U)
|
||||
#define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */
|
||||
#define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */
|
||||
#endif
|
||||
|
||||
/*@} */
|
||||
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Hardware Abstraction Layer
|
||||
Core Function Interface contains:
|
||||
- Core NVIC Functions
|
||||
- Core SysTick Functions
|
||||
- Core Register Access Functions
|
||||
******************************************************************************/
|
||||
/**
|
||||
\defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
|
||||
*/
|
||||
|
||||
|
||||
|
||||
/* ########################## NVIC functions #################################### */
|
||||
/**
|
||||
\ingroup CMSIS_Core_FunctionInterface
|
||||
\defgroup CMSIS_Core_NVICFunctions NVIC Functions
|
||||
\brief Functions that manage interrupts and exceptions via the NVIC.
|
||||
@{
|
||||
*/
|
||||
|
||||
/* Interrupt Priorities are WORD accessible only under ARMv6M */
|
||||
/* The following MACROS handle generation of the register offset and byte masks */
|
||||
#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL)
|
||||
#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) )
|
||||
#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) )
|
||||
|
||||
|
||||
/**
|
||||
\brief Enable External Interrupt
|
||||
\details Enables a device-specific interrupt in the NVIC interrupt controller.
|
||||
\param [in] IRQn External interrupt number. Value cannot be negative.
|
||||
*/
|
||||
__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
|
||||
{
|
||||
NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Disable External Interrupt
|
||||
\details Disables a device-specific interrupt in the NVIC interrupt controller.
|
||||
\param [in] IRQn External interrupt number. Value cannot be negative.
|
||||
*/
|
||||
__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
|
||||
{
|
||||
NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get Pending Interrupt
|
||||
\details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt.
|
||||
\param [in] IRQn Interrupt number.
|
||||
\return 0 Interrupt status is not pending.
|
||||
\return 1 Interrupt status is pending.
|
||||
*/
|
||||
__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
|
||||
{
|
||||
return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Pending Interrupt
|
||||
\details Sets the pending bit of an external interrupt.
|
||||
\param [in] IRQn Interrupt number. Value cannot be negative.
|
||||
*/
|
||||
__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
|
||||
{
|
||||
NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Clear Pending Interrupt
|
||||
\details Clears the pending bit of an external interrupt.
|
||||
\param [in] IRQn External interrupt number. Value cannot be negative.
|
||||
*/
|
||||
__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
|
||||
{
|
||||
NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Interrupt Priority
|
||||
\details Sets the priority of an interrupt.
|
||||
\note The priority cannot be set for every core interrupt.
|
||||
\param [in] IRQn Interrupt number.
|
||||
\param [in] priority Priority to set.
|
||||
*/
|
||||
__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
|
||||
{
|
||||
if ((int32_t)(IRQn) < 0)
|
||||
{
|
||||
SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
|
||||
(((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
|
||||
}
|
||||
else
|
||||
{
|
||||
NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
|
||||
(((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get Interrupt Priority
|
||||
\details Reads the priority of an interrupt.
|
||||
The interrupt number can be positive to specify an external (device specific) interrupt,
|
||||
or negative to specify an internal (core) interrupt.
|
||||
\param [in] IRQn Interrupt number.
|
||||
\return Interrupt Priority.
|
||||
Value is aligned automatically to the implemented priority bits of the microcontroller.
|
||||
*/
|
||||
__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
|
||||
{
|
||||
|
||||
if ((int32_t)(IRQn) < 0)
|
||||
{
|
||||
return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
|
||||
}
|
||||
else
|
||||
{
|
||||
return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief System Reset
|
||||
\details Initiates a system reset request to reset the MCU.
|
||||
*/
|
||||
__STATIC_INLINE void NVIC_SystemReset(void)
|
||||
{
|
||||
__DSB(); /* Ensure all outstanding memory accesses included
|
||||
buffered write are completed before reset */
|
||||
SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
|
||||
SCB_AIRCR_SYSRESETREQ_Msk);
|
||||
__DSB(); /* Ensure completion of memory access */
|
||||
|
||||
for(;;) /* wait until reset */
|
||||
{
|
||||
__NOP();
|
||||
}
|
||||
}
|
||||
|
||||
/*@} end of CMSIS_Core_NVICFunctions */
|
||||
|
||||
|
||||
|
||||
/* ################################## SysTick function ############################################ */
|
||||
/**
|
||||
\ingroup CMSIS_Core_FunctionInterface
|
||||
\defgroup CMSIS_Core_SysTickFunctions SysTick Functions
|
||||
\brief Functions that configure the System.
|
||||
@{
|
||||
*/
|
||||
|
||||
#if (__Vendor_SysTickConfig == 0U)
|
||||
|
||||
/**
|
||||
\brief System Tick Configuration
|
||||
\details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
|
||||
Counter is in free running mode to generate periodic interrupts.
|
||||
\param [in] ticks Number of ticks between two interrupts.
|
||||
\return 0 Function succeeded.
|
||||
\return 1 Function failed.
|
||||
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
|
||||
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
|
||||
must contain a vendor-specific implementation of this function.
|
||||
*/
|
||||
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
|
||||
{
|
||||
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
|
||||
{
|
||||
return (1UL); /* Reload value impossible */
|
||||
}
|
||||
|
||||
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
|
||||
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
|
||||
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
|
||||
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
|
||||
SysTick_CTRL_TICKINT_Msk |
|
||||
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
|
||||
return (0UL); /* Function successful */
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
/*@} end of CMSIS_Core_SysTickFunctions */
|
||||
|
||||
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __CORE_SC000_H_DEPENDANT */
|
||||
|
||||
#endif /* __CMSIS_GENERIC */
|
File diff suppressed because it is too large
Load Diff
|
@ -1,64 +0,0 @@
|
|||
/**
|
||||
* \defgroup cmsis CMSIS (Cortex Microcontroller Software Interface Standard)
|
||||
* \ingroup arm
|
||||
*/
|
||||
|
||||
/**
|
||||
* \addtogroup CMSIS_Core_FunctionInterface
|
||||
* \ingroup cmsis
|
||||
*/
|
||||
|
||||
/**
|
||||
* \addtogroup CMSIS_core_register
|
||||
* \ingroup cmsis
|
||||
*/
|
||||
|
||||
/**
|
||||
* \addtogroup CMSIS_glob_defs
|
||||
* \ingroup cmsis
|
||||
*/
|
||||
|
||||
/**
|
||||
* \addtogroup CMSIS_MISRA_Exceptions
|
||||
* \ingroup cmsis
|
||||
*/
|
||||
|
||||
/**
|
||||
* \addtogroup CMSIS_core_definitions
|
||||
* \ingroup cmsis
|
||||
*/
|
||||
|
||||
/**
|
||||
* \addtogroup CMSIS_SIMD_intrinsics
|
||||
* \ingroup cmsis
|
||||
*/
|
||||
|
||||
/**
|
||||
* \addtogroup CMSIS_Core_InstructionInterface
|
||||
* \ingroup cmsis
|
||||
*/
|
||||
|
||||
/**
|
||||
* \defgroup Cortex_M0 Cortex-M0
|
||||
* \ingroup cmsis
|
||||
*/
|
||||
|
||||
/**
|
||||
* \defgroup Cortex_M0_plus Cortex-M0+
|
||||
* \ingroup cmsis
|
||||
*/
|
||||
|
||||
/**
|
||||
* \defgroup Cortex_M3 Cortex-M3
|
||||
* \ingroup cmsis
|
||||
*/
|
||||
|
||||
/**
|
||||
* \defgroup Cortex_M4 Cortex-M4
|
||||
* \ingroup cmsis
|
||||
*/
|
||||
|
||||
/**
|
||||
* \defgroup Cortex_M7 Cortex-M7
|
||||
* \ingroup cmsis
|
||||
*/
|
|
@ -1,28 +0,0 @@
|
|||
CONTIKI_ARM_DIRS += cortex-m cortex-m/CMSIS
|
||||
|
||||
### Build syscalls for newlib
|
||||
MODULES += os/lib/newlib
|
||||
|
||||
LDFLAGS += -T $(LDSCRIPT)
|
||||
LDFLAGS += -Wl,--gc-sections,--sort-section=alignment
|
||||
LDFLAGS += -Wl,-Map=$(CONTIKI_NG_PROJECT_MAP),--cref,--no-warn-mismatch
|
||||
|
||||
OBJCOPY_FLAGS += --gap-fill 0xff
|
||||
|
||||
CPU_STARTFILES = ${addprefix $(OBJECTDIR)/,${call oname, $(CPU_START_SOURCEFILES)}}
|
||||
|
||||
### Resolve any potential circular dependencies between the linked libraries
|
||||
### See: https://stackoverflow.com/questions/5651869/gcc-what-are-the-start-group-and-end-group-command-line-options/5651895
|
||||
TARGET_LIBFLAGS := -Wl,--start-group $(TARGET_LIBFILES) -Wl,--end-group
|
||||
|
||||
CUSTOM_RULE_LINK = 1
|
||||
|
||||
OUT_ELF = $(BUILD_DIR_BOARD)/%.elf
|
||||
|
||||
.SECONDEXPANSION:
|
||||
|
||||
$(OUT_ELF): $(CPU_STARTFILES) $$(CONTIKI_OBJECTFILES) %.o $(PROJECT_OBJECTFILES) $(PROJECT_LIBRARIES) $(LDSCRIPT) $(TARGET_LIBS)
|
||||
$(TRACE_LD)
|
||||
$(Q)$(LD) $(LDFLAGS) ${filter-out $(LDSCRIPT) %.a,$^} ${filter %.a,$^} $(TARGET_LIBFLAGS) -o $@
|
||||
|
||||
include $(ARCH_PATH)/cpu/arm/Makefile.arm
|
|
@ -1,9 +0,0 @@
|
|||
CONTIKI_ARM_DIRS += cortex-m/cm3
|
||||
|
||||
CFLAGS += -mcpu=cortex-m3
|
||||
|
||||
LDFLAGS += -mcpu=cortex-m3 -nostartfiles
|
||||
|
||||
TARGET_LIBFILES += -lm
|
||||
|
||||
include $(ARCH_PATH)/cpu/arm/cortex-m/Makefile.cortex-m
|
|
@ -1,53 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2017, George Oikonomou - http://www.spd.gr
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \addtogroup arm
|
||||
* @{
|
||||
*
|
||||
* \defgroup cm3 Arm Cortex-M3
|
||||
* @{
|
||||
*
|
||||
* \file
|
||||
* Compiler and data type definitions for all CM3-based CPUs
|
||||
*/
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#ifndef CM3_DEF_H_
|
||||
#define CM3_DEF_H_
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#include "arm-def.h"
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#endif /* CM3_DEF_H_ */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @}
|
||||
* @}
|
||||
*/
|
|
@ -1,7 +0,0 @@
|
|||
CONTIKI_ARM_DIRS += cortex-m/cm4
|
||||
|
||||
CFLAGS += -mcpu=cortex-m4
|
||||
|
||||
LDFLAGS += -mcpu=cortex-m4
|
||||
|
||||
include $(ARCH_PATH)/cpu/arm/cortex-m/Makefile.cortex-m
|
|
@ -1,53 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2017, George Oikonomou - http://www.spd.gr
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \addtogroup arm
|
||||
* @{
|
||||
*
|
||||
* \defgroup cm4 Arm Cortex-M4
|
||||
* @{
|
||||
*
|
||||
* \file
|
||||
* Compiler and data type definitions for all CM4-based CPUs
|
||||
*/
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#ifndef CM4_DEF_H_
|
||||
#define CM4_DEF_H_
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#include "arm-def.h"
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#endif /* CM4_DEF_H_ */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @}
|
||||
* @}
|
||||
*/
|
|
@ -1,44 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2017, George Oikonomou - http://www.spd.gr
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#ifndef MEMORY_BARRIER_CORTEX_H_
|
||||
#define MEMORY_BARRIER_CORTEX_H_
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#include "contiki.h"
|
||||
|
||||
#ifdef CMSIS_CONF_HEADER_PATH
|
||||
#include CMSIS_CONF_HEADER_PATH
|
||||
#endif
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#define memory_barrier() __DMB()
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#endif /* MEMORY_BARRIER_CORTEX_H_ */
|
||||
/*---------------------------------------------------------------------------*/
|
|
@ -1,82 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2017, George Oikonomou - http://www.spd.gr
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \addtogroup arm
|
||||
*
|
||||
* Arm Cortex-M implementation of mutexes using the LDREX, STREX and DMB
|
||||
* instructions.
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#ifndef MUTEX_CORTEX_H_
|
||||
#define MUTEX_CORTEX_H_
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#include "contiki.h"
|
||||
|
||||
#ifdef CMSIS_CONF_HEADER_PATH
|
||||
#include CMSIS_CONF_HEADER_PATH
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#define mutex_try_lock(m) mutex_cortex_try_lock(m)
|
||||
#define mutex_unlock(m) mutex_cortex_unlock(m)
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#define MUTEX_CONF_HAS_MUTEX_T 1
|
||||
typedef uint8_t mutex_t;
|
||||
/*---------------------------------------------------------------------------*/
|
||||
static inline bool
|
||||
mutex_cortex_try_lock(volatile mutex_t *mutex)
|
||||
{
|
||||
int status = 1;
|
||||
|
||||
if(__LDREXB(mutex) == 0) {
|
||||
status = __STREXB(1, mutex);
|
||||
}
|
||||
|
||||
__DMB();
|
||||
|
||||
return status == 0 ? true : false;
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
static inline void
|
||||
mutex_cortex_unlock(volatile mutex_t *mutex)
|
||||
{
|
||||
__DMB();
|
||||
*mutex = 0;
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#endif /* MUTEX_CORTEX_H_ */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** @} */
|
|
@ -1,4 +0,0 @@
|
|||
/**
|
||||
* \defgroup arm Support for Arm CPUs
|
||||
* \ingroup cpu
|
||||
*/
|
|
@ -1,19 +0,0 @@
|
|||
|
||||
|
||||
# Change the default telnet port...
|
||||
telnet_port 4444
|
||||
# GDB connects here
|
||||
gdb_port 3333
|
||||
# GDB can also flash my flash!
|
||||
gdb_memory_map enable
|
||||
gdb_flash_program enable
|
||||
|
||||
# Wiggler interface
|
||||
interface parport
|
||||
parport_port 0
|
||||
parport_cable wiggler_ntrst_inverted
|
||||
jtag_speed 0
|
||||
set CPUTAPID 0x3BA00477
|
||||
set BSTAPID 0x16410041
|
||||
source [find target/stm32F10xxx.cfg]
|
||||
|
|
@ -1,49 +0,0 @@
|
|||
# STM32 Cortex M3
|
||||
|
||||
if { [info exists CHIPNAME] } {
|
||||
set _CHIPNAME $CHIPNAME
|
||||
} else {
|
||||
set _CHIPNAME stm32F10xxx
|
||||
}
|
||||
|
||||
if { [info exists ENDIAN] } {
|
||||
set _ENDIAN $ENDIAN
|
||||
} else {
|
||||
set _ENDIAN little
|
||||
}
|
||||
|
||||
if { [info exists CPUTAPID ] } {
|
||||
set _CPUTAPID $CPUTAPID
|
||||
} else {
|
||||
# force an error till we get a good number
|
||||
set _CPUTAPID 0xffffffff
|
||||
}
|
||||
|
||||
#use combined on interfaces or targets that can't set TRST/SRST separately
|
||||
reset_config trst_and_srst
|
||||
jtag_nsrst_delay 1
|
||||
|
||||
#jtag scan chain
|
||||
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
|
||||
|
||||
# The target
|
||||
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
|
||||
target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME -variant cortex_m3
|
||||
|
||||
$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 0x4000 -work-area-backup 0
|
||||
|
||||
|
||||
if { [info exists BSTAPID ] } {
|
||||
set _BSTAPID $BSTAPID
|
||||
} else {
|
||||
# force an error till we get a good number
|
||||
set _BSTAPID 0xffffffff
|
||||
}
|
||||
|
||||
#jtag scan chain
|
||||
jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0xf -expected-id $_BSTAPID
|
||||
|
||||
flash bank stm32x 0 0 0 0 0
|
||||
|
||||
|
||||
|
|
@ -1,55 +0,0 @@
|
|||
ifndef SOURCE_LDSCRIPT
|
||||
SOURCE_LDSCRIPT = $(CONTIKI_CPU)/cc2538.lds
|
||||
endif
|
||||
LDSCRIPT = $(OBJECTDIR)/cc2538.ld
|
||||
|
||||
CFLAGS += -DCMSIS_DEV_HDR=\"cc2538_cm3.h\"
|
||||
|
||||
### If the user-specified a Node ID, pass a define
|
||||
ifdef NODEID
|
||||
CFLAGS += -DIEEE_ADDR_NODE_ID=$(NODEID)
|
||||
endif
|
||||
|
||||
### CPU-dependent directories
|
||||
CONTIKI_CPU_DIRS = . dev usb usb/common usb/common/cdc-acm
|
||||
|
||||
### CPU-dependent source files
|
||||
CONTIKI_CPU_SOURCEFILES += soc.c clock.c rtimer-arch.c uart.c watchdog.c
|
||||
CONTIKI_CPU_SOURCEFILES += nvic.c sys-ctrl.c gpio.c ioc.c spi-legacy.c adc.c
|
||||
CONTIKI_CPU_SOURCEFILES += spi-arch.c
|
||||
CONTIKI_CPU_SOURCEFILES += crypto.c aes.c ecb.c cbc.c ctr.c cbc-mac.c gcm.c
|
||||
CONTIKI_CPU_SOURCEFILES += ccm.c sha256.c gpio-hal-arch.c
|
||||
CONTIKI_CPU_SOURCEFILES += cc2538-aes-128.c cc2538-ccm-star.c
|
||||
CONTIKI_CPU_SOURCEFILES += cc2538-rf.c udma.c lpm.c int-master.c
|
||||
CONTIKI_CPU_SOURCEFILES += pka.c bignum-driver.c ecc-driver.c ecc-algorithm.c
|
||||
CONTIKI_CPU_SOURCEFILES += ecc-curve.c
|
||||
CONTIKI_CPU_SOURCEFILES += dbg.c ieee-addr.c
|
||||
CONTIKI_CPU_SOURCEFILES += slip-arch.c slip.c
|
||||
CONTIKI_CPU_SOURCEFILES += i2c.c cc2538-temp-sensor.c vdd3-sensor.c
|
||||
CONTIKI_CPU_SOURCEFILES += cfs-coffee.c cfs-coffee-arch.c pwm.c
|
||||
|
||||
USB_SOURCEFILES += usb-core.c cdc-acm.c usb-arch.c usb-serial.c cdc-acm-descriptors.c
|
||||
|
||||
CPU_START_SOURCEFILES = startup-gcc.c
|
||||
|
||||
CONTIKI_SOURCEFILES += $(CONTIKI_CPU_SOURCEFILES) $(USB_SOURCEFILES)
|
||||
|
||||
### Always re-build ieee-addr.o in case the command line passes a new NODEID
|
||||
FORCE:
|
||||
|
||||
$(OBJECTDIR)/ieee-addr.o: ieee-addr.c FORCE | $(OBJECTDIR)
|
||||
$(TRACE_CC)
|
||||
$(Q)$(CC) $(CFLAGS) -c $< -o $@
|
||||
|
||||
### This rule is used to generate the correct linker script
|
||||
LDGENFLAGS += $(CFLAGS)
|
||||
LDGENFLAGS += -imacros "contiki-conf.h" -imacros "dev/cc2538-dev.h"
|
||||
LDGENFLAGS += -imacros "dev/flash.h" -imacros "cfs-coffee-arch.h"
|
||||
LDGENFLAGS += -x c -P -E
|
||||
|
||||
# NB: Assumes LDSCRIPT was not overridden and is in $(OBJECTDIR)
|
||||
$(LDSCRIPT): $(SOURCE_LDSCRIPT) FORCE | $(OBJECTDIR)
|
||||
$(TRACE_CC)
|
||||
$(Q)$(CC) $(LDGENFLAGS) $< | grep -v '^\s*#\s*pragma\>' > $@
|
||||
|
||||
include $(ARCH_PATH)/cpu/arm/cortex-m/cm3/Makefile.cm3
|
|
@ -1,322 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2017, George Oikonomou - http://www.spd.gr
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \addtogroup cc2538
|
||||
* @{
|
||||
*/
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#ifndef CC2538_CONF_H_
|
||||
#define CC2538_CONF_H_
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \name CFS configuration
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
#ifndef COFFEE_CONF_SIZE
|
||||
#define COFFEE_CONF_SIZE (4 * COFFEE_SECTOR_SIZE)
|
||||
#endif
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \name CC2538 System Control configuration
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
#ifndef SYS_CTRL_CONF_OSC32K_USE_XTAL
|
||||
#define SYS_CTRL_CONF_OSC32K_USE_XTAL 0 /**< Use the on-board 32.768-kHz crystal */
|
||||
#endif
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \name Watchdog Timer configuration
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
#ifndef WATCHDOG_CONF_ENABLE
|
||||
#define WATCHDOG_CONF_ENABLE 1 /**< Enable the watchdog timer */
|
||||
#endif
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \name USB 'core' configuration
|
||||
*
|
||||
* Those values are not meant to be modified by the user, except where stated
|
||||
* otherwise
|
||||
* @{
|
||||
*/
|
||||
#define CTRL_EP_SIZE 8
|
||||
#define USB_EP1_SIZE 32
|
||||
#define USB_EP2_SIZE 64
|
||||
#define USB_EP3_SIZE 64
|
||||
#define USB_ARCH_WRITE_NOTIFY 0
|
||||
|
||||
#ifndef USB_ARCH_CONF_DMA
|
||||
#define USB_ARCH_CONF_DMA 1 /**< Change to Enable/Disable USB DMA */
|
||||
|
||||
#endif
|
||||
/** @} */
|
||||
/**
|
||||
* \name uDMA Configuration and channel allocations
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
#define USB_ARCH_CONF_RX_DMA_CHAN 0 /**< USB -> RAM DMA channel */
|
||||
#define USB_ARCH_CONF_TX_DMA_CHAN 1 /**< RAM -> USB DMA channel */
|
||||
#define CC2538_RF_CONF_TX_DMA_CHAN 2 /**< RF -> RAM DMA channel */
|
||||
#define CC2538_RF_CONF_RX_DMA_CHAN 3 /**< RAM -> RF DMA channel */
|
||||
#define UDMA_CONF_MAX_CHANNEL CC2538_RF_CONF_RX_DMA_CHAN
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \name Character I/O Configuration
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
#ifndef UART_CONF_ENABLE
|
||||
#define UART_CONF_ENABLE 1 /**< Enable/Disable UART I/O */
|
||||
#endif
|
||||
|
||||
#ifndef UART0_CONF_BAUD_RATE
|
||||
#define UART0_CONF_BAUD_RATE 115200 /**< Default UART0 baud rate */
|
||||
#endif
|
||||
|
||||
#ifndef UART1_CONF_BAUD_RATE
|
||||
#define UART1_CONF_BAUD_RATE 115200 /**< Default UART1 baud rate */
|
||||
#endif
|
||||
|
||||
#ifndef SLIP_ARCH_CONF_USB
|
||||
#define SLIP_ARCH_CONF_USB 0 /**< SLIP over UART by default */
|
||||
#endif
|
||||
|
||||
#ifndef DBG_CONF_USB
|
||||
#define DBG_CONF_USB 0 /**< All debugging over UART by default */
|
||||
#endif
|
||||
|
||||
#ifndef SERIAL_LINE_CONF_UART
|
||||
#define SERIAL_LINE_CONF_UART 0 /**< UART to use with serial line */
|
||||
#endif
|
||||
|
||||
#if !SLIP_ARCH_CONF_USB
|
||||
#ifndef SLIP_ARCH_CONF_UART
|
||||
#define SLIP_ARCH_CONF_UART 0 /**< UART to use with SLIP */
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if !DBG_CONF_USB
|
||||
#ifndef DBG_CONF_UART
|
||||
#define DBG_CONF_UART 0 /**< UART to use for debugging */
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef UART1_CONF_UART
|
||||
#define UART1_CONF_UART 0 /**< UART to use for examples relying on
|
||||
the uart1_* API */
|
||||
#endif
|
||||
|
||||
#ifndef SLIP_ARCH_CONF_ENABLED
|
||||
/*
|
||||
* Determine whether we need SLIP
|
||||
* This will keep working while UIP_FALLBACK_INTERFACE and CMD_CONF_OUTPUT
|
||||
* keep using SLIP
|
||||
*/
|
||||
#if defined(UIP_FALLBACK_INTERFACE) || defined(CMD_CONF_OUTPUT)
|
||||
#define SLIP_ARCH_CONF_ENABLED 1
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \brief Define this as 1 to build a headless node.
|
||||
*
|
||||
* The UART will not be initialised its clock will be gated, offering some
|
||||
* energy savings. The USB will not be initialised either
|
||||
*/
|
||||
#ifndef CC2538_CONF_QUIET
|
||||
#define CC2538_CONF_QUIET 0
|
||||
#endif
|
||||
|
||||
/* CC2538_CONF_QUIET is hard and overrides all other related defines */
|
||||
#if CC2538_CONF_QUIET
|
||||
#undef USB_SERIAL_CONF_ENABLE
|
||||
#define USB_SERIAL_CONF_ENABLE 0
|
||||
|
||||
#undef UART_CONF_ENABLE
|
||||
#define UART_CONF_ENABLE 0
|
||||
#endif /* CC2538_CONF_QUIET */
|
||||
|
||||
/**
|
||||
* \brief Enable the USB core only if we need it
|
||||
*/
|
||||
#ifndef USB_SERIAL_CONF_ENABLE
|
||||
#define USB_SERIAL_CONF_ENABLE \
|
||||
((SLIP_ARCH_CONF_USB && SLIP_ARCH_CONF_ENABLED) || \
|
||||
(MAC_CONF_WITH_TSCH && (SLIP_ARCH_CONF_ENABLED || BUILD_WITH_SHELL)) || \
|
||||
DBG_CONF_USB)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* If debugging and SLIP use the same peripheral, this will be 1. Don't modify
|
||||
* this
|
||||
*/
|
||||
#if SLIP_ARCH_CONF_ENABLED
|
||||
#define DBG_CONF_SLIP_MUX (SLIP_ARCH_CONF_USB == DBG_CONF_USB && \
|
||||
(SLIP_ARCH_CONF_USB || \
|
||||
SLIP_ARCH_CONF_UART == DBG_CONF_UART))
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Automatic detection of whether a specific UART is in use
|
||||
*/
|
||||
#define UART_IN_USE_BY_SERIAL_LINE(u) (SERIAL_LINE_CONF_UART == (u))
|
||||
#define UART_IN_USE_BY_SLIP(u) (SLIP_ARCH_CONF_ENABLED && \
|
||||
!SLIP_ARCH_CONF_USB && \
|
||||
SLIP_ARCH_CONF_UART == (u))
|
||||
#define UART_IN_USE_BY_DBG(u) (!DBG_CONF_USB && DBG_CONF_UART == (u))
|
||||
#define UART_IN_USE_BY_UART1(u) (UART1_CONF_UART == (u))
|
||||
|
||||
#define UART_IN_USE(u) ( \
|
||||
UART_CONF_ENABLE && \
|
||||
(UART_IN_USE_BY_SERIAL_LINE(u) || \
|
||||
UART_IN_USE_BY_SLIP(u) || \
|
||||
UART_IN_USE_BY_DBG(u) || \
|
||||
UART_IN_USE_BY_UART1(u)) \
|
||||
)
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \name RF configuration
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
/* RF Config */
|
||||
|
||||
#ifndef CC2538_RF_CONF_AUTOACK
|
||||
#define CC2538_RF_CONF_AUTOACK 1 /**< RF H/W generates ACKs */
|
||||
#endif /* CC2538_CONF_AUTOACK */
|
||||
|
||||
#ifndef CC2538_RF_CONF_TX_USE_DMA
|
||||
#define CC2538_RF_CONF_TX_USE_DMA 1 /**< RF TX over DMA */
|
||||
#endif
|
||||
|
||||
#ifndef CC2538_RF_CONF_RX_USE_DMA
|
||||
#define CC2538_RF_CONF_RX_USE_DMA 1 /**< RF RX over DMA */
|
||||
#endif
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \name LPM configuration
|
||||
* @{
|
||||
*/
|
||||
#ifndef LPM_CONF_ENABLE
|
||||
#define LPM_CONF_ENABLE 1 /**< Set to 0 to disable LPM entirely */
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \brief Maximum PM
|
||||
*
|
||||
* The SoC will never drop to a Power Mode deeper than the one specified here.
|
||||
* 0 for PM0, 1 for PM1 and 2 for PM2
|
||||
*/
|
||||
#ifndef LPM_CONF_MAX_PM
|
||||
#define LPM_CONF_MAX_PM 1
|
||||
#endif
|
||||
|
||||
#ifndef LPM_CONF_STATS
|
||||
#define LPM_CONF_STATS 0 /**< Set to 1 to enable LPM-related stats */
|
||||
#endif
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \name Radio Configuration
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
#ifndef NETSTACK_CONF_RADIO
|
||||
#define NETSTACK_CONF_RADIO cc2538_rf_driver
|
||||
#endif
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \name IEEE address configuration
|
||||
*
|
||||
* Used to generate our link-layer & IPv6 address
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* \brief Location of the IEEE address
|
||||
* 0 => Read from InfoPage,
|
||||
* 1 => Use a hardcoded address, configured by IEEE_ADDR_CONF_ADDRESS
|
||||
*/
|
||||
#ifndef IEEE_ADDR_CONF_HARDCODED
|
||||
#define IEEE_ADDR_CONF_HARDCODED 0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \brief The hardcoded IEEE address to be used when IEEE_ADDR_CONF_HARDCODED
|
||||
* is defined as 1
|
||||
*/
|
||||
#ifndef IEEE_ADDR_CONF_ADDRESS
|
||||
#define IEEE_ADDR_CONF_ADDRESS { 0x00, 0x12, 0x4B, 0x00, 0x89, 0xAB, 0xCD, 0xEF }
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \brief Location of the IEEE address in the InfoPage when
|
||||
* IEEE_ADDR_CONF_HARDCODED is defined as 0
|
||||
* 0 => Use the primary address location
|
||||
* 1 => Use the secondary address location
|
||||
*/
|
||||
#ifndef IEEE_ADDR_CONF_USE_SECONDARY_LOCATION
|
||||
#define IEEE_ADDR_CONF_USE_SECONDARY_LOCATION 0
|
||||
#endif
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \name Security
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
#ifndef CRYPTO_CONF_INIT
|
||||
#define CRYPTO_CONF_INIT 1 /**< Whether to init cryptoprocessor */
|
||||
#endif
|
||||
|
||||
#ifndef AES_128_CONF
|
||||
#define AES_128_CONF cc2538_aes_128_driver /**< AES-128 driver */
|
||||
#endif
|
||||
|
||||
#ifndef CCM_STAR_CONF
|
||||
#define CCM_STAR_CONF cc2538_ccm_star_driver /**< AES-CCM* driver */
|
||||
#endif
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#endif /* CC2538_CONF_H_ */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** @} */
|
|
@ -1,75 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2017, George Oikonomou - http://www.spd.gr
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#ifndef CC2538_DEF_H_
|
||||
#define CC2538_DEF_H_
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#include "cm3/cm3-def.h"
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#define RTIMER_ARCH_SECOND 32768
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#define CC2538_PHY_OVERHEAD 3
|
||||
#define CC2538_BYTE_AIR_TIME 32
|
||||
/* 352us from calling transmit() until the SFD byte has been sent */
|
||||
#define CC2538_DELAY_BEFORE_TX ((unsigned)US_TO_RTIMERTICKS(352))
|
||||
/* 192us as in datasheet but ACKs are not always received, so adjusted to 250us */
|
||||
#define CC2538_DELAY_BEFORE_RX ((unsigned)US_TO_RTIMERTICKS(250))
|
||||
#define CC2538_DELAY_BEFORE_DETECT 0
|
||||
/* Frame filtering done in software */
|
||||
#define TSCH_CONF_HW_FRAME_FILTERING 0
|
||||
|
||||
#ifndef TSCH_CONF_BASE_DRIFT_PPM
|
||||
/* The drift compared to "true" 10ms slots.
|
||||
* Enable adaptive sync to enable compensation for this.
|
||||
* Slot length 10000 usec
|
||||
* 328 ticks
|
||||
* Tick duration 30.517578125 usec
|
||||
* Real slot duration 10009.765625 usec
|
||||
* Target - real duration = -9.765625 usec
|
||||
* TSCH_CONF_BASE_DRIFT_PPM -977
|
||||
*/
|
||||
#define TSCH_CONF_BASE_DRIFT_PPM -977
|
||||
#endif
|
||||
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#define SPI_CONF_CONTROLLER_COUNT 2
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/* Path to CMSIS header */
|
||||
#define CMSIS_CONF_HEADER_PATH "cc2538_cm3.h"
|
||||
|
||||
/* Path to headers with implementation of mutexes and memory barriers */
|
||||
#define MUTEX_CONF_ARCH_HEADER_PATH "mutex-cortex.h"
|
||||
#define MEMORY_BARRIER_CONF_ARCH_HEADER_PATH "memory-barrier-cortex.h"
|
||||
|
||||
#define GPIO_HAL_CONF_ARCH_HDR_PATH "dev/gpio-hal-arch.h"
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#endif /* CC2538_DEF_H_ */
|
||||
/*---------------------------------------------------------------------------*/
|
|
@ -1,125 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2013, Texas Instruments Incorporated - http://www.ti.com/
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
/*
|
||||
* cc2538 linker configuration file. This is not the actual file used at link
|
||||
* stage. Rather, it is used as input for the auto-generation of the actual
|
||||
* ld script, which is called cc2538.ld and will be in the project directory
|
||||
*/
|
||||
MEMORY
|
||||
{
|
||||
FLASH_FW (rx) : ORIGIN = FLASH_FW_ADDR, LENGTH = FLASH_FW_SIZE
|
||||
FLASH_CCA (RX) : ORIGIN = FLASH_CCA_ADDR, LENGTH = FLASH_CCA_SIZE
|
||||
|
||||
/*
|
||||
* If PM2 is enabled, then the PM2 SRAM limitations apply, i.e. the
|
||||
* regular-leakage SRAM is a non-retention SRAM and the low-leakage SRAM is
|
||||
* a full-retention SRAM.
|
||||
* Else, the data in the regular-leakage SRAM is always retained, so there
|
||||
* are virtually a non-retention SRAM with a size of 0 bytes and a
|
||||
* full-retention SRAM spanning the whole SRAM, which is more convenient to
|
||||
* use.
|
||||
*/
|
||||
#if LPM_CONF_ENABLE && LPM_CONF_MAX_PM >= 2
|
||||
NRSRAM (RWX) : ORIGIN = CC2538_DEV_RLSRAM_ADDR,
|
||||
LENGTH = CC2538_DEV_RLSRAM_SIZE
|
||||
FRSRAM (RWX) : ORIGIN = CC2538_DEV_LLSRAM_ADDR,
|
||||
LENGTH = CC2538_DEV_LLSRAM_SIZE
|
||||
#else
|
||||
NRSRAM (RWX) : ORIGIN = CC2538_DEV_RLSRAM_ADDR, LENGTH = 0
|
||||
FRSRAM (RWX) : ORIGIN = CC2538_DEV_SRAM_ADDR, LENGTH = CC2538_DEV_SRAM_SIZE
|
||||
#endif
|
||||
}
|
||||
|
||||
ENTRY(flash_cca_lock_page)
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
_text = .;
|
||||
*(.vectors)
|
||||
*(.text*)
|
||||
*(.rodata*)
|
||||
_etext = .;
|
||||
} > FLASH_FW= 0
|
||||
|
||||
.socdata (NOLOAD) :
|
||||
{
|
||||
*(.udma_channel_control_table)
|
||||
} > FRSRAM
|
||||
|
||||
.data : ALIGN(4)
|
||||
{
|
||||
_data = .;
|
||||
*(.data*)
|
||||
_edata = .;
|
||||
} > FRSRAM AT > FLASH_FW
|
||||
_ldata = LOADADDR(.data);
|
||||
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx*)
|
||||
} > FLASH_FW
|
||||
|
||||
.bss :
|
||||
{
|
||||
_bss = .;
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
_ebss = .;
|
||||
} > FRSRAM
|
||||
|
||||
_end = .; /* End of the .bss segment. */
|
||||
|
||||
/* This symbol is used by the stack check library. */
|
||||
_stack = .;
|
||||
|
||||
.stack (NOLOAD) :
|
||||
{
|
||||
*(.stack)
|
||||
} > FRSRAM
|
||||
|
||||
/* This symbol is used by the stack check library. */
|
||||
_stack_origin = .;
|
||||
_heap = .;
|
||||
_eheap = ORIGIN(FRSRAM) + LENGTH(FRSRAM);
|
||||
|
||||
.nrdata (NOLOAD) :
|
||||
{
|
||||
_nrdata = .;
|
||||
*(.nrdata*)
|
||||
_enrdata = .;
|
||||
} > NRSRAM
|
||||
|
||||
.flashcca :
|
||||
{
|
||||
*(.flashcca)
|
||||
} > FLASH_CCA
|
||||
}
|
|
@ -1,144 +0,0 @@
|
|||
/*
|
||||
* Template:
|
||||
* Copyright (c) 2012 ARM LIMITED
|
||||
* All rights reserved.
|
||||
*
|
||||
* CC2538:
|
||||
* Copyright (c) 2016, Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
/**
|
||||
* \addtogroup cc2538
|
||||
* @{
|
||||
*
|
||||
* \defgroup cc2538-cm3 CC2538 Cortex-M3
|
||||
*
|
||||
* CC2538 Cortex-M3 CMSIS definitions
|
||||
* @{
|
||||
*
|
||||
* \file
|
||||
* CMSIS Cortex-M3 core peripheral access layer header file for CC2538
|
||||
*/
|
||||
#ifndef CC2538_CM3_H
|
||||
#define CC2538_CM3_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** \defgroup CC2538_CMSIS CC2538 CMSIS Definitions
|
||||
* Configuration of the Cortex-M3 Processor and Core Peripherals
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** \name Interrupt Number Definition
|
||||
* @{
|
||||
*/
|
||||
|
||||
typedef enum IRQn
|
||||
{
|
||||
/****** Cortex-M3 Processor Exceptions Numbers ****************************/
|
||||
NonMaskableInt_IRQn = -14, /**< 2 Non Maskable Interrupt */
|
||||
HardFault_IRQn = -13, /**< 3 HardFault Interrupt */
|
||||
MemoryManagement_IRQn = -12, /**< 4 Memory Management Interrupt */
|
||||
BusFault_IRQn = -11, /**< 5 Bus Fault Interrupt */
|
||||
UsageFault_IRQn = -10, /**< 6 Usage Fault Interrupt */
|
||||
SVCall_IRQn = -5, /**< 11 SV Call Interrupt */
|
||||
DebugMonitor_IRQn = -4, /**< 12 Debug Monitor Interrupt */
|
||||
PendSV_IRQn = -2, /**< 14 Pend SV Interrupt */
|
||||
SysTick_IRQn = -1, /**< 15 System Tick Interrupt */
|
||||
|
||||
/****** CC2538-Specific Interrupt Numbers *********************************/
|
||||
GPIO_A_IRQn = 0, /**< GPIO port A Interrupt */
|
||||
GPIO_B_IRQn = 1, /**< GPIO port B Interrupt */
|
||||
GPIO_C_IRQn = 2, /**< GPIO port C Interrupt */
|
||||
GPIO_D_IRQn = 3, /**< GPIO port D Interrupt */
|
||||
UART0_IRQn = 5, /**< UART0 Interrupt */
|
||||
UART1_IRQn = 6, /**< UART1 Interrupt */
|
||||
SSI0_IRQn = 7, /**< SSI0 Interrupt */
|
||||
I2C_IRQn = 8, /**< I²C Interrupt */
|
||||
ADC_IRQn = 14, /**< ADC Interrupt */
|
||||
WDT_IRQn = 18, /**< Watchdog Timer Interrupt */
|
||||
GPT0A_IRQn = 19, /**< GPTimer 0A Interrupt */
|
||||
GPT0B_IRQn = 20, /**< GPTimer 0B Interrupt */
|
||||
GPT1A_IRQn = 21, /**< GPTimer 1A Interrupt */
|
||||
GPT1B_IRQn = 22, /**< GPTimer 1B Interrupt */
|
||||
GPT2A_IRQn = 23, /**< GPTimer 2A Interrupt */
|
||||
GPT2B_IRQn = 24, /**< GPTimer 2B Interrupt */
|
||||
ADC_CMP_IRQn = 25, /**< Analog Comparator Interrupt */
|
||||
RF_TX_RX_ALT_IRQn = 26, /**< RF Tx/Rx (Alternate) Interrupt */
|
||||
RF_ERR_ALT_IRQn = 27, /**< RF Error (Alternate) Interrupt */
|
||||
SYS_CTRL_IRQn = 28, /**< System Control Interrupt */
|
||||
FLASH_CTRL_IRQn = 29, /**< Flash memory Control Interrupt */
|
||||
AES_ALT_IRQn = 30, /**< AES (Alternate) Interrupt */
|
||||
PKA_ALT_IRQn = 31, /**< PKA (Alternate) Interrupt */
|
||||
SMT_ALT_IRQn = 32, /**< SM Timer (Alternate) Interrupt */
|
||||
MACT_ALT_IRQn = 33, /**< MAC Timer (Alternate) Interrupt */
|
||||
SSI1_IRQn = 34, /**< SSI1 Interrupt */
|
||||
GPT3A_IRQn = 35, /**< GPTimer 3A Interrupt */
|
||||
GPT3B_IRQn = 36, /**< GPTimer 3B Interrupt */
|
||||
UDMA_SW_IRQn = 46, /**< µDMA Software Interrupt */
|
||||
UDMA_ERR_IRQn = 47, /**< µDMA Error Interrupt */
|
||||
USB_IRQn = 140, /**< USB Interrupt */
|
||||
RF_TX_RX_IRQn = 141, /**< RF Tx/Rx Interrupt */
|
||||
RF_ERR_IRQn = 142, /**< RF Error Interrupt */
|
||||
AES_IRQn = 143, /**< AES Interrupt */
|
||||
PKA_IRQn = 144, /**< PKA Interrupt */
|
||||
SMT_IRQn = 145, /**< SM Timer Interrupt */
|
||||
MACT_IRQn = 146 /**< MAC Timer Interrupt */
|
||||
} IRQn_Type;
|
||||
|
||||
/** @} */
|
||||
|
||||
/** \name Processor and Core Peripheral Section
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Configuration of the Cortex-M3 Processor and Core Peripherals */
|
||||
#define __CM3_REV 0x0200 /**< Core Revision r2p0 */
|
||||
#define __MPU_PRESENT 1 /**< MPU present or not */
|
||||
#define __NVIC_PRIO_BITS 3 /**< Number of Bits used for Priority Levels */
|
||||
#define __Vendor_SysTickConfig 0 /**< Set to 1 if different SysTick Config is used */
|
||||
|
||||
/** @} */
|
||||
|
||||
/** @} */ /* CC2538_CMSIS */
|
||||
|
||||
#include <core_cm3.h> /* Cortex-M3 processor and core peripherals */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* CC2538_CM3_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
* @}
|
||||
*/
|
|
@ -1,144 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2013, ADVANSEE - http://www.advansee.com/
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
/**
|
||||
* \addtogroup cc2538-cfs-coffee-arch
|
||||
* @{
|
||||
*
|
||||
* \file
|
||||
* Module for the cc2538 Coffee port
|
||||
*/
|
||||
#include "contiki.h"
|
||||
#include "sys/cc.h"
|
||||
#include "cfs/cfs-coffee.h"
|
||||
#include "dev/cc2538-dev.h"
|
||||
#include "dev/rom-util.h"
|
||||
#include "dev/flash.h"
|
||||
#include "dev/watchdog.h"
|
||||
#include "cpu.h"
|
||||
#include "cfs-coffee-arch.h"
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#ifndef COFFEE_CONF_CUSTOM_PORT
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#if !COFFEE_SECTOR_SIZE || COFFEE_SECTOR_SIZE % FLASH_PAGE_SIZE
|
||||
#error COFFEE_SECTOR_SIZE must be a non-zero multiple of the flash page size
|
||||
#endif
|
||||
#if !COFFEE_PAGE_SIZE || COFFEE_SECTOR_SIZE % COFFEE_PAGE_SIZE
|
||||
#error COFFEE_PAGE_SIZE must be a divisor of COFFEE_SECTOR_SIZE
|
||||
#endif
|
||||
#if COFFEE_PAGE_SIZE % FLASH_WORD_SIZE
|
||||
#error COFFEE_PAGE_SIZE must be a multiple of the flash word size
|
||||
#endif
|
||||
#if COFFEE_START % FLASH_PAGE_SIZE
|
||||
#error COFFEE_START must be aligned with a flash page boundary
|
||||
#endif
|
||||
#if COFFEE_SIZE % COFFEE_SECTOR_SIZE
|
||||
#error COFFEE_SIZE must be a multiple of COFFEE_SECTOR_SIZE
|
||||
#endif
|
||||
#if COFFEE_SIZE / COFFEE_PAGE_SIZE > INT16_MAX
|
||||
#error Too many Coffee pages for coffee_page_t
|
||||
#endif
|
||||
#if COFFEE_START < CC2538_DEV_FLASH_ADDR || \
|
||||
COFFEE_START + COFFEE_SIZE > FLASH_CCA_ADDR
|
||||
#error Coffee does not fit in flash
|
||||
#endif
|
||||
/*---------------------------------------------------------------------------*/
|
||||
void
|
||||
cfs_coffee_arch_erase(uint16_t sector)
|
||||
{
|
||||
watchdog_periodic();
|
||||
INTERRUPTS_DISABLE();
|
||||
rom_util_page_erase(COFFEE_START + sector * COFFEE_SECTOR_SIZE,
|
||||
COFFEE_SECTOR_SIZE);
|
||||
INTERRUPTS_ENABLE();
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
void
|
||||
cfs_coffee_arch_write(const void *buf, unsigned int size, cfs_offset_t offset)
|
||||
{
|
||||
const uint32_t *src = buf;
|
||||
uint32_t flash_addr = COFFEE_START + offset;
|
||||
unsigned int align;
|
||||
uint32_t word, len;
|
||||
uint32_t page_buf[COFFEE_PAGE_SIZE / FLASH_WORD_SIZE];
|
||||
unsigned int i;
|
||||
|
||||
if(size && (align = flash_addr & (FLASH_WORD_SIZE - 1))) {
|
||||
len = MIN(FLASH_WORD_SIZE - align, size);
|
||||
word = ~((*src & ((1 << (len << 3)) - 1)) << (align << 3));
|
||||
watchdog_periodic();
|
||||
INTERRUPTS_DISABLE();
|
||||
rom_util_program_flash(&word, flash_addr & ~(FLASH_WORD_SIZE - 1),
|
||||
FLASH_WORD_SIZE);
|
||||
INTERRUPTS_ENABLE();
|
||||
*(const uint8_t **)&src += len;
|
||||
size -= len;
|
||||
flash_addr += len;
|
||||
}
|
||||
|
||||
while(size >= FLASH_WORD_SIZE) {
|
||||
len = MIN(size & ~(FLASH_WORD_SIZE - 1), COFFEE_PAGE_SIZE);
|
||||
for(i = 0; i < len / FLASH_WORD_SIZE; i++) {
|
||||
page_buf[i] = ~*src++;
|
||||
}
|
||||
watchdog_periodic();
|
||||
INTERRUPTS_DISABLE();
|
||||
rom_util_program_flash(page_buf, flash_addr, len);
|
||||
INTERRUPTS_ENABLE();
|
||||
size -= len;
|
||||
flash_addr += len;
|
||||
}
|
||||
|
||||
if(size) {
|
||||
word = ~(*src & ((1 << (size << 3)) - 1));
|
||||
watchdog_periodic();
|
||||
INTERRUPTS_DISABLE();
|
||||
rom_util_program_flash(&word, flash_addr, FLASH_WORD_SIZE);
|
||||
INTERRUPTS_ENABLE();
|
||||
}
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
void
|
||||
cfs_coffee_arch_read(void *buf, unsigned int size, cfs_offset_t offset)
|
||||
{
|
||||
const uint8_t *src;
|
||||
uint8_t *dst;
|
||||
|
||||
watchdog_periodic();
|
||||
for(src = (const void *)(COFFEE_START + offset), dst = buf; size; size--) {
|
||||
*dst++ = ~*src++;
|
||||
}
|
||||
}
|
||||
|
||||
#endif /* COFFEE_CONF_CUSTOM_PORT */
|
||||
|
||||
/** @} */
|
|
@ -1,186 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2013, ADVANSEE - http://www.advansee.com/
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
/**
|
||||
* \addtogroup cc2538
|
||||
* @{
|
||||
*
|
||||
* \defgroup cc2538-cfs-coffee-arch cc2538 Coffee port module
|
||||
*
|
||||
* Module for the cc2538 Coffee port
|
||||
* @{
|
||||
*
|
||||
* \file
|
||||
* Header file for the cc2538 Coffee port module
|
||||
*/
|
||||
#ifndef CFS_COFFEE_ARCH_H_
|
||||
#define CFS_COFFEE_ARCH_H_
|
||||
|
||||
#include "contiki.h"
|
||||
#include "cfs/cfs-coffee.h"
|
||||
#include "dev/cc2538-dev.h"
|
||||
#include "dev/flash.h"
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#ifdef COFFEE_CONF_CUSTOM_PORT
|
||||
#include COFFEE_CONF_CUSTOM_PORT
|
||||
#else
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name Coffee port constants
|
||||
* @{
|
||||
*/
|
||||
/** Logical sector size */
|
||||
#ifdef COFFEE_CONF_SECTOR_SIZE
|
||||
#define COFFEE_SECTOR_SIZE COFFEE_CONF_SECTOR_SIZE
|
||||
#else
|
||||
#define COFFEE_SECTOR_SIZE FLASH_PAGE_SIZE
|
||||
#endif
|
||||
/** Logical page size */
|
||||
#ifdef COFFEE_CONF_PAGE_SIZE
|
||||
#define COFFEE_PAGE_SIZE COFFEE_CONF_PAGE_SIZE
|
||||
#else
|
||||
#define COFFEE_PAGE_SIZE (COFFEE_SECTOR_SIZE / 8)
|
||||
#endif
|
||||
/** Start offset of the file system */
|
||||
#ifdef COFFEE_CONF_START
|
||||
#define COFFEE_START COFFEE_CONF_START
|
||||
#else
|
||||
#define COFFEE_START CC2538_DEV_FLASH_ADDR
|
||||
#endif
|
||||
/** Total size in bytes of the file system */
|
||||
#ifdef COFFEE_CONF_SIZE
|
||||
#define COFFEE_SIZE COFFEE_CONF_SIZE
|
||||
#else
|
||||
#define COFFEE_SIZE 0
|
||||
#endif
|
||||
/** Maximal filename length */
|
||||
#ifdef COFFEE_CONF_NAME_LENGTH
|
||||
#define COFFEE_NAME_LENGTH COFFEE_CONF_NAME_LENGTH
|
||||
#else
|
||||
#define COFFEE_NAME_LENGTH 40
|
||||
#endif
|
||||
/** Number of file cache entries */
|
||||
#ifdef COFFEE_CONF_MAX_OPEN_FILES
|
||||
#define COFFEE_MAX_OPEN_FILES COFFEE_CONF_MAX_OPEN_FILES
|
||||
#else
|
||||
#define COFFEE_MAX_OPEN_FILES 5
|
||||
#endif
|
||||
/** Number of file descriptor entries */
|
||||
#ifdef COFFEE_CONF_FD_SET_SIZE
|
||||
#define COFFEE_FD_SET_SIZE COFFEE_CONF_FD_SET_SIZE
|
||||
#else
|
||||
#define COFFEE_FD_SET_SIZE 5
|
||||
#endif
|
||||
/** Maximal amount of log table entries read in one batch */
|
||||
#ifdef COFFEE_CONF_LOG_TABLE_LIMIT
|
||||
#define COFFEE_LOG_TABLE_LIMIT COFFEE_CONF_LOG_TABLE_LIMIT
|
||||
#else
|
||||
#define COFFEE_LOG_TABLE_LIMIT 16
|
||||
#endif
|
||||
/** Default reserved file size */
|
||||
#ifdef COFFEE_CONF_DYN_SIZE
|
||||
#define COFFEE_DYN_SIZE COFFEE_CONF_DYN_SIZE
|
||||
#else
|
||||
#define COFFEE_DYN_SIZE (COFFEE_SECTOR_SIZE - 50)
|
||||
#endif
|
||||
/** Default micro-log size */
|
||||
#ifdef COFFEE_CONF_LOG_SIZE
|
||||
#define COFFEE_LOG_SIZE COFFEE_CONF_LOG_SIZE
|
||||
#else
|
||||
#define COFFEE_LOG_SIZE (4 * COFFEE_PAGE_SIZE)
|
||||
#endif
|
||||
/** Whether Coffee will use micro logs */
|
||||
#ifdef COFFEE_CONF_MICRO_LOGS
|
||||
#define COFFEE_MICRO_LOGS COFFEE_CONF_MICRO_LOGS
|
||||
#else
|
||||
#define COFFEE_MICRO_LOGS 0
|
||||
#endif
|
||||
/** Whether files are expected to be appended to only */
|
||||
#ifdef COFFEE_CONF_APPEND_ONLY
|
||||
#define COFFEE_APPEND_ONLY COFFEE_CONF_APPEND_ONLY
|
||||
#else
|
||||
#define COFFEE_APPEND_ONLY 1
|
||||
#endif
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name Coffee port macros
|
||||
* @{
|
||||
*/
|
||||
/** Erase */
|
||||
#define COFFEE_ERASE(sector) \
|
||||
cfs_coffee_arch_erase(sector)
|
||||
/** Write */
|
||||
#define COFFEE_WRITE(buf, size, offset) \
|
||||
cfs_coffee_arch_write((buf), (size), (offset))
|
||||
/** Read */
|
||||
#define COFFEE_READ(buf, size, offset) \
|
||||
cfs_coffee_arch_read((buf), (size), (offset))
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name Coffee port types
|
||||
* @{
|
||||
*/
|
||||
typedef int16_t coffee_page_t; /**< Page */
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name Coffee port functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** \brief Erases a device sector
|
||||
* \param sector Sector to erase
|
||||
*/
|
||||
void cfs_coffee_arch_erase(uint16_t sector);
|
||||
|
||||
/** \brief Writes a buffer to the device
|
||||
* \param buf Pointer to the buffer
|
||||
* \param size Byte size of the buffer
|
||||
* \param offset Device offset to write to
|
||||
*/
|
||||
void cfs_coffee_arch_write(const void *buf, unsigned int size,
|
||||
cfs_offset_t offset);
|
||||
|
||||
/** \brief Reads from the device to a buffer
|
||||
* \param buf Pointer to the buffer
|
||||
* \param size Byte size of the buffer
|
||||
* \param offset Device offset to read from
|
||||
*/
|
||||
void cfs_coffee_arch_read(void *buf, unsigned int size, cfs_offset_t offset);
|
||||
|
||||
/** @} */
|
||||
|
||||
#endif /* COFFEE_CONF_CUSTOM_PORT */
|
||||
#endif /* CFS_COFFEE_ARCH_H_ */
|
||||
|
||||
/**
|
||||
* @}
|
||||
* @}
|
||||
*/
|
|
@ -1,251 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2012, Texas Instruments Incorporated - http://www.ti.com/
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
/**
|
||||
* \addtogroup cc2538
|
||||
* @{
|
||||
*
|
||||
* \defgroup cc2538-clock cc2538 Clock
|
||||
*
|
||||
* Implementation of the clock module for the cc2538
|
||||
*
|
||||
* To implement the clock functionality, we use the SysTick peripheral on the
|
||||
* cortex-M3. We run the system clock at a configurable speed and set the
|
||||
* SysTick to give us 128 interrupts / sec. However, the Sleep Timer counter
|
||||
* value is used for the number of elapsed ticks in order to avoid a
|
||||
* significant time drift caused by PM1/2. Contrary to the Sleep Timer, the
|
||||
* SysTick peripheral is indeed frozen during PM1/2, so adjusting upon wake-up
|
||||
* a tick counter based on this peripheral would hardly be accurate.
|
||||
* @{
|
||||
*
|
||||
* \file
|
||||
* Clock driver implementation for the TI cc2538
|
||||
*/
|
||||
#include "contiki.h"
|
||||
#include "cc2538_cm3.h"
|
||||
#include "reg.h"
|
||||
#include "cpu.h"
|
||||
#include "dev/gptimer.h"
|
||||
#include "dev/sys-ctrl.h"
|
||||
|
||||
#include "sys/energest.h"
|
||||
#include "sys/etimer.h"
|
||||
#include "sys/rtimer.h"
|
||||
|
||||
#include <stdint.h>
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#define RTIMER_CLOCK_TICK_RATIO (RTIMER_SECOND / CLOCK_SECOND)
|
||||
|
||||
/* Prescaler for GPT0:Timer A used for clock_delay_usec(). */
|
||||
#if SYS_CTRL_SYS_CLOCK < SYS_CTRL_1MHZ
|
||||
#error System clock speeds below 1MHz are not supported
|
||||
#endif
|
||||
#define PRESCALER_VALUE (SYS_CTRL_SYS_CLOCK / SYS_CTRL_1MHZ - 1)
|
||||
|
||||
/* Period of the SysTick counter expressed as a number of ticks */
|
||||
#if SYS_CTRL_SYS_CLOCK % CLOCK_SECOND
|
||||
/* Too low clock speeds will lead to reduced accurracy */
|
||||
#error System clock speed too slow for CLOCK_SECOND, accuracy reduced
|
||||
#endif
|
||||
#define SYSTICK_PERIOD (SYS_CTRL_SYS_CLOCK / CLOCK_SECOND)
|
||||
|
||||
static volatile uint64_t rt_ticks_startup = 0, rt_ticks_epoch = 0;
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \brief Arch-specific implementation of clock_init for the cc2538
|
||||
*
|
||||
* We initialise the SysTick to fire 128 interrupts per second, giving us a
|
||||
* value of 128 for CLOCK_SECOND
|
||||
*
|
||||
* We also initialise GPT0:Timer A, which is used by clock_delay_usec().
|
||||
* We use 16-bit range (individual), count-down, one-shot, no interrupts.
|
||||
* The prescaler is computed according to the system clock in order to get 1
|
||||
* tick per usec.
|
||||
*/
|
||||
void
|
||||
clock_init(void)
|
||||
{
|
||||
SysTick_Config(SYSTICK_PERIOD);
|
||||
|
||||
/*
|
||||
* Remove the clock gate to enable GPT0 and then initialise it
|
||||
* We only use GPT0 for clock_delay_usec. We initialise it here so we can
|
||||
* have it ready when it's needed
|
||||
*/
|
||||
REG(SYS_CTRL_RCGCGPT) |= SYS_CTRL_RCGCGPT_GPT0;
|
||||
|
||||
/* Make sure GPT0 is off */
|
||||
REG(GPT_0_BASE + GPTIMER_CTL) = 0;
|
||||
|
||||
/* 16-bit */
|
||||
REG(GPT_0_BASE + GPTIMER_CFG) = 0x04;
|
||||
|
||||
/* One-Shot, Count Down, No Interrupts */
|
||||
REG(GPT_0_BASE + GPTIMER_TAMR) = GPTIMER_TAMR_TAMR_ONE_SHOT;
|
||||
|
||||
/* Prescale depending on system clock used */
|
||||
REG(GPT_0_BASE + GPTIMER_TAPR) = PRESCALER_VALUE;
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
clock_time_t
|
||||
clock_time(void)
|
||||
{
|
||||
return rt_ticks_startup / RTIMER_CLOCK_TICK_RATIO;
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
void
|
||||
clock_set_seconds(unsigned long sec)
|
||||
{
|
||||
rt_ticks_epoch = (uint64_t)sec * RTIMER_SECOND;
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
unsigned long
|
||||
clock_seconds(void)
|
||||
{
|
||||
return rt_ticks_epoch / RTIMER_SECOND;
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
void
|
||||
clock_wait(clock_time_t i)
|
||||
{
|
||||
clock_time_t start;
|
||||
|
||||
start = clock_time();
|
||||
while(clock_time() - start < (clock_time_t)i);
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/*
|
||||
* Arch-specific implementation of clock_delay_usec for the cc2538
|
||||
*
|
||||
* See clock_init() for GPT0 Timer A's configuration
|
||||
*/
|
||||
void
|
||||
clock_delay_usec(uint16_t dt)
|
||||
{
|
||||
REG(GPT_0_BASE + GPTIMER_TAILR) = dt;
|
||||
REG(GPT_0_BASE + GPTIMER_CTL) |= GPTIMER_CTL_TAEN;
|
||||
|
||||
/* One-Shot mode: TAEN will be cleared when the timer reaches 0 */
|
||||
while(REG(GPT_0_BASE + GPTIMER_CTL) & GPTIMER_CTL_TAEN);
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \brief Obsolete delay function but we implement it here since some code
|
||||
* still uses it
|
||||
*/
|
||||
void
|
||||
clock_delay(unsigned int i)
|
||||
{
|
||||
clock_delay_usec(i);
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \brief Update the software clock ticks and seconds
|
||||
*
|
||||
* This function is used to update the software tick counters whenever the
|
||||
* system clock might have changed, which can occur upon a SysTick ISR or upon
|
||||
* wake-up from PM1/2.
|
||||
*
|
||||
* For the software clock ticks counter, the Sleep Timer counter value is used
|
||||
* as the base tick value, and extended to a 64-bit value thanks to a detection
|
||||
* of wraparounds.
|
||||
*
|
||||
* For the seconds counter, the changes of the Sleep Timer counter value are
|
||||
* added to the reference time, which is either the startup time or the value
|
||||
* passed to clock_set_seconds().
|
||||
*
|
||||
* This function polls the etimer process if an etimer has expired.
|
||||
*/
|
||||
static void
|
||||
update_ticks(void)
|
||||
{
|
||||
rtimer_clock_t now;
|
||||
uint64_t prev_rt_ticks_startup, cur_rt_ticks_startup;
|
||||
uint32_t cur_rt_ticks_startup_hi;
|
||||
|
||||
now = RTIMER_NOW();
|
||||
prev_rt_ticks_startup = rt_ticks_startup;
|
||||
|
||||
cur_rt_ticks_startup_hi = prev_rt_ticks_startup >> 32;
|
||||
if(now < (rtimer_clock_t)prev_rt_ticks_startup) {
|
||||
cur_rt_ticks_startup_hi++;
|
||||
}
|
||||
cur_rt_ticks_startup = (uint64_t)cur_rt_ticks_startup_hi << 32 | now;
|
||||
rt_ticks_startup = cur_rt_ticks_startup;
|
||||
|
||||
rt_ticks_epoch += cur_rt_ticks_startup - prev_rt_ticks_startup;
|
||||
|
||||
/*
|
||||
* Inform the etimer library that the system clock has changed and that an
|
||||
* etimer might have expired.
|
||||
*/
|
||||
if(etimer_pending()) {
|
||||
etimer_request_poll();
|
||||
}
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \brief Adjust the clock following missed SysTick ISRs
|
||||
*
|
||||
* This function is useful when coming out of PM1/2, during which the system
|
||||
* clock is stopped. We adjust the clock counters like after any SysTick ISR.
|
||||
*
|
||||
* \note This function is only meant to be used by lpm_exit(). Applications
|
||||
* should really avoid calling this
|
||||
*/
|
||||
void
|
||||
clock_adjust(void)
|
||||
{
|
||||
/* Halt the SysTick while adjusting */
|
||||
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
|
||||
|
||||
update_ticks();
|
||||
|
||||
/* Re-Start the SysTick */
|
||||
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \brief The clock Interrupt Service Routine
|
||||
*
|
||||
* It polls the etimer process if an etimer has expired. It also updates the
|
||||
* software clock tick and seconds counter.
|
||||
*/
|
||||
void
|
||||
clock_isr(void)
|
||||
{
|
||||
update_ticks();
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
* @}
|
||||
*/
|
|
@ -1,61 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2012, Texas Instruments Incorporated - http://www.ti.com/
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
/**
|
||||
* \addtogroup cc2538
|
||||
* @{
|
||||
*
|
||||
* \defgroup cc2538-cpu cc2538 CPU
|
||||
*
|
||||
* CPU-specific functions for the cc2538 core
|
||||
* @{
|
||||
*
|
||||
* \file
|
||||
* Header file with prototypes for interrupt control on the cc2538
|
||||
* Cortex-M3 micro
|
||||
*
|
||||
*/
|
||||
#ifndef CPU_H_
|
||||
#define CPU_H_
|
||||
|
||||
#include "cc2538_cm3.h"
|
||||
|
||||
/** \brief Enables all CPU interrupts */
|
||||
#define INTERRUPTS_ENABLE() __enable_irq()
|
||||
|
||||
/** \brief Disables all CPU interrupts. */
|
||||
#define INTERRUPTS_DISABLE() __disable_irq()
|
||||
|
||||
#endif /* CPU_H_ */
|
||||
|
||||
/**
|
||||
* @}
|
||||
* @}
|
||||
*/
|
|
@ -1,92 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2012, Texas Instruments Incorporated - http://www.ti.com/
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#include "contiki.h"
|
||||
|
||||
#include "dev/uart.h"
|
||||
#include "usb/usb-serial.h"
|
||||
|
||||
#include <stdio.h>
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#ifndef DBG_CONF_USB
|
||||
#define DBG_CONF_USB 0
|
||||
#endif
|
||||
|
||||
#if DBG_CONF_USB
|
||||
#define write_byte(b) usb_serial_writeb(b)
|
||||
#define flush() usb_serial_flush()
|
||||
#else
|
||||
#define write_byte(b) uart_write_byte(DBG_CONF_UART, b)
|
||||
#define flush()
|
||||
#endif
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#define SLIP_END 0300
|
||||
/*---------------------------------------------------------------------------*/
|
||||
int
|
||||
dbg_putchar(int c)
|
||||
{
|
||||
#if DBG_CONF_SLIP_MUX
|
||||
static char debug_frame = 0;
|
||||
|
||||
if(!debug_frame) {
|
||||
write_byte(SLIP_END);
|
||||
write_byte('\r');
|
||||
debug_frame = 1;
|
||||
}
|
||||
#endif
|
||||
|
||||
write_byte(c);
|
||||
|
||||
if(c == '\n') {
|
||||
#if DBG_CONF_SLIP_MUX
|
||||
write_byte(SLIP_END);
|
||||
debug_frame = 0;
|
||||
#endif
|
||||
flush();
|
||||
}
|
||||
return c;
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
unsigned int
|
||||
dbg_send_bytes(const unsigned char *s, unsigned int len)
|
||||
{
|
||||
unsigned int i = 0;
|
||||
|
||||
while(s && *s != 0) {
|
||||
if(i >= len) {
|
||||
break;
|
||||
}
|
||||
putchar(*s++);
|
||||
i++;
|
||||
}
|
||||
return i;
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
|
@ -1,99 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2013, ADVANSEE - http://www.advansee.com/
|
||||
* Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
/**
|
||||
* \addtogroup cc2538-adc
|
||||
* @{
|
||||
*
|
||||
* \file
|
||||
* Implementation of the cc2538 ADC driver
|
||||
*/
|
||||
#include "contiki.h"
|
||||
#include "dev/soc-adc.h"
|
||||
#include "dev/cctest.h"
|
||||
#include "dev/rfcore-xreg.h"
|
||||
#include "dev/adc.h"
|
||||
#include "reg.h"
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/*---------------------------------------------------------------------------*/
|
||||
void
|
||||
adc_init(void)
|
||||
{
|
||||
/* Start conversions only manually */
|
||||
REG(SOC_ADC_ADCCON1) |= SOC_ADC_ADCCON1_STSEL;
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
int16_t
|
||||
adc_get(uint8_t channel, uint8_t ref, uint8_t div)
|
||||
{
|
||||
uint32_t cctest_tr0, rfcore_xreg_atest;
|
||||
int16_t res;
|
||||
|
||||
/* On-chip temperature sensor */
|
||||
if(channel == SOC_ADC_ADCCON_CH_TEMP) {
|
||||
/* Connect the temperature sensor to the ADC */
|
||||
cctest_tr0 = REG(CCTEST_TR0);
|
||||
REG(CCTEST_TR0) = cctest_tr0 | CCTEST_TR0_ADCTM;
|
||||
|
||||
/* Enable the temperature sensor */
|
||||
rfcore_xreg_atest = REG(RFCORE_XREG_ATEST);
|
||||
REG(RFCORE_XREG_ATEST) = (rfcore_xreg_atest & ~RFCORE_XREG_ATEST_ATEST_CTRL) |
|
||||
RFCORE_XREG_ATEST_ATEST_CTRL_TEMP;
|
||||
}
|
||||
|
||||
/* Start a single extra conversion with the given parameters */
|
||||
REG(SOC_ADC_ADCCON3) = (REG(SOC_ADC_ADCCON3) &
|
||||
~(SOC_ADC_ADCCON3_EREF | SOC_ADC_ADCCON3_EDIV | SOC_ADC_ADCCON3_ECH)) |
|
||||
ref | div | channel;
|
||||
|
||||
/* Poll until end of conversion */
|
||||
while(!(REG(SOC_ADC_ADCCON1) & SOC_ADC_ADCCON1_EOC));
|
||||
|
||||
/* Read conversion result, reading SOC_ADC_ADCH last to clear
|
||||
* SOC_ADC_ADCCON1.EOC */
|
||||
res = REG(SOC_ADC_ADCL) & 0xfc;
|
||||
res |= REG(SOC_ADC_ADCH) << 8;
|
||||
|
||||
/* On-chip temperature sensor */
|
||||
if(channel == SOC_ADC_ADCCON_CH_TEMP) {
|
||||
/* Restore the initial temperature sensor state and connection (better for
|
||||
* power consumption) */
|
||||
REG(RFCORE_XREG_ATEST) = rfcore_xreg_atest;
|
||||
REG(CCTEST_TR0) = cctest_tr0;
|
||||
}
|
||||
|
||||
/* Return conversion result */
|
||||
return res;
|
||||
}
|
||||
|
||||
/** @} */
|
|
@ -1,75 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2013, ADVANSEE - http://www.advansee.com/
|
||||
* Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
/**
|
||||
* \addtogroup cc2538
|
||||
* @{
|
||||
*
|
||||
* \defgroup cc2538-adc cc2538 ADC
|
||||
*
|
||||
* Driver for the cc2538 ADC controller
|
||||
* @{
|
||||
*
|
||||
* \file
|
||||
* Header file for the cc2538 ADC driver
|
||||
*/
|
||||
#ifndef ADC_H_
|
||||
#define ADC_H_
|
||||
|
||||
#include "contiki.h"
|
||||
#include "dev/soc-adc.h"
|
||||
|
||||
#include <stdint.h>
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name ADC functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** \brief Initializes the ADC controller */
|
||||
void adc_init(void);
|
||||
|
||||
/** \brief Performs a single conversion on a given ADC channel
|
||||
* \param channel The channel used for the conversion: \c SOC_ADC_ADCCON_CH_x
|
||||
* \param ref The reference voltage used for the conversion: \c SOC_ADC_ADCCON_REF_x
|
||||
* \param div The decimation rate used for the conversion: \c SOC_ADC_ADCCON_DIV_x
|
||||
* \return Signed 16-bit conversion result: 2's complement, ENOBs in MSBs
|
||||
* \note PD[5:4] are not usable when the temperature sensor is selected.
|
||||
*/
|
||||
int16_t adc_get(uint8_t channel, uint8_t ref, uint8_t div);
|
||||
|
||||
/** @} */
|
||||
|
||||
#endif /* ADC_H_ */
|
||||
|
||||
/**
|
||||
* @}
|
||||
* @}
|
||||
*/
|
|
@ -1,330 +0,0 @@
|
|||
/*
|
||||
* Original file:
|
||||
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
|
||||
* All rights reserved.
|
||||
*
|
||||
* Port to Contiki:
|
||||
* Copyright (c) 2013, ADVANSEE - http://www.advansee.com/
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
/**
|
||||
* \addtogroup cc2538-aes
|
||||
* @{
|
||||
*
|
||||
* \file
|
||||
* Implementation of the cc2538 AES driver
|
||||
*/
|
||||
#include "contiki.h"
|
||||
#include "dev/rom-util.h"
|
||||
#include "dev/nvic.h"
|
||||
#include "dev/aes.h"
|
||||
#include "reg.h"
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
/*---------------------------------------------------------------------------*/
|
||||
uint8_t
|
||||
aes_load_keys(const void *keys, uint8_t key_size, uint8_t count,
|
||||
uint8_t start_area)
|
||||
{
|
||||
uint32_t aes_key_store_size;
|
||||
uint32_t areas;
|
||||
uint64_t aligned_keys[AES_KEY_AREAS * 128 / 8 / sizeof(uint64_t)];
|
||||
int i;
|
||||
|
||||
if(REG(AES_CTRL_ALG_SEL) != 0x00000000) {
|
||||
return CRYPTO_RESOURCE_IN_USE;
|
||||
}
|
||||
|
||||
/* 192-bit keys must be padded to 256 bits */
|
||||
if(key_size == AES_KEY_STORE_SIZE_KEY_SIZE_192) {
|
||||
for(i = 0; i < count; i++) {
|
||||
rom_util_memcpy(&aligned_keys[i << 2], &((const uint64_t *)keys)[i * 3],
|
||||
192 / 8);
|
||||
aligned_keys[(i << 2) + 3] = 0;
|
||||
}
|
||||
}
|
||||
|
||||
/* Change count to the number of 128-bit key areas */
|
||||
if(key_size != AES_KEY_STORE_SIZE_KEY_SIZE_128) {
|
||||
count <<= 1;
|
||||
}
|
||||
|
||||
/* The keys base address needs to be 4-byte aligned */
|
||||
if(key_size != AES_KEY_STORE_SIZE_KEY_SIZE_192) {
|
||||
rom_util_memcpy(aligned_keys, keys, count << 4);
|
||||
}
|
||||
|
||||
/* Workaround for AES registers not retained after PM2 */
|
||||
REG(AES_CTRL_INT_CFG) = AES_CTRL_INT_CFG_LEVEL;
|
||||
REG(AES_CTRL_INT_EN) = AES_CTRL_INT_EN_DMA_IN_DONE |
|
||||
AES_CTRL_INT_EN_RESULT_AV;
|
||||
|
||||
/* Configure master control module */
|
||||
REG(AES_CTRL_ALG_SEL) = AES_CTRL_ALG_SEL_KEYSTORE;
|
||||
|
||||
/* Clear any outstanding events */
|
||||
REG(AES_CTRL_INT_CLR) = AES_CTRL_INT_CLR_DMA_IN_DONE |
|
||||
AES_CTRL_INT_CLR_RESULT_AV;
|
||||
|
||||
/* Configure key store module (areas, size)
|
||||
* Note that writing AES_KEY_STORE_SIZE deletes all stored keys */
|
||||
aes_key_store_size = REG(AES_KEY_STORE_SIZE);
|
||||
if((aes_key_store_size & AES_KEY_STORE_SIZE_KEY_SIZE_M) != key_size) {
|
||||
REG(AES_KEY_STORE_SIZE) = (aes_key_store_size &
|
||||
~AES_KEY_STORE_SIZE_KEY_SIZE_M) | key_size;
|
||||
}
|
||||
|
||||
/* Free possibly already occupied key areas */
|
||||
areas = ((0x00000001 << count) - 1) << start_area;
|
||||
REG(AES_KEY_STORE_WRITTEN_AREA) = areas;
|
||||
|
||||
/* Enable key areas to write */
|
||||
REG(AES_KEY_STORE_WRITE_AREA) = areas;
|
||||
|
||||
/* Configure DMAC
|
||||
* Enable DMA channel 0 */
|
||||
REG(AES_DMAC_CH0_CTRL) = AES_DMAC_CH_CTRL_EN;
|
||||
|
||||
/* Base address of the keys in ext. memory */
|
||||
REG(AES_DMAC_CH0_EXTADDR) = (uint32_t)aligned_keys;
|
||||
|
||||
/* Total keys length in bytes (e.g. 16 for 1 x 128-bit key) */
|
||||
REG(AES_DMAC_CH0_DMALENGTH) = (REG(AES_DMAC_CH0_DMALENGTH) &
|
||||
~AES_DMAC_CH_DMALENGTH_DMALEN_M) |
|
||||
(count << (4 + AES_DMAC_CH_DMALENGTH_DMALEN_S));
|
||||
|
||||
/* Wait for operation to complete */
|
||||
while(!(REG(AES_CTRL_INT_STAT) & AES_CTRL_INT_STAT_RESULT_AV));
|
||||
|
||||
/* Check for absence of errors in DMA and key store */
|
||||
if(REG(AES_CTRL_INT_STAT) & AES_CTRL_INT_STAT_DMA_BUS_ERR) {
|
||||
REG(AES_CTRL_INT_CLR) = AES_CTRL_INT_CLR_DMA_BUS_ERR;
|
||||
/* Disable master control / DMA clock */
|
||||
REG(AES_CTRL_ALG_SEL) = 0x00000000;
|
||||
return CRYPTO_DMA_BUS_ERROR;
|
||||
}
|
||||
if(REG(AES_CTRL_INT_STAT) & AES_CTRL_INT_STAT_KEY_ST_WR_ERR) {
|
||||
REG(AES_CTRL_INT_CLR) = AES_CTRL_INT_CLR_KEY_ST_WR_ERR;
|
||||
/* Disable master control / DMA clock */
|
||||
REG(AES_CTRL_ALG_SEL) = 0x00000000;
|
||||
return AES_KEYSTORE_WRITE_ERROR;
|
||||
}
|
||||
|
||||
/* Acknowledge the interrupt */
|
||||
REG(AES_CTRL_INT_CLR) = AES_CTRL_INT_CLR_DMA_IN_DONE |
|
||||
AES_CTRL_INT_CLR_RESULT_AV;
|
||||
|
||||
/* Disable master control / DMA clock */
|
||||
REG(AES_CTRL_ALG_SEL) = 0x00000000;
|
||||
|
||||
/* Check status, if error return error code */
|
||||
if((REG(AES_KEY_STORE_WRITTEN_AREA) & areas) != areas) {
|
||||
return AES_KEYSTORE_WRITE_ERROR;
|
||||
}
|
||||
|
||||
return CRYPTO_SUCCESS;
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
uint8_t
|
||||
aes_auth_crypt_start(uint32_t ctrl, uint8_t key_area, const void *iv,
|
||||
const void *adata, uint16_t adata_len,
|
||||
const void *data_in, void *data_out, uint16_t data_len,
|
||||
struct process *process)
|
||||
{
|
||||
if(REG(AES_CTRL_ALG_SEL) != 0x00000000) {
|
||||
return CRYPTO_RESOURCE_IN_USE;
|
||||
}
|
||||
|
||||
/* Workaround for AES registers not retained after PM2 */
|
||||
REG(AES_CTRL_INT_CFG) = AES_CTRL_INT_CFG_LEVEL;
|
||||
REG(AES_CTRL_INT_EN) = AES_CTRL_INT_EN_DMA_IN_DONE |
|
||||
AES_CTRL_INT_EN_RESULT_AV;
|
||||
|
||||
REG(AES_CTRL_ALG_SEL) = AES_CTRL_ALG_SEL_AES;
|
||||
REG(AES_CTRL_INT_CLR) = AES_CTRL_INT_CLR_DMA_IN_DONE |
|
||||
AES_CTRL_INT_CLR_RESULT_AV;
|
||||
|
||||
REG(AES_KEY_STORE_READ_AREA) = key_area;
|
||||
|
||||
/* Wait until key is loaded to the AES module */
|
||||
while(REG(AES_KEY_STORE_READ_AREA) & AES_KEY_STORE_READ_AREA_BUSY);
|
||||
|
||||
/* Check for Key Store read error */
|
||||
if(REG(AES_CTRL_INT_STAT) & AES_CTRL_INT_STAT_KEY_ST_RD_ERR) {
|
||||
/* Clear the Keystore Read error bit */
|
||||
REG(AES_CTRL_INT_CLR) = AES_CTRL_INT_CLR_KEY_ST_RD_ERR;
|
||||
/* Disable the master control / DMA clock */
|
||||
REG(AES_CTRL_ALG_SEL) = 0x00000000;
|
||||
return AES_KEYSTORE_READ_ERROR;
|
||||
}
|
||||
|
||||
if(iv != NULL) {
|
||||
/* Write initialization vector */
|
||||
REG(AES_AES_IV_0) = ((const uint32_t *)iv)[0];
|
||||
REG(AES_AES_IV_1) = ((const uint32_t *)iv)[1];
|
||||
REG(AES_AES_IV_2) = ((const uint32_t *)iv)[2];
|
||||
REG(AES_AES_IV_3) = ((const uint32_t *)iv)[3];
|
||||
}
|
||||
|
||||
/* Program AES authentication/crypto operation */
|
||||
REG(AES_AES_CTRL) = ctrl;
|
||||
|
||||
/* Write the length of the payload block (lo) */
|
||||
REG(AES_AES_C_LENGTH_0) = data_len;
|
||||
/* Write the length of the payload block (hi) */
|
||||
REG(AES_AES_C_LENGTH_1) = 0;
|
||||
|
||||
/* For combined modes only (CCM or GCM) */
|
||||
if(ctrl & (AES_AES_CTRL_CCM | AES_AES_CTRL_GCM)) {
|
||||
/* Write the length of the AAD data block (may be non-block size-aligned) */
|
||||
REG(AES_AES_AUTH_LENGTH) = adata_len;
|
||||
|
||||
if(adata_len != 0) {
|
||||
/* Configure DMAC to fetch the AAD data
|
||||
* Enable DMA channel 0 */
|
||||
REG(AES_DMAC_CH0_CTRL) = AES_DMAC_CH_CTRL_EN;
|
||||
/* Base address of the AAD data buffer */
|
||||
REG(AES_DMAC_CH0_EXTADDR) = (uint32_t)adata;
|
||||
/* AAD data length in bytes */
|
||||
REG(AES_DMAC_CH0_DMALENGTH) = adata_len;
|
||||
|
||||
/* Wait for completion of the AAD data transfer, DMA_IN_DONE */
|
||||
while(!(REG(AES_CTRL_INT_STAT) & AES_CTRL_INT_STAT_DMA_IN_DONE));
|
||||
|
||||
/* Check for the absence of error */
|
||||
if(REG(AES_CTRL_INT_STAT) & AES_CTRL_INT_STAT_DMA_BUS_ERR) {
|
||||
/* Clear the DMA error */
|
||||
REG(AES_CTRL_INT_CLR) = AES_CTRL_INT_CLR_DMA_BUS_ERR;
|
||||
/* Disable the master control / DMA clock */
|
||||
REG(AES_CTRL_ALG_SEL) = 0x00000000;
|
||||
return CRYPTO_DMA_BUS_ERROR;
|
||||
}
|
||||
|
||||
/* Clear interrupt status */
|
||||
REG(AES_CTRL_INT_CLR) = AES_CTRL_INT_CLR_DMA_IN_DONE;
|
||||
}
|
||||
}
|
||||
|
||||
/* Enable result available bit in interrupt enable */
|
||||
REG(AES_CTRL_INT_EN) = AES_CTRL_INT_EN_RESULT_AV;
|
||||
|
||||
if(process != NULL) {
|
||||
crypto_register_process_notification(process);
|
||||
NVIC_ClearPendingIRQ(AES_IRQn);
|
||||
NVIC_EnableIRQ(AES_IRQn);
|
||||
}
|
||||
|
||||
if(data_len != 0) {
|
||||
/* Configure DMAC
|
||||
* Enable DMA channel 0 */
|
||||
REG(AES_DMAC_CH0_CTRL) = AES_DMAC_CH_CTRL_EN;
|
||||
/* Base address of the input payload data buffer */
|
||||
REG(AES_DMAC_CH0_EXTADDR) = (uint32_t)data_in;
|
||||
/* Input payload data length in bytes */
|
||||
REG(AES_DMAC_CH0_DMALENGTH) = data_len;
|
||||
|
||||
if(data_out != NULL) {
|
||||
/* Enable DMA channel 1 */
|
||||
REG(AES_DMAC_CH1_CTRL) = AES_DMAC_CH_CTRL_EN;
|
||||
/* Base address of the output payload data buffer */
|
||||
REG(AES_DMAC_CH1_EXTADDR) = (uint32_t)data_out;
|
||||
/* Output payload data length in bytes */
|
||||
REG(AES_DMAC_CH1_DMALENGTH) = data_len;
|
||||
}
|
||||
}
|
||||
|
||||
return CRYPTO_SUCCESS;
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
uint8_t
|
||||
aes_auth_crypt_check_status(void)
|
||||
{
|
||||
return !!(REG(AES_CTRL_INT_STAT) &
|
||||
(AES_CTRL_INT_STAT_DMA_BUS_ERR | AES_CTRL_INT_STAT_KEY_ST_WR_ERR |
|
||||
AES_CTRL_INT_STAT_KEY_ST_RD_ERR | AES_CTRL_INT_STAT_RESULT_AV));
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
uint8_t
|
||||
aes_auth_crypt_get_result(void *iv, void *tag)
|
||||
{
|
||||
uint32_t aes_ctrl_int_stat;
|
||||
|
||||
aes_ctrl_int_stat = REG(AES_CTRL_INT_STAT);
|
||||
/* Clear the error bits */
|
||||
REG(AES_CTRL_INT_CLR) = AES_CTRL_INT_CLR_DMA_BUS_ERR |
|
||||
AES_CTRL_INT_CLR_KEY_ST_WR_ERR |
|
||||
AES_CTRL_INT_CLR_KEY_ST_RD_ERR;
|
||||
|
||||
NVIC_DisableIRQ(AES_IRQn);
|
||||
crypto_register_process_notification(NULL);
|
||||
|
||||
/* Disable the master control / DMA clock */
|
||||
REG(AES_CTRL_ALG_SEL) = 0x00000000;
|
||||
|
||||
if(aes_ctrl_int_stat & AES_CTRL_INT_STAT_DMA_BUS_ERR) {
|
||||
return CRYPTO_DMA_BUS_ERROR;
|
||||
}
|
||||
if(aes_ctrl_int_stat & AES_CTRL_INT_STAT_KEY_ST_WR_ERR) {
|
||||
return AES_KEYSTORE_WRITE_ERROR;
|
||||
}
|
||||
if(aes_ctrl_int_stat & AES_CTRL_INT_STAT_KEY_ST_RD_ERR) {
|
||||
return AES_KEYSTORE_READ_ERROR;
|
||||
}
|
||||
|
||||
if(iv != NULL || tag != NULL) {
|
||||
/* Read result
|
||||
* Wait for the context ready bit */
|
||||
while(!(REG(AES_AES_CTRL) & AES_AES_CTRL_SAVED_CONTEXT_READY));
|
||||
|
||||
if(iv != NULL) {
|
||||
/* Read the initialization vector registers */
|
||||
((uint32_t *)iv)[0] = REG(AES_AES_IV_0);
|
||||
((uint32_t *)iv)[1] = REG(AES_AES_IV_1);
|
||||
((uint32_t *)iv)[2] = REG(AES_AES_IV_2);
|
||||
((uint32_t *)iv)[3] = REG(AES_AES_IV_3);
|
||||
}
|
||||
|
||||
if(tag != NULL) {
|
||||
/* Read the tag registers */
|
||||
((uint32_t *)tag)[0] = REG(AES_AES_TAG_OUT_0);
|
||||
((uint32_t *)tag)[1] = REG(AES_AES_TAG_OUT_1);
|
||||
((uint32_t *)tag)[2] = REG(AES_AES_TAG_OUT_2);
|
||||
((uint32_t *)tag)[3] = REG(AES_AES_TAG_OUT_3);
|
||||
}
|
||||
}
|
||||
|
||||
/* Clear the interrupt status */
|
||||
REG(AES_CTRL_INT_CLR) = AES_CTRL_INT_CLR_DMA_IN_DONE |
|
||||
AES_CTRL_INT_CLR_RESULT_AV;
|
||||
|
||||
return CRYPTO_SUCCESS;
|
||||
}
|
||||
|
||||
/** @} */
|
|
@ -1,544 +0,0 @@
|
|||
/*
|
||||
* Original file:
|
||||
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
|
||||
* All rights reserved.
|
||||
*
|
||||
* Port to Contiki:
|
||||
* Copyright (c) 2013, ADVANSEE - http://www.advansee.com/
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
/**
|
||||
* \addtogroup cc2538-crypto
|
||||
* @{
|
||||
*
|
||||
* \defgroup cc2538-aes cc2538 AES
|
||||
*
|
||||
* Driver for the cc2538 AES modes of the security core
|
||||
* @{
|
||||
*
|
||||
* \file
|
||||
* Header file for the cc2538 AES driver
|
||||
*/
|
||||
#ifndef AES_H_
|
||||
#define AES_H_
|
||||
|
||||
#include "contiki.h"
|
||||
#include "dev/crypto.h"
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name AES register offsets
|
||||
* @{
|
||||
*/
|
||||
#define AES_DMAC_CH0_CTRL 0x4008B000 /**< Channel 0 control */
|
||||
#define AES_DMAC_CH0_EXTADDR 0x4008B004 /**< Channel 0 external address */
|
||||
#define AES_DMAC_CH0_DMALENGTH 0x4008B00C /**< Channel 0 DMA length */
|
||||
#define AES_DMAC_STATUS 0x4008B018 /**< DMAC status */
|
||||
#define AES_DMAC_SWRES 0x4008B01C /**< DMAC software reset */
|
||||
#define AES_DMAC_CH1_CTRL 0x4008B020 /**< Channel 1 control */
|
||||
#define AES_DMAC_CH1_EXTADDR 0x4008B024 /**< Channel 1 external address */
|
||||
#define AES_DMAC_CH1_DMALENGTH 0x4008B02C /**< Channel 1 DMA length */
|
||||
#define AES_DMAC_MST_RUNPARAMS 0x4008B078 /**< DMAC master run-time parameters */
|
||||
#define AES_DMAC_PERSR 0x4008B07C /**< DMAC port error raw status */
|
||||
#define AES_DMAC_OPTIONS 0x4008B0F8 /**< DMAC options */
|
||||
#define AES_DMAC_VERSION 0x4008B0FC /**< DMAC version */
|
||||
#define AES_KEY_STORE_WRITE_AREA \
|
||||
0x4008B400 /**< Key store write area */
|
||||
#define AES_KEY_STORE_WRITTEN_AREA \
|
||||
0x4008B404 /**< Key store written area */
|
||||
#define AES_KEY_STORE_SIZE 0x4008B408 /**< Key store size */
|
||||
#define AES_KEY_STORE_READ_AREA 0x4008B40C /**< Key store read area */
|
||||
#define AES_AES_KEY2_0 0x4008B500 /**< AES_KEY2_0 / AES_GHASH_H_IN_0 */
|
||||
#define AES_AES_KEY2_1 0x4008B504 /**< AES_KEY2_1 / AES_GHASH_H_IN_1 */
|
||||
#define AES_AES_KEY2_2 0x4008B508 /**< AES_KEY2_2 / AES_GHASH_H_IN_2 */
|
||||
#define AES_AES_KEY2_3 0x4008B50C /**< AES_KEY2_3 / AES_GHASH_H_IN_3 */
|
||||
#define AES_AES_KEY3_0 0x4008B510 /**< AES_KEY3_0 / AES_KEY2_4 */
|
||||
#define AES_AES_KEY3_1 0x4008B514 /**< AES_KEY3_1 / AES_KEY2_5 */
|
||||
#define AES_AES_KEY3_2 0x4008B518 /**< AES_KEY3_2 / AES_KEY2_6 */
|
||||
#define AES_AES_KEY3_3 0x4008B51C /**< AES_KEY3_3 / AES_KEY2_7 */
|
||||
#define AES_AES_IV_0 0x4008B540 /**< AES initialization vector */
|
||||
#define AES_AES_IV_1 0x4008B544 /**< AES initialization vector */
|
||||
#define AES_AES_IV_2 0x4008B548 /**< AES initialization vector */
|
||||
#define AES_AES_IV_3 0x4008B54C /**< AES initialization vector */
|
||||
#define AES_AES_CTRL 0x4008B550 /**< AES input/output buffer control and mode */
|
||||
#define AES_AES_C_LENGTH_0 0x4008B554 /**< AES crypto length (LSW) */
|
||||
#define AES_AES_C_LENGTH_1 0x4008B558 /**< AES crypto length (MSW) */
|
||||
#define AES_AES_AUTH_LENGTH 0x4008B55C /**< Authentication length */
|
||||
#define AES_AES_DATA_IN_OUT_0 0x4008B560 /**< Data input/output */
|
||||
#define AES_AES_DATA_IN_OUT_1 0x4008B564 /**< Data Input/Output */
|
||||
#define AES_AES_DATA_IN_OUT_2 0x4008B568 /**< Data Input/Output */
|
||||
#define AES_AES_DATA_IN_OUT_3 0x4008B56C /**< Data Input/Output */
|
||||
#define AES_AES_TAG_OUT_0 0x4008B570 /**< TAG */
|
||||
#define AES_AES_TAG_OUT_1 0x4008B574 /**< TAG */
|
||||
#define AES_AES_TAG_OUT_2 0x4008B578 /**< TAG */
|
||||
#define AES_AES_TAG_OUT_3 0x4008B57C /**< TAG */
|
||||
#define AES_HASH_DATA_IN_0 0x4008B600 /**< HASH data input */
|
||||
#define AES_HASH_DATA_IN_1 0x4008B604 /**< HASH data input */
|
||||
#define AES_HASH_DATA_IN_2 0x4008B608 /**< HASH data input */
|
||||
#define AES_HASH_DATA_IN_3 0x4008B60C /**< HASH data input */
|
||||
#define AES_HASH_DATA_IN_4 0x4008B610 /**< HASH data input */
|
||||
#define AES_HASH_DATA_IN_5 0x4008B614 /**< HASH data input */
|
||||
#define AES_HASH_DATA_IN_6 0x4008B618 /**< HASH data input */
|
||||
#define AES_HASH_DATA_IN_7 0x4008B61C /**< HASH data input */
|
||||
#define AES_HASH_DATA_IN_8 0x4008B620 /**< HASH data input */
|
||||
#define AES_HASH_DATA_IN_9 0x4008B624 /**< HASH data input */
|
||||
#define AES_HASH_DATA_IN_10 0x4008B628 /**< HASH data input */
|
||||
#define AES_HASH_DATA_IN_11 0x4008B62C /**< HASH data input */
|
||||
#define AES_HASH_DATA_IN_12 0x4008B630 /**< HASH data input */
|
||||
#define AES_HASH_DATA_IN_13 0x4008B634 /**< HASH data input */
|
||||
#define AES_HASH_DATA_IN_14 0x4008B638 /**< HASH data input */
|
||||
#define AES_HASH_DATA_IN_15 0x4008B63C /**< HASH data input */
|
||||
#define AES_HASH_IO_BUF_CTRL 0x4008B640 /**< Input/output buffer control and status */
|
||||
#define AES_HASH_MODE_IN 0x4008B644 /**< Hash mode */
|
||||
#define AES_HASH_LENGTH_IN_L 0x4008B648 /**< Hash length */
|
||||
#define AES_HASH_LENGTH_IN_H 0x4008B64C /**< Hash length */
|
||||
#define AES_HASH_DIGEST_A 0x4008B650 /**< Hash digest */
|
||||
#define AES_HASH_DIGEST_B 0x4008B654 /**< Hash digest */
|
||||
#define AES_HASH_DIGEST_C 0x4008B658 /**< Hash digest */
|
||||
#define AES_HASH_DIGEST_D 0x4008B65C /**< Hash digest */
|
||||
#define AES_HASH_DIGEST_E 0x4008B660 /**< Hash digest */
|
||||
#define AES_HASH_DIGEST_F 0x4008B664 /**< Hash digest */
|
||||
#define AES_HASH_DIGEST_G 0x4008B668 /**< Hash digest */
|
||||
#define AES_HASH_DIGEST_H 0x4008B66C /**< Hash digest */
|
||||
#define AES_CTRL_ALG_SEL 0x4008B700 /**< Algorithm select */
|
||||
#define AES_CTRL_PROT_EN 0x4008B704 /**< Master PROT privileged access enable */
|
||||
#define AES_CTRL_SW_RESET 0x4008B740 /**< Software reset */
|
||||
#define AES_CTRL_INT_CFG 0x4008B780 /**< Interrupt configuration */
|
||||
#define AES_CTRL_INT_EN 0x4008B784 /**< Interrupt enable */
|
||||
#define AES_CTRL_INT_CLR 0x4008B788 /**< Interrupt clear */
|
||||
#define AES_CTRL_INT_SET 0x4008B78C /**< Interrupt set */
|
||||
#define AES_CTRL_INT_STAT 0x4008B790 /**< Interrupt status */
|
||||
#define AES_CTRL_OPTIONS 0x4008B7F8 /**< Options */
|
||||
#define AES_CTRL_VERSION 0x4008B7FC /**< Version */
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name AES_DMAC_CHx_CTRL registers bit fields
|
||||
* @{
|
||||
*/
|
||||
#define AES_DMAC_CH_CTRL_PRIO 0x00000002 /**< Channel priority 0: Low 1: High */
|
||||
#define AES_DMAC_CH_CTRL_EN 0x00000001 /**< Channel enable */
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name AES_DMAC_CHx_DMALENGTH registers bit fields
|
||||
* @{
|
||||
*/
|
||||
#define AES_DMAC_CH_DMALENGTH_DMALEN_M \
|
||||
0x0000FFFF /**< Channel DMA length in bytes mask */
|
||||
#define AES_DMAC_CH_DMALENGTH_DMALEN_S 0 /**< Channel DMA length in bytes shift */
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name AES_DMAC_STATUS register bit fields
|
||||
* @{
|
||||
*/
|
||||
#define AES_DMAC_STATUS_PORT_ERR \
|
||||
0x00020000 /**< AHB port transfer errors */
|
||||
#define AES_DMAC_STATUS_CH1_ACT 0x00000002 /**< Channel 1 active (DMA transfer on-going) */
|
||||
#define AES_DMAC_STATUS_CH0_ACT 0x00000001 /**< Channel 0 active (DMA transfer on-going) */
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name AES_DMAC_SWRES register bit fields
|
||||
* @{
|
||||
*/
|
||||
#define AES_DMAC_SWRES_SWRES 0x00000001 /**< Software reset enable */
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name AES_DMAC_MST_RUNPARAMS register bit fields
|
||||
* @{
|
||||
*/
|
||||
#define AES_DMAC_MST_RUNPARAMS_AHB_MST1_BURST_SIZE_4 \
|
||||
(2 << 12) /**< Maximum burst size: 4 bytes */
|
||||
#define AES_DMAC_MST_RUNPARAMS_AHB_MST1_BURST_SIZE_8 \
|
||||
(3 << 12) /**< Maximum burst size: 8 bytes */
|
||||
#define AES_DMAC_MST_RUNPARAMS_AHB_MST1_BURST_SIZE_16 \
|
||||
(4 << 12) /**< Maximum burst size: 16 bytes */
|
||||
#define AES_DMAC_MST_RUNPARAMS_AHB_MST1_BURST_SIZE_32 \
|
||||
(5 << 12) /**< Maximum burst size: 32 bytes */
|
||||
#define AES_DMAC_MST_RUNPARAMS_AHB_MST1_BURST_SIZE_64 \
|
||||
(6 << 12) /**< Maximum burst size: 64 bytes */
|
||||
#define AES_DMAC_MST_RUNPARAMS_AHB_MST1_BURST_SIZE_M \
|
||||
0x0000F000 /**< Maximum burst size mask */
|
||||
#define AES_DMAC_MST_RUNPARAMS_AHB_MST1_BURST_SIZE_S \
|
||||
12 /**< Maximum burst size shift */
|
||||
#define AES_DMAC_MST_RUNPARAMS_AHB_MST1_IDLE_EN \
|
||||
0x00000800 /**< Idle insertion between bursts */
|
||||
#define AES_DMAC_MST_RUNPARAMS_AHB_MST1_INCR_EN \
|
||||
0x00000400 /**< Fixed-length burst or single transfers */
|
||||
#define AES_DMAC_MST_RUNPARAMS_AHB_MST1_LOCK_EN \
|
||||
0x00000200 /**< Locked transfers */
|
||||
#define AES_DMAC_MST_RUNPARAMS_AHB_MST1_BIGEND \
|
||||
0x00000100 /**< Big endian AHB master */
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name AES_DMAC_PERSR register bit fields
|
||||
* @{
|
||||
*/
|
||||
#define AES_DMAC_PERSR_PORT1_AHB_ERROR \
|
||||
0x00001000 /**< AHB bus error */
|
||||
#define AES_DMAC_PERSR_PORT1_CHANNEL \
|
||||
0x00000200 /**< Last serviced channel (0 or 1) */
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name AES_DMAC_OPTIONS register bit fields
|
||||
* @{
|
||||
*/
|
||||
#define AES_DMAC_OPTIONS_NR_OF_CHANNELS_M \
|
||||
0x00000F00 /**< Number of channels implemented mask */
|
||||
#define AES_DMAC_OPTIONS_NR_OF_CHANNELS_S \
|
||||
8 /**< Number of channels implemented shift */
|
||||
#define AES_DMAC_OPTIONS_NR_OF_PORTS_M \
|
||||
0x00000007 /**< Number of ports implemented mask */
|
||||
#define AES_DMAC_OPTIONS_NR_OF_PORTS_S 0 /**< Number of ports implemented shift */
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name AES_DMAC_VERSION register bit fields
|
||||
* @{
|
||||
*/
|
||||
#define AES_DMAC_VERSION_HW_MAJOR_VERSION_M \
|
||||
0x0F000000 /**< Major version number mask */
|
||||
#define AES_DMAC_VERSION_HW_MAJOR_VERSION_S \
|
||||
24 /**< Major version number shift */
|
||||
#define AES_DMAC_VERSION_HW_MINOR_VERSION_M \
|
||||
0x00F00000 /**< Minor version number mask */
|
||||
#define AES_DMAC_VERSION_HW_MINOR_VERSION_S \
|
||||
20 /**< Minor version number shift */
|
||||
#define AES_DMAC_VERSION_HW_PATCH_LEVEL_M \
|
||||
0x000F0000 /**< Patch level mask */
|
||||
#define AES_DMAC_VERSION_HW_PATCH_LEVEL_S \
|
||||
16 /**< Patch level shift */
|
||||
#define AES_DMAC_VERSION_EIP_NUMBER_COMPL_M \
|
||||
0x0000FF00 /**< EIP_NUMBER 1's complement mask */
|
||||
#define AES_DMAC_VERSION_EIP_NUMBER_COMPL_S \
|
||||
8 /**< EIP_NUMBER 1's complement shift */
|
||||
#define AES_DMAC_VERSION_EIP_NUMBER_M \
|
||||
0x000000FF /**< DMAC EIP-number mask */
|
||||
#define AES_DMAC_VERSION_EIP_NUMBER_S 0 /**< DMAC EIP-number shift */
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name AES_KEY_STORE_SIZE register bit fields
|
||||
* @{
|
||||
*/
|
||||
#define AES_KEY_STORE_SIZE_KEY_SIZE_128 1 /**< Key size: 128 bits */
|
||||
#define AES_KEY_STORE_SIZE_KEY_SIZE_192 2 /**< Key size: 192 bits */
|
||||
#define AES_KEY_STORE_SIZE_KEY_SIZE_256 3 /**< Key size: 256 bits */
|
||||
#define AES_KEY_STORE_SIZE_KEY_SIZE_M \
|
||||
0x00000003 /**< Key size mask */
|
||||
#define AES_KEY_STORE_SIZE_KEY_SIZE_S 0 /**< Key size shift */
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name AES_KEY_STORE_READ_AREA register bit fields
|
||||
* @{
|
||||
*/
|
||||
#define AES_KEY_STORE_READ_AREA_BUSY \
|
||||
0x80000000 /**< Key store operation busy */
|
||||
#define AES_KEY_STORE_READ_AREA_RAM_AREA_M \
|
||||
0x0000000F /**< Key store RAM area select mask */
|
||||
#define AES_KEY_STORE_READ_AREA_RAM_AREA_S \
|
||||
0 /**< Key store RAM area select shift */
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name AES_AES_CTRL register bit fields
|
||||
* @{
|
||||
*/
|
||||
#define AES_AES_CTRL_CONTEXT_READY \
|
||||
0x80000000 /**< Context data registers can be overwritten */
|
||||
#define AES_AES_CTRL_SAVED_CONTEXT_READY \
|
||||
0x40000000 /**< AES auth. TAG and/or IV block(s) available */
|
||||
#define AES_AES_CTRL_SAVE_CONTEXT \
|
||||
0x20000000 /**< Auth. TAG or result IV needs to be stored */
|
||||
#define AES_AES_CTRL_CCM_M_M 0x01C00000 /**< CCM auth. field length mask */
|
||||
#define AES_AES_CTRL_CCM_M_S 22 /**< CCM auth. field length shift */
|
||||
#define AES_AES_CTRL_CCM_L_M 0x00380000 /**< CCM length field width mask */
|
||||
#define AES_AES_CTRL_CCM_L_S 19 /**< CCM length field width shift */
|
||||
#define AES_AES_CTRL_CCM 0x00040000 /**< AES-CCM mode */
|
||||
#define AES_AES_CTRL_GCM 0x00030000 /**< AES-GCM mode */
|
||||
#define AES_AES_CTRL_CBC_MAC 0x00008000 /**< AES-CBC MAC mode */
|
||||
#define AES_AES_CTRL_CTR_WIDTH_32 (0 << 7) /**< CTR counter width: 32 bits */
|
||||
#define AES_AES_CTRL_CTR_WIDTH_64 (1 << 7) /**< CTR counter width: 64 bits */
|
||||
#define AES_AES_CTRL_CTR_WIDTH_96 (2 << 7) /**< CTR counter width: 96 bits */
|
||||
#define AES_AES_CTRL_CTR_WIDTH_128 \
|
||||
(3 << 7) /**< CTR counter width: 128 bits */
|
||||
#define AES_AES_CTRL_CTR_WIDTH_M \
|
||||
0x00000180 /**< CTR counter width mask */
|
||||
#define AES_AES_CTRL_CTR_WIDTH_S 7 /**< CTR counter width shift */
|
||||
#define AES_AES_CTRL_CTR 0x00000040 /**< AES-CTR mode */
|
||||
#define AES_AES_CTRL_CBC 0x00000020 /**< AES-CBC mode */
|
||||
#define AES_AES_CTRL_KEY_SIZE_128 (1 << 3) /**< Key size: 128 bits */
|
||||
#define AES_AES_CTRL_KEY_SIZE_192 (2 << 3) /**< Key size: 192 bits */
|
||||
#define AES_AES_CTRL_KEY_SIZE_256 (3 << 3) /**< Key size: 256 bits */
|
||||
#define AES_AES_CTRL_KEY_SIZE_M 0x00000018 /**< Key size mask */
|
||||
#define AES_AES_CTRL_KEY_SIZE_S 3 /**< Key size shift */
|
||||
#define AES_AES_CTRL_DIRECTION_ENCRYPT \
|
||||
0x00000004 /**< Encrypt */
|
||||
#define AES_AES_CTRL_INPUT_READY \
|
||||
0x00000002 /**< AES input buffer empty */
|
||||
#define AES_AES_CTRL_OUTPUT_READY \
|
||||
0x00000001 /**< AES output block available */
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name AES_AES_C_LENGTH_1 register bit fields
|
||||
* @{
|
||||
*/
|
||||
#define AES_AES_C_LENGTH_1_C_LENGTH_M \
|
||||
0x1FFFFFFF /**< Crypto length bits [60:32] mask */
|
||||
#define AES_AES_C_LENGTH_1_C_LENGTH_S 0 /**< Crypto length bits [60:32] shift */
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name AES_HASH_IO_BUF_CTRL register bit fields
|
||||
* @{
|
||||
*/
|
||||
#define AES_HASH_IO_BUF_CTRL_PAD_DMA_MESSAGE \
|
||||
0x00000080 /**< Hash engine message padding required */
|
||||
#define AES_HASH_IO_BUF_CTRL_GET_DIGEST \
|
||||
0x00000040 /**< Hash engine digest requested */
|
||||
#define AES_HASH_IO_BUF_CTRL_PAD_MESSAGE \
|
||||
0x00000020 /**< Last message data in HASH_DATA_IN, apply hash padding */
|
||||
#define AES_HASH_IO_BUF_CTRL_RFD_IN \
|
||||
0x00000004 /**< Hash engine input buffer can accept new data */
|
||||
#define AES_HASH_IO_BUF_CTRL_DATA_IN_AV \
|
||||
0x00000002 /**< Start processing HASH_DATA_IN data */
|
||||
#define AES_HASH_IO_BUF_CTRL_OUTPUT_FULL \
|
||||
0x00000001 /**< Output buffer registers available */
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name AES_HASH_MODE_IN register bit fields
|
||||
* @{
|
||||
*/
|
||||
#define AES_HASH_MODE_IN_SHA256_MODE \
|
||||
0x00000008 /**< Hash mode */
|
||||
#define AES_HASH_MODE_IN_NEW_HASH \
|
||||
0x00000001 /**< New hash session */
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name AES_CTRL_ALG_SEL register bit fields
|
||||
* @{
|
||||
*/
|
||||
#define AES_CTRL_ALG_SEL_TAG 0x80000000 /**< DMA operation includes TAG */
|
||||
#define AES_CTRL_ALG_SEL_HASH 0x00000004 /**< Select hash engine as DMA destination */
|
||||
#define AES_CTRL_ALG_SEL_AES 0x00000002 /**< Select AES engine as DMA source/destination */
|
||||
#define AES_CTRL_ALG_SEL_KEYSTORE \
|
||||
0x00000001 /**< Select Key Store as DMA destination */
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name AES_CTRL_PROT_EN register bit fields
|
||||
* @{
|
||||
*/
|
||||
#define AES_CTRL_PROT_EN_PROT_EN \
|
||||
0x00000001 /**< m_h_prot[1] asserted for DMA reads towards key store */
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name AES_CTRL_SW_RESET register bit fields
|
||||
* @{
|
||||
*/
|
||||
#define AES_CTRL_SW_RESET_SW_RESET \
|
||||
0x00000001 /**< Reset master control and key store */
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name AES_CTRL_INT_CFG register bit fields
|
||||
* @{
|
||||
*/
|
||||
#define AES_CTRL_INT_CFG_LEVEL 0x00000001 /**< Level interrupt type */
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name AES_CTRL_INT_EN register bit fields
|
||||
* @{
|
||||
*/
|
||||
#define AES_CTRL_INT_EN_DMA_IN_DONE \
|
||||
0x00000002 /**< DMA input done interrupt enabled */
|
||||
#define AES_CTRL_INT_EN_RESULT_AV \
|
||||
0x00000001 /**< Result available interrupt enabled */
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name AES_CTRL_INT_CLR register bit fields
|
||||
* @{
|
||||
*/
|
||||
#define AES_CTRL_INT_CLR_DMA_BUS_ERR \
|
||||
0x80000000 /**< Clear DMA bus error status */
|
||||
#define AES_CTRL_INT_CLR_KEY_ST_WR_ERR \
|
||||
0x40000000 /**< Clear key store write error status */
|
||||
#define AES_CTRL_INT_CLR_KEY_ST_RD_ERR \
|
||||
0x20000000 /**< Clear key store read error status */
|
||||
#define AES_CTRL_INT_CLR_DMA_IN_DONE \
|
||||
0x00000002 /**< Clear DMA in done interrupt */
|
||||
#define AES_CTRL_INT_CLR_RESULT_AV \
|
||||
0x00000001 /**< Clear result available interrupt */
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name AES_CTRL_INT_SET register bit fields
|
||||
* @{
|
||||
*/
|
||||
#define AES_CTRL_INT_SET_DMA_IN_DONE \
|
||||
0x00000002 /**< Set DMA data in done interrupt */
|
||||
#define AES_CTRL_INT_SET_RESULT_AV \
|
||||
0x00000001 /**< Set result available interrupt */
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name AES_CTRL_INT_STAT register bit fields
|
||||
* @{
|
||||
*/
|
||||
#define AES_CTRL_INT_STAT_DMA_BUS_ERR \
|
||||
0x80000000 /**< DMA bus error detected */
|
||||
#define AES_CTRL_INT_STAT_KEY_ST_WR_ERR \
|
||||
0x40000000 /**< Write error detected */
|
||||
#define AES_CTRL_INT_STAT_KEY_ST_RD_ERR \
|
||||
0x20000000 /**< Read error detected */
|
||||
#define AES_CTRL_INT_STAT_DMA_IN_DONE \
|
||||
0x00000002 /**< DMA data in done interrupt status */
|
||||
#define AES_CTRL_INT_STAT_RESULT_AV \
|
||||
0x00000001 /**< Result available interrupt status */
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name AES_CTRL_OPTIONS register bit fields
|
||||
* @{
|
||||
*/
|
||||
#define AES_CTRL_OPTIONS_TYPE_M 0xFF000000 /**< Device type mask */
|
||||
#define AES_CTRL_OPTIONS_TYPE_S 24 /**< Device type shift */
|
||||
#define AES_CTRL_OPTIONS_AHBINTERFACE \
|
||||
0x00010000 /**< AHB interface available */
|
||||
#define AES_CTRL_OPTIONS_SHA_256 \
|
||||
0x00000100 /**< The HASH core supports SHA-256 */
|
||||
#define AES_CTRL_OPTIONS_AES_CCM \
|
||||
0x00000080 /**< AES-CCM available as single operation */
|
||||
#define AES_CTRL_OPTIONS_AES_GCM \
|
||||
0x00000040 /**< AES-GCM available as single operation */
|
||||
#define AES_CTRL_OPTIONS_AES_256 \
|
||||
0x00000020 /**< AES core supports 256-bit keys */
|
||||
#define AES_CTRL_OPTIONS_AES_128 \
|
||||
0x00000010 /**< AES core supports 128-bit keys */
|
||||
#define AES_CTRL_OPTIONS_HASH 0x00000004 /**< HASH Core available */
|
||||
#define AES_CTRL_OPTIONS_AES 0x00000002 /**< AES core available */
|
||||
#define AES_CTRL_OPTIONS_KEYSTORE \
|
||||
0x00000001 /**< KEY STORE available */
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name AES_CTRL_VERSION register bit fields
|
||||
* @{
|
||||
*/
|
||||
#define AES_CTRL_VERSION_MAJOR_VERSION_M \
|
||||
0x0F000000 /**< Major version number mask */
|
||||
#define AES_CTRL_VERSION_MAJOR_VERSION_S \
|
||||
24 /**< Major version number shift */
|
||||
#define AES_CTRL_VERSION_MINOR_VERSION_M \
|
||||
0x00F00000 /**< Minor version number mask */
|
||||
#define AES_CTRL_VERSION_MINOR_VERSION_S \
|
||||
20 /**< Minor version number shift */
|
||||
#define AES_CTRL_VERSION_PATCH_LEVEL_M \
|
||||
0x000F0000 /**< Patch level mask */
|
||||
#define AES_CTRL_VERSION_PATCH_LEVEL_S 16 /**< Patch level shift */
|
||||
#define AES_CTRL_VERSION_EIP_NUMBER_COMPL_M \
|
||||
0x0000FF00 /**< EIP_NUMBER 1's complement mask */
|
||||
#define AES_CTRL_VERSION_EIP_NUMBER_COMPL_S \
|
||||
8 /**< EIP_NUMBER 1's complement shift */
|
||||
#define AES_CTRL_VERSION_EIP_NUMBER_M \
|
||||
0x000000FF /**< EIP-120t EIP-number mask */
|
||||
#define AES_CTRL_VERSION_EIP_NUMBER_S 0 /**< EIP-120t EIP-number shift */
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name AES drivers return codes
|
||||
* @{
|
||||
*/
|
||||
#define AES_KEYSTORE_READ_ERROR 5
|
||||
#define AES_KEYSTORE_WRITE_ERROR 6
|
||||
#define AES_AUTHENTICATION_FAILED 7
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name AES constants
|
||||
* @{
|
||||
*/
|
||||
#define AES_KEY_AREAS 8
|
||||
#define AES_BLOCK_LEN (128 / 8)
|
||||
#define AES_IV_LEN AES_BLOCK_LEN
|
||||
#define AES_TAG_LEN AES_BLOCK_LEN
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name AES functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** \brief Writes keys into the Key RAM
|
||||
* \param keys Pointer to AES Keys
|
||||
* \param key_size Key size: \c AES_KEY_STORE_SIZE_KEY_SIZE_x
|
||||
* \param count Number of keys (1 to \c AES_KEY_AREAS - \p start_area for
|
||||
* 128-bit keys, 1 to (\c AES_KEY_AREAS - \p start_area) / 2 for 192- and
|
||||
* 256-bit keys)
|
||||
* \param start_area Start area in Key RAM where to store the keys (0 to
|
||||
* \c AES_KEY_AREAS - 1, must be even for 192- and 256-bit keys)
|
||||
* \return \c CRYPTO_SUCCESS if successful, or CRYPTO/AES error code
|
||||
* \note Calling this function with a value of \p key_size different from the
|
||||
* one passed for the previous calls causes the deletion of all previously
|
||||
* stored keys.
|
||||
*/
|
||||
uint8_t aes_load_keys(const void *keys, uint8_t key_size, uint8_t count,
|
||||
uint8_t start_area);
|
||||
|
||||
/** \brief Starts an AES authentication/crypto operation
|
||||
* \param ctrl Contents of the \c AES_AES_CTRL register
|
||||
* \param key_area Area in Key RAM where the key is stored (0 to
|
||||
* \c AES_KEY_AREAS - 1)
|
||||
* \param iv Pointer to 128-bit initialization vector, or \c NULL
|
||||
* \param adata Pointer to additional authenticated data in SRAM, or \c NULL
|
||||
* \param adata_len Length of additional authenticated data in octets, or \c 0
|
||||
* \param data_in Pointer to input payload data in SRAM, or \c NULL
|
||||
* \param data_out Pointer to output payload data in SRAM (may be \p data_in),
|
||||
* or \c NULL
|
||||
* \param data_len Length of payload data in octets, or \c 0
|
||||
* \param process Process to be polled upon completion of the operation, or
|
||||
* \c NULL
|
||||
* \return \c CRYPTO_SUCCESS if successful, or CRYPTO/AES error code
|
||||
* \note This function is only supposed to be called by the AES drivers.
|
||||
*/
|
||||
uint8_t aes_auth_crypt_start(uint32_t ctrl, uint8_t key_area, const void *iv,
|
||||
const void *adata, uint16_t adata_len,
|
||||
const void *data_in, void *data_out,
|
||||
uint16_t data_len, struct process *process);
|
||||
|
||||
/** \brief Checks the status of the AES authentication/crypto operation
|
||||
* \retval false Result not yet available, and no error occurred
|
||||
* \retval true Result available, or error occurred
|
||||
* \note This function is only supposed to be called by the AES drivers.
|
||||
*/
|
||||
uint8_t aes_auth_crypt_check_status(void);
|
||||
|
||||
/** \brief Gets the result of the AES authentication/crypto operation
|
||||
* \param iv Pointer to 128-bit result initialization vector, or \c NULL
|
||||
* \param tag Pointer to 128-bit result tag, or \c NULL
|
||||
* \return \c CRYPTO_SUCCESS if successful, or CRYPTO/AES error code
|
||||
* \note This function must be called only after \c aes_auth_crypt_start().
|
||||
* \note This function is only supposed to be called by the AES drivers.
|
||||
*/
|
||||
uint8_t aes_auth_crypt_get_result(void *iv, void *tag);
|
||||
|
||||
/** @} */
|
||||
|
||||
#endif /* AES_H_ */
|
||||
|
||||
/**
|
||||
* @}
|
||||
* @}
|
||||
*/
|
|
@ -1,60 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2012, Texas Instruments Incorporated - http://www.ti.com/
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
/**
|
||||
* \addtogroup cc2538-rfcore
|
||||
* @{
|
||||
*
|
||||
* \file
|
||||
* Header with declarations of ANA_REGS module registers.
|
||||
*/
|
||||
#ifndef ANA_REGS_H
|
||||
#define ANA_REGS_H
|
||||
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \name ANA_REGS register offsets
|
||||
* @{
|
||||
*/
|
||||
#define ANA_REGS_IVCTRL 0x400D6004
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \name ANA_REGS_IVCTRL register bit masks
|
||||
* @{
|
||||
*/
|
||||
#define ANA_REGS_IVCTRL_DAC_CURR_CTRL 0x00000030 /**< Controls bias current to DAC */
|
||||
#define ANA_REGS_IVCTRL_LODIV_BIAS_CTRL 0x00000008 /**< Controls bias current to LODIV */
|
||||
#define ANA_REGS_IVCTRL_TXMIX_DC_CTRL 0x00000004 /**< Controls DC bias in TXMIX */
|
||||
#define ANA_REGS_IVCTRL_PA_BIAS_CTRL 0x00000003 /**< Controls bias current to PA */
|
||||
/** @} */
|
||||
|
||||
#endif /* ANA_REGS_H */
|
||||
/** @} */
|
File diff suppressed because it is too large
Load Diff
|
@ -1,462 +0,0 @@
|
|||
/*
|
||||
* Original file:
|
||||
* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
|
||||
* All rights reserved.
|
||||
*
|
||||
* Port to Contiki:
|
||||
* Authors: Andreas Dröscher <contiki@anticat.ch>
|
||||
* Hu Luo
|
||||
* Hossein Shafagh <shafagh@inf.ethz.ch>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
/**
|
||||
* \addtogroup cc2538-pka
|
||||
* @{
|
||||
*
|
||||
* \defgroup cc2538-bignum cc2538 BigNum math function driver
|
||||
*
|
||||
* Driver for the cc2538 BigNum math functions of the PKC engine
|
||||
* @{
|
||||
*
|
||||
* \file
|
||||
* Header file for the cc2538 BigNum driver
|
||||
*
|
||||
* bignum_subtract_start bignum_subtract_get_result (subtraction)
|
||||
* bignum_add_start bignum_add_get_result (addition)
|
||||
* bignum_mod_start bignum_mod_get_result (modulo)
|
||||
* bignum_exp_mod_start bignum_exp_mod_get_result (modular exponentiation operation)
|
||||
* bignum_inv_mod_start bignum_inv_mod_get_result (inverse modulo operation)
|
||||
* bignum_mul_start bignum_mul_get_result (multiplication)
|
||||
* bignum_divide_start bignum_divide_get_result (division)
|
||||
* bignum_cmp_start bignum_cmp_get_result (comparison)
|
||||
*/
|
||||
#ifndef BIGNUM_DRIVER_H_
|
||||
#define BIGNUM_DRIVER_H_
|
||||
|
||||
#include "contiki.h"
|
||||
#include "dev/pka.h"
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \brief Starts the big number modulus operation.
|
||||
*
|
||||
* \param number Pointer to the big number on which modulo operation
|
||||
* needs to be carried out.
|
||||
* \param number_size Size of the big number \sa number in 32-bit word.
|
||||
* \param modulus Pointer to the divisor.
|
||||
* \param modulus_size Size of the divisor \sa modulus.
|
||||
* \param result_vector Pointer to the result vector location
|
||||
* which will be set by this function.
|
||||
* \param process Process to be polled upon completion of the
|
||||
* operation, or \c NULL
|
||||
*
|
||||
* This function starts the modulo operation on the big num \sa number
|
||||
* using the divisor \sa modulus. The PKA RAM location where the result
|
||||
* will be available is stored in \sa result_vector.
|
||||
*
|
||||
* \retval PKA_STATUS_SUCCESS if successful in starting the operation.
|
||||
* \retval PKA_STATUS_OPERATION_INPRG if the PKA hw module is busy doing
|
||||
* some other operation.
|
||||
*/
|
||||
uint8_t bignum_mod_start(const uint32_t *number,
|
||||
const uint8_t number_size,
|
||||
const uint32_t *modulus,
|
||||
const uint8_t modulus_size,
|
||||
uint32_t *result_vector,
|
||||
struct process *process);
|
||||
|
||||
/** \brief Gets the result of the big number modulus operation.
|
||||
*
|
||||
* \param buffer Pointer to buffer where the result needs to
|
||||
* be stored.
|
||||
* \param buffer_size Size of the provided buffer in 32 bit size word.
|
||||
* \param result_vector Address of the result location which
|
||||
* was provided by the start function \sa PKABigNumModStart().
|
||||
*
|
||||
* This function gets the result of the big number modulus operation which was
|
||||
* previously started using the function \sa PKABigNumModStart().
|
||||
*
|
||||
* \retval PKA_STATUS_SUCCESS if successful.
|
||||
* \retval PKA_STATUS_OPERATION_INPRG if the PKA hw module is busy doing
|
||||
* the operation.
|
||||
* \retval PKA_STATUS_RESULT_0 if the result is all zeroes.
|
||||
* \retval PKA_STATUS_BUF_UNDERFLOW if the \e size is less than the length
|
||||
* of the result.
|
||||
*/
|
||||
uint8_t bignum_mod_get_result(uint32_t *buffer,
|
||||
const uint8_t buffer_size,
|
||||
const uint32_t result_vector);
|
||||
|
||||
/** \brief Starts the comparison of two big numbers.
|
||||
*
|
||||
* \param number1 Pointer to the first big number.
|
||||
* \param number2 Pointer to the second big number.
|
||||
* \param size Size of the big number in 32 bit size word.
|
||||
* \param process Process to be polled upon completion of the
|
||||
* operation, or \c NULL
|
||||
*
|
||||
* This function starts the comparison of two big numbers pointed by
|
||||
* \e number1 and \e number2.
|
||||
* Note this function expects the size of the two big numbers equal.
|
||||
*
|
||||
* \retval PKA_STATUS_SUCCESS if successful in starting the operation.
|
||||
* \retval PKA_STATUS_OPERATION_INPRG if the PKA hw module is busy doing
|
||||
* some other operation.
|
||||
*/
|
||||
uint8_t bignum_cmp_start(const uint32_t *number1,
|
||||
const uint32_t *number2,
|
||||
uint8_t size,
|
||||
struct process *process);
|
||||
|
||||
/** \brief Gets the result of the comparison operation of two big numbers.
|
||||
*
|
||||
* This function provides the results of the comparison of two big numbers
|
||||
* which was started using the \sa PKABigNumCmpStart().
|
||||
*
|
||||
* \retval PKA_STATUS_OPERATION_INPRG if the operation is in progress.
|
||||
* \retval PKA_STATUS_SUCCESS if the two big numbers are equal.
|
||||
* \retval PKA_STATUS_A_GR_B if the first number is greater than the second.
|
||||
* \retval PKA_STATUS_A_LT_B if the first number is less than the second.
|
||||
*/
|
||||
uint8_t bignum_cmp_get_result(void);
|
||||
|
||||
/** \brief Starts the big number inverse modulo operation.
|
||||
*
|
||||
* \param number Pointer to the buffer containing the big number
|
||||
* (dividend).
|
||||
* \param number_size Size of the \e number in 32 bit word.
|
||||
* \param modulus Pointer to the buffer containing the modulus.
|
||||
* \param modulus_size Size of the modulus in 32 bit word.
|
||||
* \param result_vector Pointer to the result vector location
|
||||
* which will be set by this function.
|
||||
* \param process Process to be polled upon completion of the
|
||||
* operation, or \c NULL
|
||||
*
|
||||
* This function starts the the inverse modulo operation on \e number
|
||||
* using the divisor \e modulus.
|
||||
*
|
||||
* \retval PKA_STATUS_SUCCESS if successful in starting the operation.
|
||||
* \retval PKA_STATUS_OPERATION_INPRG if the PKA hw module is busy doing
|
||||
* some other operation.
|
||||
*/
|
||||
uint8_t bignum_inv_mod_start(const uint32_t *number,
|
||||
const uint8_t number_size,
|
||||
const uint32_t *modulus,
|
||||
const uint8_t modulus_size,
|
||||
uint32_t *result_vector,
|
||||
struct process *process);
|
||||
|
||||
/** \brief Gets the result of the big number inverse modulo operation.
|
||||
*
|
||||
* \param buffer Pointer to buffer where the result needs to be
|
||||
* stored.
|
||||
* \param buffer_size Size of the provided buffer in 32 bit size
|
||||
* word.
|
||||
* \param result_vector Address of the result location which
|
||||
* was provided by the start function \sa PKABigNumInvModStart().
|
||||
*
|
||||
* This function gets the result of the big number inverse modulo operation
|
||||
* previously started using the function \sa PKABigNumInvModStart().
|
||||
*
|
||||
* \retval PKA_STATUS_SUCCESS if the operation is successful.
|
||||
* \retval PKA_STATUS_OPERATION_INPRG if the PKA hw module is busy performing
|
||||
* the operation.
|
||||
* \retval PKA_STATUS_RESULT_0 if the result is all zeroes.
|
||||
* \retval PKA_STATUS_BUF_UNDERFLOW if the length of the provided buffer is less
|
||||
* then the result.
|
||||
*/
|
||||
uint8_t bignum_inv_mod_get_result(uint32_t *buffer,
|
||||
const uint8_t buffer_size,
|
||||
const uint32_t result_vector);
|
||||
|
||||
/** \brief Starts the big number multiplication.
|
||||
*
|
||||
* \param multiplicand Pointer to the buffer containing the big
|
||||
* number multiplicand.
|
||||
* \param multiplicand_size Size of the multiplicand in 32-bit word.
|
||||
* \param multiplier Pointer to the buffer containing the big
|
||||
* number multiplier.
|
||||
* \param multiplier_size Size of the multiplier in 32-bit word.
|
||||
* \param result_vector Pointer to the result vector location
|
||||
* which will be set by this function.
|
||||
* \param process Process to be polled upon completion of the
|
||||
* operation, or \c NULL
|
||||
*
|
||||
* This function starts the multiplication of the two big numbers.
|
||||
*
|
||||
* \retval PKA_STATUS_SUCCESS if successful in starting the operation.
|
||||
* \retval PKA_STATUS_OPERATION_INPRG if the PKA hw module is busy doing
|
||||
* some other operation.
|
||||
*/
|
||||
uint8_t bignum_mul_start(const uint32_t *multiplicand,
|
||||
const uint8_t multiplicand_size,
|
||||
const uint32_t *multiplier,
|
||||
const uint8_t multiplier_size,
|
||||
uint32_t *result_vector,
|
||||
struct process *process);
|
||||
|
||||
/** \brief Gets the results of the big number multiplication.
|
||||
*
|
||||
* \param buffer Pointer to buffer where the result needs to be stored.
|
||||
* \param buffer_size Address of the variable containing the length of the
|
||||
* buffer. After the operation, the actual length of the resultant is
|
||||
* stored at this address.
|
||||
* \param result_vector Address of the result location which
|
||||
* was provided by the start function \sa PKABigNumMultiplyStart().
|
||||
*
|
||||
* This function gets the result of the multiplication of two big numbers
|
||||
* operation previously started using the function \sa
|
||||
* PKABigNumMultiplyStart().
|
||||
*
|
||||
* \retval PKA_STATUS_SUCCESS if the operation is successful.
|
||||
* \retval PKA_STATUS_OPERATION_INPRG if the PKA hw module is busy performing
|
||||
* the operation.
|
||||
* \retval PKA_STATUS_RESULT_0 if the result is all zeroes.
|
||||
* \retval PKA_STATUS_FAILURE if the operation is not successful.
|
||||
* \retval PKA_STATUS_BUF_UNDERFLOW if the length of the provided buffer is less
|
||||
* then the length of the result.
|
||||
*/
|
||||
uint8_t bignum_mul_get_result(uint32_t *buffer,
|
||||
uint32_t *buffer_size,
|
||||
const uint32_t result_vector);
|
||||
|
||||
/** \brief Starts the addition of two big number.
|
||||
*
|
||||
* \param number1 Pointer to the buffer containing the first big mumber.
|
||||
* \param number1_size Size of the first big number in 32-bit word.
|
||||
* \param number2 Pointer to the buffer containing the second big number.
|
||||
* \param number2_size Size of the second big number in 32-bit word.
|
||||
* \param result_vector Pointer to the result vector location
|
||||
* which will be set by this function.
|
||||
* \param process Process to be polled upon completion of the
|
||||
* operation, or \c NULL
|
||||
*
|
||||
* This function starts the addition of the two big numbers.
|
||||
*
|
||||
* \retval PKA_STATUS_SUCCESS if successful in starting the operation.
|
||||
* \retval PKA_STATUS_OPERATION_INPRG if the PKA hw module is busy doing
|
||||
* some other operation.
|
||||
*/
|
||||
uint8_t bignum_add_start(const uint32_t *number1,
|
||||
const uint8_t number1_size,
|
||||
const uint32_t *number2,
|
||||
const uint8_t number2_size,
|
||||
uint32_t *result_vector,
|
||||
struct process *process);
|
||||
|
||||
/** \brief Gets the result of the addition operation on two big number.
|
||||
*
|
||||
* \param buffer Pointer to buffer where the result
|
||||
* needs to be stored.
|
||||
* \param buffer_size Address of the variable containing the length of
|
||||
* the buffer. After the operation the actual length of the
|
||||
* resultant is stored at this address.
|
||||
* \param result_vector Address of the result location which
|
||||
* was provided by the start function \sa PKABigNumAddStart().
|
||||
*
|
||||
* This function gets the result of the addition operation on two big numbers,
|
||||
* previously started using the function \sa PKABigNumAddStart().
|
||||
*
|
||||
* \retval PKA_STATUS_SUCCESS if the operation is successful.
|
||||
* \retval PKA_STATUS_OPERATION_INPRG if the PKA hw module is busy performing
|
||||
* the operation.
|
||||
* \retval PKA_STATUS_RESULT_0 if the result is all zeroes.
|
||||
* \retval PKA_STATUS_FAILURE if the operation is not successful.
|
||||
* \retval PKA_STATUS_BUF_UNDERFLOW if the length of the provided buffer is less
|
||||
* then the length of the result.
|
||||
*/
|
||||
uint8_t bignum_add_get_result(uint32_t *buffer,
|
||||
uint32_t *buffer_size,
|
||||
const uint32_t result_vector);
|
||||
|
||||
/** \brief Starts the substract of two big number.
|
||||
*
|
||||
* \param number1 Pointer to the buffer containing the first big mumber.
|
||||
* \param number1_size Size of the first big number in 32-bit word.
|
||||
* \param number2 Pointer to the buffer containing the second big number.
|
||||
* \param number2_size Size of the second big number in 32-bit word.
|
||||
* \param result_vector Pointer to the result vector location
|
||||
* which will be set by this function.
|
||||
* \param process Process to be polled upon completion of the
|
||||
* operation, or \c NULL
|
||||
*
|
||||
* This function starts the substraction of the two big numbers.
|
||||
*
|
||||
* \retval PKA_STATUS_SUCCESS if successful in starting the operation.
|
||||
* \retval PKA_STATUS_OPERATION_INPRG if the PKA hw module is busy doing
|
||||
* some other operation.
|
||||
*/
|
||||
uint8_t bignum_subtract_start(const uint32_t *number1,
|
||||
const uint8_t number1_size,
|
||||
const uint32_t *number2,
|
||||
const uint8_t number2_size,
|
||||
uint32_t *result_vector,
|
||||
struct process *process);
|
||||
|
||||
/** \brief Gets the result of big number subtract.
|
||||
*
|
||||
* \param buffer Pointer to store the result of subtraction.
|
||||
* \param buffer_size Address of the variable containing the length of the
|
||||
* buffer. After the operation, the actual length of the resultant is
|
||||
* stored at this address.
|
||||
* \param result_vector Address of the result location which
|
||||
* was provided by the start function PKABigNumSubtractStart().
|
||||
*
|
||||
* This function gets the result of PKABigNumSubtractStart().
|
||||
*
|
||||
* \retval PKA_STATUS_SUCCESS if the operation is successful.
|
||||
* \retval PKA_STATUS_OPERATION_INPRG if the PKA hw module is busy performing
|
||||
* the operation.
|
||||
* \retval PKA_STATUS_RESULT_0 if the result is all zeroes.
|
||||
* \retval PKA_STATUS_FAILURE if the operation is not successful.
|
||||
*/
|
||||
uint8_t bignum_subtract_get_result(uint32_t *buffer,
|
||||
uint32_t *buffer_size,
|
||||
const uint32_t result_vector);
|
||||
|
||||
/** \brief Starts the big number moduluar Exponentiation operation.
|
||||
*
|
||||
* \param number Pointer to the Exponent on which moduluar Exponentiation operation
|
||||
* needs to be carried out.
|
||||
* \param number_size Size of the the Exponent number number in 32-bit word.
|
||||
* \param modulus Pointer to the divisor.
|
||||
* \param modulus_size Size of the divisor modulus.
|
||||
* \param base Pointer to the Base.
|
||||
* \param base_size Size of the divisor base.
|
||||
* \param result_vector Pointer to the result vector location
|
||||
* which will be set by this function.
|
||||
* \param process Process to be polled upon completion of the
|
||||
* operation, or \c NULL
|
||||
*
|
||||
* This function starts the moduluar Exponentiation operation on the base num base
|
||||
* using the Exponent number and the Modulus num modulus. The PKA RAM location where the result
|
||||
* will be available is stored in \sa result_vector.
|
||||
* IMPORTANT = Modulus and Based should have buffers of the same length!
|
||||
*
|
||||
* \retval PKA_STATUS_SUCCESS if successful in starting the operation.
|
||||
* \retval PKA_STATUS_OPERATION_INPRG if the PKA hw module is busy doing
|
||||
* some other operation.
|
||||
*/
|
||||
uint8_t bignum_exp_mod_start(const uint32_t *number,
|
||||
const uint8_t number_size,
|
||||
const uint32_t *modulus,
|
||||
const uint8_t modulus_size,
|
||||
const uint32_t *base,
|
||||
const uint8_t base_size,
|
||||
uint32_t *result_vector,
|
||||
struct process *process);
|
||||
|
||||
/** \brief Gets the result of the big number modulus operation result.
|
||||
*
|
||||
* \param buffer Pointer to buffer where the result needs to
|
||||
* be stored.
|
||||
* \param buffer_size Size of the provided buffer in 32 bit size word.
|
||||
* \param result_vector Address of the result location which
|
||||
* was provided by the start function \sa PKABigNumExpModStart().
|
||||
*
|
||||
* This function gets the result of the big number modulus operation which was
|
||||
* previously started using the function \sa PKABigNumExpModStart().
|
||||
*
|
||||
* \retval PKA_STATUS_SUCCESS if successful.
|
||||
* \retval PKA_STATUS_OPERATION_INPRG if the PKA hw module is busy doing
|
||||
* the operation.
|
||||
* \retval PKA_STATUS_RESULT_0 if the result is all zeroes.
|
||||
* \retval PKA_STATUS_BUF_UNDERFLOW if the \e size is less than the length
|
||||
* of the result.
|
||||
*
|
||||
* \note
|
||||
* - 0 < number_size <= Max_Len
|
||||
* - 1 < modulus_size <=Max_Len
|
||||
* - modulus must be odd and modulus > 232
|
||||
* - base < modulus
|
||||
*/
|
||||
uint8_t bignum_exp_mod_get_result(uint32_t *buffer,
|
||||
const uint8_t buffer_size,
|
||||
const uint32_t result_vector);
|
||||
|
||||
/** \brief Starts the big number Divide.
|
||||
*
|
||||
* \param dividend Pointer to the buffer containing the big
|
||||
* number dividend.
|
||||
* \param dividend_size Size of the dividend in 32-bit word.
|
||||
* \param divisor Pointer to the buffer containing the big
|
||||
* number divisor.
|
||||
* \param divisor_size Size of the divisor in 32-bit word.
|
||||
* \param result_vector Pointer to the result vector location
|
||||
* which will be set by this function.
|
||||
* \param process Process to be polled upon completion of the
|
||||
* operation, or \c NULL
|
||||
*
|
||||
* This function starts the divide of the two big numbers.
|
||||
*
|
||||
* \retval PKA_STATUS_SUCCESS if successful in starting the operation.
|
||||
* \retval PKA_STATUS_OPERATION_INPRG if the PKA hw module is busy doing
|
||||
* some other operation.
|
||||
*/
|
||||
uint8_t bignum_divide_start(const uint32_t *dividend,
|
||||
const uint8_t dividend_size,
|
||||
const uint32_t *divisor,
|
||||
const uint8_t divisor_size,
|
||||
uint32_t *result_vector,
|
||||
struct process *process);
|
||||
|
||||
/** \brief Gets the results of the big number Divide.
|
||||
*
|
||||
* \param buffer Pointer to buffer where the result needs to be stored.
|
||||
* \param buffer_size Address of the variable containing the length of the
|
||||
* buffer. After the operation, the actual length of the resultant is
|
||||
* stored at this address.
|
||||
* \param result_vector Address of the result location which
|
||||
* was provided by the start function \sa PKABigNumMultiplyStart().
|
||||
*
|
||||
* This function gets the result of the Divide of two big numbers
|
||||
* operation previously started using the function \sa
|
||||
* PKABigNumDivideStart().
|
||||
*
|
||||
* \retval PKA_STATUS_SUCCESS if the operation is successful.
|
||||
* \retval PKA_STATUS_OPERATION_INPRG if the PKA hw module is busy performing
|
||||
* the operation.
|
||||
* \retval PKA_STATUS_RESULT_0 if the result is all zeroes.
|
||||
* \retval PKA_STATUS_FAILURE if the operation is not successful.
|
||||
* \retval PKA_STATUS_BUF_UNDERFLOW if the length of the provided buffer is less
|
||||
* then the length of the result.
|
||||
*/
|
||||
uint8_t bignum_divide_get_result(uint32_t *buffer,
|
||||
uint32_t *buffer_size,
|
||||
const uint32_t result_vector);
|
||||
|
||||
/** @} */
|
||||
|
||||
#endif /* BIGNUM_DRIVER_H_ */
|
||||
|
||||
/**
|
||||
* @}
|
||||
* @}
|
||||
*/
|
|
@ -1,91 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2016, Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
/**
|
||||
* \addtogroup cc2538-cbc-mac
|
||||
* @{
|
||||
*
|
||||
* \file
|
||||
* Implementation of the cc2538 AES-CBC-MAC driver
|
||||
*/
|
||||
#include "contiki.h"
|
||||
#include "dev/rom-util.h"
|
||||
#include "dev/cbc-mac.h"
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
/*---------------------------------------------------------------------------*/
|
||||
uint8_t
|
||||
cbc_mac_auth_start(uint8_t key_area, const void *mdata, uint16_t mdata_len,
|
||||
struct process *process)
|
||||
{
|
||||
uint32_t ctrl;
|
||||
uint32_t iv[AES_IV_LEN / sizeof(uint32_t)];
|
||||
|
||||
/* Program AES-CBC-MAC authentication operation */
|
||||
ctrl = AES_AES_CTRL_SAVE_CONTEXT | /* Save context */
|
||||
AES_AES_CTRL_CBC_MAC | /* CBC-MAC */
|
||||
AES_AES_CTRL_DIRECTION_ENCRYPT; /* Encryption */
|
||||
|
||||
/* Prepare the crypto initialization vector
|
||||
* Set initialization vector to 0 */
|
||||
rom_util_memset(iv, 0, AES_IV_LEN);
|
||||
|
||||
return aes_auth_crypt_start(ctrl, key_area, iv, NULL, 0,
|
||||
mdata, NULL, mdata_len, process);
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
uint8_t
|
||||
cbc_mac_auth_get_result(const void *mac_in, void *mac_out)
|
||||
{
|
||||
uint32_t tag[AES_TAG_LEN / sizeof(uint32_t)];
|
||||
uint8_t ret;
|
||||
|
||||
ret = aes_auth_crypt_get_result(NULL, tag);
|
||||
if(ret != CRYPTO_SUCCESS) {
|
||||
return ret;
|
||||
}
|
||||
|
||||
if(mac_in != NULL) {
|
||||
/* Check MAC */
|
||||
if(rom_util_memcmp(tag, mac_in, CBC_MAC_MAC_LEN)) {
|
||||
ret = AES_AUTHENTICATION_FAILED;
|
||||
}
|
||||
}
|
||||
|
||||
if(mac_out != NULL) {
|
||||
/* Copy tag to MAC */
|
||||
rom_util_memcpy(mac_out, tag, CBC_MAC_MAC_LEN);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/** @} */
|
|
@ -1,98 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2016, Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
/**
|
||||
* \addtogroup cc2538-aes
|
||||
* @{
|
||||
*
|
||||
* \defgroup cc2538-cbc-mac cc2538 AES-CBC-MAC
|
||||
*
|
||||
* Driver for the cc2538 AES-CBC-MAC mode of the security core
|
||||
* @{
|
||||
*
|
||||
* \file
|
||||
* Header file for the cc2538 AES-CBC-MAC driver
|
||||
*/
|
||||
#ifndef CBC_MAC_H_
|
||||
#define CBC_MAC_H_
|
||||
|
||||
#include "contiki.h"
|
||||
#include "dev/aes.h"
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name AES-CBC-MAC constants
|
||||
* @{
|
||||
*/
|
||||
#define CBC_MAC_MAC_LEN AES_TAG_LEN
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name AES-CBC-MAC functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** \brief Starts a CBC-MAC authentication operation
|
||||
* \param key_area Area in Key RAM where the key is stored (0 to
|
||||
* \c AES_KEY_AREAS - 1)
|
||||
* \param mdata Pointer to message to authenticate in SRAM
|
||||
* \param mdata_len Length of message to authenticate in octets
|
||||
* \param process Process to be polled upon completion of the operation, or
|
||||
* \c NULL
|
||||
* \return \c CRYPTO_SUCCESS if successful, or CRYPTO/AES/CBC-MAC error code
|
||||
* \warning CBC-MAC is not secure for variable-length messages. There are a few
|
||||
* workarounds that can be implemented by the caller, like prepending the
|
||||
* message length to the first block of the message before passing it.
|
||||
*/
|
||||
uint8_t cbc_mac_auth_start(uint8_t key_area, const void *mdata,
|
||||
uint16_t mdata_len, struct process *process);
|
||||
|
||||
/** \brief Checks the status of the CBC-MAC authentication operation
|
||||
* \retval false Result not yet available, and no error occurred
|
||||
* \retval true Result available, or error occurred
|
||||
*/
|
||||
#define cbc_mac_auth_check_status aes_auth_crypt_check_status
|
||||
|
||||
/** \brief Gets the result of the CBC-MAC authentication operation
|
||||
* \param mac_in Pointer to 128-bit input MAC, or \c NULL
|
||||
* \param mac_out Pointer to 128-bit output MAC, or \c NULL
|
||||
* \return \c CRYPTO_SUCCESS if successful, or CRYPTO/AES/CBC-MAC error code
|
||||
* \note This function must be called only after \c cbc_mac_auth_start().
|
||||
*/
|
||||
uint8_t cbc_mac_auth_get_result(const void *mac_in, void *mac_out);
|
||||
|
||||
/** @} */
|
||||
|
||||
#endif /* CBC_MAC_H_ */
|
||||
|
||||
/**
|
||||
* @}
|
||||
* @}
|
||||
*/
|
|
@ -1,66 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2015, Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
/**
|
||||
* \addtogroup cc2538-cbc
|
||||
* @{
|
||||
*
|
||||
* \file
|
||||
* Implementation of the cc2538 AES-CBC driver
|
||||
*/
|
||||
#include "contiki.h"
|
||||
#include "dev/cbc.h"
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
/*---------------------------------------------------------------------------*/
|
||||
uint8_t
|
||||
cbc_crypt_start(uint8_t encrypt, uint8_t key_area, const void *iv,
|
||||
const void *mdata_in, void *mdata_out, uint16_t mdata_len,
|
||||
struct process *process)
|
||||
{
|
||||
uint32_t ctrl;
|
||||
|
||||
/* Program AES-CBC crypto operation */
|
||||
ctrl = AES_AES_CTRL_CBC | /* CBC */
|
||||
(encrypt ? AES_AES_CTRL_DIRECTION_ENCRYPT : 0); /* En/decryption */
|
||||
|
||||
return aes_auth_crypt_start(ctrl, key_area, iv, NULL, 0,
|
||||
mdata_in, mdata_out, mdata_len, process);
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
int8_t
|
||||
cbc_crypt_check_status(void)
|
||||
{
|
||||
return aes_auth_crypt_check_status() ? aes_auth_crypt_get_result(NULL, NULL) :
|
||||
CRYPTO_PENDING;
|
||||
}
|
||||
|
||||
/** @} */
|
|
@ -1,92 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2015, Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
/**
|
||||
* \addtogroup cc2538-aes
|
||||
* @{
|
||||
*
|
||||
* \defgroup cc2538-cbc cc2538 AES-CBC
|
||||
*
|
||||
* Driver for the cc2538 AES-CBC mode of the security core
|
||||
* @{
|
||||
*
|
||||
* \file
|
||||
* Header file for the cc2538 AES-CBC driver
|
||||
*/
|
||||
#ifndef CBC_H_
|
||||
#define CBC_H_
|
||||
|
||||
#include "contiki.h"
|
||||
#include "dev/aes.h"
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name AES-CBC constants
|
||||
* @{
|
||||
*/
|
||||
#define CBC_IV_LEN AES_IV_LEN
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** \name AES-CBC functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** \brief Starts a CBC crypto operation
|
||||
* \param encrypt \c true to encrypt, or \c false to decrypt
|
||||
* \param key_area Area in Key RAM where the key is stored (0 to
|
||||
* \c AES_KEY_AREAS - 1)
|
||||
* \param iv Pointer to 128-bit initialization vector
|
||||
* \param mdata_in Pointer to input message in SRAM
|
||||
* \param mdata_out Pointer to output message in SRAM (may be \p mdata_in)
|
||||
* \param mdata_len Length of message in octets
|
||||
* \param process Process to be polled upon completion of the operation, or
|
||||
* \c NULL
|
||||
* \return \c CRYPTO_SUCCESS if successful, or CRYPTO/AES/CBC error code
|
||||
*/
|
||||
uint8_t cbc_crypt_start(uint8_t encrypt, uint8_t key_area, const void *iv,
|
||||
const void *mdata_in, void *mdata_out,
|
||||
uint16_t mdata_len, struct process *process);
|
||||
|
||||
/** \brief Checks the status of the CBC crypto operation
|
||||
* \return \c CRYPTO_PENDING if operation still pending, \c CRYPTO_SUCCESS if
|
||||
* successful, or CRYPTO/AES/CBC error code
|
||||
* \note This function must be called only after \c cbc_crypt_start().
|
||||
*/
|
||||
int8_t cbc_crypt_check_status(void);
|
||||
|
||||
/** @} */
|
||||
|
||||
#endif /* CBC_H_ */
|
||||
|
||||
/**
|
||||
* @}
|
||||
* @}
|
||||
*/
|
|
@ -1,121 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2015, Hasso-Plattner-Institut.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of the Institute nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* This file is part of the Contiki operating system.
|
||||
*/
|
||||
/**
|
||||
* \addtogroup cc2538-aes-128
|
||||
* @{
|
||||
*
|
||||
* \file
|
||||
* Implementation of the AES-128 driver for the CC2538 SoC
|
||||
* \author
|
||||
* Konrad Krentz <konrad.krentz@gmail.com>
|
||||
*/
|
||||
#include "contiki.h"
|
||||
#include "dev/ecb.h"
|
||||
#include "dev/cc2538-aes-128.h"
|
||||
#include "dev/sys-ctrl.h"
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdio.h>
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#define MODULE_NAME "cc2538-aes-128"
|
||||
|
||||
#define DEBUG 0
|
||||
#if DEBUG
|
||||
#define PRINTF(...) printf(__VA_ARGS__)
|
||||
#else
|
||||
#define PRINTF(...)
|
||||
#endif
|
||||
/*---------------------------------------------------------------------------*/
|
||||
static uint8_t
|
||||
enable_crypto(void)
|
||||
{
|
||||
uint8_t enabled = CRYPTO_IS_ENABLED();
|
||||
if(!enabled) {
|
||||
crypto_enable();
|
||||
}
|
||||
return enabled;
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
static void
|
||||
restore_crypto(uint8_t enabled)
|
||||
{
|
||||
if(!enabled) {
|
||||
crypto_disable();
|
||||
}
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
static void
|
||||
set_key(const uint8_t *key)
|
||||
{
|
||||
uint8_t crypto_enabled, ret;
|
||||
|
||||
crypto_enabled = enable_crypto();
|
||||
|
||||
ret = aes_load_keys(key, AES_KEY_STORE_SIZE_KEY_SIZE_128, 1,
|
||||
CC2538_AES_128_KEY_AREA);
|
||||
if(ret != CRYPTO_SUCCESS) {
|
||||
PRINTF("%s: aes_load_keys() error %u\n", MODULE_NAME, ret);
|
||||
sys_ctrl_reset();
|
||||
}
|
||||
|
||||
restore_crypto(crypto_enabled);
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
static void
|
||||
encrypt(uint8_t *plaintext_and_result)
|
||||
{
|
||||
uint8_t crypto_enabled, ret;
|
||||
int8_t res;
|
||||
|
||||
crypto_enabled = enable_crypto();
|
||||
|
||||
ret = ecb_crypt_start(true, CC2538_AES_128_KEY_AREA, plaintext_and_result,
|
||||
plaintext_and_result, AES_128_BLOCK_SIZE, NULL);
|
||||
if(ret != CRYPTO_SUCCESS) {
|
||||
PRINTF("%s: ecb_crypt_start() error %u\n", MODULE_NAME, ret);
|
||||
sys_ctrl_reset();
|
||||
}
|
||||
|
||||
while((res = ecb_crypt_check_status()) == CRYPTO_PENDING);
|
||||
if(res != CRYPTO_SUCCESS) {
|
||||
PRINTF("%s: ecb_crypt_check_status() error %d\n", MODULE_NAME, res);
|
||||
sys_ctrl_reset();
|
||||
}
|
||||
|
||||
restore_crypto(crypto_enabled);
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
const struct aes_128_driver cc2538_aes_128_driver = {
|
||||
set_key,
|
||||
encrypt
|
||||
};
|
||||
|
||||
/** @} */
|
|
@ -1,63 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2015, Hasso-Plattner-Institut.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of the Institute nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* This file is part of the Contiki operating system.
|
||||
*/
|
||||
/**
|
||||
* \addtogroup cc2538-aes
|
||||
* @{
|
||||
*
|
||||
* \defgroup cc2538-aes-128 CC2538 AES-128
|
||||
*
|
||||
* AES-128 driver for the CC2538 SoC
|
||||
* @{
|
||||
*
|
||||
* \file
|
||||
* Header file of the AES-128 driver for the CC2538 SoC
|
||||
* \author
|
||||
* Konrad Krentz <konrad.krentz@gmail.com>
|
||||
*/
|
||||
#ifndef CC2538_AES_128_H_
|
||||
#define CC2538_AES_128_H_
|
||||
|
||||
#include "lib/aes-128.h"
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#ifdef CC2538_AES_128_CONF_KEY_AREA
|
||||
#define CC2538_AES_128_KEY_AREA CC2538_AES_128_CONF_KEY_AREA
|
||||
#else
|
||||
#define CC2538_AES_128_KEY_AREA 0
|
||||
#endif
|
||||
/*---------------------------------------------------------------------------*/
|
||||
extern const struct aes_128_driver cc2538_aes_128_driver;
|
||||
|
||||
#endif /* CC2538_AES_128_H_ */
|
||||
|
||||
/**
|
||||
* @}
|
||||
* @}
|
||||
*/
|
|
@ -1,130 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2015, Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
/**
|
||||
* \addtogroup cc2538-ccm-star
|
||||
* @{
|
||||
*
|
||||
* \file
|
||||
* Implementation of the AES-CCM* driver for the CC2538 SoC
|
||||
*/
|
||||
#include "contiki.h"
|
||||
#include "dev/ccm.h"
|
||||
#include "dev/cc2538-aes-128.h"
|
||||
#include "dev/cc2538-ccm-star.h"
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdio.h>
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#define MODULE_NAME "cc2538-ccm-star"
|
||||
|
||||
#define CCM_STAR_LEN_LEN (CCM_NONCE_LEN_LEN - CCM_STAR_NONCE_LENGTH)
|
||||
|
||||
#define DEBUG 0
|
||||
#if DEBUG
|
||||
#define PRINTF(...) printf(__VA_ARGS__)
|
||||
#else
|
||||
#define PRINTF(...)
|
||||
#endif
|
||||
/*---------------------------------------------------------------------------*/
|
||||
static uint8_t
|
||||
enable_crypto(void)
|
||||
{
|
||||
uint8_t enabled = CRYPTO_IS_ENABLED();
|
||||
if(!enabled) {
|
||||
crypto_enable();
|
||||
}
|
||||
return enabled;
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
static void
|
||||
restore_crypto(uint8_t enabled)
|
||||
{
|
||||
if(!enabled) {
|
||||
crypto_disable();
|
||||
}
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
static void
|
||||
set_key(const uint8_t *key)
|
||||
{
|
||||
cc2538_aes_128_driver.set_key(key);
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
static void
|
||||
aead(const uint8_t *nonce, uint8_t *m, uint8_t m_len, const uint8_t *a,
|
||||
uint8_t a_len, uint8_t *result, uint8_t mic_len, int forward)
|
||||
{
|
||||
uint16_t cdata_len;
|
||||
uint8_t crypto_enabled, ret;
|
||||
|
||||
crypto_enabled = enable_crypto();
|
||||
|
||||
if(forward) {
|
||||
ret = ccm_auth_encrypt_start(CCM_STAR_LEN_LEN, CC2538_AES_128_KEY_AREA,
|
||||
nonce, a, a_len, m, m_len, m, mic_len, NULL);
|
||||
if(ret != CRYPTO_SUCCESS) {
|
||||
PRINTF("%s: ccm_auth_encrypt_start() error %u\n", MODULE_NAME, ret);
|
||||
restore_crypto(crypto_enabled);
|
||||
return;
|
||||
}
|
||||
|
||||
while(!ccm_auth_encrypt_check_status());
|
||||
ret = ccm_auth_encrypt_get_result(result, mic_len);
|
||||
if(ret != CRYPTO_SUCCESS) {
|
||||
PRINTF("%s: ccm_auth_encrypt_get_result() error %u\n", MODULE_NAME, ret);
|
||||
}
|
||||
} else {
|
||||
cdata_len = m_len + mic_len;
|
||||
ret = ccm_auth_decrypt_start(CCM_STAR_LEN_LEN, CC2538_AES_128_KEY_AREA,
|
||||
nonce, a, a_len, m, cdata_len, m, mic_len,
|
||||
NULL);
|
||||
if(ret != CRYPTO_SUCCESS) {
|
||||
PRINTF("%s: ccm_auth_decrypt_start() error %u\n", MODULE_NAME, ret);
|
||||
restore_crypto(crypto_enabled);
|
||||
return;
|
||||
}
|
||||
|
||||
while(!ccm_auth_decrypt_check_status());
|
||||
ret = ccm_auth_decrypt_get_result(m, cdata_len, result, mic_len);
|
||||
if(ret != CRYPTO_SUCCESS) {
|
||||
PRINTF("%s: ccm_auth_decrypt_get_result() error %u\n", MODULE_NAME, ret);
|
||||
}
|
||||
}
|
||||
|
||||
restore_crypto(crypto_enabled);
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
const struct ccm_star_driver cc2538_ccm_star_driver = {
|
||||
set_key,
|
||||
aead
|
||||
};
|
||||
|
||||
/** @} */
|
|
@ -1,55 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2015, Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
/**
|
||||
* \addtogroup cc2538-aes
|
||||
* @{
|
||||
*
|
||||
* \defgroup cc2538-ccm-star CC2538 AES-CCM*
|
||||
*
|
||||
* AES-CCM* driver for the CC2538 SoC
|
||||
* @{
|
||||
*
|
||||
* \file
|
||||
* Header file of the AES-CCM* driver for the CC2538 SoC
|
||||
*/
|
||||
#ifndef CC2538_CCM_STAR_H_
|
||||
#define CC2538_CCM_STAR_H_
|
||||
|
||||
#include "lib/ccm-star.h"
|
||||
/*---------------------------------------------------------------------------*/
|
||||
extern const struct ccm_star_driver cc2538_ccm_star_driver;
|
||||
|
||||
#endif /* CC2538_CCM_STAR_H_ */
|
||||
|
||||
/**
|
||||
* @}
|
||||
* @}
|
||||
*/
|
|
@ -1,126 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2015, Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
/**
|
||||
* \addtogroup cc2538
|
||||
* @{
|
||||
*
|
||||
* \defgroup cc2538-devices cc2538 family of devices
|
||||
*
|
||||
* Definitions for the cc2538 family of devices
|
||||
* @{
|
||||
*
|
||||
* \file
|
||||
* Header file for the cc2538 devices definitions
|
||||
*/
|
||||
#ifndef CC2538_DEV_H_
|
||||
#define CC2538_DEV_H_
|
||||
|
||||
#include "contiki.h"
|
||||
#include "sys/cc.h"
|
||||
/*----------------------------------------------------------------------------*/
|
||||
/** \name Bit-fields for the CC2538 devices features
|
||||
* @{
|
||||
*/
|
||||
#define CC2538_DEV_ID_M 0x0000000F /**< ID mask */
|
||||
#define CC2538_DEV_ID_S 0 /**< ID shift */
|
||||
#define CC2538_DEV_FLASH_SIZE_KB_M 0x0000FFF0 /**< kiB flash size mask */
|
||||
#define CC2538_DEV_FLASH_SIZE_KB_S 4 /**< kiB flash size shift */
|
||||
#define CC2538_DEV_SRAM_SIZE_KB_M 0x00FF0000 /**< kiB SRAM size mask */
|
||||
#define CC2538_DEV_SRAM_SIZE_KB_S 16 /**< kiB SRAM size shift */
|
||||
#define CC2538_DEV_AES_SHA_M 0x01000000 /**< Security HW AES/SHA */
|
||||
#define CC2538_DEV_ECC_RSA_M 0x02000000 /**< Security HW ECC/RSA */
|
||||
/** @} */
|
||||
/*----------------------------------------------------------------------------*/
|
||||
/** \name Macro defining a CC2538 device from its features
|
||||
* @{
|
||||
*/
|
||||
#define CC2538_DEV_DEF(id, flash_size_kb, sram_size_kb, aes_sha, ecc_rsa) \
|
||||
((id) << CC2538_DEV_ID_S | (flash_size_kb) << CC2538_DEV_FLASH_SIZE_KB_S | \
|
||||
(sram_size_kb) << CC2538_DEV_SRAM_SIZE_KB_S | \
|
||||
((aes_sha) ? CC2538_DEV_AES_SHA_M : 0) | \
|
||||
((ecc_rsa) ? CC2538_DEV_ECC_RSA_M : 0))
|
||||
/** @} */
|
||||
/*----------------------------------------------------------------------------*/
|
||||
/** \name Available CC2538 devices
|
||||
* @{
|
||||
*/
|
||||
#define CC2538_DEV_CC2538SF53 CC2538_DEV_DEF(0, 512, 32, 1, 1)
|
||||
#define CC2538_DEV_CC2538SF23 CC2538_DEV_DEF(1, 256, 32, 1, 1)
|
||||
#define CC2538_DEV_CC2538NF53 CC2538_DEV_DEF(2, 512, 32, 1, 0)
|
||||
#define CC2538_DEV_CC2538NF23 CC2538_DEV_DEF(3, 256, 32, 1, 0)
|
||||
#define CC2538_DEV_CC2538NF11 CC2538_DEV_DEF(4, 128, 16, 1, 0)
|
||||
/** @} */
|
||||
/*----------------------------------------------------------------------------*/
|
||||
/** \name CC2538 device used by Contiki
|
||||
* @{
|
||||
*/
|
||||
#ifdef CC2538_DEV_CONF
|
||||
#define CC2538_DEV CC2538_DEV_CONF
|
||||
#else
|
||||
#define CC2538_DEV CC2538_DEV_CC2538SF53
|
||||
#endif
|
||||
/** @} */
|
||||
/*----------------------------------------------------------------------------*/
|
||||
/** \name Features of the CC2538 device used by Contiki
|
||||
* @{
|
||||
*/
|
||||
/** Flash address */
|
||||
#define CC2538_DEV_FLASH_ADDR 0x00200000
|
||||
/** Flash size in bytes */
|
||||
#define CC2538_DEV_FLASH_SIZE (((CC2538_DEV & CC2538_DEV_FLASH_SIZE_KB_M) >> \
|
||||
CC2538_DEV_FLASH_SIZE_KB_S) << 10)
|
||||
/** SRAM (non-retention + low-leakage) address */
|
||||
#define CC2538_DEV_SRAM_ADDR (CC2538_DEV_RLSRAM_SIZE ? \
|
||||
CC2538_DEV_RLSRAM_ADDR : \
|
||||
CC2538_DEV_LLSRAM_ADDR)
|
||||
/** SRAM (non-retention + low-leakage) size in bytes */
|
||||
#define CC2538_DEV_SRAM_SIZE (((CC2538_DEV & CC2538_DEV_SRAM_SIZE_KB_M) >> \
|
||||
CC2538_DEV_SRAM_SIZE_KB_S) << 10)
|
||||
/** Regular-leakage SRAM address */
|
||||
#define CC2538_DEV_RLSRAM_ADDR 0x20000000
|
||||
/** Regular-leakage SRAM size in bytes */
|
||||
#define CC2538_DEV_RLSRAM_SIZE (CC2538_DEV_SRAM_SIZE - CC2538_DEV_LLSRAM_SIZE)
|
||||
/** Low-leakage SRAM address */
|
||||
#define CC2538_DEV_LLSRAM_ADDR 0x20004000
|
||||
/** Low-leakage SRAM size in bytes */
|
||||
#define CC2538_DEV_LLSRAM_SIZE MIN(CC2538_DEV_SRAM_SIZE, 16384)
|
||||
/** Security HW AES/SHA */
|
||||
#define CC2538_DEV_AES_SHA (!!(CC2538_DEV & CC2538_DEV_AES_SHA_M))
|
||||
/** Security HW ECC/RSA */
|
||||
#define CC2538_DEV_ECC_RSA (!!(CC2538_DEV & CC2538_DEV_ECC_RSA_M))
|
||||
/** @} */
|
||||
|
||||
#endif /* CC2538_DEV_H_ */
|
||||
|
||||
/**
|
||||
* @}
|
||||
* @}
|
||||
*/
|
File diff suppressed because it is too large
Load Diff
|
@ -1,144 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2012, Texas Instruments Incorporated - http://www.ti.com/
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of the Institute nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* This file is part of the Contiki operating system.
|
||||
*/
|
||||
/**
|
||||
* \addtogroup cc2538
|
||||
* @{
|
||||
*
|
||||
* \defgroup cc2538-rf cc2538 RF Driver
|
||||
*
|
||||
* Driver implementation for the cc2538 RF transceiver
|
||||
* @{
|
||||
*
|
||||
* \file
|
||||
* Header file for the cc2538 RF driver
|
||||
*/
|
||||
#ifndef CC2538_RF_H__
|
||||
#define CC2538_RF_H__
|
||||
|
||||
#include "contiki.h"
|
||||
#include "dev/radio.h"
|
||||
#include "dev/rfcore.h"
|
||||
#include "reg.h"
|
||||
/*---------------------------------------------------------------------------
|
||||
* RF Config
|
||||
*---------------------------------------------------------------------------*/
|
||||
/* Constants */
|
||||
#define CC2538_RF_CCA_THRES_USER_GUIDE 0xF8
|
||||
#define CC2538_RF_TX_POWER_RECOMMENDED 0xD5 /* ToDo: Determine value */
|
||||
#define CC2538_RF_CHANNEL_MIN 11
|
||||
#define CC2538_RF_CHANNEL_MAX 26
|
||||
#define CC2538_RF_CHANNEL_SPACING 5
|
||||
#define CC2538_RF_MAX_PACKET_LEN 127
|
||||
#define CC2538_RF_MIN_PACKET_LEN 4
|
||||
#define CC2538_RF_CCA_CLEAR 1
|
||||
#define CC2538_RF_CCA_BUSY 0
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#ifdef CC2538_RF_CONF_TX_POWER
|
||||
#define CC2538_RF_TX_POWER CC2538_RF_CONF_TX_POWER
|
||||
#else
|
||||
#define CC2538_RF_TX_POWER CC2538_RF_TX_POWER_RECOMMENDED
|
||||
#endif /* CC2538_RF_CONF_TX_POWER */
|
||||
|
||||
#ifdef CC2538_RF_CONF_CCA_THRES
|
||||
#define CC2538_RF_CCA_THRES CC2538_RF_CONF_CCA_THRES
|
||||
#else
|
||||
#define CC2538_RF_CCA_THRES CC2538_RF_CCA_THRES_USER_GUIDE
|
||||
#endif /* CC2538_RF_CONF_CCA_THRES */
|
||||
|
||||
#ifdef CC2538_RF_CONF_AUTOACK
|
||||
#define CC2538_RF_AUTOACK CC2538_RF_CONF_AUTOACK
|
||||
#else
|
||||
#define CC2538_RF_AUTOACK 1
|
||||
#endif /* CC2538_RF_CONF_AUTOACK */
|
||||
/*---------------------------------------------------------------------------
|
||||
* Command Strobe Processor
|
||||
*---------------------------------------------------------------------------*/
|
||||
/* OPCODES */
|
||||
#define CC2538_RF_CSP_OP_ISRXON 0xE3
|
||||
#define CC2538_RF_CSP_OP_ISTXON 0xE9
|
||||
#define CC2538_RF_CSP_OP_ISTXONCCA 0xEA
|
||||
#define CC2538_RF_CSP_OP_ISRFOFF 0xEF
|
||||
#define CC2538_RF_CSP_OP_ISFLUSHRX 0xED
|
||||
#define CC2538_RF_CSP_OP_ISFLUSHTX 0xEE
|
||||
|
||||
/**
|
||||
* \brief Send an RX ON command strobe to the CSP
|
||||
*/
|
||||
#define CC2538_RF_CSP_ISRXON() \
|
||||
do { REG(RFCORE_SFR_RFST) = CC2538_RF_CSP_OP_ISRXON; } while(0)
|
||||
|
||||
/**
|
||||
* \brief Send a TX ON command strobe to the CSP
|
||||
*/
|
||||
#define CC2538_RF_CSP_ISTXON() \
|
||||
do { REG(RFCORE_SFR_RFST) = CC2538_RF_CSP_OP_ISTXON; } while(0)
|
||||
|
||||
/**
|
||||
* \brief Send a RF OFF command strobe to the CSP
|
||||
*/
|
||||
#define CC2538_RF_CSP_ISRFOFF() \
|
||||
do { REG(RFCORE_SFR_RFST) = CC2538_RF_CSP_OP_ISRFOFF; } while(0)
|
||||
|
||||
/**
|
||||
* \brief Flush the RX FIFO
|
||||
*/
|
||||
#define CC2538_RF_CSP_ISFLUSHRX() do { \
|
||||
REG(RFCORE_SFR_RFST) = CC2538_RF_CSP_OP_ISFLUSHRX; \
|
||||
} while(0)
|
||||
|
||||
/**
|
||||
* \brief Flush the TX FIFO
|
||||
*/
|
||||
#define CC2538_RF_CSP_ISFLUSHTX() do { \
|
||||
REG(RFCORE_SFR_RFST) = CC2538_RF_CSP_OP_ISFLUSHTX; \
|
||||
} while(0)
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** The NETSTACK data structure for the cc2538 RF driver */
|
||||
extern const struct radio_driver cc2538_rf_driver;
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \brief Sets addresses and PAN identifier to the relevant RF hardware
|
||||
* registers
|
||||
* \param pan The PAN Identifier
|
||||
*
|
||||
* Values for short and extended addresses are not needed as parameters
|
||||
* since they exist in the linkaddr buffer in the contiki core. They
|
||||
* are thus simply copied over from there.
|
||||
*/
|
||||
void cc2538_rf_set_addr(uint16_t pan);
|
||||
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#endif /* CC2538_RF_H__ */
|
||||
|
||||
/**
|
||||
* @}
|
||||
* @}
|
||||
*/
|
|
@ -1,72 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2015, Zolertia - http://www.zolertia.com
|
||||
* Copyright (c) 2015, University of Bristol - http://www.bristol.ac.uk
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \addtogroup cc2538
|
||||
* @{
|
||||
*
|
||||
* \defgroup cc2538-sensors CC2538 Built-In Sensors
|
||||
*
|
||||
* Module controlling sensors on the CC2538 SoC (Tmp and VDD3)
|
||||
* @{
|
||||
*
|
||||
* \file
|
||||
* Generic header usable by all CC2538 sensor drivers
|
||||
*/
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#ifndef CC2538_SENSORS_H_
|
||||
#define CC2538_SENSORS_H_
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#include "lib/sensors.h"
|
||||
#include "dev/cc2538-temp-sensor.h"
|
||||
#include "dev/vdd3-sensor.h"
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \name CC2538 sensor constants
|
||||
*
|
||||
* These constants are used by various sensors on the CC2538. They can be used
|
||||
* to differentiate between raw and converted readings, to configure ADC
|
||||
* decimation rate (where applicable).
|
||||
* @{
|
||||
*/
|
||||
#define CC2538_SENSORS_VALUE_TYPE_RAW 0 /**< Request the raw reading */
|
||||
#define CC2538_SENSORS_VALUE_TYPE_CONVERTED 1 /**< Request the converted reading */
|
||||
|
||||
#define CC2538_SENSORS_ERROR 0x80000000 /**< Generic Error */
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#endif /* CC2538_SENSORS_H_ */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @}
|
||||
* @}
|
||||
*/
|
|
@ -1,77 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2015, Zolertia - http://www.zolertia.com
|
||||
* Copyright (c) 2015, University of Bristol - http://www.bristol.ac.uk
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \addtogroup cc2538-temp-sensor
|
||||
* @{
|
||||
*
|
||||
* \file
|
||||
* Driver for the CC2538 On-Chip temperature sensor
|
||||
*/
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#include "contiki.h"
|
||||
#include "lib/sensors.h"
|
||||
#include "dev/adc.h"
|
||||
#include "dev/cc2538-sensors.h"
|
||||
|
||||
#include <stdint.h>
|
||||
/*---------------------------------------------------------------------------*/
|
||||
static int
|
||||
value(int type)
|
||||
{
|
||||
int raw = adc_get(SOC_ADC_ADCCON_CH_TEMP, SOC_ADC_ADCCON_REF_INT,
|
||||
SOC_ADC_ADCCON_DIV_512);
|
||||
|
||||
if(type == CC2538_SENSORS_VALUE_TYPE_RAW) {
|
||||
return raw;
|
||||
} else if(type == CC2538_SENSORS_VALUE_TYPE_CONVERTED) {
|
||||
return 25000 + ((raw >> 4) - 1422) * 10000 / 42;
|
||||
}
|
||||
|
||||
return CC2538_SENSORS_ERROR;
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
static int
|
||||
configure(int type, int value)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
static int
|
||||
status(int type)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
SENSORS_SENSOR(cc2538_temp_sensor, TEMP_SENSOR, value, configure, status);
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/** @} */
|
|
@ -1,71 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2015, Zolertia - http://www.zolertia.com
|
||||
* Copyright (c) 2015, University of Bristol - http://www.bristol.ac.uk
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \addtogroup cc2538-sensors
|
||||
* @{
|
||||
*
|
||||
* \defgroup cc2538-temp-sensor CC2538 on-chip temperature Sensor
|
||||
*
|
||||
* Driver for the CC2538 on-chip temperature sensor
|
||||
*
|
||||
* This driver can return the raw as well as the converted value of the sensor
|
||||
* reading. This is controlled by the type argument of the sensor driver's
|
||||
* value() function. The choices for the type argument are:
|
||||
* - CC2538_SENSORS_VALUE_TYPE_RAW (value() returns the raw reading)
|
||||
* - CC2538_SENSORS_VALUE_TYPE_CONVERTED (value() returns degrees mC)
|
||||
* @{
|
||||
*
|
||||
* \file
|
||||
* Header file for the CC2538 on-chip temperature Sensor Driver
|
||||
*/
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#ifndef CC2538_TEMP_SENSOR_H_
|
||||
#define CC2538_TEMP_SENSOR_H_
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#include "lib/sensors.h"
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \name temperature sensor
|
||||
* @{
|
||||
*/
|
||||
#define TEMP_SENSOR "On-Chip Temperature"
|
||||
/** @} */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
extern const struct sensors_sensor cc2538_temp_sensor;
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#endif /* CC2538_TEMP_SENSOR_H_ */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @}
|
||||
* @}
|
||||
*/
|
|
@ -1,142 +0,0 @@
|
|||
/*
|
||||
* Original file:
|
||||
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
|
||||
* All rights reserved.
|
||||
*
|
||||
* Port to Contiki:
|
||||
* Copyright (c) 2013, ADVANSEE - http://www.advansee.com/
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
/**
|
||||
* \addtogroup cc2538-ccm
|
||||
* @{
|
||||
*
|
||||
* \file
|
||||
* Implementation of the cc2538 AES-CCM driver
|
||||
*/
|
||||
#include "contiki.h"
|
||||
#include "sys/cc.h"
|
||||
#include "dev/rom-util.h"
|
||||
#include "dev/ccm.h"
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
/*---------------------------------------------------------------------------*/
|
||||
static uint8_t
|
||||
ccm_auth_crypt_start(uint8_t encrypt, uint8_t len_len, uint8_t key_area,
|
||||
const void *nonce, const void *adata, uint16_t adata_len,
|
||||
const void *data_in, void *data_out, uint16_t data_len,
|
||||
uint8_t mic_len, struct process *process)
|
||||
{
|
||||
uint32_t ctrl;
|
||||
uint32_t iv[AES_IV_LEN / sizeof(uint32_t)];
|
||||
|
||||
/* Program AES-CCM authentication/crypto operation */
|
||||
ctrl = AES_AES_CTRL_SAVE_CONTEXT | /* Save context */
|
||||
(((MAX(mic_len, 2) - 2) >> 1) << AES_AES_CTRL_CCM_M_S) | /* M */
|
||||
((len_len - 1) << AES_AES_CTRL_CCM_L_S) | /* L */
|
||||
AES_AES_CTRL_CCM | /* CCM */
|
||||
AES_AES_CTRL_CTR_WIDTH_128 | /* CTR width 128 */
|
||||
AES_AES_CTRL_CTR | /* CTR */
|
||||
(encrypt ? AES_AES_CTRL_DIRECTION_ENCRYPT : 0); /* En/decryption */
|
||||
|
||||
/* Prepare the crypto initialization vector
|
||||
* Flags: L' = L - 1 */
|
||||
((uint8_t *)iv)[0] = len_len - 1;
|
||||
/* Nonce */
|
||||
rom_util_memcpy(&((uint8_t *)iv)[CCM_FLAGS_LEN], nonce,
|
||||
CCM_NONCE_LEN_LEN - len_len);
|
||||
/* Initialize counter to 0 */
|
||||
rom_util_memset(&((uint8_t *)iv)[AES_IV_LEN - len_len], 0, len_len);
|
||||
|
||||
return aes_auth_crypt_start(ctrl, key_area, iv, adata, adata_len,
|
||||
data_in, data_out, data_len, process);
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
static uint8_t
|
||||
ccm_auth_crypt_get_result(const void *cdata, uint16_t cdata_len,
|
||||
void *mic, uint8_t mic_len)
|
||||
{
|
||||
uint32_t tag[AES_TAG_LEN / sizeof(uint32_t)];
|
||||
uint16_t data_len;
|
||||
uint8_t ret;
|
||||
|
||||
ret = aes_auth_crypt_get_result(NULL, tag);
|
||||
if(ret != CRYPTO_SUCCESS) {
|
||||
return ret;
|
||||
}
|
||||
|
||||
if(cdata != NULL) {
|
||||
/* Check MIC */
|
||||
data_len = cdata_len - mic_len;
|
||||
if(rom_util_memcmp(tag, &((const uint8_t *)cdata)[data_len], mic_len)) {
|
||||
ret = AES_AUTHENTICATION_FAILED;
|
||||
}
|
||||
}
|
||||
|
||||
/* Copy tag to MIC */
|
||||
rom_util_memcpy(mic, tag, mic_len);
|
||||
|
||||
return ret;
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
uint8_t
|
||||
ccm_auth_encrypt_start(uint8_t len_len, uint8_t key_area, const void *nonce,
|
||||
const void *adata, uint16_t adata_len, const void *pdata,
|
||||
uint16_t pdata_len, void *cdata, uint8_t mic_len,
|
||||
struct process *process)
|
||||
{
|
||||
return ccm_auth_crypt_start(true, len_len, key_area, nonce, adata, adata_len,
|
||||
pdata, cdata, pdata_len, mic_len, process);
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
uint8_t
|
||||
ccm_auth_encrypt_get_result(void *mic, uint8_t mic_len)
|
||||
{
|
||||
return ccm_auth_crypt_get_result(NULL, 0, mic, mic_len);
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
uint8_t
|
||||
ccm_auth_decrypt_start(uint8_t len_len, uint8_t key_area, const void *nonce,
|
||||
const void *adata, uint16_t adata_len, const void *cdata,
|
||||
uint16_t cdata_len, void *pdata, uint8_t mic_len,
|
||||
struct process *process)
|
||||
{
|
||||
uint16_t data_len = cdata_len - mic_len;
|
||||
|
||||
return ccm_auth_crypt_start(false, len_len, key_area, nonce, adata, adata_len,
|
||||
cdata, pdata, data_len, mic_len, process);
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
uint8_t
|
||||
ccm_auth_decrypt_get_result(const void *cdata, uint16_t cdata_len,
|
||||
void *mic, uint8_t mic_len)
|
||||
__attribute__ ((alias("ccm_auth_crypt_get_result")));
|
||||
|
||||
/** @} */
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue