Fixed GPIO HAL issue.

This commit is contained in:
Edvard Pettersen 2018-06-29 19:03:17 +02:00
parent f3a030b0a4
commit d4828c7baf
20 changed files with 362 additions and 220 deletions

View File

@ -68,12 +68,15 @@ EXTERNALDIRS += $(SDK_DEVICE)/startup_files
### CPU-dependent source files
CONTIKI_CPU_SOURCEFILES += rtimer-arch.c clock-arch.c
CONTIKI_CPU_SOURCEFILES += watchdog-arch.c putchar-arch.c
CONTIKI_CPU_SOURCEFILES += watchdog-arch.c dbg-arch.c
CONTIKI_CPU_SOURCEFILES += uart0-arch.c slip-arch.c
CONTIKI_CPU_SOURCEFILES += batmon-sensor.c
CONTIKI_CPU_SOURCEFILES += rf-common.c
CONTIKI_CPU_SOURCEFILES += batmon-sensor.c gpio-hal-arch.c
CONTIKI_CPU_SOURCEFILES += rf-common.c int-master-arch.c
CONTIKI_CPU_SOURCEFILES += ieee-addr.c
### CPU-dependent debug source files
MODULES += os/lib/dbg-io
ifeq ($(SUPPORTS_PROP_MODE),1)
CONTIKI_CPU_SOURCEFILES += rf-prop-mode.c prop-settings.c
endif
@ -85,10 +88,6 @@ endif
### CPU-dependent directories
CONTIKI_CPU_DIRS += . dev $(SUBFAMILY) rf-settings/$(DEVICE_FAMILY_LC)
### CPU-dependent debug source files
### CONTIKI_ARM_DIRS populated by Makefile.arm
DEBUG_IO_SOURCEFILES += dbg-printf.c dbg-snprintf.c dbg-sprintf.c strformat.c
CONTIKI_SOURCEFILES += $(CONTIKI_CPU_SOURCEFILES) $(DEBUG_IO_SOURCEFILES)
### Linker flag

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@ -34,8 +34,8 @@
* Default Linker script for the Texas Instruments CC1310
*/
MIN_STACKSIZE = 0x600;
HEAPSIZE = 256;
MIN_STACKSIZE = 0x800; /* 2048 bytes */
HEAPSIZE = 0x100; /* 256 bytes */
MEMORY
{

View File

@ -34,8 +34,8 @@
* Default Linker script for the Texas Instruments CC1352
*/
MIN_STACKSIZE = 0x600;
HEAPSIZE = 256; /* Size of heap buffer used by HeapMem */
MIN_STACKSIZE = 0x800; /* 2048 bytes */
HEAPSIZE = 0x100; /* 256 bytes */
MEMORY
{

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@ -42,6 +42,10 @@
/*---------------------------------------------------------------------------*/
#include "cc13xx-cc26xx-def.h"
/*---------------------------------------------------------------------------*/
#define GPIO_HAL_CONF_ARCH_SW_TOGGLE 0
#define GPIO_HAL_CONF_ARCH_HDR_PATH "dev/gpio-hal-arch.h"
/**
* \name Network Stack Configuration
*
@ -56,10 +60,27 @@
#define CC2650_FAST_RADIO_STARTUP (MAC_CONF_WITH_TSCH)
#endif
#ifdef RF_CORE_CONF_CHANNEL
#define RF_CHANNEL RF_CORE_CONF_CHANNEL
#define RF_CORE_MODE_SUB_1_GHZ (1 << 0)
#define RF_CORE_MODE_2_4_GHZ (1 << 1)
#define RF_CORE_MODE_MASK ( RF_CORE_MODE_SUB_1_GHZ \
| RF_CORE_MODE_2_4_GHZ \
)
/* Default RF mode is 2.4 GHz */
#ifdef RF_CORE_CONF_MODE
# if !(RF_CORE_CONF_MODE & RF_CORE_MODE_MASK)
# error "Invalid RF_CORE_CONF_MODE"
# endif
# define RF_CORE_MODE RF_CORE_CONF_MODE
#else
#define RF_CHANNEL 25
# define RF_CORE_MODE RF_CORE_MODE_2_4_GHZ
#endif
#ifdef RF_CORE_CONF_CHANNEL
# define RF_CHANNEL RF_CORE_CONF_CHANNEL
#else
# define RF_CHANNEL 25
#endif
/* Number of Prop Mode RX buffers */
@ -69,22 +90,11 @@
/* Configure Radio mode, i.e. prop or ieee */
/*----- CC13xx Device Line --------------------------------------------------*/
/* CC13xx supports both IEEE and Prop mode, depending on which device */
#if defined(DEVICE_LINE_CC13XX)
/* Default mode should be prop for prop-only devices (CC1310, CC1312R);
* Else, IEEE mode is default. */
# ifndef CC13XX_CONF_PROP_MODE
# if (SUPPORTS_IEEE_MODE == 0)
# define CC13XX_CONF_PROP_MODE 1
# else
# define CC13XX_CONF_PROP_MODE 0
# endif
# endif
# if (CC13XX_CONF_PROP_MODE == 1) && (SUPPORTS_PROP_MODE == 1)
# if (RF_CORE_MODE == RF_CORE_MODE_SUB_1_GHZ) && (SUPPORTS_PROP_MODE)
/*----- CC13xx Prop Mode ----------------------------------------------------*/
# define NETSTACK_CONF_RADIO prop_mode_driver
@ -92,7 +102,7 @@
# define CSMA_CONF_AFTER_ACK_DETECTED_WAIT_TIME (RTIMER_SECOND / 1000)
# define CSMA_CONF_SEND_SOFT_ACK 1
# elif (CC13XX_CONF_PROP_MODE == 0) && (SUPPORTS_IEEE_MODE == 1)
# elif (RF_CORE_MODE == RF_CORE_MODE_2_4_GHZ) && (SUPPORTS_IEEE_MODE)
/*----- CC13xx IEEE Mode ----------------------------------------------------*/
# define NETSTACK_CONF_RADIO ieee_mode_driver
@ -101,13 +111,13 @@
# else
/*----- CC13xx Non-supported Mode -------------------------------------------*/
# error "Invalid radio mode configuration of CC13xx device"
# endif /* (CC13XX_CONF_PROP_MODE == 1) && (SUPPORTS_PROP_MODE == 1) */
# endif /* (RF_CORE_IS_SUB_1_GHZ == 1) && (SUPPORTS_PROP_MODE == 1) */
/*----- CC26xx Device Line --------------------------------------------------*/
/* CC26xx only supports IEEE mode */
#elif defined(DEVICE_LINE_CC26XX)
# if (SUPPORTS_IEEE_MODE == 1)
# if (SUPPORTS_IEEE_MODE)
/*----- CC26xx IEEE Mode ----------------------------------------------------*/
# define NETSTACK_CONF_RADIO ieee_mode_driver

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@ -73,7 +73,7 @@ clock_init(void)
ClockP_construct(&etimerClock, (ClockP_Fxn)&clock_update, CLOCK_TICKS_SECOND, &params);
}
/*---------------------------------------------------------------------------*/
CCIF clock_time_t
clock_time_t
clock_time(void)
{
uint64_t count_read;
@ -100,7 +100,7 @@ clock_update(void)
}
}
/*---------------------------------------------------------------------------*/
CCIF unsigned long
unsigned long
clock_seconds(void)
{
uint64_t count_read;

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@ -28,60 +28,39 @@
* OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*---------------------------------------------------------------------------*/
#include "sys/cc.h"
/*---------------------------------------------------------------------------*/
#include <stdio.h>
#include <stddef.h>
#include <string.h>
/*---------------------------------------------------------------------------*/
#include "uart0-arch.h"
#undef putchar
#undef puts
/*---------------------------------------------------------------------------*/
int
putchar(int c)
dbg_putchar(int c)
{
const unsigned char ch = (unsigned char)c;
return (uart0_write(&ch, 1) == 1)
? (int)ch
: EOF;
}
/*---------------------------------------------------------------------------*/
int
puts(const char *str)
{
if(!str)
{
return EOF;
}
const size_t len = strlen(str);
const unsigned char newline = '\n';
if ((uart0_write(str, len) != len) &&
(uart0_write(&newline, 1) != 1))
{
return EOF;
}
return len + 1;
const int num_bytes = (int)uart0_write(&ch, 1);
return (num_bytes > 0)
? num_bytes
: 0;
}
/*---------------------------------------------------------------------------*/
unsigned int
dbg_send_bytes(const unsigned char *s, unsigned int len)
dbg_send_bytes(const unsigned char *seq, unsigned int len)
{
if(!s || strlen((const char *)s) < len)
{
return EOF;
const size_t seq_len = strlen((const char *)seq);
const size_t max_len = MIN(seq_len, (size_t)len);
if (max_len == 0) {
return 0;
}
const unsigned char newline = '\n';
if ((uart0_write(s, len) != len) &&
(uart0_write(&newline, 1) != 1))
{
return EOF;
}
return len + 1;
const int num_bytes = (int)uart0_write(seq, max_len);
return (num_bytes > 0)
? num_bytes
: 0;
}
/*---------------------------------------------------------------------------*/

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@ -79,45 +79,46 @@
* DOT_15_4G_CHAN0_FREQUENCY is specified here in KHz
*/
#if DOT_15_4G_FREQUENCY_BAND_ID==DOT_15_4G_FREQUENCY_BAND_470
#define DOT_15_4G_CHANNEL_MAX 198
#define DOT_15_4G_CHANNEL_SPACING 200
#define DOT_15_4G_CHAN0_FREQUENCY 470200
#define PROP_MODE_CONF_LO_DIVIDER 0x0A
#define SMARTRF_SETTINGS_CONF_BAND_OVERRIDES HW32_ARRAY_OVERRIDE(0x405C,1), \
(uint32_t)0x18000280,
# define DOT_15_4G_CHANNEL_MAX 198
# define DOT_15_4G_CHANNEL_SPACING 200
# define DOT_15_4G_CHAN0_FREQUENCY 470200
# define PROP_MODE_CONF_LO_DIVIDER 0x0A
# define SMARTRF_SETTINGS_CONF_BAND_OVERRIDES \
HW32_ARRAY_OVERRIDE(0x405C,1), \
(uint32_t)0x18000280,
#elif DOT_15_4G_FREQUENCY_BAND_ID==DOT_15_4G_FREQUENCY_BAND_780
#define DOT_15_4G_CHANNEL_MAX 38
#define DOT_15_4G_CHANNEL_SPACING 200
#define DOT_15_4G_CHAN0_FREQUENCY 779200
#define PROP_MODE_CONF_LO_DIVIDER 0x06
# define DOT_15_4G_CHANNEL_MAX 38
# define DOT_15_4G_CHANNEL_SPACING 200
# define DOT_15_4G_CHAN0_FREQUENCY 779200
# define PROP_MODE_CONF_LO_DIVIDER 0x06
#elif DOT_15_4G_FREQUENCY_BAND_ID==DOT_15_4G_FREQUENCY_BAND_863
#define DOT_15_4G_CHANNEL_MAX 33
#define DOT_15_4G_CHANNEL_SPACING 200
#define DOT_15_4G_CHAN0_FREQUENCY 863125
#define PROP_MODE_CONF_LO_DIVIDER 0x05
# define DOT_15_4G_CHANNEL_MAX 33
# define DOT_15_4G_CHANNEL_SPACING 200
# define DOT_15_4G_CHAN0_FREQUENCY 863125
# define PROP_MODE_CONF_LO_DIVIDER 0x05
#elif DOT_15_4G_FREQUENCY_BAND_ID==DOT_15_4G_FREQUENCY_BAND_915
#define DOT_15_4G_CHANNEL_MAX 128
#define DOT_15_4G_CHANNEL_SPACING 200
#define DOT_15_4G_CHAN0_FREQUENCY 902200
#define PROP_MODE_CONF_LO_DIVIDER 0x05
# define DOT_15_4G_CHANNEL_MAX 128
# define DOT_15_4G_CHANNEL_SPACING 200
# define DOT_15_4G_CHAN0_FREQUENCY 902200
# define PROP_MODE_CONF_LO_DIVIDER 0x05
#elif DOT_15_4G_FREQUENCY_BAND_ID==DOT_15_4G_FREQUENCY_BAND_920
#define DOT_15_4G_CHANNEL_MAX 37
#define DOT_15_4G_CHANNEL_SPACING 200
#define DOT_15_4G_CHAN0_FREQUENCY 920600
#define PROP_MODE_CONF_LO_DIVIDER 0x05
# define DOT_15_4G_CHANNEL_MAX 37
# define DOT_15_4G_CHANNEL_SPACING 200
# define DOT_15_4G_CHAN0_FREQUENCY 920600
# define PROP_MODE_CONF_LO_DIVIDER 0x05
#elif DOT_15_4G_FREQUENCY_BAND_ID==DOT_15_4G_FREQUENCY_BAND_950
#define DOT_15_4G_CHANNEL_MAX 32
#define DOT_15_4G_CHANNEL_SPACING 200
#define DOT_15_4G_CHAN0_FREQUENCY 951000
#define PROP_MODE_CONF_LO_DIVIDER 0x05
# define DOT_15_4G_CHANNEL_MAX 32
# define DOT_15_4G_CHANNEL_SPACING 200
# define DOT_15_4G_CHAN0_FREQUENCY 951000
# define PROP_MODE_CONF_LO_DIVIDER 0x05
#else
#error The selected frequency band is not supported
# error The selected IEEE 802.15.4g frequency band is not supported
#endif
/*---------------------------------------------------------------------------*/
#endif /* DOT_15_4G_H_ */

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@ -0,0 +1,135 @@
/*
* Copyright (c) 2017, George Oikonomou - http://www.spd.gr
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*---------------------------------------------------------------------------*/
/**
* \addtogroup cc26xx-gpio-hal
* @{
*
* \file
* Implementation file for the CC13xx/CC26xx GPIO HAL functions
*/
/*---------------------------------------------------------------------------*/
#include "contiki.h"
#include "dev/gpio-hal.h"
#include <ti/devices/DeviceFamily.h>
#include DeviceFamily_constructPath(driverlib/gpio.h)
#include DeviceFamily_constructPath(driverlib/ioc.h)
#include <stdint.h>
/*---------------------------------------------------------------------------*/
#define CONFIG_MASK (IOC_IOPULL_M | IOC_INT_M | IOC_IOMODE_OPEN_SRC_INV)
/*---------------------------------------------------------------------------*/
void
gpio_hal_arch_interrupt_enable(gpio_hal_pin_t pin, gpio_hal_pin_cfg_t cfg)
{
GPIO_clearEventDio(pin);
gpio_hal_arch_pin_cfg_set(pin, cfg);
IOCIntEnable(pin);
}
/*---------------------------------------------------------------------------*/
void
gpio_hal_arch_pin_cfg_set(gpio_hal_pin_t pin, gpio_hal_pin_cfg_t cfg)
{
/* Clear settings that we are about to change, keep everything else */
uint32_t config = IOCPortConfigureGet(pin);
config &= ~CONFIG_MASK;
switch (cfg & GPIO_HAL_PIN_CFG_INT_MASK) {
case GPIO_HAL_PIN_CFG_INT_DISABLE: config |= (IOC_NO_EDGE | IOC_INT_DISABLE); break;
case GPIO_HAL_PIN_CFG_INT_FALLING: config |= (IOC_FALLING_EDGE | IOC_INT_ENABLE); break;
case GPIO_HAL_PIN_CFG_INT_RISING: config |= (IOC_RISING_EDGE | IOC_INT_ENABLE); break;
case GPIO_HAL_PIN_CFG_INT_BOTH: config |= (IOC_BOTH_EDGES | IOC_INT_ENABLE); break;
default: {}
}
switch (cfg & GPIO_HAL_PIN_CFG_PULL_MASK) {
case GPIO_HAL_PIN_CFG_PULL_NONE: config |= IOC_NO_IOPULL; break;
case GPIO_HAL_PIN_CFG_PULL_DOWN: config |= IOC_IOPULL_DOWN; break;
case GPIO_HAL_PIN_CFG_PULL_UP: config |= IOC_IOPULL_UP; break;
default: {}
}
IOCPortConfigureSet(pin, IOC_PORT_GPIO, config);
}
/*---------------------------------------------------------------------------*/
gpio_hal_pin_cfg_t
gpio_hal_arch_pin_cfg_get(gpio_hal_pin_t pin)
{
gpio_hal_pin_cfg_t cfg = 0;
uint32_t config = IOCPortConfigureGet(pin);
switch (config & IOC_IOPULL_M) {
case IOC_IOPULL_UP: cfg |= GPIO_HAL_PIN_CFG_PULL_UP; break;
case IOC_IOPULL_DOWN: cfg |= GPIO_HAL_PIN_CFG_PULL_DOWN; break;
case IOC_NO_IOPULL: cfg |= GPIO_HAL_PIN_CFG_PULL_NONE; break;
default: {}
}
/* Interrupt enable/disable */
uint32_t tmp = config & IOC_INT_M;
if (tmp & IOC_INT_ENABLE) {
switch (tmp) {
case IOC_FALLING_EDGE: cfg |= GPIO_HAL_PIN_CFG_INT_FALLING; break;
case IOC_RISING_EDGE: cfg |= GPIO_HAL_PIN_CFG_INT_RISING; break;
case IOC_BOTH_EDGES: cfg |= GPIO_HAL_PIN_CFG_INT_BOTH; break;
default: {}
}
} else {
cfg |= GPIO_HAL_PIN_CFG_INT_DISABLE;
}
return cfg;
}
/*---------------------------------------------------------------------------*/
gpio_hal_pin_mask_t
gpio_hal_arch_read_pins(gpio_hal_pin_mask_t pins)
{
/* For pins configured as output we need to read DOUT31_0 */
gpio_hal_pin_mask_t oe_pins = GPIO_getOutputEnableMultiDio(pins);
pins &= ~oe_pins;
return (HWREG(GPIO_BASE + GPIO_O_DOUT31_0) & oe_pins) |
GPIO_readMultiDio(pins);
}
/*---------------------------------------------------------------------------*/
uint8_t
gpio_hal_arch_read_pin(gpio_hal_pin_t pin)
{
if (GPIO_getOutputEnableDio(pin)) {
return (HWREG(GPIO_BASE + GPIO_O_DOUT31_0) >> pin) & 1;
}
return GPIO_readDio(pin);
}
/*---------------------------------------------------------------------------*/
/** @} */

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@ -1,16 +1,16 @@
/*
* Copyright (c) 2012, Texas Instruments Incorporated - http://www.ti.com/
* Copyright (c) 2017, George Oikonomou - http://www.spd.gr
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
@ -30,20 +30,50 @@
*/
/*---------------------------------------------------------------------------*/
/**
* \addtogroup cc26xx-char-io
* \addtogroup cc26xx
* @{
*
* \defgroup cc26xx-gpio-hal CC13xx/CC26xx GPIO HAL implementation
*
* @{
*
* \file
* This file is here because DBG I/O expects it to be. It just includes
* our own dbg.h which has a non-misleading name and which also adheres
* to Contiki's naming convention
* Header file for the CC13xx/CC26xx GPIO HAL functions
*
* \note
* Do not include this header directly
*/
/*---------------------------------------------------------------------------*/
#ifndef DEBUG_UART_H_
#define DEBUG_UART_H_
#ifndef GPIO_HAL_ARCH_H_
#define GPIO_HAL_ARCH_H_
/*---------------------------------------------------------------------------*/
#include "dbg.h"
#include "contiki.h"
#include <ti/devices/DeviceFamily.h>
#include DeviceFamily_constructPath(driverlib/gpio.h)
#include DeviceFamily_constructPath(driverlib/ioc.h)
#include <stdint.h>
/*---------------------------------------------------------------------------*/
#endif /* DEBUG_UART_H_ */
#define gpio_hal_arch_init() do { /* do nothing */ } while (0)
#define gpio_hal_arch_interrupt_disable(p) IOCIntDisable(p)
#define gpio_hal_arch_pin_set_input(p) IOCPinTypeGpioInput(p)
#define gpio_hal_arch_pin_set_output(p) IOCPinTypeGpioOutput(p)
#define gpio_hal_arch_set_pin(p) GPIO_setDio(p)
#define gpio_hal_arch_clear_pin(p) GPIO_clearDio(p)
#define gpio_hal_arch_toggle_pin(p) GPIO_toggleDio(p)
#define gpio_hal_arch_write_pin(p, v) GPIO_writeDio(p, v)
#define gpio_hal_arch_set_pins(p) GPIO_setMultiDio(p)
#define gpio_hal_arch_clear_pins(p) GPIO_clearMultiDio(p)
#define gpio_hal_arch_toggle_pins(p) GPIO_toggleMultiDio(p)
#define gpio_hal_arch_write_pins(p, v) GPIO_writeMultiDio(p, v)
/*---------------------------------------------------------------------------*/
/** @} */
#endif /* GPIO_HAL_ARCH_H_ */
/*---------------------------------------------------------------------------*/
/**
* @}
* @}
*/

View File

@ -1,10 +1,11 @@
/*
* Copyright (c) 2014, Texas Instruments Incorporated - http://www.ti.com/
* Copyright (c) 2017, George Oikonomou - http://www.spd.gr
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
@ -32,32 +33,48 @@
* \addtogroup cc26xx
* @{
*
* \defgroup cc26xx-char-io CC13xx/CC26xx Character I/O
* \defgroup cc26xx-interrupts CC13xx-CC26xx master interrupt manipulation
*
* Master interrupt manipulation routines for the CC13xx and CC26xx CPUs
*
* CC13xx/CC26xx CPU-specific functions for debugging and SLIP I/O
* @{
*
* \file
* Header file for the CC13xx/CC26xx Debug I/O module
* Master interrupt manipulation implementation for the TI CC13xx/CC26xx
*/
#ifndef DBG_H_
#define DBG_H_
/*---------------------------------------------------------------------------*/
#include "contiki.h"
#include "sys/int-master.h"
/*---------------------------------------------------------------------------*/
/**
* \brief Print a stream of bytes
* \param seq A pointer to the stream
* \param len The number of bytes to print
* \return The number of printed bytes
*
* This function is an arch-specific implementation required by the dbg-io
* API in cpu/arm/common/dbg-io. It prints a stream of bytes over the
* peripheral used by the platform.
*/
unsigned int dbg_send_bytes(const unsigned char *seq, unsigned int len);
#include <ti/devices/DeviceFamily.h>
#include DeviceFamily_constructPath(driverlib/cpu.h)
#include <ti/drivers/dpl/HwiP.h>
/*---------------------------------------------------------------------------*/
#endif /* DBG_H_ */
void
int_master_enable(void)
{
HwiP_enable();
}
/*---------------------------------------------------------------------------*/
int_master_status_t
int_master_read_and_disable(void)
{
return HwiP_disable();
}
/*---------------------------------------------------------------------------*/
void
int_master_status_set(int_master_status_t status)
{
HwiP_restore(status);
}
/*---------------------------------------------------------------------------*/
bool
int_master_is_enabled(void)
{
return CPUprimask() ? false : true;
}
/*---------------------------------------------------------------------------*/
/**
* @}

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@ -43,6 +43,8 @@
#ifndef RF_COMMON_H_
#define RF_COMMON_H_
/*---------------------------------------------------------------------------*/
#include "contiki.h"
/*---------------------------------------------------------------------------*/
typedef enum {
CMD_RESULT_ERROR = 0,
CMD_RESULT_OK = 1,

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@ -44,7 +44,6 @@
/*---------------------------------------------------------------------------*/
#include <stdint.h>
#include <stdbool.h>
#include <assert.h>
/*---------------------------------------------------------------------------*/
#include "uart0-arch.h"
/*---------------------------------------------------------------------------*/
@ -91,7 +90,6 @@ uart0_init(void)
params.readReturnMode = UART_RETURN_NEWLINE;
gh_uart = UART_open(Board_UART0, &params);
assert(gh_uart != NULL);
}
/*---------------------------------------------------------------------------*/
int_fast32_t

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@ -53,6 +53,7 @@
#include <stdint.h>
/*---------------------------------------------------------------------------*/
#define gpio_hal_arch_init() do { /* do nothing */ } while (0)
#define gpio_hal_arch_interrupt_enable(p) interrupt_enable(p)
#define gpio_hal_arch_interrupt_disable(p) ti_lib_rom_ioc_int_disable(p)

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@ -52,12 +52,12 @@ extern "C" {
* Those values are not meant to be modified by the user
* @{
*/
#define LEDS_RED (1 << 0)
#define LEDS_GREEN (1 << 1)
#define LEDS_YELLOW LEDS_GREEN
#define LEDS_ORANGE LEDS_RED
#define LEDS_CONF_COUNT 2
#define LEDS_CONF_ALL (LEDS_RED | LEDS_GREEN)
#define LEDS_CONF_RED 0
#define LEDS_CONF_GREEN 1
#define LEDS_CONF_ALL ((1 << LEDS_CONF_COUNT) - 1)
/*---------------------------------------------------------------------------*/
/* These #defines allow us to reuse TI-RTOS across other device families */

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@ -37,66 +37,17 @@
*/
/*---------------------------------------------------------------------------*/
/* Contiki API */
#include <contiki.h>
#include <dev/leds.h>
#include "contiki.h"
#include "dev/leds.h"
/*---------------------------------------------------------------------------*/
/* Simplelink SDK API */
#include <Board.h>
#include <ti/drivers/PIN.h>
/*---------------------------------------------------------------------------*/
/* Standard library */
#include <stdbool.h>
#include <stdint.h>
/*---------------------------------------------------------------------------*/
static const PIN_Config pin_table[] = {
Board_PIN_LED0 | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL | PIN_DRVSTR_MAX,
Board_PIN_LED1 | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL | PIN_DRVSTR_MAX,
PIN_TERMINATE
const leds_t leds_arch_leds[] = {
{ .pin = Board_PIN_LED0, .negative_logic = false },
{ .pin = Board_PIN_LED1, .negative_logic = false },
};
static PIN_State pin_state;
static PIN_Handle pin_handle;
static volatile unsigned char c;
/*---------------------------------------------------------------------------*/
void
leds_arch_init(void)
{
static bool bHasInit = false;
if(bHasInit) {
return;
}
// PIN_init() called from Board_initGeneral()
pin_handle = PIN_open(&pin_state, pin_table);
if (!pin_handle) {
return;
}
bHasInit = true;
}
/*---------------------------------------------------------------------------*/
unsigned char
leds_arch_get(void)
{
return c;
}
/*---------------------------------------------------------------------------*/
void
leds_arch_set(unsigned char leds)
{
c = leds;
PIN_setPortOutputValue(pin_handle, 0);
if (leds & LEDS_RED) {
PIN_setOutputValue(pin_handle, Board_PIN_LED0, 1);
}
if (leds & LEDS_GREEN) {
PIN_setOutputValue(pin_handle, Board_PIN_LED1, 1);
}
}
/*---------------------------------------------------------------------------*/
/** @} */

View File

@ -71,6 +71,7 @@
#include "sys/rtimer.h"
#include "sys/node-id.h"
#include "sys/platform.h"
#include "dev/gpio-hal.h"
#include "dev/serial-line.h"
#include "dev/leds.h"
#include "net/mac/framer/frame802154.h"
@ -85,6 +86,7 @@
#include "button-sensor.h"
/*---------------------------------------------------------------------------*/
#include <stdio.h>
#include <string.h>
/*---------------------------------------------------------------------------*/
/* Log configuration */
#include "sys/log.h"
@ -107,13 +109,9 @@ fade(unsigned char l)
int j = k > 400 ? 800 - k : k;
leds_on(l);
for(i = 0; i < j; ++i) {
__asm("nop");
}
for(i = 0; i < j; ++i) { __asm("nop"); }
leds_off(l);
for(i = 0; i < 400 - j; ++i) {
__asm("nop");
}
for(i = 0; i < 400 - j; ++i) { __asm("nop"); }
}
}
/*---------------------------------------------------------------------------*/
@ -121,6 +119,7 @@ static void
set_rf_params(void)
{
uint8_t ext_addr[8];
memset(ext_addr, 0x0, sizeof(ext_addr));
ieee_addr_cpy_to(ext_addr, sizeof(ext_addr));
@ -140,9 +139,9 @@ platform_init_stage_one(void)
{
DRIVERLIB_ASSERT_CURR_RELEASE();
// Enable flash cache
/* Enable flash cache */
VIMSModeSet(VIMS_BASE, VIMS_MODE_ENABLED);
// Configure round robin arbitration and prefetching
/* Configure round robin arbitration and prefetching */
VIMSConfigure(VIMS_BASE, true, true);
Power_init();
@ -155,19 +154,20 @@ platform_init_stage_one(void)
/* Perform board-specific initialization */
Board_initHook();
// Contiki drivers init
/* Contiki drivers init */
gpio_hal_init();
leds_init();
fade(LEDS_RED);
// TI Drivers init
/* TI Drivers init */
I2C_init();
SPI_init();
UART_init();
fade(LEDS_GREEN);
// NoRTOS should be called last
/* NoRTOS should be called last */
NoRTOS_start();
}
/*---------------------------------------------------------------------------*/
@ -205,6 +205,9 @@ platform_init_stage_three(void)
ChipInfo_SupportsIEEE_802_15_4() ? "Yes" : "No",
ChipInfo_SupportsPROPRIETARY() ? "Yes" : "No",
ChipInfo_SupportsBLE() ? "Yes" : "No");
LOG_INFO("Operating frequency on %s\n",
(RF_CORE_MODE == RF_CORE_MODE_SUB_1_GHZ) ? "Sub-1 GHz" : "2.4 GHz");
LOG_INFO("RF: Channel %d, PANID 0x%04X\n", chan, pan);
LOG_INFO("Node ID: %d\n", g_nodeId);
@ -216,7 +219,7 @@ platform_init_stage_three(void)
void
platform_idle(void)
{
// Drop to some low power mode
/* Drop to some low power mode */
Power_idleFunc();
}
/*---------------------------------------------------------------------------*/

View File

@ -178,11 +178,10 @@ button_hal_init()
button_event_handler.handler = press_release_handler;
for(button = button_hal_buttons; *button != NULL; button++) {
cfg = GPIO_HAL_PIN_CFG_EDGE_BOTH | GPIO_HAL_PIN_CFG_INT_ENABLE |
(*button)->pull;
cfg = (*button)->pull;
gpio_hal_arch_pin_set_input((*button)->pin);
gpio_hal_arch_pin_cfg_set((*button)->pin, cfg);
gpio_hal_arch_interrupt_enable((*button)->pin);
gpio_hal_arch_interrupt_enable((*button)->pin, GPIO_HAL_PIN_CFG_INT_BOTH);
button_event_handler.pin_mask |= gpio_hal_pin_to_mask((*button)->pin);
}

View File

@ -75,6 +75,7 @@ void
gpio_hal_init()
{
list_init(handlers);
gpio_hal_arch_init();
}
/*---------------------------------------------------------------------------*/
#if GPIO_HAL_ARCH_SW_TOGGLE

View File

@ -82,7 +82,7 @@ typedef uint8_t gpio_hal_pin_t;
* A logical representation of a pin's configuration. It is an OR combination
* of GPIO_HAL_PIN_CFG_xyz macros.
*/
typedef uint8_t gpio_hal_pin_cfg_t;
typedef uint32_t gpio_hal_pin_cfg_t;
#ifdef GPIO_HAL_CONF_PIN_COUNT
#define GPIO_HAL_PIN_COUNT GPIO_HAL_CONF_PIN_COUNT
@ -101,21 +101,23 @@ typedef uint32_t gpio_hal_pin_mask_t;
typedef void (*gpio_hal_callback_t)(gpio_hal_pin_mask_t pin_mask);
/*---------------------------------------------------------------------------*/
#define GPIO_HAL_PIN_CFG_PULL_NONE 0x00
#define GPIO_HAL_PIN_CFG_PULL_UP 0x01
#define GPIO_HAL_PIN_CFG_PULL_DOWN 0x02
#define GPIO_HAL_PIN_CFG_PULL_MASK (GPIO_HAL_PIN_CFG_PULL_UP | \
GPIO_HAL_PIN_CFG_PULL_DOWN)
#define GPIO_HAL_PIN_CFG_PULL_NONE (0)
#define GPIO_HAL_PIN_CFG_PULL_UP (1 << 0)
#define GPIO_HAL_PIN_CFG_PULL_DOWN (1 << 1)
#define GPIO_HAL_PIN_CFG_EDGE_NONE 0x00
#define GPIO_HAL_PIN_CFG_EDGE_RISING 0x04
#define GPIO_HAL_PIN_CFG_EDGE_FALLING 0x08
#define GPIO_HAL_PIN_CFG_EDGE_BOTH (GPIO_HAL_PIN_CFG_EDGE_RISING | \
GPIO_HAL_PIN_CFG_EDGE_FALLING)
#define GPIO_HAL_PIN_CFG_PULL_MASK ( GPIO_HAL_PIN_CFG_PULL_UP \
| GPIO_HAL_PIN_CFG_PULL_DOWN \
)
#define GPIO_HAL_PIN_CFG_INT_DISABLE 0x00
#define GPIO_HAL_PIN_CFG_INT_ENABLE 0x80
#define GPIO_HAL_PIN_CFG_INT_MASK 0x80
#define GPIO_HAL_PIN_CFG_INT_DISABLE (0)
#define GPIO_HAL_PIN_CFG_INT_FALLING (1 << 2)
#define GPIO_HAL_PIN_CFG_INT_RISING (1 << 3)
#define GPIO_HAL_PIN_CFG_INT_BOTH (1 << 4)
#define GPIO_HAL_PIN_CFG_INT_MASK ( GPIO_HAL_PIN_CFG_INT_RISING \
| GPIO_HAL_PIN_CFG_INT_FALLING \
| GPIO_HAL_PIN_CFG_INT_BOTH \
)
/*---------------------------------------------------------------------------*/
/**
* \brief Datatype for GPIO event handlers
@ -233,6 +235,18 @@ void gpio_hal_event_handler(gpio_hal_pin_mask_t pins);
#include GPIO_HAL_CONF_ARCH_HDR_PATH
#endif /* GPIO_HAL_CONF_ARCH_HDR_PATH */
/*---------------------------------------------------------------------------*/
#ifndef gpio_hal_arch_init
/**
* \brief Perform architecture specific gpio initaliaztion
*
* It is the platform developer's responsibility to provide an implementation.
*
* The implementation can be provided as a global symbol, an inline function
* or a function-like macro, as described above.
*/
void gpio_hal_arch_init(void);
#endif
/*---------------------------------------------------------------------------*/
#ifndef gpio_hal_arch_interrupt_enable
/**
* \brief Enable interrupts for a gpio pin
@ -243,7 +257,7 @@ void gpio_hal_event_handler(gpio_hal_pin_mask_t pins);
* The implementation can be provided as a global symbol, an inline function
* or a function-like macro, as described above.
*/
void gpio_hal_arch_interrupt_enable(gpio_hal_pin_t pin);
void gpio_hal_arch_interrupt_enable(gpio_hal_pin_t pin, gpio_hal_pin_cfg_t cfg);
#endif
/*---------------------------------------------------------------------------*/
#ifndef gpio_hal_arch_interrupt_disable

View File

@ -84,7 +84,9 @@ timer_set(struct timer *t, clock_time_t interval)
void
timer_reset(struct timer *t)
{
t->start += t->interval;
if(timer_expired(t)) {
t->start += t->interval;
}
}
/*---------------------------------------------------------------------------*/
/**