Implement the GPIO HAL for CC13xx/CC26xx
This commit is contained in:
George Oikonomou
parent
565305d6c3
commit
d88c3d0c01
@ -99,6 +99,10 @@
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/* Path to headers with implementation of mutexes and memory barriers */
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#define MUTEX_CONF_ARCH_HEADER_PATH "mutex-cortex.h"
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#define MEMORY_BARRIER_CONF_ARCH_HEADER_PATH "memory-barrier-cortex.h"
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#define GPIO_HAL_CONF_ARCH_HDR_PATH "dev/gpio-hal-arch.h"
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/*---------------------------------------------------------------------------*/
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#define GPIO_HAL_CONF_ARCH_SW_TOGGLE 0
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/*---------------------------------------------------------------------------*/
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#endif /* CC13XX_CC26XX_DEF_H_ */
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/*---------------------------------------------------------------------------*/
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156
arch/cpu/cc26xx-cc13xx/dev/gpio-hal-arch.c
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156
arch/cpu/cc26xx-cc13xx/dev/gpio-hal-arch.c
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/*
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* Copyright (c) 2017, George Oikonomou - http://www.spd.gr
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*---------------------------------------------------------------------------*/
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/**
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* \addtogroup cc26xx-gpio-hal
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* @{
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*
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* \file
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* Implementation file for the CC13xx/CC26xx GPIO HAL functions
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*/
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/*---------------------------------------------------------------------------*/
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#include "contiki.h"
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#include "ti-lib.h"
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#include "ti-lib-rom.h"
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#include "dev/gpio-hal.h"
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#include <stdint.h>
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/*---------------------------------------------------------------------------*/
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#define CONFIG_MASK (IOC_IOPULL_M | IOC_INT_M | IOC_IOMODE_OPEN_SRC_INV)
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/*---------------------------------------------------------------------------*/
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void
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gpio_hal_arch_pin_cfg_set(gpio_hal_pin_t pin, gpio_hal_pin_cfg_t cfg)
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{
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uint32_t config;
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gpio_hal_pin_cfg_t tmp;
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/* Clear settings that we are about to change, keep everything else */
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config = ti_lib_rom_ioc_port_configure_get(pin);
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config &= ~CONFIG_MASK;
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tmp = cfg & GPIO_HAL_PIN_CFG_EDGE_BOTH;
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if(tmp == GPIO_HAL_PIN_CFG_EDGE_NONE) {
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config |= IOC_NO_EDGE;
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} else if(tmp == GPIO_HAL_PIN_CFG_EDGE_RISING) {
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config |= IOC_RISING_EDGE;
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} else if(tmp == GPIO_HAL_PIN_CFG_EDGE_FALLING) {
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config |= IOC_FALLING_EDGE;
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} else if(tmp == GPIO_HAL_PIN_CFG_EDGE_BOTH) {
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config |= IOC_BOTH_EDGES;
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}
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tmp = cfg & GPIO_HAL_PIN_CFG_PULL_MASK;
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if(tmp == GPIO_HAL_PIN_CFG_PULL_NONE) {
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config |= IOC_NO_IOPULL;
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} else if(tmp == GPIO_HAL_PIN_CFG_PULL_DOWN) {
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config |= IOC_IOPULL_DOWN;
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} else if(tmp == GPIO_HAL_PIN_CFG_PULL_UP) {
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config |= IOC_IOPULL_UP;
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}
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tmp = cfg & GPIO_HAL_PIN_CFG_INT_MASK;
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if(tmp == GPIO_HAL_PIN_CFG_INT_DISABLE) {
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config |= IOC_INT_DISABLE;
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} else if(tmp == GPIO_HAL_PIN_CFG_INT_ENABLE) {
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config |= IOC_INT_ENABLE;
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}
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ti_lib_rom_ioc_port_configure_set(pin, IOC_PORT_GPIO, config);
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}
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/*---------------------------------------------------------------------------*/
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gpio_hal_pin_cfg_t
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gpio_hal_arch_pin_cfg_get(gpio_hal_pin_t pin)
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{
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gpio_hal_pin_cfg_t cfg;
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uint32_t tmp;
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uint32_t config;
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cfg = 0;
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config = ti_lib_rom_ioc_port_configure_get(pin);
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/* Pull */
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tmp = config & IOC_IOPULL_M;
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if(tmp == IOC_IOPULL_UP) {
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cfg |= GPIO_HAL_PIN_CFG_PULL_UP;
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} else if(tmp == IOC_IOPULL_DOWN) {
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cfg |= GPIO_HAL_PIN_CFG_PULL_DOWN;
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} else if(tmp == IOC_NO_IOPULL) {
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cfg |= GPIO_HAL_PIN_CFG_PULL_NONE;
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}
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/* Interrupt enable/disable */
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tmp = config & IOC_INT_ENABLE;
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if(tmp == IOC_INT_DISABLE) {
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cfg |= GPIO_HAL_PIN_CFG_INT_DISABLE;
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} else if(tmp == IOC_INT_ENABLE) {
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cfg |= GPIO_HAL_PIN_CFG_INT_ENABLE;
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}
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/* Edge detection */
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tmp = config & IOC_BOTH_EDGES;
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if(tmp == IOC_NO_EDGE) {
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cfg |= GPIO_HAL_PIN_CFG_EDGE_NONE;
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} else if(tmp == IOC_FALLING_EDGE) {
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cfg |= GPIO_HAL_PIN_CFG_EDGE_FALLING;
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} else if(tmp == IOC_RISING_EDGE) {
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cfg |= GPIO_HAL_PIN_CFG_EDGE_RISING;
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} else if(tmp == IOC_BOTH_EDGES) {
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cfg |= GPIO_HAL_PIN_CFG_EDGE_BOTH;
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}
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return cfg;
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}
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/*---------------------------------------------------------------------------*/
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gpio_hal_pin_mask_t
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gpio_hal_arch_read_pins(gpio_hal_pin_mask_t pins)
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{
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gpio_hal_pin_mask_t oe_pins;
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/* For pins configured as output we need to read DOUT31_0 */
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oe_pins = ti_lib_gpio_get_output_enable_multi_dio(pins);
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pins &= ~oe_pins;
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return (HWREG(GPIO_BASE + GPIO_O_DOUT31_0) & oe_pins) |
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ti_lib_gpio_read_multi_dio(pins);
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}
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/*---------------------------------------------------------------------------*/
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uint8_t
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gpio_hal_arch_read_pin(gpio_hal_pin_t pin)
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{
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if(ti_lib_gpio_get_output_enable_dio(pin)) {
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return (HWREG(GPIO_BASE + GPIO_O_DOUT31_0) >> pin) & 1;
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}
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return ti_lib_gpio_read_dio(pin);
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}
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/*---------------------------------------------------------------------------*/
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/** @} */
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84
arch/cpu/cc26xx-cc13xx/dev/gpio-hal-arch.h
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84
arch/cpu/cc26xx-cc13xx/dev/gpio-hal-arch.h
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@ -0,0 +1,84 @@
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/*
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* Copyright (c) 2017, George Oikonomou - http://www.spd.gr
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
|
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*---------------------------------------------------------------------------*/
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/**
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* \addtogroup cc26xx
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* @{
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*
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* \defgroup cc26xx-gpio-hal CC13xx/CC26xx GPIO HAL implementation
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*
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* @{
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*
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* \file
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* Header file for the CC13xx/CC26xx GPIO HAL functions
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*
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* \note
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* Do not include this header directly
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*/
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/*---------------------------------------------------------------------------*/
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#ifndef GPIO_HAL_ARCH_H_
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#define GPIO_HAL_ARCH_H_
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/*---------------------------------------------------------------------------*/
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#include "contiki.h"
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#include "ti-lib.h"
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#include "ti-lib-rom.h"
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#include <stdint.h>
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/*---------------------------------------------------------------------------*/
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#define gpio_hal_arch_interrupt_enable(p) interrupt_enable(p)
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#define gpio_hal_arch_interrupt_disable(p) ti_lib_rom_ioc_int_disable(p)
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#define gpio_hal_arch_pin_set_input(p) ti_lib_rom_ioc_pin_type_gpio_input(p)
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#define gpio_hal_arch_pin_set_output(p) ti_lib_rom_ioc_pin_type_gpio_output(p)
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#define gpio_hal_arch_set_pin(p) ti_lib_gpio_set_dio(p)
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#define gpio_hal_arch_clear_pin(p) ti_lib_gpio_clear_dio(p)
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#define gpio_hal_arch_toggle_pin(p) ti_lib_gpio_toggle_dio(p)
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#define gpio_hal_arch_write_pin(p, v) ti_lib_gpio_write_dio(p, v)
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#define gpio_hal_arch_set_pins(p) ti_lib_gpio_set_multi_dio(p)
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#define gpio_hal_arch_clear_pins(p) ti_lib_gpio_clear_multi_dio(p)
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#define gpio_hal_arch_toggle_pins(p) ti_lib_gpio_toggle_multi_dio(p)
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#define gpio_hal_arch_write_pins(p, v) ti_lib_gpio_write_multi_dio(p, v)
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/*---------------------------------------------------------------------------*/
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static inline void
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interrupt_enable(gpio_hal_pin_t pin)
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{
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ti_lib_gpio_clear_event_dio(pin);
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ti_lib_rom_ioc_int_enable(pin);
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}
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/*---------------------------------------------------------------------------*/
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#endif /* GPIO_HAL_ARCH_H_ */
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/*---------------------------------------------------------------------------*/
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/**
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* @}
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* @}
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*/
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