From ddd451a19bfc4609baba6a143af9ef19f118f5c4 Mon Sep 17 00:00:00 2001 From: Edvard Pettersen Date: Mon, 5 Feb 2018 17:18:08 +0100 Subject: [PATCH] Compiling example of dummy simplelink platform --- Makefile.identify-target | 2 + Makefile.include | 20 +- arch/cpu/arm/cortex-m/cm4/Makefile.cm4 | 21 +- arch/cpu/simplelink/Makefile.cc26x0_cc13x0 | 112 ++++++++++ arch/cpu/simplelink/Makefile.cc26x2_cc13x2 | 14 ++ arch/cpu/simplelink/Makefile.simplelink | 75 +++++++ .../cc26x0_cc13x0/cc13x0-cc26x0-cm3.h | 128 +++++++++++ .../simplelink/cc26x0_cc13x0/simplelink-def.h | 104 +++++++++ .../cc26x2_cc13x2/cc13x0-cc26x0-cm4.h | 128 +++++++++++ .../simplelink/cc26x2_cc13x2/simplelink-def.h | 104 +++++++++ arch/cpu/simplelink/rtimer-arch.h | 72 ++++++ arch/cpu/simplelink/simplelink-conf.h | 76 +++++++ arch/platform/simplelink/Makefile.simplelink | 29 +-- arch/platform/simplelink/contiki-conf.h | 29 +-- arch/platform/simplelink/platform.c | 211 ++++++++++++++++++ 15 files changed, 1066 insertions(+), 59 deletions(-) create mode 100644 arch/cpu/simplelink/Makefile.cc26x0_cc13x0 create mode 100644 arch/cpu/simplelink/Makefile.cc26x2_cc13x2 create mode 100644 arch/cpu/simplelink/Makefile.simplelink create mode 100644 arch/cpu/simplelink/cc26x0_cc13x0/cc13x0-cc26x0-cm3.h create mode 100644 arch/cpu/simplelink/cc26x0_cc13x0/simplelink-def.h create mode 100644 arch/cpu/simplelink/cc26x2_cc13x2/cc13x0-cc26x0-cm4.h create mode 100644 arch/cpu/simplelink/cc26x2_cc13x2/simplelink-def.h create mode 100644 arch/cpu/simplelink/rtimer-arch.h create mode 100644 arch/cpu/simplelink/simplelink-conf.h create mode 100644 arch/platform/simplelink/platform.c diff --git a/Makefile.identify-target b/Makefile.identify-target index 86e06c093..22b897421 100644 --- a/Makefile.identify-target +++ b/Makefile.identify-target @@ -11,4 +11,6 @@ ifeq ($(TARGET),) else ${info using saved target '$(TARGET)'} endif +else + ${info using set target '$(TARGET)'} endif diff --git a/Makefile.include b/Makefile.include index c3ce40f49..5be3ea932 100644 --- a/Makefile.include +++ b/Makefile.include @@ -39,13 +39,15 @@ ifdef CI endif endif -OBJECTDIR = obj_$(TARGET) +OBJECTDIR := obj_$(TARGET) -LOWERCASE = -abcdefghijklmnopqrstuvwxyz/ -UPPERCASE = _ABCDEFGHIJKLMNOPQRSTUVWXYZ_ +LOWERCASE := -abcdefghijklmnopqrstuvwxyz/ +UPPERCASE := _ABCDEFGHIJKLMNOPQRSTUVWXYZ_ TARGET_UPPERCASE := ${strip ${shell echo $(TARGET) | sed y!$(LOWERCASE)!$(UPPERCASE)!}} -CFLAGS += -DCONTIKI=1 -DCONTIKI_TARGET_$(TARGET_UPPERCASE)=1 +CFLAGS += -DCONTIKI=1 +CFLAGS += -DCONTIKI_TARGET_$(TARGET_UPPERCASE)=1 CFLAGS += -DCONTIKI_TARGET_STRING=\"$(TARGET)\" + ifneq ($(BOARD),) TARGET_BOARD_UPPERCASE := ${strip ${shell echo $(BOARD) | sed y!$(LOWERCASE)!$(UPPERCASE)!}} CFLAGS += -DCONTIKI_BOARD_$(TARGET_BOARD_UPPERCASE)=1 @@ -479,6 +481,7 @@ endif # Cancel the predefined implict rule for compiling and linking # a single C source into a binary to force GNU make to consider # the match-anything rule below instead. +<<<<<<< HEAD %: %.c ifeq ($(PLATFORM_ACTION),skip) @@ -493,3 +496,12 @@ else %: %.$(TARGET) @ endif +======= +#%: %.c +# +## Match-anything pattern rule to allow the project makefiles to +## abstract from the actual binary name. It needs to contain some +## command in order to be a rule, not just a prerequisite. +#%: %.$(TARGET) +# @echo "match anything rule" +>>>>>>> Compiling example of dummy simplelink platform diff --git a/arch/cpu/arm/cortex-m/cm4/Makefile.cm4 b/arch/cpu/arm/cortex-m/cm4/Makefile.cm4 index 1f3cdd00b..02e9e5648 100644 --- a/arch/cpu/arm/cortex-m/cm4/Makefile.cm4 +++ b/arch/cpu/arm/cortex-m/cm4/Makefile.cm4 @@ -1,13 +1,26 @@ CONTIKI_ARM_DIRS += cortex-m/cm4 CFLAGS += -mcpu=cortex-m4 -LDFLAGS += -mcpu=cortex-m4 + +LDFLAGS += -mcpu=cortex-m4 -nostartfiles +LDFLAGS += -T $(LDSCRIPT) +LDFLAGS += -Wl,--gc-sections,--sort-section=alignment +LDFLAGS += -Wl,-Map=$(@:.elf=-$(TARGET).map),--cref,--no-warn-mismatch + +OBJCOPY_FLAGS += --gap-fill 0xff + +### Build syscalls for newlib +MODULES += os/lib/newlib + +CPU_STARTFILES := ${addprefix $(OBJECTDIR)/,${call oname, $(CPU_START_SOURCEFILES)}} ### Compilation rules -CUSTOM_RULE_LINK=1 +CUSTOM_RULE_LINK = 1 -%.elf: $(TARGET_STARTFILES) %.o $(PROJECT_OBJECTFILES) $(PROJECT_LIBRARIES) $(CONTIKI_NG_TARGET_LIB) $(TARGET_LIBS) +.SECONDEXPANSION: + +%.elf: $(CPU_STARTFILES) $$(CONTIKI_OBJECTFILES) %.o $(PROJECT_OBJECTFILES) $(PROJECT_LIBRARIES) $(TARGET_LIBS) $(CONTIKI_NG_TARGET_LIB) $(TRACE_LD) - $(Q)$(CC) $(LDFLAGS) ${filter %.o %.a,$^} -o $@ + $(Q)$(LD) $(LDFLAGS) ${filter %.o %.a,$^} $(TARGET_LIBS) -o $@ include $(CONTIKI)/arch/cpu/arm/cortex-m/Makefile.cortex-m diff --git a/arch/cpu/simplelink/Makefile.cc26x0_cc13x0 b/arch/cpu/simplelink/Makefile.cc26x0_cc13x0 new file mode 100644 index 000000000..707d20722 --- /dev/null +++ b/arch/cpu/simplelink/Makefile.cc26x0_cc13x0 @@ -0,0 +1,112 @@ + +CPU_ABS_PATH = arch/cpu/simplelink + +TI_XXWARE := $(CONTIKI_CPU)/$(TI_XXWARE_PATH) + +### cc26xxware sources under driverlib will be added to the MODULES list +TI_XXWARE_SRC = $(CPU_ABS_PATH)/$(TI_XXWARE_PATH)/driverlib + +### The directory with startup sources will be added to the CONTIKI_CPU_DIRS +### and the sources therein are added to the sources list explicitly. They are +### also listed explicitly in the linker command (through TARGET_STARTFILES), +### to make sure they always get linked in the image +TI_XXWARE_STARTUP_DIR = $(TI_XXWARE_PATH)/startup_files +TI_XXWARE_STARTUP_SRCS = ccfg.c startup_gcc.c + +### MODULES will add some of these to the include path, but we need to add +### them earlier to prevent filename clashes with Contiki core files +CFLAGS += -I$(TI_XXWARE) -I$(CONTIKI)/$(TI_XXWARE_SRC) +CFLAGS += -I$(TI_XXWARE)/inc +MODULES += $(TI_XXWARE_SRC) + +LDSCRIPT = $(CONTIKI_CPU)/cc26xx.ld + +### If the user-specified a Node ID, pass a define +ifdef NODEID + CFLAGS += -DIEEE_ADDR_NODE_ID=$(NODEID) +endif + +### CPU-dependent directories +CPU_DIRS := dev rf-core rf-core/api $(TI_XXWARE_STARTUP_DIR) +CPU_DIRS_EXPAND := $(realpath $(addprefix $(BASE_DIR)/, $(CPU_DIRS))) + +CONTIKI_ARM_DIRS := $(CONTIKI_ARM_DIRS) $(CPU_DIRS) +CONTIKI_CPU_DIRS := $(CONTIKI_CPU_DIRS) $(CPU_DIRS_EXPAND) + +### CPU-dependent source files +CONTIKI_CPU_SOURCEFILES += clock.c rtimer-arch.c soc-rtc.c uart.c +CONTIKI_CPU_SOURCEFILES += contiki-watchdog.c aux-ctrl.c +CONTIKI_CPU_SOURCEFILES += putchar.c ieee-addr.c batmon-sensor.c adc-sensor.c +CONTIKI_CPU_SOURCEFILES += slip-arch.c slip.c cc26xx-uart.c lpm.c +CONTIKI_CPU_SOURCEFILES += gpio-interrupt.c oscillators.c +CONTIKI_CPU_SOURCEFILES += rf-core.c rf-ble.c ieee-mode.c +CONTIKI_CPU_SOURCEFILES += random.c soc-trng.c int-master.c + +DEBUG_IO_SOURCEFILES += dbg-printf.c dbg-snprintf.c dbg-sprintf.c strformat.c + +CONTIKI_SOURCEFILES += $(CONTIKI_CPU_SOURCEFILES) $(DEBUG_IO_SOURCEFILES) + +CPU_START_SOURCEFILES += fault-handlers.c $(TI_XXWARE_STARTUP_SRCS) + +PYTHON = python +BSL_FLAGS += -e -w -v + +ifdef PORT + BSL_FLAGS += -p $(PORT) +endif + +BSL = $(CONTIKI)/tools/cc2538-bsl/cc2538-bsl.py + +### Always re-build ieee-addr.o in case the command line passes a new NODEID +FORCE: + +$(OBJECTDIR)/ieee-addr.o: ieee-addr.c FORCE | $(OBJECTDIR) + $(TRACE_CC) + $(Q)$(CC) $(CFLAGS) -c $< -o $@ + +### Always re-build ccfg.c so changes to ccfg-conf.h will apply without having +### to make clean first +$(OBJECTDIR)/ccfg.o: ccfg.c FORCE | $(OBJECTDIR) + $(TRACE_CC) + $(Q)$(CC) $(CFLAGS) -include "ccxxware-conf.h" -c $< -o $@ + +# a target that gives a user-friendly memory profile, taking into account the RAM +# that is statically occupied by the stack as defined in the linker script +# see $(LDSCRIPT) +RAM_SIZE = 0x00003E00 +FLASH_SIZE = 0x0001E000 +STACK_SIZE = 0 +%.size: %.$(TARGET) + @$(SIZE) -A $< | egrep "data|bss" | awk '{s+=$$2} END {s=s+$(STACK_SIZE); f=$(RAM_SIZE)-s; printf "[RAM] used %6d, free %6d\n",s,f;}' + @$(SIZE) -A $< | egrep "text|isr_vector" | awk '{s+=$$2} END {f=$(FLASH_SIZE)-s; printf "[Flash] used %6d, free %6d\n",s,f;}' + +ifeq ($(BOARD_SUPPORTS_BSL),1) +%.upload: %.bin +ifeq ($(wildcard $(BSL)), ) + @echo "ERROR: Could not find the cc2538-bsl script. Did you run 'git submodule update --init' ?" +else + $(PYTHON) $(BSL) $(BSL_FLAGS) $< +endif +else +%.upload: + @echo "This board cannot be programmed through the ROM bootloader and therefore does not support the .upload target." +endif + +# Check if we are running under Windows +ifeq ($(HOST_OS),Windows) + SERIALDUMP ?= $(CONTIKI)/tools/sky/serialdump-windows +else +ifeq ($(HOST_OS),Darwin) + SERIALDUMP ?= $(CONTIKI)/tools/sky/serialdump-macos +else + # Else assume Linux + SERIALDUMP ?= $(CONTIKI)/tools/sky/serialdump-linux +endif +endif + +UART_BAUDRATE = 115200 + +login: + $(SERIALDUMP) -b$(UART_BAUDRATE) $(PORT) + +include $(CONTIKI)/arch/cpu/arm/cortex-m/cm3/Makefile.cm3 diff --git a/arch/cpu/simplelink/Makefile.cc26x2_cc13x2 b/arch/cpu/simplelink/Makefile.cc26x2_cc13x2 new file mode 100644 index 000000000..3fe18edf2 --- /dev/null +++ b/arch/cpu/simplelink/Makefile.cc26x2_cc13x2 @@ -0,0 +1,14 @@ + +SDK_DRIVERLIB_BIN := $(SDK_DRIVERLIB)/bin/gcc + +ifeq "$(SIMPLELINK_DEVICE)" "cc13x2" +CFLAGS += -DDeviceFamily_CC13X2 +else +CFLAGS += -DDeviceFamily_CC26X2 +endif + +CFLAGS += -I$(CPU_ABS_PATH)/cc26x2_cc13x2 + +TARGET_LIBFILES += $(SDK_DRIVERLIB_BIN)/driverlib.lib + +include $(CONTIKI)/arch/cpu/arm/cortex-m/cm4/Makefile.cm4 diff --git a/arch/cpu/simplelink/Makefile.simplelink b/arch/cpu/simplelink/Makefile.simplelink new file mode 100644 index 000000000..4904ba446 --- /dev/null +++ b/arch/cpu/simplelink/Makefile.simplelink @@ -0,0 +1,75 @@ + +CPU_ABS_PATH = $(CONTIKI)/arch/cpu/simplelink + +SDK_SOURCE := $(SIMPLELINK_SDK)/source +# TODO fix switch +SDK_DEVICES := $(SDK_SOURCE)/ti/devices +SDK_DEVICE := $(shell ls $(SDK_DEVICES) | grep $(SIMPLELINK_DEVICE)) +SDK_DEVICE_SOURCE := $(SDK_SOURCE)/ti/devices/$(SDK_DEVICE) +SDK_DRIVERLIB := $(SDK_DEVICE_SOURCE)/driverlib +SDK_BOARDS := $(SDK_SOURCE)/ti/boards +SDK_STARTUP := $(SDK_DEVICE_SOURCE)/startup_files +SDK_STARTUP_SRCS = ccfg.c startup_gcc.c + +EXTERNALDIRS += $(SDK_STARTUP) + +### MODULES will add some of these to the include path, but we need to add +### them earlier to prevent filename clashes with Contiki core files +CFLAGS += -I$(CPU_ABS_PATH) +CFLAGS += -I$(SDK_SOURCE) +CFLAGS += -I$(SDK_DEVICE_SOURCE) +CFLAGS += -I$(SDK_DEVICE_SOURCE)/inc + +LDSCRIPT = $(SDK_BOARDS)/$(SIMPLELINK_BOARD)/$(SIMPLELINK_BOARD)_NoRTOS.lds + +### If the user-specified a Node ID, pass a define +ifdef NODEID + CFLAGS += -DIEEE_ADDR_NODE_ID=$(NODEID) +endif + +### CPU-dependent directories +CONTIKI_ARM_DIRS += . common/dbg-io +CONTIKI_CPU_DIRS += . $(addprefix ../arm/, $(CPU_DIRS)) + +### CPU-dependent source files +# CONTIKI_CPU_SOURCEFILES += clock.c rtimer-arch.c soc-rtc.c uart.c +# CONTIKI_CPU_SOURCEFILES += contiki-watchdog.c aux-ctrl.c +# CONTIKI_CPU_SOURCEFILES += putchar.c ieee-addr.c batmon-sensor.c adc-sensor.c +# CONTIKI_CPU_SOURCEFILES += slip-arch.c slip.c cc26xx-uart.c lpm.c +# CONTIKI_CPU_SOURCEFILES += gpio-interrupt.c oscillators.c +# CONTIKI_CPU_SOURCEFILES += rf-core.c rf-ble.c ieee-mode.c +# CONTIKI_CPU_SOURCEFILES += random.c soc-trng.c int-master.c + +# DEBUG_IO_SOURCEFILES += dbg-printf.c dbg-snprintf.c dbg-sprintf.c strformat.c + +CONTIKI_SOURCEFILES += $(CONTIKI_CPU_SOURCEFILES) $(DEBUG_IO_SOURCEFILES) + +CPU_START_SOURCEFILES += $(SDK_STARTUP_SRCS) + +### Always re-build ieee-addr.o in case the command line passes a new NODEID +FORCE: + +$(OBJECTDIR)/ieee-addr.o: ieee-addr.c FORCE | $(OBJECTDIR) + $(TRACE_CC) + $(Q)$(CC) $(CFLAGS) -c $< -o $@ + +### Always re-build ccfg.c so changes to ccfg-conf.h will apply without having +### to make clean first +$(OBJECTDIR)/ccfg.o: ccfg.c FORCE | $(OBJECTDIR) + $(TRACE_CC) + $(Q)$(CC) $(CFLAGS) -include "simplelink-conf.h" -c $< -o $@ + +RAM_SIZE = 0x00003E00 +FLASH_SIZE = 0x0001E000 +STACK_SIZE = 0 +%.size: %.$(TARGET) + @$(SIZE) -A $< | egrep "data|bss" | awk '{s+=$$2} END {s=s+$(STACK_SIZE); f=$(RAM_SIZE)-s; printf "[RAM] used %6d, free %6d\n",s,f;}' + @$(SIZE) -A $< | egrep "text|isr_vector" | awk '{s+=$$2} END {f=$(FLASH_SIZE)-s; printf "[Flash] used %6d, free %6d\n",s,f;}' + +UART_BAUDRATE = 115200 + +login: + $(SERIALDUMP) -b$(UART_BAUDRATE) $(PORT) + +# TODO fix switch +include $(CPU_ABS_PATH)/Makefile.cc26x2_cc13x2 diff --git a/arch/cpu/simplelink/cc26x0_cc13x0/cc13x0-cc26x0-cm3.h b/arch/cpu/simplelink/cc26x0_cc13x0/cc13x0-cc26x0-cm3.h new file mode 100644 index 000000000..bda2e2b07 --- /dev/null +++ b/arch/cpu/simplelink/cc26x0_cc13x0/cc13x0-cc26x0-cm3.h @@ -0,0 +1,128 @@ +/* + * Template: + * Copyright (c) 2012 ARM LIMITED + * All rights reserved. + * + * CC13xx-CC26xx: + * Copyright (c) 2017, George Oikonomou - http://www.spd.gr + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/*---------------------------------------------------------------------------*/ +/** + * \addtogroup cc26xx + * @{ + * + * \defgroup cc26xx-cm3 CC13xx/CC26xx CMSIS + * + * CC13xx/CC26xx Cortex-M3 CMSIS definitions + * @{ + * + * \file + * CMSIS Cortex-M3 core peripheral access layer header file for CC13xx/CC26xx + */ +/*---------------------------------------------------------------------------*/ +#ifndef CC13XX_CC26XX_CM3_H_ +#define CC13XX_CC26XX_CM3_H_ +/*---------------------------------------------------------------------------*/ +/** + * \name Interrupt Number Definition + * @{ + */ +typedef enum cc13xx_cc26xx_cm3_irq_e { + /* Cortex-M3 Processor Exceptions */ + CC13XX_CC26XX_CM3_EXCEPTION_RESET = -15, /**< 1 Reset */ + CC13XX_CC26XX_CM3_EXCEPTION_NMI = -14, /**< 2 NMI */ + CC13XX_CC26XX_CM3_EXCEPTION_HARD_FAULT = -13, /**< 3 Hard fault */ + CC13XX_CC26XX_CM3_EXCEPTION_MPU_FAULT = -12, /**< 4 MPU fault */ + CC13XX_CC26XX_CM3_EXCEPTION_BUS_FAULT = -11, /**< 5 Bus fault */ + CC13XX_CC26XX_CM3_EXCEPTION_USAGE_FAULT = -10, /**< 6 Usage fault */ + CC13XX_CC26XX_CM3_EXCEPTION_SV_CALL = -5, /**< 11 SVCall */ + CC13XX_CC26XX_CM3_EXCEPTION_DEBUG_MON = -4, /**< 12 Debug monitor */ + CC13XX_CC26XX_CM3_EXCEPTION_PEND_SV = -2, /**< 14 PendSV */ + CC13XX_CC26XX_CM3_EXCEPTION_SYS_TICK = -1, /**< 15 SysTick */ + + /* CC13xx/CC26xx interrupts */ + CC13XX_CC26XX_CM3_IRQ_EDGE_DETECT = 0, /**< 16 AON edge detect */ + CC13XX_CC26XX_CM3_EXCEPTION_I2C = 1, /**< 17 I2C */ + CC13XX_CC26XX_CM3_EXCEPTION_RF_CPE1 = 2, /**< 18 RF Command and Packet Engine 1 */ + CC13XX_CC26XX_CM3_EXCEPTION_AON_SPI_SLAVE = 3, /**< 19 AON SpiSplave Rx, Tx and CS */ + CC13XX_CC26XX_CM3_EXCEPTION_AON_RTC = 4, /**< 20 AON RTC */ + CC13XX_CC26XX_CM3_EXCEPTION_UART0 = 5, /**< 21 UART0 Rx and Tx */ + CC13XX_CC26XX_CM3_EXCEPTION_AON_AUX_SWEV0 = 6, /**< 22 Sensor Controller software event 0, through AON domain*/ + CC13XX_CC26XX_CM3_EXCEPTION_SSI0 = 7, /**< 23 SSI0 Rx and Tx */ + CC13XX_CC26XX_CM3_EXCEPTION_SSI1 = 8, /**< 24 SSI1 Rx and Tx */ + CC13XX_CC26XX_CM3_EXCEPTION_RF_CPE0 = 9, /**< 25 RF Command and Packet Engine 0 */ + CC13XX_CC26XX_CM3_EXCEPTION_RF_HW = 10, /**< 26 RF Core Hardware */ + CC13XX_CC26XX_CM3_EXCEPTION_RF_CMD_ACK = 11, /**< 27 RF Core Command Acknowledge */ + CC13XX_CC26XX_CM3_EXCEPTION_I2S = 12, /**< 28 I2S */ + CC13XX_CC26XX_CM3_EXCEPTION_AON_AUX_SWEV1 = 13, /**< 29 Sensor Controller software event 1, through AON domain*/ + CC13XX_CC26XX_CM3_EXCEPTION_WATCHDOG = 14, /**< 30 Watchdog timer */ + CC13XX_CC26XX_CM3_EXCEPTION_GPTIMER_0A = 15, /**< 31 Timer 0 subtimer A */ + CC13XX_CC26XX_CM3_EXCEPTION_GPTIMER_0B = 16, /**< 32 Timer 0 subtimer B */ + CC13XX_CC26XX_CM3_EXCEPTION_GPTIMER_1A = 17, /**< 33 Timer 1 subtimer A */ + CC13XX_CC26XX_CM3_EXCEPTION_GPTIMER_1B = 18, /**< 34 Timer 1 subtimer B */ + CC13XX_CC26XX_CM3_EXCEPTION_GPTIMER_2A = 19, /**< 35 Timer 2 subtimer A */ + CC13XX_CC26XX_CM3_EXCEPTION_GPTIMER_2B = 20, /**< 36 Timer 2 subtimer B */ + CC13XX_CC26XX_CM3_EXCEPTION_GPTIMER_3A = 21, /**< 37 Timer 3 subtimer A */ + CC13XX_CC26XX_CM3_EXCEPTION_GPTIMER_3B = 22, /**< 38 Timer 3 subtimer B */ + CC13XX_CC26XX_CM3_EXCEPTION_CRYPTO = 23, /**< 39 Crypto Core Result available */ + CC13XX_CC26XX_CM3_EXCEPTION_UDMA = 24, /**< 40 uDMA Software */ + CC13XX_CC26XX_CM3_EXCEPTION_UDMA_ERR = 25, /**< 41 uDMA Error */ + CC13XX_CC26XX_CM3_EXCEPTION_FLASH_CTRL = 26, /**< 42 Flash controller */ + CC13XX_CC26XX_CM3_EXCEPTION_SW0 = 27, /**< 43 Software Event 0 */ + CC13XX_CC26XX_CM3_EXCEPTION_AUX_COM_EVENT = 28, /**< 44 AUX combined event, directly to MCU domain*/ + CC13XX_CC26XX_CM3_EXCEPTION_AON_PRG0 = 29, /**< 45 AON programmable 0 */ + CC13XX_CC26XX_CM3_EXCEPTION_PROG = 30, /**< 46 Dynamic Programmable interrupt (default source: PRCM)*/ + CC13XX_CC26XX_CM3_EXCEPTION_AUX_COMPA = 31, /**< 47 AUX Comparator A */ + CC13XX_CC26XX_CM3_EXCEPTION_AUX_ADC = 32, /**< 48 AUX ADC IRQ */ + CC13XX_CC26XX_CM3_EXCEPTION_TRNG = 33, /**< 49 TRNG event */ +} cc13xx_cc26xx_cm3_irq_t; + +typedef cc13xx_cc26xx_cm3_irq_t IRQn_Type; + +#define SysTick_IRQn CC13XX_CC26XX_CM3_EXCEPTION_SYS_TICK +/** @} */ +/*---------------------------------------------------------------------------*/ +/** \name Processor and Core Peripheral Section + * @{ + */ +/* Configuration of the Cortex-M3 Processor and Core Peripherals */ +#define __MPU_PRESENT 1 /**< MPU present or not */ +#define __NVIC_PRIO_BITS 3 /**< Number of Bits used for Priority Levels */ +#define __Vendor_SysTickConfig 0 /**< Set to 1 if different SysTick Config is used */ +/** @} */ +/*---------------------------------------------------------------------------*/ +#include "core_cm3.h" /* Cortex-M3 processor and core peripherals */ +/*---------------------------------------------------------------------------*/ +#endif /* CC13XX_CC26XX_CM3_H_ */ +/*---------------------------------------------------------------------------*/ +/** + * @} + * @} + */ diff --git a/arch/cpu/simplelink/cc26x0_cc13x0/simplelink-def.h b/arch/cpu/simplelink/cc26x0_cc13x0/simplelink-def.h new file mode 100644 index 000000000..40785b20c --- /dev/null +++ b/arch/cpu/simplelink/cc26x0_cc13x0/simplelink-def.h @@ -0,0 +1,104 @@ +/* + * Copyright (c) 2017, George Oikonomou - http://www.spd.gr + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/*---------------------------------------------------------------------------*/ +#ifndef CC13XX_CC26XX_DEF_H_ +#define CC13XX_CC26XX_DEF_H_ +/*---------------------------------------------------------------------------*/ +#include "cm4/cm4-def.h" +/*---------------------------------------------------------------------------*/ +/* TSCH related defines */ + +/* Delay between GO signal and SFD */ +#define RADIO_DELAY_BEFORE_TX ((unsigned)US_TO_RTIMERTICKS(81)) +/* Delay between GO signal and start listening. + * This value is so small because the radio is constantly on within each timeslot. */ +#define RADIO_DELAY_BEFORE_RX ((unsigned)US_TO_RTIMERTICKS(15)) +/* Delay between the SFD finishes arriving and it is detected in software. */ +#define RADIO_DELAY_BEFORE_DETECT ((unsigned)US_TO_RTIMERTICKS(352)) + +/* Timer conversion; radio is running at 4 MHz */ +#define RADIO_TIMER_SECOND 4000000u +#if (RTIMER_SECOND % 256) || (RADIO_TIMER_SECOND % 256) +#error RADIO_TO_RTIMER macro must be fixed! +#endif +#define RADIO_TO_RTIMER(X) ((uint32_t)(((uint64_t)(X) * (RTIMER_SECOND / 256)) / (RADIO_TIMER_SECOND / 256))) +#define USEC_TO_RADIO(X) ((X) * 4) + +/* The PHY header (preamble + SFD, 4+1 bytes) duration is equivalent to 10 symbols */ +#define RADIO_IEEE_802154_PHY_HEADER_DURATION_USEC 160 + +/* Do not turn off TSCH within a timeslot: not enough time */ +#define TSCH_CONF_RADIO_ON_DURING_TIMESLOT 1 + +/* Disable TSCH frame filtering */ +#define TSCH_CONF_HW_FRAME_FILTERING 0 + +/* Use hardware timestamps */ +#ifndef TSCH_CONF_RESYNC_WITH_SFD_TIMESTAMPS +#define TSCH_CONF_RESYNC_WITH_SFD_TIMESTAMPS 1 +#define TSCH_CONF_TIMESYNC_REMOVE_JITTER 0 +#endif + +#ifndef TSCH_CONF_BASE_DRIFT_PPM +/* The drift compared to "true" 10ms slots. + * Enable adaptive sync to enable compensation for this. + * Slot length 10000 usec + * 328 ticks + * Tick duration 30.517578125 usec + * Real slot duration 10009.765625 usec + * Target - real duration = -9.765625 usec + * TSCH_CONF_BASE_DRIFT_PPM -977 + */ +#define TSCH_CONF_BASE_DRIFT_PPM -977 +#endif + +/* 10 times per second */ +#ifndef TSCH_CONF_CHANNEL_SCAN_DURATION +#define TSCH_CONF_CHANNEL_SCAN_DURATION (CLOCK_SECOND / 10) +#endif + +/* Slightly reduce the TSCH guard time (from 2200 usec to 1800 usec) to make sure + * the CC26xx radio has sufficient time to start up. */ +#ifndef TSCH_CONF_RX_WAIT +#define TSCH_CONF_RX_WAIT 1800 +#endif +/*---------------------------------------------------------------------------*/ +#define RTIMER_ARCH_SECOND 65536 +/*---------------------------------------------------------------------------*/ +/* Path to CMSIS header */ +#define CMSIS_CONF_HEADER_PATH "cc13x0-cc26x0-cm3.h" + +/* Path to headers with implementation of mutexes and memory barriers */ +#define MUTEX_CONF_ARCH_HEADER_PATH "mutex-cortex.h" +#define MEMORY_BARRIER_CONF_ARCH_HEADER_PATH "memory-barrier-cortex.h" +/*---------------------------------------------------------------------------*/ +#endif /* CC13XX_CC26XX_DEF_H_ */ +/*---------------------------------------------------------------------------*/ diff --git a/arch/cpu/simplelink/cc26x2_cc13x2/cc13x0-cc26x0-cm4.h b/arch/cpu/simplelink/cc26x2_cc13x2/cc13x0-cc26x0-cm4.h new file mode 100644 index 000000000..6a9bc65f4 --- /dev/null +++ b/arch/cpu/simplelink/cc26x2_cc13x2/cc13x0-cc26x0-cm4.h @@ -0,0 +1,128 @@ +/* + * Template: + * Copyright (c) 2012 ARM LIMITED + * All rights reserved. + * + * CC13xx-CC26xx: + * Copyright (c) 2017, George Oikonomou - http://www.spd.gr + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/*---------------------------------------------------------------------------*/ +/** + * \addtogroup cc26xx + * @{ + * + * \defgroup cc26xx-cm4 CC13xx/CC26xx CMSIS + * + * CC13xx/CC26xx Cortex-M4 CMSIS definitions + * @{ + * + * \file + * CMSIS Cortex-M4 core peripheral access layer header file for CC13xx/CC26xx + */ +/*---------------------------------------------------------------------------*/ +#ifndef CC13XX_CC26XX_CM4_H_ +#define CC13XX_CC26XX_CM4_H_ +/*---------------------------------------------------------------------------*/ +/** + * \name Interrupt Number Definition + * @{ + */ +typedef enum cc13xx_cc26xx_cm4_irq_e { + /* Cortex-M4 Processor Exceptions */ + CC13XX_CC26XX_CM4_EXCEPTION_RESET = -15, /**< 1 Reset */ + CC13XX_CC26XX_CM4_EXCEPTION_NMI = -14, /**< 2 NMI */ + CC13XX_CC26XX_CM4_EXCEPTION_HARD_FAULT = -13, /**< 3 Hard fault */ + CC13XX_CC26XX_CM4_EXCEPTION_MPU_FAULT = -12, /**< 4 MPU fault */ + CC13XX_CC26XX_CM4_EXCEPTION_BUS_FAULT = -11, /**< 5 Bus fault */ + CC13XX_CC26XX_CM4_EXCEPTION_USAGE_FAULT = -10, /**< 6 Usage fault */ + CC13XX_CC26XX_CM4_EXCEPTION_SV_CALL = -5, /**< 11 SVCall */ + CC13XX_CC26XX_CM4_EXCEPTION_DEBUG_MON = -4, /**< 12 Debug monitor */ + CC13XX_CC26XX_CM4_EXCEPTION_PEND_SV = -2, /**< 14 PendSV */ + CC13XX_CC26XX_CM4_EXCEPTION_SYS_TICK = -1, /**< 15 SysTick */ + + /* CC13xx/CC26xx interrupts */ + CC13XX_CC26XX_CM4_IRQ_EDGE_DETECT = 0, /**< 16 AON edge detect */ + CC13XX_CC26XX_CM4_EXCEPTION_I2C = 1, /**< 17 I2C */ + CC13XX_CC26XX_CM4_EXCEPTION_RF_CPE1 = 2, /**< 18 RF Command and Packet Engine 1 */ + CC13XX_CC26XX_CM4_EXCEPTION_AON_SPI_SLAVE = 3, /**< 19 AON SpiSplave Rx, Tx and CS */ + CC13XX_CC26XX_CM4_EXCEPTION_AON_RTC = 4, /**< 20 AON RTC */ + CC13XX_CC26XX_CM4_EXCEPTION_UART0 = 5, /**< 21 UART0 Rx and Tx */ + CC13XX_CC26XX_CM4_EXCEPTION_AON_AUX_SWEV0 = 6, /**< 22 Sensor Controller software event 0, through AON domain*/ + CC13XX_CC26XX_CM4_EXCEPTION_SSI0 = 7, /**< 23 SSI0 Rx and Tx */ + CC13XX_CC26XX_CM4_EXCEPTION_SSI1 = 8, /**< 24 SSI1 Rx and Tx */ + CC13XX_CC26XX_CM4_EXCEPTION_RF_CPE0 = 9, /**< 25 RF Command and Packet Engine 0 */ + CC13XX_CC26XX_CM4_EXCEPTION_RF_HW = 10, /**< 26 RF Core Hardware */ + CC13XX_CC26XX_CM4_EXCEPTION_RF_CMD_ACK = 11, /**< 27 RF Core Command Acknowledge */ + CC13XX_CC26XX_CM4_EXCEPTION_I2S = 12, /**< 28 I2S */ + CC13XX_CC26XX_CM4_EXCEPTION_AON_AUX_SWEV1 = 13, /**< 29 Sensor Controller software event 1, through AON domain*/ + CC13XX_CC26XX_CM4_EXCEPTION_WATCHDOG = 14, /**< 30 Watchdog timer */ + CC13XX_CC26XX_CM4_EXCEPTION_GPTIMER_0A = 15, /**< 31 Timer 0 subtimer A */ + CC13XX_CC26XX_CM4_EXCEPTION_GPTIMER_0B = 16, /**< 32 Timer 0 subtimer B */ + CC13XX_CC26XX_CM4_EXCEPTION_GPTIMER_1A = 17, /**< 33 Timer 1 subtimer A */ + CC13XX_CC26XX_CM4_EXCEPTION_GPTIMER_1B = 18, /**< 34 Timer 1 subtimer B */ + CC13XX_CC26XX_CM4_EXCEPTION_GPTIMER_2A = 19, /**< 35 Timer 2 subtimer A */ + CC13XX_CC26XX_CM4_EXCEPTION_GPTIMER_2B = 20, /**< 36 Timer 2 subtimer B */ + CC13XX_CC26XX_CM4_EXCEPTION_GPTIMER_3A = 21, /**< 37 Timer 3 subtimer A */ + CC13XX_CC26XX_CM4_EXCEPTION_GPTIMER_3B = 22, /**< 38 Timer 3 subtimer B */ + CC13XX_CC26XX_CM4_EXCEPTION_CRYPTO = 23, /**< 39 Crypto Core Result available */ + CC13XX_CC26XX_CM4_EXCEPTION_UDMA = 24, /**< 40 uDMA Software */ + CC13XX_CC26XX_CM4_EXCEPTION_UDMA_ERR = 25, /**< 41 uDMA Error */ + CC13XX_CC26XX_CM4_EXCEPTION_FLASH_CTRL = 26, /**< 42 Flash controller */ + CC13XX_CC26XX_CM4_EXCEPTION_SW0 = 27, /**< 43 Software Event 0 */ + CC13XX_CC26XX_CM4_EXCEPTION_AUX_COM_EVENT = 28, /**< 44 AUX combined event, directly to MCU domain*/ + CC13XX_CC26XX_CM4_EXCEPTION_AON_PRG0 = 29, /**< 45 AON programmable 0 */ + CC13XX_CC26XX_CM4_EXCEPTION_PROG = 30, /**< 46 Dynamic Programmable interrupt (default source: PRCM)*/ + CC13XX_CC26XX_CM4_EXCEPTION_AUX_COMPA = 31, /**< 47 AUX Comparator A */ + CC13XX_CC26XX_CM4_EXCEPTION_AUX_ADC = 32, /**< 48 AUX ADC IRQ */ + CC13XX_CC26XX_CM4_EXCEPTION_TRNG = 33, /**< 49 TRNG event */ +} cc13xx_cc26xx_cm4_irq_t; + +typedef cc13xx_cc26xx_cm4_irq_t IRQn_Type; + +#define SysTick_IRQn CC13XX_CC26XX_CM4_EXCEPTION_SYS_TICK +/** @} */ +/*---------------------------------------------------------------------------*/ +/** \name Processor and Core Peripheral Section + * @{ + */ +/* Configuration of the Cortex-M4 Processor and Core Peripherals */ +#define __MPU_PRESENT 1 /**< MPU present or not */ +#define __NVIC_PRIO_BITS 3 /**< Number of Bits used for Priority Levels */ +#define __Vendor_SysTickConfig 0 /**< Set to 1 if different SysTick Config is used */ +/** @} */ +/*---------------------------------------------------------------------------*/ +#include "core_cm4.h" /* Cortex-M4 processor and core peripherals */ +/*---------------------------------------------------------------------------*/ +#endif /* CC13XX_CC26XX_CM4_H_ */ +/*---------------------------------------------------------------------------*/ +/** + * @} + * @} + */ diff --git a/arch/cpu/simplelink/cc26x2_cc13x2/simplelink-def.h b/arch/cpu/simplelink/cc26x2_cc13x2/simplelink-def.h new file mode 100644 index 000000000..d0e95a261 --- /dev/null +++ b/arch/cpu/simplelink/cc26x2_cc13x2/simplelink-def.h @@ -0,0 +1,104 @@ +/* + * Copyright (c) 2017, George Oikonomou - http://www.spd.gr + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/*---------------------------------------------------------------------------*/ +#ifndef CC13XX_CC26XX_DEF_H_ +#define CC13XX_CC26XX_DEF_H_ +/*---------------------------------------------------------------------------*/ +#include "cm4/cm4-def.h" +/*---------------------------------------------------------------------------*/ +/* TSCH related defines */ + +/* Delay between GO signal and SFD */ +#define RADIO_DELAY_BEFORE_TX ((unsigned)US_TO_RTIMERTICKS(81)) +/* Delay between GO signal and start listening. + * This value is so small because the radio is constantly on within each timeslot. */ +#define RADIO_DELAY_BEFORE_RX ((unsigned)US_TO_RTIMERTICKS(15)) +/* Delay between the SFD finishes arriving and it is detected in software. */ +#define RADIO_DELAY_BEFORE_DETECT ((unsigned)US_TO_RTIMERTICKS(352)) + +/* Timer conversion; radio is running at 4 MHz */ +#define RADIO_TIMER_SECOND 4000000u +#if (RTIMER_SECOND % 256) || (RADIO_TIMER_SECOND % 256) +#error RADIO_TO_RTIMER macro must be fixed! +#endif +#define RADIO_TO_RTIMER(X) ((uint32_t)(((uint64_t)(X) * (RTIMER_SECOND / 256)) / (RADIO_TIMER_SECOND / 256))) +#define USEC_TO_RADIO(X) ((X) * 4) + +/* The PHY header (preamble + SFD, 4+1 bytes) duration is equivalent to 10 symbols */ +#define RADIO_IEEE_802154_PHY_HEADER_DURATION_USEC 160 + +/* Do not turn off TSCH within a timeslot: not enough time */ +#define TSCH_CONF_RADIO_ON_DURING_TIMESLOT 1 + +/* Disable TSCH frame filtering */ +#define TSCH_CONF_HW_FRAME_FILTERING 0 + +/* Use hardware timestamps */ +#ifndef TSCH_CONF_RESYNC_WITH_SFD_TIMESTAMPS +#define TSCH_CONF_RESYNC_WITH_SFD_TIMESTAMPS 1 +#define TSCH_CONF_TIMESYNC_REMOVE_JITTER 0 +#endif + +#ifndef TSCH_CONF_BASE_DRIFT_PPM +/* The drift compared to "true" 10ms slots. + * Enable adaptive sync to enable compensation for this. + * Slot length 10000 usec + * 328 ticks + * Tick duration 30.517578125 usec + * Real slot duration 10009.765625 usec + * Target - real duration = -9.765625 usec + * TSCH_CONF_BASE_DRIFT_PPM -977 + */ +#define TSCH_CONF_BASE_DRIFT_PPM -977 +#endif + +/* 10 times per second */ +#ifndef TSCH_CONF_CHANNEL_SCAN_DURATION +#define TSCH_CONF_CHANNEL_SCAN_DURATION (CLOCK_SECOND / 10) +#endif + +/* Slightly reduce the TSCH guard time (from 2200 usec to 1800 usec) to make sure + * the CC26xx radio has sufficient time to start up. */ +#ifndef TSCH_CONF_RX_WAIT +#define TSCH_CONF_RX_WAIT 1800 +#endif +/*---------------------------------------------------------------------------*/ +#define RTIMER_ARCH_SECOND 65536 +/*---------------------------------------------------------------------------*/ +/* Path to CMSIS header */ +#define CMSIS_CONF_HEADER_PATH "cc13x0-cc26x0-cm4.h" + +/* Path to headers with implementation of mutexes and memory barriers */ +#define MUTEX_CONF_ARCH_HEADER_PATH "mutex-cortex.h" +#define MEMORY_BARRIER_CONF_ARCH_HEADER_PATH "memory-barrier-cortex.h" +/*---------------------------------------------------------------------------*/ +#endif /* CC13XX_CC26XX_DEF_H_ */ +/*---------------------------------------------------------------------------*/ diff --git a/arch/cpu/simplelink/rtimer-arch.h b/arch/cpu/simplelink/rtimer-arch.h new file mode 100644 index 000000000..aa1682ec4 --- /dev/null +++ b/arch/cpu/simplelink/rtimer-arch.h @@ -0,0 +1,72 @@ +/* + * Copyright (c) 2014, Texas Instruments Incorporated - http://www.ti.com/ + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/*---------------------------------------------------------------------------*/ +/** + * \addtogroup cc26xx-clocks + * @{ + * + * \defgroup cc26xx-rtimer CC13xx/CC26xx rtimer + * + * Implementation of the rtimer module for the CC13xx/CC26xx + * @{ + */ +/** + * \file + * Header file for the CC13xx/CC26xx rtimer driver + */ +/*---------------------------------------------------------------------------*/ +#ifndef RTIMER_ARCH_H_ +#define RTIMER_ARCH_H_ +/*---------------------------------------------------------------------------*/ +#include "contiki.h" +/*---------------------------------------------------------------------------*/ +inline rtimer_clock_t rtimer_arch_now(void) { rtimer_clock_t rtc = { 0 }; return rtc; } + +/* HW oscillator frequency is 32 kHz, not 64 kHz and RTIMER_NOW() never returns + * an odd value; so US_TO_RTIMERTICKS always rounds to the nearest even number. + */ +#define US_TO_RTIMERTICKS(US) (2 * ((US) >= 0 ? \ + (((int32_t)(US) * (RTIMER_ARCH_SECOND / 2) + 500000) / 1000000L) : \ + ((int32_t)(US) * (RTIMER_ARCH_SECOND / 2) - 500000) / 1000000L)) + +#define RTIMERTICKS_TO_US(T) ((T) >= 0 ? \ + (((int32_t)(T) * 1000000L + ((RTIMER_ARCH_SECOND) / 2)) / (RTIMER_ARCH_SECOND)) : \ + ((int32_t)(T) * 1000000L - ((RTIMER_ARCH_SECOND) / 2)) / (RTIMER_ARCH_SECOND)) + +/* A 64-bit version because the 32-bit one cannot handle T >= 4295 ticks. + Intended only for positive values of T. */ +#define RTIMERTICKS_TO_US_64(T) ((uint32_t)(((uint64_t)(T) * 1000000 + ((RTIMER_ARCH_SECOND) / 2)) / (RTIMER_ARCH_SECOND))) +/*---------------------------------------------------------------------------*/ +#endif /* RTIMER_ARCH_H_ */ +/*---------------------------------------------------------------------------*/ +/** + * @} + * @} + */ diff --git a/arch/cpu/simplelink/simplelink-conf.h b/arch/cpu/simplelink/simplelink-conf.h new file mode 100644 index 000000000..97be16b5d --- /dev/null +++ b/arch/cpu/simplelink/simplelink-conf.h @@ -0,0 +1,76 @@ +/* + * Copyright (c) 2017, Alex Stanoev + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** + * \addtogroup cc26xx + * @{ + * + * \defgroup cc26xx-ccxxware-conf CCxxware-specific configuration + * + * @{ + * + * \file + * CCxxware-specific configuration for the cc26xx-cc13xx CPU family + */ +#ifndef CCXXWARE_CONF_H_ +#define CCXXWARE_CONF_H_ + +#include "contiki-conf.h" + +/*---------------------------------------------------------------------------*/ +/** + * \brief JTAG interface configuration + * + * Those values are not meant to be modified by the user + * @{ + */ +#if CCXXWARE_CONF_JTAG_INTERFACE_ENABLE +#define SET_CCFG_CCFG_TI_OPTIONS_TI_FA_ENABLE 0xC5 +#define SET_CCFG_CCFG_TAP_DAP_0_CPU_DAP_ENABLE 0xC5 +#define SET_CCFG_CCFG_TAP_DAP_0_PRCM_TAP_ENABLE 0xC5 +#define SET_CCFG_CCFG_TAP_DAP_0_TEST_TAP_ENABLE 0xC5 +#define SET_CCFG_CCFG_TAP_DAP_1_PBIST2_TAP_ENABLE 0xC5 +#define SET_CCFG_CCFG_TAP_DAP_1_PBIST1_TAP_ENABLE 0xC5 +#define SET_CCFG_CCFG_TAP_DAP_1_WUC_TAP_ENABLE 0xC5 +#else +#define SET_CCFG_CCFG_TI_OPTIONS_TI_FA_ENABLE 0x00 +#define SET_CCFG_CCFG_TAP_DAP_0_CPU_DAP_ENABLE 0x00 +#define SET_CCFG_CCFG_TAP_DAP_0_PRCM_TAP_ENABLE 0x00 +#define SET_CCFG_CCFG_TAP_DAP_0_TEST_TAP_ENABLE 0x00 +#define SET_CCFG_CCFG_TAP_DAP_1_PBIST2_TAP_ENABLE 0x00 +#define SET_CCFG_CCFG_TAP_DAP_1_PBIST1_TAP_ENABLE 0x00 +#define SET_CCFG_CCFG_TAP_DAP_1_WUC_TAP_ENABLE 0x00 +#endif +/** @} */ +#endif /* CCXXWARE_CONF_H_ */ +/*---------------------------------------------------------------------------*/ +/** + * @} + * @} + */ diff --git a/arch/platform/simplelink/Makefile.simplelink b/arch/platform/simplelink/Makefile.simplelink index 9c2d00ba1..2a28cd231 100644 --- a/arch/platform/simplelink/Makefile.simplelink +++ b/arch/platform/simplelink/Makefile.simplelink @@ -9,39 +9,20 @@ ifndef SIMPLELINK_SDK endif ### Board and BSP selection -#BOARD ?= srf06/cc26xx -#BOARDS = srf06/cc26xx srf06/cc13xx launchpad/cc26xx launchpad/cc13xx sensortag/cc26xx sensortag/cc13xx -CONTIKI_TARGET_DIRS += ./ +CONTIKI_TARGET_DIRS += . -### Include the board-specific makefile -PLATFORM_ROOT_DIR = $(CONTIKI)/arch/platform/$(TARGET) -#-include $(PLATFORM_ROOT_DIR)/$(BOARD)/Makefile.$(notdir $(BOARD)) - -#CONTIKI_TARGET_SOURCEFILES += platform.c -#CONTIKI_TARGET_SOURCEFILES += sensors.c leds.c -#CONTIKI_TARGET_SOURCEFILES += $(BOARD_SOURCEFILES) - -#CONTIKI_SOURCEFILES += $(CONTIKI_TARGET_SOURCEFILES) -CONTIKI_SOURCEFILES += $(CONTIKI_CPU_SOURCEFILES) $(DEBUG_IO_SOURCEFILES) +CONTIKI_TARGET_SOURCEFILES += platform.c +CONTIKI_SOURCEFILES += $(CONTIKI_TARGET_SOURCEFILES) CLEAN += *.simplelink ### Unless the example dictates otherwise, build without code size optimisations SMALL ?= 0 -### Always re-build ccfg.c so changes to ccfg-conf.h will apply without having -### to make clean first -$(OBJECTDIR)/ccfg.o: ccfg.c FORCE | $(OBJECTDIR) - $(TRACE_CC) - $(Q)$(CC) $(CFLAGS) -include "ccxxware-conf.h" -c $< -o $@ - -### Define the CPU directory and pull in the correct CPU makefile. This will -### be defined by one of the makefiles included above and it can be either -### Makefile.cc26xx or Makefile.cc13xx -CFLAGS += -I$(CONTIKI)/arch/cpu/arm/cortex-m/ -include $(CONTIKI)/arch/cpu/arm/cortex-m/cm4/Makefile.cm4 +CONTIKI_CPU = $(CONTIKI)/arch/cpu/simplelink +include $(CONTIKI_CPU)/Makefile.simplelink #MODULES += os/net os/net/mac os/net/mac/framer diff --git a/arch/platform/simplelink/contiki-conf.h b/arch/platform/simplelink/contiki-conf.h index 5ac07368c..c616c7610 100644 --- a/arch/platform/simplelink/contiki-conf.h +++ b/arch/platform/simplelink/contiki-conf.h @@ -44,7 +44,7 @@ #include PROJECT_CONF_PATH #endif /* PROJECT_CONF_PATH */ /*---------------------------------------------------------------------------*/ -#include "cc13x2-cc26x2-def.h" +#include "simplelink-def.h" /*---------------------------------------------------------------------------*/ /** * \name Button configurations @@ -71,32 +71,7 @@ #define CC26XX_SENSOR_READING_ERROR 0x80000000 /*---------------------------------------------------------------------------*/ /* Include CPU-related configuration */ -#include "cc13x2-cc26x2-conf.h" -/*---------------------------------------------------------------------------*/ -/* board.h assumes that basic configuration is done */ -//#include "board.h" -/*---------------------------------------------------------------------------*/ - - -#if CCXXWARE_CONF_JTAG_INTERFACE_ENABLE -#define SET_CCFG_CCFG_TI_OPTIONS_TI_FA_ENABLE 0xC5 -#define SET_CCFG_CCFG_TAP_DAP_0_CPU_DAP_ENABLE 0xC5 -#define SET_CCFG_CCFG_TAP_DAP_0_PRCM_TAP_ENABLE 0xC5 -#define SET_CCFG_CCFG_TAP_DAP_0_TEST_TAP_ENABLE 0xC5 -#define SET_CCFG_CCFG_TAP_DAP_1_PBIST2_TAP_ENABLE 0xC5 -#define SET_CCFG_CCFG_TAP_DAP_1_PBIST1_TAP_ENABLE 0xC5 -#define SET_CCFG_CCFG_TAP_DAP_1_WUC_TAP_ENABLE 0xC5 -#else -#define SET_CCFG_CCFG_TI_OPTIONS_TI_FA_ENABLE 0x00 -#define SET_CCFG_CCFG_TAP_DAP_0_CPU_DAP_ENABLE 0x00 -#define SET_CCFG_CCFG_TAP_DAP_0_PRCM_TAP_ENABLE 0x00 -#define SET_CCFG_CCFG_TAP_DAP_0_TEST_TAP_ENABLE 0x00 -#define SET_CCFG_CCFG_TAP_DAP_1_PBIST2_TAP_ENABLE 0x00 -#define SET_CCFG_CCFG_TAP_DAP_1_PBIST1_TAP_ENABLE 0x00 -#define SET_CCFG_CCFG_TAP_DAP_1_WUC_TAP_ENABLE 0x00 -#endif - - +#include "simplelink-conf.h" #endif /* CONTIKI_CONF_H */ /** @} */ diff --git a/arch/platform/simplelink/platform.c b/arch/platform/simplelink/platform.c new file mode 100644 index 000000000..0691f669c --- /dev/null +++ b/arch/platform/simplelink/platform.c @@ -0,0 +1,211 @@ +/* + * Copyright (c) 2014, Texas Instruments Incorporated - http://www.ti.com/ + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/*---------------------------------------------------------------------------*/ +/** + * \addtogroup cc26xx-platforms + * @{ + * + * \defgroup cc26xx-srf-tag SmartRF+CC13xx/CC26xx EM, SensorTags and LaunchPads + * + * This platform supports a number of different boards: + * - A standard TI SmartRF06EB with a CC26xx EM mounted on it + * - A standard TI SmartRF06EB with a CC1310 EM mounted on it + * - The TI CC2650 SensorTag + * - The TI CC1350 SensorTag + * - The TI CC2650 LaunchPad + * - The TI CC1310 LaunchPad + * - The TI CC1350 LaunchPad + * @{ + */ +#include "contiki.h" +#include "contiki-net.h" +//#include "leds.h" +//#include "lpm.h" +//#include "gpio-interrupt.h" +//#include "dev/oscillators.h" +//#include "ieee-addr.h" +//#include "vims.h" +//#include "dev/cc26xx-uart.h" +//#include "dev/soc-rtc.h" +//#include "rf-core/rf-core.h" +//#include "sys_ctrl.h" +//#include "uart.h" +//#include "sys/clock.h" +//#include "sys/rtimer.h" +//#include "sys/node-id.h" +//#include "sys/platform.h" +//#include "lib/random.h" +//#include "lib/sensors.h" +//#include "button-sensor.h" +//#include "dev/serial-line.h" +//#include "net/mac/framer/frame802154.h" +// +//#include "driverlib/driverlib_release.h" + +#include +/*---------------------------------------------------------------------------*/ +/* Log configuration */ +#include "sys/log.h" +#define LOG_MODULE "CC26xx/CC13xx" +#define LOG_LEVEL LOG_LEVEL_MAIN +/*---------------------------------------------------------------------------*/ +unsigned short node_id = 0; +/*---------------------------------------------------------------------------*/ +/** \brief Board specific iniatialisation */ +void board_init(void); +/*---------------------------------------------------------------------------*/ +//static void +//fade(unsigned char l) +//{ +// volatile int i; +// int k, j; +// for(k = 0; k < 800; ++k) { +// j = k > 400 ? 800 - k : k; +// +// leds_on(l); +// for(i = 0; i < j; ++i) { +// __asm("nop"); +// } +// leds_off(l); +// for(i = 0; i < 400 - j; ++i) { +// __asm("nop"); +// } +// } +//} +/*---------------------------------------------------------------------------*/ +//static void +//set_rf_params(void) +//{ +// uint16_t short_addr; +// uint8_t ext_addr[8]; +// +// ieee_addr_cpy_to(ext_addr, 8); +// +// short_addr = ext_addr[7]; +// short_addr |= ext_addr[6] << 8; +// +// NETSTACK_RADIO.set_value(RADIO_PARAM_PAN_ID, IEEE802154_PANID); +// NETSTACK_RADIO.set_value(RADIO_PARAM_16BIT_ADDR, short_addr); +// NETSTACK_RADIO.set_value(RADIO_PARAM_CHANNEL, RF_CORE_CHANNEL); +// NETSTACK_RADIO.set_object(RADIO_PARAM_64BIT_ADDR, ext_addr, 8); +// +// /* also set the global node id */ +// node_id = short_addr; +//} +/*---------------------------------------------------------------------------*/ +void +platform_init_stage_one() +{ +// /* Enable flash cache and prefetch. */ +// ti_lib_vims_mode_set(VIMS_BASE, VIMS_MODE_ENABLED); +// ti_lib_vims_configure(VIMS_BASE, true, true); +// +// ti_lib_int_master_disable(); +// +// /* Set the LF XOSC as the LF system clock source */ +// oscillators_select_lf_xosc(); +// +// lpm_init(); +// +// board_init(); +// +// gpio_interrupt_init(); +// +// leds_init(); +// fade(LEDS_RED); +// +// /* +// * Disable I/O pad sleep mode and open I/O latches in the AON IOC interface +// * This is only relevant when returning from shutdown (which is what froze +// * latches in the first place. Before doing these things though, we should +// * allow software to first regain control of pins +// */ +// ti_lib_pwr_ctrl_io_freeze_disable(); +// +// ti_lib_int_master_enable(); +// +// soc_rtc_init(); +// fade(LEDS_YELLOW); +} +/*---------------------------------------------------------------------------*/ +void +platform_init_stage_two() +{ +// random_init(0x1234); +// +// /* Character I/O Initialisation */ +//#if CC26XX_UART_CONF_ENABLE +// cc26xx_uart_init(); +//#endif +// +// serial_line_init(); +// +// /* Populate linkaddr_node_addr */ +// ieee_addr_cpy_to(linkaddr_node_addr.u8, LINKADDR_SIZE); +// +// fade(LEDS_GREEN); +} +/*---------------------------------------------------------------------------*/ +void +platform_init_stage_three() +{ +// radio_value_t chan, pan; +// +// set_rf_params(); +// +// NETSTACK_RADIO.get_value(RADIO_PARAM_CHANNEL, &chan); +// NETSTACK_RADIO.get_value(RADIO_PARAM_PAN_ID, &pan); +// +// LOG_DBG("With DriverLib v%u.%u\n", DRIVERLIB_RELEASE_GROUP, +// DRIVERLIB_RELEASE_BUILD); +// LOG_INFO(BOARD_STRING "\n"); +// LOG_DBG("IEEE 802.15.4: %s, Sub-GHz: %s, BLE: %s, Prop: %s\n", +// ti_lib_chipinfo_supports_ieee_802_15_4() == true ? "Yes" : "No", +// ti_lib_chipinfo_chip_family_is_cc13xx() == true ? "Yes" : "No", +// ti_lib_chipinfo_supports_ble() == true ? "Yes" : "No", +// ti_lib_chipinfo_supports_proprietary() == true ? "Yes" : "No"); +// LOG_INFO(" RF: Channel %d, PANID 0x%04X\n", chan, pan); +// LOG_INFO(" Node ID: %d\n", node_id); +// +// process_start(&sensors_process, NULL); +// fade(LEDS_ORANGE); +} +/*---------------------------------------------------------------------------*/ +void +platform_idle() +{ + /* Drop to some low power mode */ +// lpm_drop(); +} +/*---------------------------------------------------------------------------*/ +/** + * @} + * @} + */