new uart_init and uart_setbaud
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@ -152,6 +152,8 @@ static volatile struct UART_struct * const UART2 = (void *) (UART2_BASE);
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#endif /* REG_NO_COMPAT */
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void uart_setbaud(volatile struct UART_struct * uart, uint32_t baud);
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extern volatile uint32_t u1_head, u1_tail;
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void uart1_putc(char c);
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#define uart1_can_get() (*UART1_URXCON > 0)
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117
lib/uart.c
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117
lib/uart.c
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@ -0,0 +1,117 @@
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/*
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* Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
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* to the MC1322x project (http://mc1322x.devl.org)
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of libmc1322x: see http://mc1322x.devl.org
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* for details.
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*
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*
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*/
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#include <mc1322x.h>
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#include <stdint.h>
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#define MOD 9999
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#define CLK 24000000
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#define DIV 16 /* uart->CON.XTIM = 0 is 16x oversample (datasheet is incorrect) */
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#include <stdio.h>
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void uart_setbaud(volatile struct UART_struct * uart, uint32_t baud) {
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uint64_t inc;
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/* baud rate eqn from reference manual */
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/* multiply by an additional 10 to do a fixed point round later */
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inc = ((uint64_t) baud * DIV * MOD * 10 / CLK ) - 10 ;
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/* add 5 and divide by 10 to get a rounding */
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inc = (inc + 5) / 10;
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/* UART must be disabled to set the baudrate */
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uart->CONbits = (struct UART_CON) {
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.TXE = 0,
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.RXE = 0,
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};
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uart->BR = ( (uint16_t)inc << 16 ) | MOD;
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uart->CONbits = (struct UART_CON) {
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.XTIM = 0,
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.TXE = 1,
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.RXE = 1,
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};
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}
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void uart_init(volatile struct UART_struct * uart) {
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/* enable the uart so we can set the gpio mode */
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/* see Section 11.5.1.2 Alternate Modes */
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/* you must enable the peripheral first BEFORE setting the function in GPIO_FUNC_SEL */
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/* From the datasheet: "The peripheral function will control operation of the pad IF */
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/* THE PERIPHERAL IS ENABLED. */
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uart->CONbits = (struct UART_CON) {
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.TXE = 1,
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.RXE = 1,
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};
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/* interrupt when there are this number or more bytes free in the TX buffer*/
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uart->TXCON = 16;
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if( uart == UART1 ) {
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/* TX and CTS as outputs */
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GPIO->PAD_DIR_SET.GPIO_14 = 1;
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GPIO->PAD_DIR_SET.GPIO_16 = 1;
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/* RX and RTS as inputs */
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GPIO->PAD_DIR_RESET.GPIO_15 = 1;
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GPIO->PAD_DIR_RESET.GPIO_17 = 1;
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/* set GPIO15-14 to UART (UART1 TX and RX)*/
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GPIO->FUNC_SEL.GPIO_14 = 1;
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GPIO->FUNC_SEL.GPIO_15 = 1;
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u1_head = 0; u1_tail = 0;
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/* tx and rx interrupts are enabled in the UART by default */
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/* see status register bits 13 and 14 */
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/* enable UART1 interrupts in the interrupt controller */
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enable_irq(UART1);
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} else {
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/* do the same as above but for UART2 */
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GPIO->PAD_DIR_SET.GPIO_18 = 1;
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GPIO->PAD_DIR_SET.GPIO_19 = 1;
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GPIO->PAD_DIR_RESET.GPIO_20 = 1;
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GPIO->PAD_DIR_RESET.GPIO_21 = 1;
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GPIO->FUNC_SEL.GPIO_18 = 1;
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GPIO->FUNC_SEL.GPIO_19 = 1;
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u2_head = 0; u2_tail = 0;
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enable_irq(UART2);
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}
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}
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@ -45,7 +45,8 @@ int main(void)
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uint8_t c;
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trim_xtal();
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uart1_init(INC,MOD,SAMP);
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uart_init(UART1);
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uart_init(UART1, 115200);
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adc_init();
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printf("adc test\r\n");
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@ -52,7 +52,8 @@ void main(void) {
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/* trim the reference osc. to 24MHz */
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trim_xtal();
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uart_init(INC, MOD, SAMP);
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uart_init(UART1);
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uart_setbaud(UART1, 115200);
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vreg_init();
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@ -64,7 +64,8 @@ void main(void) {
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/* trim the reference osc. to 24MHz */
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trim_xtal();
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uart_init(INC, MOD, SAMP);
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uart_init(UART1);
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uart_init(UART1, 115200);
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vreg_init();
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@ -99,7 +99,8 @@ void main(void) {
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/* trim the reference osc. to 24MHz */
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trim_xtal();
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uart_init(INC, MOD, SAMP);
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uart_init(UART1);
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uart_init(UART1, 115200);
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vreg_init();
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@ -36,19 +36,6 @@
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#ifndef CONFIG_H
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#define CONFIG_H
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/* Baud rate */
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#define MOD 9999
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/* 230400 bps, INC=767, MOD=9999, 24Mhz 16x samp */
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/* 115200 bps, INC=767, MOD=9999, 24Mhz 8x samp */
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#define INC 767
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/* 921600 bps, MOD=9999, 24Mhz 16x samp */
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//#define INC 3071
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#define SAMP UCON_SAMP_8X
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//#define SAMP UCON_SAMP_16X
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/* use uart1 for console */
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#define uart_init uart1_init
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/* nvm interface */
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#define NVM_INTERFACE gNvmInternalInterface_c
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/*#define NVM_INTERFACE gNvmExternalInterface_c */
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@ -84,8 +84,9 @@ void main(void) {
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volatile uint32_t state = SCAN_X;
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volatile uint32_t addr,data;
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uart_init(UART1);
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uart_init(UART1, 115200);
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uart_init(INC, MOD, SAMP);
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disable_irq(UART1);
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vreg_init();
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@ -46,7 +46,8 @@ void main(void) {
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uint32_t buf[READ_NBYTES/4];
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uint32_t i;
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uart_init(INC, MOD, SAMP);
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uart_init(UART1);
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uart_init(UART1, 115200);
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print_welcome("nvm-read");
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@ -46,7 +46,8 @@ void main(void) {
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uint32_t buf[WRITE_NBYTES/4];
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uint32_t i;
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uart_init(INC, MOD, SAMP);
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uart_init(UART1);
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uart_init(UART1, 115200);
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print_welcome("nvm-write");
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@ -117,7 +117,8 @@ void main(void) {
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/* trim the reference osc. to 24MHz */
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pack_XTAL_CNTL(CTUNE_4PF, CTUNE, FTUNE, IBIAS);
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uart_init(INC, MOD, SAMP);
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uart_init(UART1);
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uart_init(UART1, 115200);
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vreg_init();
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@ -65,6 +65,8 @@ size_t fwrite(const void *ptr, size_t size, size_t nmemb,
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}
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#endif
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int main(void)
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{
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char *ptr = "Hello world!";
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@ -74,7 +76,8 @@ int main(void)
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int mi;
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// char buf[80];
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uart_init(INC, MOD, SAMP);
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uart_init(UART1);
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uart_setbaud(UART1, 115200);
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print_size(int8_t);
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print_size(uint8_t);
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@ -46,7 +46,8 @@ int main(void)
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int x = 32768;
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trim_xtal();
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uart1_init(INC,MOD,SAMP);
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uart_init(UART1);
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uart_init(UART1, 115200);
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rtc_init();
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printf("pwm test\r\n");
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@ -62,7 +62,8 @@ void main(void) {
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/* trim the reference osc. to 24MHz */
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trim_xtal();
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uart_init(INC, MOD, SAMP);
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uart_init(UART1);
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uart_init(UART1, 115200);
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vreg_init();
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@ -70,7 +70,8 @@ void main(void) {
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/* trim the reference osc. to 24MHz */
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trim_xtal();
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uart_init(INC, MOD, SAMP);
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uart_init(UART1);
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uart_init(UART1, 115200);
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vreg_init();
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@ -42,7 +42,8 @@
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void main(void) {
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volatile uint8_t *data;
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uart_init(INC, MOD, SAMP);
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uart_init(UART1);
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uart_init(UART1, 115200);
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for(data = DUMP_BASE; data < ((uint8_t *)(DUMP_BASE+DUMP_LEN)); data++) {
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uart1_putc(*data);
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@ -41,7 +41,8 @@
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void main(void) {
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uart_init(INC,MOD,SAMP);
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uart_init(UART1);
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uart_init(UART1, 115200);
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*mem32(0x00401ffc) = 0x01234567;
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*mem32(0x00407ffc) = 0xdeadbeef;
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void main(void) {
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uart1_init(INC,MOD,SAMP);
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uart2_init(INC,MOD,SAMP);
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uart_init(UART1);
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uart_init(UART2);
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uart_setbaud(UART1, 115200);
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uart_setbaud(UART2, 115200);
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while(1) {
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if(uart1_can_get()) {
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@ -41,7 +41,9 @@
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void main(void) {
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uart1_init(INC,MOD,SAMP);
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// uart1_init(INC,MOD,SAMP);
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uart_init(UART1);
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uart_setbaud(UART1, 1200);
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while(1) {
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if(uart1_can_get()) {
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@ -46,7 +46,8 @@
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void main(void) {
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volatile uint32_t i;
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uart1_init(INC,MOD,SAMP);
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uart_init(UART1);
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uart_init(UART1, 115200);
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printf("reset\n\r");
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@ -48,7 +48,8 @@ int main(void)
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ctune = 0;
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ftune = 0;
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uart1_init(INC,MOD,SAMP);
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uart_init(UART1);
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uart_init(UART1, 115200);
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print_welcome("pwm test\r\n");
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pack_XTAL_CNTL(ctune_4pf, ctune, ftune, IBIAS);
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