/**
\defgroup buildsystem The \os build system
The \os build system is designed to make it easy to compile
\os applications for either to a hardware platform or into a
simulation platform by simply supplying different parameters to the
make command, without having to edit makefiles or modify
the application code.
The file example project in examples/hello-world/ shows how the
\os build system works. The hello-world.c application
can be built into a complete \os system by running make
in the examples/hello-world/ directory. Running make without
parameters will build a \os system using the native
target. The native target is a special \os platform that
builds an entire \os system as a program that runs on the
development system. After compiling the application for the
native target it is possible to run the \os system with
the application by running the file hello-world.native.
To compile the hello-world application into a stand-alone executable
that can be loaded into a running \os system, the command
make hello-world.ce is used. To build an executable file for
the Sky platform, make TARGET=sky hello-world.sky is run.
To avoid having to type TARGET= every time make is
run, it is possible to run make TARGET=sky savetarget to
save the selected target as the default target platform for
subsequent invocations of make. A file called
Makefile.target containing the currently saved target is
saved in the project's directory.
\section buildsystem-makefiles Makefiles used in the \os build system
The \os build system is composed of a number of Makefiles. These
are:
- Makefile: the project's makefile, located in the project directory.
- Makefile.include: the system-wide \os makefile,
located in the root of the \os source tree.
- Makefile.\$(TARGET) (where \$(TARGET) is the name of the
platform that is currently being built): rules for the specific
platform, located in the platform's subdirectory in the platform/ directory.
- Makefile.\$(CPU) (where \$(CPU) is the name of the CPU or
microcontroller architecture used on the platform for which \os
is built): rules for the CPU architecture, located in the CPU
architecture's subdirectory in the cpu/ directory.
- Makefile.\$(MODULE) (where \$(MODULE) is the name of a
module in the Contiki directory): rules for modules in the
Contiki directories. Each module might have its own optional makefile.
The Makefile in the project's directory is intentionally simple. It
specifies where the \os source code resides in the system and
includes the system-wide Makefile, Makefile.include. The
project's makefile can also define in the MODULES variable a
list of modules that should be included in the \os system.
The Makefile used in the hello-world example project looks like this:
\code
CONTIKI = ../..
all: hello-world
include $(CONTIKI)/Makefile.include
\endcode
First, the location of the \os source code tree is given by
defining the CONTIKI variable. Next, the name of the
application is defined. Finally, the system-wide
Makefile.include is included.
The Makefile.include contains definitions of the C files of
the core \os system. Makefile.include always reside in
the root of the \os source tree. When make is run,
Makefile.include includes the Makefile.\$(TARGET)
as well as all makefiles for the modules in the MODULES
list (which is specified by the project's Makefile).
Makefile.\$(TARGET), which is located in the
platform/\$(TARGET)/ directory, contains the list of C files that the
platform adds to the \os system. This list is defined by the
CONTIKI_TARGET_SOURCEFILES variable. The
Makefile.\$(TARGET) also includes the
Makefile.\$(CPU) from the cpu/\$(CPU)/ directory.
The Makefile.\$(CPU) typically contains definitions for the
C compiler used for the particular CPU. If multiple C compilers are
used, the Makefile.\$(CPU) can either contain a conditional
expression that allows different C compilers to be defined, or it can
be completely overridden by the platform specific makefile
Makefile.\$(TARGET).
@{
*/
/**
@}
*/