95 lines
4.3 KiB
Plaintext
95 lines
4.3 KiB
Plaintext
/**
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\defgroup buildsystem The \os build system
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The \os build system is designed to make it easy to compile
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\os applications for either to a hardware platform or into a
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simulation platform by simply supplying different parameters to the
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<tt>make</tt> command, without having to edit makefiles or modify
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the application code.
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The file example project in examples/hello-world/ shows how the
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\os build system works. The <tt>hello-world.c</tt> application
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can be built into a complete \os system by running <tt>make</tt>
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in the examples/hello-world/ directory. Running <tt>make</tt> without
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parameters will build a \os system using the <tt>native</tt>
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target. The <tt>native</tt> target is a special \os platform that
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builds an entire \os system as a program that runs on the
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development system. After compiling the application for the
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<tt>native</tt> target it is possible to run the \os system with
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the application by running the file <tt>hello-world.native</tt>.
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To compile the hello-world application into a stand-alone executable
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that can be loaded into a running \os system, the command
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<tt>make hello-world.ce</tt> is used. To build an executable file for
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the Sky platform, <tt>make TARGET=sky hello-world.sky</tt> is run.
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To avoid having to type <tt>TARGET=</tt> every time <tt>make</tt> is
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run, it is possible to run <tt>make TARGET=sky savetarget</tt> to
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save the selected target as the default target platform for
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subsequent invocations of <tt>make</tt>. A file called
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<tt>Makefile.target</tt> containing the currently saved target is
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saved in the project's directory.
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\section buildsystem-makefiles Makefiles used in the \os build system
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The \os build system is composed of a number of Makefiles. These
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are:
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- <tt>Makefile</tt>: the project's makefile, located in the project directory.
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- <tt>Makefile.include</tt>: the system-wide \os makefile,
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located in the root of the \os source tree.
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- <tt>Makefile.\$(TARGET)</tt> (where \$(TARGET) is the name of the
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platform that is currently being built): rules for the specific
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platform, located in the platform's subdirectory in the platform/ directory.
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- <tt>Makefile.\$(CPU)</tt> (where \$(CPU) is the name of the CPU or
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microcontroller architecture used on the platform for which \os
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is built): rules for the CPU architecture, located in the CPU
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architecture's subdirectory in the cpu/ directory.
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- <tt>Makefile.\$(MODULE)</tt> (where \$(MODULE) is the name of a
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module in the Contiki directory): rules for modules in the
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Contiki directories. Each module might have its own optional makefile.
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The Makefile in the project's directory is intentionally simple. It
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specifies where the \os source code resides in the system and
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includes the system-wide Makefile, <tt>Makefile.include</tt>. The
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project's makefile can also define in the <tt>MODULES</tt> variable a
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list of modules that should be included in the \os system.
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The Makefile used in the hello-world example project looks like this:
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\code
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CONTIKI = ../..
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all: hello-world
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include $(CONTIKI)/Makefile.include
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\endcode
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First, the location of the \os source code tree is given by
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defining the <tt>CONTIKI</tt> variable. Next, the name of the
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application is defined. Finally, the system-wide
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<tt>Makefile.include</tt> is included.
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The <tt>Makefile.include</tt> contains definitions of the C files of
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the core \os system. <tt>Makefile.include</tt> always reside in
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the root of the \os source tree. When <tt>make</tt> is run,
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<tt>Makefile.include</tt> includes the <tt>Makefile.\$(TARGET)</tt>
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as well as all makefiles for the modules in the <tt>MODULES</tt>
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list (which is specified by the project's <tt>Makefile</tt>).
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<tt>Makefile.\$(TARGET)</tt>, which is located in the
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platform/\$(TARGET)/ directory, contains the list of C files that the
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platform adds to the \os system. This list is defined by the
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<tt>CONTIKI_TARGET_SOURCEFILES</tt> variable. The
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<tt>Makefile.\$(TARGET)</tt> also includes the
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<tt>Makefile.\$(CPU)</tt> from the cpu/\$(CPU)/ directory.
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The <tt>Makefile.\$(CPU)</tt> typically contains definitions for the
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C compiler used for the particular CPU. If multiple C compilers are
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used, the <tt>Makefile.\$(CPU)</tt> can either contain a conditional
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expression that allows different C compilers to be defined, or it can
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be completely overridden by the platform specific makefile
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<tt>Makefile.\$(TARGET)</tt>.
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@{
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*/
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/**
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@}
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*/
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