#ifndef GIC_H
#define GIC_H

#include <stdint.h>

namespace GIC {

    /* GIC Distributor and CPU Interface base addresses */
    uint32_t* const distributor = (uint32_t*)(0x01c81000);
    uint32_t* const cpuInterface = (uint32_t*)(0x01c82000);

    /* GIC Distributor Registers Offsets */
    const uint16_t GICD_CTLR        = 0x000 / 4;
    const uint16_t GICD_ISENABLER   = 0x100 / 4;
    const uint16_t GICD_ICENABLER   = 0x180 / 4;
    const uint16_t GICD_ITARGETSR   = 0x800 / 4;
    const uint16_t GICD_ICFGR       = 0xc00 / 4;

    /* GIC CPU Interface Registers Offsets */
    const uint16_t GICC_CTLR        = 0x0000 / 4;
    const uint16_t GICC_PMR         = 0x0004 / 4;
    const uint16_t GICC_IAR         = 0x000c / 4;
    const uint16_t GICC_EOIR        = 0x0010 / 4;

    enum Sensitivity {
        LEVEL = 0,
        EDGE = 1
    };
    enum TargetCPU {
        CPU0T = 1,
        CPU1T = 2,
        CPU2T = 4,
        CPU3T = 8,
        CPU4T = 16,
        CPU5T = 32,
        CPU6T = 64,
        CPU7T = 128,
        CPUALLT = 255
    };

    void enable(void);
    void enableInterrupt(const uint16_t m, const TargetCPU target, const Sensitivity sensitivity);
}

#endif