From 2abac03779b9b2ec2ed0d2aa0fa6f52d7a22ad36 Mon Sep 17 00:00:00 2001
From: giomba <giomba@glgprograms.it>
Date: Sat, 3 Jul 2021 11:54:31 +0200
Subject: [PATCH] semi working timer for skipping back porch

---
 const.h |  2 +-
 main.S  | 61 +++++++++++++++++++++++++++++++++++++++++++++++++--------
 main.c  |  4 +++-
 3 files changed, 57 insertions(+), 10 deletions(-)

diff --git a/const.h b/const.h
index 2ed9307..b961f5c 100644
--- a/const.h
+++ b/const.h
@@ -1,4 +1,4 @@
 #pragma once
 
 #define VERTICAL_OFFSET 30
-#define HORIZONTAL_OFFSET_CYCLE 56
+#define HORIZONTAL_OFFSET 3
diff --git a/main.S b/main.S
index 202d79c..3106da5 100644
--- a/main.S
+++ b/main.S
@@ -30,6 +30,19 @@ main:
     ldi r16, 0x3        ; external interrupt 0 and 1, mask enable
     sts EIMSK, r16
 
+    ldi r16, 0x02       ; don't connect output pins to timer, CTC[1:0] mode
+    sts TCCR0A, r16
+    ldi r16, 0x03       ; CTC[2] mode, prescaler /64
+    sts TCCR0B, r16
+
+    ; init variables
+    ldi r16, 0
+    sts frame, r16
+    sts frame + 1, r16
+    sts line + 1, r16
+    ldi r16, 1
+    sts line, r16
+
     sei                 ; global interrupt enable
 
 1:
@@ -56,14 +69,40 @@ int_horizontal_sync:    ; +3
 enter:
     ; here, +23 or +24 cycles have passed since horizontal sync
     ; so, there are still ~168 cycles before first useful data
-    ; or 56 3-cycle instructions (HORIZONTAL_OFFSET_CYCLE)
-    ldi r31, HORIZONTAL_OFFSET_CYCLE    ; skip back porch
-1:
-    dec r31
-    brne 1b
+    ldi r31, 0
+    sts TCNT0, r31
+    ldi r31, HORIZONTAL_OFFSET  ; set counter TOP
+    sts OCR0A, r31
 
-    ; do things
+    ldi r31, 0x7        ; clear any pending interrupt
+    sts TIFR0, r31
+
+    lds r31, TIMSK0
+    ori r31, 0x02       ; mask enable interrupt timer A
+    sts TIMSK0, r31
+
+int_horizontal_sync_end:
+    pop r30
+    pop r31
+    out IO(SREG), r31
+    pop r31
+    reti
+
+.global int_timer_0
+int_timer_0:
+    ; here we are at the beginning of the visible line
+    push r31
+    in r31, IO(SREG)
+    push r31
+
+    ; turn off interrupt
+    lds r31, TIMSK0
+    andi r31, 0xfd      ; mask disable interrupt timer A
+    sts TIMSK0, r31
+
+    ; draw things
     lds r31, frame
+    andi r31, 0x70
     cpi r31, 0
     breq 2f
 1:
@@ -73,14 +112,20 @@ enter:
 
     sbi IO(PORTB), 4
     nop
+    cbi IO(PORTB), 4
     nop
+    sbi IO(PORTB), 4
     nop
+    cbi IO(PORTB), 4
     nop
+    sbi IO(PORTB), 4
+    nop
+    cbi IO(PORTB), 4
+    nop
+    sbi IO(PORTB), 4
     nop
     cbi IO(PORTB), 4
 
-int_horizontal_sync_end:
-    pop r30
     pop r31
     out IO(SREG), r31
     pop r31
diff --git a/main.c b/main.c
index 168862f..c7dfacf 100644
--- a/main.c
+++ b/main.c
@@ -7,4 +7,6 @@ ISR(INT0_vect, ISR_NAKED) {
 ISR(INT1_vect, ISR_NAKED) {
     asm("jmp int_horizontal_sync");
 }
-
+ISR(TIMER0_COMPA_vect, ISR_NAKED) {
+    asm("jmp int_timer_0");
+}