Commit Graph

15 Commits

Author SHA1 Message Date
eaef011cbd generates an hardwired test pattern
This does not work as expected, and I don't understand why.
Clock cycle count seems ok, but if there are no changes in the pixels,
it seems to go faster
2021-08-11 09:04:59 +02:00
5bb884c502 hardwired jump table
This makes the microcontroller very application dependent,
but may save use some headaches.
The idea is to write a program to produce the code to show a
complex drawing.
2021-08-10 09:26:51 +02:00
53da6b7171 an hardcoded demo
prints "RE", a vertical line, and a counter
2021-07-03 16:42:32 +02:00
1764a5f2b3 line buffer dynamic update 2021-07-03 15:44:01 +02:00
9eaf78d6b5 introduced line buffer of 160 pixel 2021-07-03 15:02:01 +02:00
77b1858311 using a prescaler (eg /64) may lead to horizontal offset errors
because 1cycle off actually means many cycles off (eg 64)
2021-07-03 12:05:49 +02:00
2abac03779 semi working timer for skipping back porch 2021-07-03 11:54:31 +02:00
48da25958e back porch skipping, wasting clock cycles, basically 2021-06-28 21:54:25 +02:00
1f3f3f36f2 line, frame as words (16 bit) 2021-06-28 21:38:39 +02:00
0448c64be4 do nothing while not in interrupt 2021-06-27 23:08:47 +02:00
f3ce016a06 vertical line, scrolling from left to right
sufficiently handles the back/front porch without disrupting the sync
signal
todo improvement: compute a sensible amount of cycles to waste during
the porch
2021-06-27 22:37:11 +02:00
14fd0412d4 something strange is happening 2021-06-27 21:57:02 +02:00
97e0ff26fa "diagonal line"
not the whole screen, but vertically locked
actually it has some issues, there is a single dot (at the
end/beginning of a cycle) that messes up the horizontal sync and moves
all the picture... must be fixed
2021-06-26 23:42:23 +02:00
29990cd93a "diagonal line"
not vertically locked, just a test
also not the whole screen, just a bit
2021-06-26 22:34:22 +02:00
b7004a0171 first commit
vertical line at about 1/3 of the horizontal line
2021-06-26 19:15:17 +02:00