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giomba:feat/polling
giomba:feat/dynamiclbuf
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compare: giomba:master
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giomba:feature/dvd
giomba:master
giomba:feat/polling
giomba:feat/dynamiclbuf

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feature/dv ... master

5 changed files with 80 additions and 203 deletions
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23
const.h
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@ -1,21 +1,8 @@
#pragma once #pragma once
#define FRAME_SYSCLOCK_WIDTH 1024 // [sysclock] #define VERTICAL_OFFSET 30
#define FRAME_LINE_HEIGHT 256 // [line] #define HORIZONTAL_OFFSET 192
#define LINE_BUFFER_SIZE 160
#define BACK_PORCH_SYSCLOCK_OFFSET 80 // [sysclock] #define BLACK 0x00
#define FRONT_PORCH_SYSCLOCK_OFFSET 40 // [sysclock] #define WHITE 0xff
#define SPRITE_PIXEL_WIDTH 80 // [sysclock]
#define SPRITE_LINE_HEIGHT 64 // [line]
#define SYSCLOCK_PER_PIXEL 4
#define SPRITE_SYSCLOCK_WIDTH (SPRITE_PIXEL_WIDTH * SYSCLOCK_PER_PIXEL)
// Time spent from the horizontal sync pulse,
// to the first displayed dot.
// This is given as the sum of:
// + HSYNC_INT_TUNE
// + HSYNC_TIMER_TUNE
// + sysclock duration of "C" interrupt part
#define HSYNC_SYSCLOCK_TUNE 70 // [sysclock] (approx)

122
main.S
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@ -36,82 +36,80 @@ main_asm:
1: 1:
rjmp 1b rjmp 1b
.global int_horizontal_sync_s .global int_horizontal_sync
int_horizontal_sync_s: int_horizontal_sync: ; +3
push r31 ; +2 push r31 ; +5
push r30 ; +2 in r31, IO(SREG) ; +6, status register
push r31 ; +8
push r30 ; +10
; load timer to trigger isr at the beginning of the visible scanline ; if (line >= VERTICAL_OFFSET), then enter
; reset counter to 0 lds r30, line ; +12
ldi r31, 0 ; +1 lds r31, line + 1 ; +14
sts TCNT1H, r31 ; +2 adiw z, 1 ; +16
sts TCNT1L, r31 ; +2 sts line, r30 ; +18
sts line + 1, r31 ; +20
cpi r31, 0 ; +21
breq enter ; +23
jmp int_horizontal_sync_end
; set counter TOP (MSB first!) enter:
lds r31, hpos + 1 ; +2 ; here, +23 cycles have passed since horizontal sync
lds r30, hpos ; +2 ; so, there are still ~168 cycles before first useful data
sts OCR1AH, r31 ; +2 ldi r31, 0
sts OCR1AL, r30 ; +2 sts TCNT0, r31
ldi r31, HORIZONTAL_OFFSET ; set counter TOP
sts OCR0A, r31
; clear any pending interrupt ldi r31, 0x7 ; clear any pending interrupt
ldi r31, 0x7 ; +1 sts TIFR0, r31
sts TIFR1, r31 ; +2
; enable interrupt timer A lds r31, TIMSK0
lds r31, TIMSK1 ; +2 ori r31, 0x02 ; mask enable interrupt timer A
ori r31, 0x02 ; +1 sts TIMSK0, r31
sts TIMSK1, r31 ; +2
; total: 25
; HSYNC_INT_TUNE = 25
; this adds up for HSYNC_SYSCLOCK_TUNE
int_horizontal_sync_end:
pop r30 pop r30
pop r31 pop r31
ret out IO(SREG), r31
pop r31
reti
.global int_timer_1 .global int_timer_0
int_timer_1: int_timer_0:
; here we are at the beginning of the visible line ; here we are at the beginning of the visible line
; jmp (from C) ; +3 push r31
push r31 ; +2 in r31, IO(SREG)
in r31, IO(SREG) ; +1 push r31
push r31 ; +2 push r30
push r30 ; +2 push r29
push r29 ; +2
push r25 ; +2
; turn off interrupt ; turn off interrupt
lds r31, TIMSK1 ; +2 lds r31, TIMSK0
andi r31, 0xfd ; mask disable interrupt timer A, +1 andi r31, 0xfd ; mask disable interrupt timer A
sts TIMSK1, r31 ; +2 sts TIMSK0, r31
lds r31, show_image ; +2 lds r31, show_image
cpi r31, 0x1 ; +1 cpi r31, 0x1
brne jump_table_return_address ; +1 (not taken) brne jump_table_return_address
lds zl, current_jump_table ; +2 lds zl, current_jump_table
lds zh, current_jump_table + 1 ; +2 lds zh, current_jump_table + 1
clr r0 ; +1 ; ldi zl, pm_lo8(line_jump_table_0)
lds r29, line ; +2 ; ldi zh, pm_hi8(line_jump_table_0)
lds r25, vpos ; +2
sub r29, r25 ; +1
add zl, r29 ; +1 clr r0
adc zh, r0 ; +1 lds r29, line
add zl, r29 ; +1 add zl, r29
adc zh, r0 ; +1 adc zh, r0
add zl, r29
adc zh, r0
ijmp ; +2 ijmp
; total: 39
; HSYNC_TIMER_TUNE = 39
; this adds up for HSYNC_SYSCLOCK_TUNE
.global jump_table_return_address .global jump_table_return_address
jump_table_return_address: jump_table_return_address:
pop r25
pop r29 pop r29
pop r30 pop r30
pop r31 pop r31
@ -119,8 +117,8 @@ jump_table_return_address:
pop r31 pop r31
reti reti
.global int_vertical_sync_s .global int_vertical_sync
int_vertical_sync_s: int_vertical_sync:
push r31 push r31
in r31, IO(SREG) in r31, IO(SREG)
push zl push zl
@ -128,6 +126,12 @@ int_vertical_sync_s:
push yl push yl
push yh push yh
lds r31, frame + 1
lds r30, frame
adiw z, 1
sts frame + 1, r31
sts frame, r30
ldi r30, 1 ldi r30, 1
ldi r31, 0 ldi r31, 0
sts line, r30 sts line, r30

61
main.c
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@ -18,55 +18,17 @@ volatile uint16_t frame = 0;
volatile uint16_t line = 0xfe; volatile uint16_t line = 0xfe;
volatile uint8_t image = 0xff; volatile uint8_t image = 0xff;
// horizontal and vertical position ISR(INT0_vect, ISR_NAKED) {
// (and current increments) // vertical sync interrupt
// of bouncing sprite asm("jmp int_vertical_sync");
volatile uint8_t vpos = 0;
volatile uint16_t hpos = 0;
volatile int8_t vinc = +1;
volatile int8_t hinc = +1;
// vertical sync interrupt
void int_vertical_sync_s(void);
ISR(INT0_vect) {
// count frames
frame += 1;
// move sprite
vpos += vinc;
hpos += hinc;
// invert bouncing direction
if (vpos == 0)
vinc = +1;
if (vpos == FRAME_LINE_HEIGHT - SPRITE_LINE_HEIGHT)
vinc = -1;
if (hpos == BACK_PORCH_SYSCLOCK_OFFSET)
hinc = +1;
if (hpos == FRAME_SYSCLOCK_WIDTH - SPRITE_SYSCLOCK_WIDTH -
FRONT_PORCH_SYSCLOCK_OFFSET - HSYNC_SYSCLOCK_TUNE)
hinc = -1;
int_vertical_sync_s();
} }
ISR(INT1_vect, ISR_NAKED) {
// horizontal sync interrupt // horizontal sync interrupt
void int_horizontal_sync_s(void); asm("jmp int_horizontal_sync");
ISR(INT1_vect) {
// count lines
line += 1;
// we are past the last line of the sprite
if (line >= vpos + SPRITE_LINE_HEIGHT)
return;
if (line >= vpos)
int_horizontal_sync_s();
} }
ISR(TIMER0_COMPA_vect, ISR_NAKED) {
ISR(TIMER1_COMPA_vect, ISR_NAKED) { // back porch timer interrupt
// end-of back porch timer interrupt asm("jmp int_timer_0");
asm("jmp int_timer_1");
} }
// external assembly main loop // external assembly main loop
@ -84,8 +46,9 @@ int main() {
EICRA = 0x0a; // external interrupt 0 and 1, falling edge EICRA = 0x0a; // external interrupt 0 and 1, falling edge
EIMSK = 0x03; // external interrupt 0 and 1, mask enable EIMSK = 0x03; // external interrupt 0 and 1, mask enable
TCCR1A = 0x00; // don't connect output pins to timer, CTC[1:0] mode TCCR0A = 0x02; // don't connect output pins to timer, CTC[1:0] mode
TCCR1B = 0x09; // CTC[3:2] mode, no prescaler
TCCR0B = 0x01; // CTC[2] mode, no prescaler
main_asm(); main_asm();
} }

77
samples/bouncing-logo.pbm
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@ -1,77 +0,0 @@
P1
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samples/bouncing-logo.xcf
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