112 lines
1.7 KiB
ArmAsm
112 lines
1.7 KiB
ArmAsm
#include <avr/io.h>
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#include "macro.h"
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#include "const.h"
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.data
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frame:
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.word 0
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line:
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.word 0
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.text
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.global main
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main:
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ldi r16, 0x30 ; port B, pin 4 and 5 as output
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sts DDRB, r16
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; set interrupt vectors at address 0x0, not bootloader
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; timing is important, see atmel datasheet
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ldi r16, (1 << IVCE)
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ldi r17, 0
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out IO(MCUCR), r16
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out IO(MCUCR), r17
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ldi r16, 0xa ; external interrupt 0 and 1, falling edge
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sts EICRA, r16
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ldi r16, 0x3 ; external interrupt 0 and 1, mask enable
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sts EIMSK, r16
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sei ; global interrupt enable
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1:
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rjmp 1b
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.global int_horizontal_sync
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int_horizontal_sync:
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push r31
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in r31, IO(SREG) ; status register
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push r31
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push r30
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; if (line >= VERTICAL_OFFSET), then enter
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lds r30, line
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lds r31, line + 1
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adiw z, 1
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sts line, r30
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sts line + 1, r31
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cpi r31, 0
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brne enter
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cpi r30, VERTICAL_OFFSET
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brlo int_horizontal_sync_end
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enter:
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ldi r31, HORIZONTAL_OFFSET_CYCLE ; skip back porch
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1:
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dec r31
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brne 1b
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; do things
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lds r31, frame
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cpi r31, 0
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breq 2f
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1:
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dec r31
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brne 1b
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2:
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sbi IO(PORTB), 4
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nop
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nop
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nop
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nop
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nop
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cbi IO(PORTB), 4
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int_horizontal_sync_end:
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pop r30
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pop r31
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out IO(SREG), r31
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pop r31
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reti
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.global int_vertical_sync
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int_vertical_sync:
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push r31
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in r31, IO(SREG)
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push r31
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push r30
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lds r31, frame + 1
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lds r30, frame
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adiw z, 1
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sts frame + 1, r31
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sts frame, r30
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ldi r30, 1
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ldi r31, 0
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sts line, r30
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sts line + 1, r31
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int_vertical_sync_end:
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pop r30
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pop r31
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out IO(SREG), r31
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pop r31
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reti
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