92 lines
3.7 KiB
Plaintext
92 lines
3.7 KiB
Plaintext
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/*
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* Copyright (c) 2017, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* * Neither the name of Texas Instruments Incorporated nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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define symbol STACK_SIZE = 0x800; /* 2048 bytes */
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define symbol HEAP_SIZE = 0x100; /* 256 bytes */
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define symbol __intvec_start__ = 0x00000000;
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/*-Memory Regions-*/
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define symbol ROM_start__ = 0x00000000;
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define symbol ROM_end__ = 0x00057FFF;
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define symbol RAM_start__ = 0x20000000;
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define symbol RAM_end__ = 0x20013FFF;
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define symbol GPRAM_start__ = 0x11000000;
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define symbol GPRAM_end__ = 0x11001FFF;
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/* Define a memory region that covers the entire 4 GB addressable space */
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define memory mem with size = 4G;
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/* Define a region for the on-chip flash */
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define region FLASH_region = mem:[from ROM_start__ to ROM_end__];
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/* Define a region for the on-chip SRAM */
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define region RAM_region = mem:[from RAM_start__ to RAM_end__];
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/* Define a region for the on-chip GPRAM */
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define region GPRAM_region = mem:[from GPRAM_start__ to GPRAM_end__];
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/* Place the interrupt vectors at the start of flash */
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place at address mem:__intvec_start__ { readonly section .intvec };
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keep { section .intvec };
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/* Place the CCA area at the end of flash */
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place at end of FLASH_region { readonly section .ccfg };
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keep { section .ccfg };
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/* Place remaining 'read only' in Flash */
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place in FLASH_region { readonly };
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/* Place all read/write items into RAM */
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place in RAM_region { readwrite };
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initialize by copy { readwrite };
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/*
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* Define CSTACK block to contain .stack section. This enables the IAR IDE
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* to properly show the stack content during debug. Place stack at end of
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* retention RAM, do not initialize (initializing the stack will destroy the
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* return address from the initialization code, causing the processor to branch
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* to zero and fault)
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*/
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define block CSTACK with alignment = 8, size = STACK_SIZE { section .stack };
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place at end of RAM_region { block CSTACK };
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do not initialize { section .stack, section .noinit };
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/* Export stack top symbol. Used by startup file */
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define exported symbol STACK_TOP = RAM_end__ + 1;
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/* Primary Heap configuration */
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define block HEAP with alignment = 8, size = HEAP_SIZE { };
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/* Place heap just before CSTACK */
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place in RAM_region { block HEAP };
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