2017-12-03 21:56:13 +00:00
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/*
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* Copyright (c) 2017, George Oikonomou - http://www.spd.gr
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*---------------------------------------------------------------------------*/
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/**
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* \addtogroup dev
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* @{
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*
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* \defgroup gpio-hal GPIO Hardware Abstraction Layer
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*
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* The GPIO HAL provides a set of common functions that can be used in a
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* platform-independent fashion.
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*
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* Internally, the GPIO HAL handles edge detection handling and also provides
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* fallback functions for GPIO pin toggling if the hardware does not have
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* a direct method of toggling pins through direct register access.
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*
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* @{
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*
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* \file
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* Header file for the GPIO HAL
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*/
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/*---------------------------------------------------------------------------*/
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#ifndef GPIO_HAL_H_
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#define GPIO_HAL_H_
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/*---------------------------------------------------------------------------*/
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#include "contiki.h"
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#include <stdint.h>
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/*---------------------------------------------------------------------------*/
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/**
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* \brief Specifies whether software-based pin toggle is required
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*
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* Some MCUs allow GPIO pin toggling via direct register access. For these
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* MCUs, define GPIO_HAL_CONF_ARCH_SW_TOGGLE to 0 and then implement
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* gpio_hal_arch_toggle_pin() and gpio_hal_arch_toggle_pins()
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*
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* \sa gpio_hal_arch_toggle_pin()
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* \sa gpio_hal_arch_toggle_pins()
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*/
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#ifdef GPIO_HAL_CONF_ARCH_SW_TOGGLE
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#define GPIO_HAL_ARCH_SW_TOGGLE GPIO_HAL_CONF_ARCH_SW_TOGGLE
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#else
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#define GPIO_HAL_ARCH_SW_TOGGLE 1
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#endif
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/*---------------------------------------------------------------------------*/
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/**
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* \brief GPIO pin number representation
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*/
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typedef uint8_t gpio_hal_pin_t;
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/**
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* \brief GPIO pin configuration
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*
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* A logical representation of a pin's configuration. It is an OR combination
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* of GPIO_HAL_PIN_CFG_xyz macros.
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*/
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typedef uint8_t gpio_hal_pin_cfg_t;
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#ifdef GPIO_HAL_CONF_PIN_COUNT
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#define GPIO_HAL_PIN_COUNT GPIO_HAL_CONF_PIN_COUNT
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#else
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#define GPIO_HAL_PIN_COUNT 32
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#endif
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#if GPIO_HAL_PIN_COUNT > 32
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typedef uint64_t gpio_hal_pin_mask_t;
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#else
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/**
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* \brief GPIO pin mask representation
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*/
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typedef uint32_t gpio_hal_pin_mask_t;
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#endif
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typedef void (*gpio_hal_callback_t)(gpio_hal_pin_mask_t pin_mask);
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/*---------------------------------------------------------------------------*/
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#define GPIO_HAL_PIN_CFG_PULL_NONE 0x00
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#define GPIO_HAL_PIN_CFG_PULL_UP 0x01
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#define GPIO_HAL_PIN_CFG_PULL_DOWN 0x02
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#define GPIO_HAL_PIN_CFG_PULL_MASK (GPIO_HAL_PIN_CFG_PULL_UP | \
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GPIO_HAL_PIN_CFG_PULL_DOWN)
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#define GPIO_HAL_PIN_CFG_EDGE_NONE 0x00
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#define GPIO_HAL_PIN_CFG_EDGE_RISING 0x04
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#define GPIO_HAL_PIN_CFG_EDGE_FALLING 0x08
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#define GPIO_HAL_PIN_CFG_EDGE_BOTH (GPIO_HAL_PIN_CFG_EDGE_RISING | \
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GPIO_HAL_PIN_CFG_EDGE_FALLING)
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#define GPIO_HAL_PIN_CFG_INT_DISABLE 0x00
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#define GPIO_HAL_PIN_CFG_INT_ENABLE 0x80
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#define GPIO_HAL_PIN_CFG_INT_MASK 0x80
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/*---------------------------------------------------------------------------*/
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/**
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* \brief Datatype for GPIO event handlers
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*
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* A GPIO event handler is a function that gets called whenever a pin triggers
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* an event. The same handler can be registered to handle events for more than
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* one pin by setting the respective pin's position but in \e pin_mask.
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*/
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typedef struct gpio_hal_event_handler_s {
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struct gpio_hal_event_handler_s *next;
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gpio_hal_callback_t handler;
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gpio_hal_pin_mask_t pin_mask;
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} gpio_hal_event_handler_t;
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/*---------------------------------------------------------------------------*/
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2018-02-28 10:41:05 +00:00
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/**
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* \brief Unknown GPIO
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*
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* A default GPIO value for unknown GPIO
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*/
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#define GPIO_HAL_PIN_UNKNOWN 0xFF
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/*---------------------------------------------------------------------------*/
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2017-12-03 21:56:13 +00:00
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/**
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* \name Core GPIO functions
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*
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* Functions implemented by the HAL itself
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* @{
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*/
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/**
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* \brief Initialise the GPIO HAL
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*/
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void gpio_hal_init(void);
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/**
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* \brief Register a function to be called whenever a pin triggers an event
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* \param handler The handler representation
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*
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* The handler must be pre-allocated statically by the caller.
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*
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* This function can be used to register a function to be called by the HAL
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* whenever a GPIO interrupt occurs.
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*
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* \sa gpio_hal_event_handler
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*/
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void gpio_hal_register_handler(gpio_hal_event_handler_t *handler);
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/**
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* \brief The platform-independent GPIO event handler
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* \param pins OR mask of pins that generated an event
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*
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* Whenever a GPIO input interrupt occurs (edge or level detection) and an ISR
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* is triggered, the ISR must call this function, passing as argument an ORd
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* mask of the pins that triggered the interrupt. This function will then
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* call the registered event handlers (if any) for the pins that triggered the
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* event. The platform code should make no assumptions as to the order that
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* the handlers will be called.
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*
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* If a pin set in the mask has an event handler registered, this function
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* will call the registered handler.
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*
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* This function will not clear any CPU interrupt flags, this should be done
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* by the calling ISR.
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*
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* \sa gpio_hal_register_handler
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*/
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void gpio_hal_event_handler(gpio_hal_pin_mask_t pins);
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/**
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* \brief Convert a pin to a pin mask
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* \param pin The pin
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* \return The corresponding mask
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*/
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#define gpio_hal_pin_to_mask(pin) (1 << (pin))
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/** @} */
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/*---------------------------------------------------------------------------*/
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/**
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* \name Functions to be provided by the platform
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*
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* All the functions below must be provided by the platform's developer. The
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* HAL offers the developer a number of options of how to provide the required
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* functionality.
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*
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* - The developer can provide a symbol. For example, the developer can create
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* a .c file and implement a function called gpio_hal_arch_set_pin()
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* - The developer can provide a function-like macro that has the same name as
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* the function declared here. In this scenario, the declaration here will
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* be removed by the pre-processor. For example, the developer can do
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* something like:
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*
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* \code
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* #define gpio_hal_arch_write_pin(p, v) platform_sdk_function(p, v)
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* \endcode
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*
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* - The developer can provide a static inline implementation. For this to
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* work, the developer can do something like:
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*
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* \code
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* #define gpio_hal_arch_set_pin(p) set_pin(p)
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* static inline void set_pin(gpio_hal_pin_t pin) { ... }
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* \endcode
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*
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* In the latter two cases, the developer will likely provide implementations
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* in a header file. In this scenario, one of the platform's configuration
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* files must define GPIO_HAL_CONF_ARCH_HDR_PATH to the name of this header
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* file. For example:
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*
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* \code
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* #define GPIO_HAL_CONF_ARCH_HDR_PATH "dev/gpio-hal-arch.h"
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* \endcode
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*
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* @{
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*/
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/*---------------------------------------------------------------------------*/
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/* Include Arch-Specific conf */
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#ifdef GPIO_HAL_CONF_ARCH_HDR_PATH
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#include GPIO_HAL_CONF_ARCH_HDR_PATH
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#endif /* GPIO_HAL_CONF_ARCH_HDR_PATH */
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/*---------------------------------------------------------------------------*/
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#ifndef gpio_hal_arch_interrupt_enable
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/**
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* \brief Enable interrupts for a gpio pin
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* \param pin The GPIO pin number (0...GPIO_HAL_PIN_COUNT - 1)
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*
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* It is the platform developer's responsibility to provide an implementation.
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*
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* The implementation can be provided as a global symbol, an inline function
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* or a function-like macro, as described above.
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*/
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void gpio_hal_arch_interrupt_enable(gpio_hal_pin_t pin);
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#endif
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/*---------------------------------------------------------------------------*/
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#ifndef gpio_hal_arch_interrupt_disable
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/**
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* \brief Disable interrupts for a gpio pin
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* \param pin The GPIO pin number (0...GPIO_HAL_PIN_COUNT - 1)
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*
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* It is the platform developer's responsibility to provide an implementation.
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*
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* The implementation can be provided as a global symbol, an inline function
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* or a function-like macro, as described above.
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*/
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void gpio_hal_arch_interrupt_disable(gpio_hal_pin_t pin);
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#endif
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/*---------------------------------------------------------------------------*/
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#ifndef gpio_hal_arch_pin_cfg_set
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/**
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* \brief Configure a gpio pin
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* \param pin The GPIO pin number (0...GPIO_HAL_PIN_COUNT - 1)
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* \param cfg The configuration
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*
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* \e cfg is an OR mask of GPIO_HAL_PIN_CFG_xyz
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*
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* The implementation of this function also has to make sure that \e pin is
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* configured as software-controlled GPIO.
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*
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* It is the platform developer's responsibility to provide an implementation.
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*
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* The implementation can be provided as a global symbol, an inline function
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* or a function-like macro, as described above.
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*/
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void gpio_hal_arch_pin_cfg_set(gpio_hal_pin_t pin, gpio_hal_pin_cfg_t cfg);
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#endif
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/*---------------------------------------------------------------------------*/
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#ifndef gpio_hal_arch_pin_cfg_get
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/**
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* \brief Read the configuration of a GPIO pin
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* \param pin The GPIO pin number (0...GPIO_HAL_PIN_COUNT - 1)
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* \return An OR mask of GPIO_HAL_PIN_CFG_xyz
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*
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* It is the platform developer's responsibility to provide an implementation.
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*
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* The implementation can be provided as a global symbol, an inline function
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* or a function-like macro, as described above.
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*/
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gpio_hal_pin_cfg_t gpio_hal_arch_pin_cfg_get(gpio_hal_pin_t pin);
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#endif
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/*---------------------------------------------------------------------------*/
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#ifndef gpio_hal_arch_pin_set_input
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/**
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* \brief Configure a pin as GPIO input
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* \param pin The GPIO pin number (0...GPIO_HAL_PIN_COUNT - 1)
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*
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* The implementation of this function also has to make sure that \e pin is
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* configured as software-controlled GPIO.
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*
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* It is the platform developer's responsibility to provide an implementation.
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*
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* The implementation can be provided as a global symbol, an inline function
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* or a function-like macro, as described above.
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*/
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void gpio_hal_arch_pin_set_input(gpio_hal_pin_t pin);
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#endif
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/*---------------------------------------------------------------------------*/
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#ifndef gpio_hal_arch_pin_set_output
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/**
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* \brief Configure a pin as GPIO output
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* \param pin The GPIO pin number (0...GPIO_HAL_PIN_COUNT - 1)
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*
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* The implementation of this function also has to make sure that \e pin is
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* configured as software-controlled GPIO.
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*
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* It is the platform developer's responsibility to provide an implementation.
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*
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* The implementation can be provided as a global symbol, an inline function
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* or a function-like macro, as described above.
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*/
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void gpio_hal_arch_pin_set_output(gpio_hal_pin_t pin);
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#endif
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/*---------------------------------------------------------------------------*/
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#ifndef gpio_hal_arch_set_pin
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/**
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* \brief Set a GPIO pin to logical high
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* \param pin The GPIO pin number (0...GPIO_HAL_PIN_COUNT - 1)
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*
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* It is the platform developer's responsibility to provide an implementation.
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*
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* The implementation can be provided as a global symbol, an inline function
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* or a function-like macro, as described above.
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*/
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void gpio_hal_arch_set_pin(gpio_hal_pin_t pin);
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#endif
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/*---------------------------------------------------------------------------*/
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#ifndef gpio_hal_arch_clear_pin
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/**
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* \brief Clear a GPIO pin (logical low)
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* \param pin The GPIO pin number (0...GPIO_HAL_PIN_COUNT - 1)
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*
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* It is the platform developer's responsibility to provide an implementation.
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*
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* The implementation can be provided as a global symbol, an inline function
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* or a function-like macro, as described above.
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*/
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void gpio_hal_arch_clear_pin(gpio_hal_pin_t pin);
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#endif
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/*---------------------------------------------------------------------------*/
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#ifndef gpio_hal_arch_toggle_pin
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/**
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* \brief Toggle a GPIO pin
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* \param pin The GPIO pin number (0...GPIO_HAL_PIN_COUNT - 1)
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*
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* Some MCUs allow GPIO pin toggling directly via register access. In this
|
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* case, it is a good idea to provide an implementation of this function.
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* However, a default, software-based implementation is also provided by the
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* HAL and can be used if the MCU does not have a pin toggle register. To use
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* the HAL function, define GPIO_HAL_ARCH_SW_TOGGLE as 1. To provide your own
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* implementation, define GPIO_HAL_ARCH_SW_TOGGLE as 0.
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*
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* The implementation can be provided as a global symbol, an inline function
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* or a function-like macro, as described above.
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*/
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void gpio_hal_arch_toggle_pin(gpio_hal_pin_t pin);
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#endif
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/*---------------------------------------------------------------------------*/
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#ifndef gpio_hal_arch_read_pin
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/**
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* \brief Read a GPIO pin
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* \param pin The GPIO pin number (0...GPIO_HAL_PIN_COUNT - 1)
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* \retval 0 The pin is logical low
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* \retval 1 The pin is logical high
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*
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* It is the platform developer's responsibility to provide an implementation.
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*
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* The implementation can be provided as a global symbol, an inline function
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* or a function-like macro, as described above.
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*/
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uint8_t gpio_hal_arch_read_pin(gpio_hal_pin_t pin);
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#endif
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/*---------------------------------------------------------------------------*/
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#ifndef gpio_hal_arch_write_pin
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/**
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* \brief Write a GPIO pin
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* \param pin The GPIO pin number (0...GPIO_HAL_PIN_COUNT - 1)
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* \param value 0: Logical low; 1: Logical high
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*
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* It is the platform developer's responsibility to provide an implementation.
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*
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* The implementation can be provided as a global symbol, an inline function
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* or a function-like macro, as described above.
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*/
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void gpio_hal_arch_write_pin(gpio_hal_pin_t pin, uint8_t value);
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#endif
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/*---------------------------------------------------------------------------*/
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#ifndef gpio_hal_arch_set_pins
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/**
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* \brief Set multiple pins to logical high
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* \param pins An ORd pin mask of the pins to set
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*
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* A pin will be set to logical high if its position in \e pins is set. For
|
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* example you can set pins 0 and 3 by passing 0x09.
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*
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* It is the platform developer's responsibility to provide an implementation.
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*
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* The implementation can be provided as a global symbol, an inline function
|
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* or a function-like macro, as described above.
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*/
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void gpio_hal_arch_set_pins(gpio_hal_pin_mask_t pins);
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|
#endif
|
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|
|
/*---------------------------------------------------------------------------*/
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|
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#ifndef gpio_hal_arch_clear_pins
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/**
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* \brief Clear multiple pins to logical low
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* \param pins An ORd pin mask of the pins to clear
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*
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* A pin will be set to logical low if its position in \e pins is set. For
|
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* example you can clear pins 0 and 3 by passing 0x09.
|
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|
|
*
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|
|
* It is the platform developer's responsibility to provide an implementation.
|
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|
|
*
|
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|
|
* The implementation can be provided as a global symbol, an inline function
|
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|
|
* or a function-like macro, as described above.
|
|
|
|
*/
|
|
|
|
void gpio_hal_arch_clear_pins(gpio_hal_pin_mask_t pins);
|
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|
|
#endif
|
|
|
|
/*---------------------------------------------------------------------------*/
|
|
|
|
#ifndef gpio_hal_arch_toggle_pins
|
|
|
|
/**
|
|
|
|
* \brief Toggle multiple pins
|
|
|
|
* \param pins An ORd pin mask of the pins to toggle
|
|
|
|
*
|
|
|
|
* A pin will be toggled if its position in \e pins is set. For example you
|
|
|
|
* can toggle pins 0 and 3 by passing 0x09.
|
|
|
|
*
|
|
|
|
* Some MCUs allow GPIO pin toggling directly via register access. In this
|
|
|
|
* case, it is a good idea to provide an implementation of this function.
|
|
|
|
* However, a default, software-based implementation is also provided by the
|
|
|
|
* HAL and can be used if the MCU does not have a pin toggle register. To use
|
|
|
|
* the HAL function, define GPIO_HAL_ARCH_SW_TOGGLE as 1. To provide your own
|
|
|
|
* implementation, define GPIO_HAL_ARCH_SW_TOGGLE as 0.
|
|
|
|
*
|
|
|
|
* The implementation can be provided as a global symbol, an inline function
|
|
|
|
* or a function-like macro, as described above.
|
|
|
|
*/
|
|
|
|
void gpio_hal_arch_toggle_pins(gpio_hal_pin_mask_t pins);
|
|
|
|
#endif
|
|
|
|
/*---------------------------------------------------------------------------*/
|
|
|
|
#ifndef gpio_hal_arch_read_pins
|
|
|
|
/**
|
|
|
|
* \brief Read multiple pins
|
|
|
|
* \param pins An ORd pin mask of the pins to read
|
|
|
|
* \retval An ORd mask of the pins that are high
|
|
|
|
*
|
|
|
|
* If the position of the pin in \e pins is set and the pin is logical high
|
|
|
|
* then the position of the pin in the return value will be set. For example,
|
|
|
|
* if you pass 0x09 as the value of \e pins and the return value is 0x08 then
|
|
|
|
* pin 3 is logical high and pin 0 is logical low.
|
|
|
|
*
|
|
|
|
* It is the platform developer's responsibility to provide an implementation.
|
|
|
|
*
|
|
|
|
* The implementation can be provided as a global symbol, an inline function
|
|
|
|
* or a function-like macro, as described above.
|
|
|
|
*/
|
|
|
|
gpio_hal_pin_mask_t gpio_hal_arch_read_pins(gpio_hal_pin_mask_t pins);
|
|
|
|
#endif
|
|
|
|
/*---------------------------------------------------------------------------*/
|
|
|
|
#ifndef gpio_hal_arch_write_pins
|
|
|
|
/**
|
|
|
|
* \brief Write multiple pins
|
|
|
|
* \param pins An ORd pin mask of the pins to write
|
|
|
|
* \param value An ORd mask of the value to write
|
|
|
|
*
|
|
|
|
* The function will modify GPIO pins that have their position in the mask set.
|
|
|
|
* pins, the function will write the value specified in the corresponding
|
|
|
|
* position in \e value.
|
|
|
|
|
|
|
|
* For example, you can set pin 3 and clear pin 0 by a single call to this
|
|
|
|
* function. To achieve this, \e pins must be 0x09 and \e value 0x08.
|
|
|
|
*
|
|
|
|
* It is the platform developer's responsibility to provide an implementation.
|
|
|
|
*
|
|
|
|
* There is no guarantee that this function will result in an atomic operation.
|
|
|
|
*
|
|
|
|
* The implementation can be provided as a global symbol, an inline function
|
|
|
|
* or a function-like macro, as described above.
|
|
|
|
*/
|
|
|
|
void gpio_hal_arch_write_pins(gpio_hal_pin_mask_t pins,
|
|
|
|
gpio_hal_pin_mask_t value);
|
|
|
|
#endif
|
|
|
|
/** @} */
|
|
|
|
/*---------------------------------------------------------------------------*/
|
|
|
|
#endif /* GPIO_HAL_H_ */
|
|
|
|
/*---------------------------------------------------------------------------*/
|
|
|
|
/**
|
|
|
|
* @}
|
|
|
|
* @}
|
|
|
|
*/
|