454 lines
12 KiB
C
454 lines
12 KiB
C
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/*
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* uIP lan91c96 (smc9194) driver
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* Based on cs8900a driver, copyrighted (c) 2001, by Adam Dunkels
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* Copyright (c) 2003, Josef Soucek
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* All rights reserved.
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*
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* Ethernet card for Commodore 64, based on lan91c96 chip
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* is a device created by IDE64 Project team.
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* More information: http://ide64.come.to
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote
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* products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
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* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
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* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $Id: lan91c96.c,v 1.1 2006/06/17 22:41:26 adamdunkels Exp $
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*
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*/
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#include "lan91c96.h"
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#include "contiki-net.h"
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#include <stdio.h>
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// #define DEBUG
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#define ETHBASE 0xde10
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#define ETHBSR ETHBASE+0x0e /* Bank select register R/W (2B) */
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/* Register bank 0 */
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#define ETHTCR ETHBASE /* Transmition control register R/W (2B) */
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#define ETHEPHSR ETHBASE+2 /* EPH status register R/O (2B) */
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#define ETHRCR ETHBASE+4 /* Receive control register R/W (2B) */
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#define ETHECR ETHBASE+6 /* Counter register R/O (2B) */
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#define ETHMIR ETHBASE+8 /* Memory information register R/O (2B) */
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#define ETHMCR ETHBASE+0x0a /* Memory Config. reg. +0 R/W +1 R/O (2B) */
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/* Register bank 1 */
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#define ETHCR ETHBASE /* Configuration register R/W (2B) */
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#define ETHBAR ETHBASE+2 /* Base address register R/W (2B) */
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#define ETHIAR ETHBASE+4 /* Individual address register R/W (6B) */
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#define ETHGPR ETHBASE+0x0a /* General address register R/W (2B) */
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#define ETHCTR ETHBASE+0x0c /* Control register R/W (2B) */
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/* Register bank 2 */
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#define ETHMMUCR ETHBASE /* MMU command register W/O (1B) */
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#define ETHAUTOTX ETHBASE+1 /* AUTO TX start register R/W (1B) */
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#define ETHPNR ETHBASE+2 /* Packet number register R/W (1B) */
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#define ETHARR ETHBASE+3 /* Allocation result register R/O (1B) */
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#define ETHFIFO ETHBASE+4 /* FIFO ports register R/O (2B) */
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#define ETHPTR ETHBASE+6 /* Pointer register R/W (2B) */
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#define ETHDATA ETHBASE+8 /* Data register R/W (4B) */
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#define ETHIST ETHBASE+0x0c /* Interrupt status register R/O (1B) */
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#define ETHACK ETHBASE+0x0c /* Interrupt acknowledge register W/O (1B) */
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#define ETHMSK ETHBASE+0x0d /* Interrupt mask register R/W (1B) */
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/* Register bank 3 */
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#define ETHMT ETHBASE /* Multicast table R/W (8B) */
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#define ETHMGMT ETHBASE+8 /* Management interface R/W (2B) */
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#define ETHREV ETHBASE+0x0a /* Revision register R/W (2B) */
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#define ETHERCV ETHBASE+0x0c /* Early RCV register R/W (2B) */
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#define BANK(num) asm("lda #%b", num); asm("sta %w", ETHBSR);
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#ifdef DEBUG
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static void print_packet(u8_t *, u16_t);
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#endif
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static u8_t packet_status;
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static u16_t packet_length;
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/*-----------------------------------------------------------------------------------*/
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#pragma optimize(push, off)
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void lan91c96_init(void)
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{
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/* Check if high byte is 0x33 */
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asm("lda %w", ETHBSR+1);
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asm("cmp #$33");
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asm("beq %g", L1);
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asm("inc $d021"); /* Error */
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L1:
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/* Reset ETH card */
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BANK(0);
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asm("lda #%%10000000"); /* Software reset */
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asm("sta %w", ETHRCR+1);
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asm("lda #0");
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asm("sta %w", ETHRCR);
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asm("sta %w", ETHRCR+1);
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/* delay */
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asm("ldy #0");
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L2:
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asm("cmp ($ff,x)"); /* 6 cycles */
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asm("cmp ($ff,x)"); /* 6 cycles */
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asm("dey"); /* 2 cycles */
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asm("bne %g", L2); /* 3 cycles */
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/* 17*256=4352 => 4,4 ms */
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/* Enable transmit and receive */
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asm("lda #%%10000001"); /* Enable transmit TXENA, PAD_EN */
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asm("sta %w", ETHTCR);
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asm("lda #%%00000011"); /* Enable receive, strip CRC ??? */
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asm("sta %w", ETHRCR+1);
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BANK(1);
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asm("lda %w", ETHCR+1);
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asm("ora #%%00010000"); /* No wait (IOCHRDY) */
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asm("sta %w", ETHCR+1);
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asm("lda #%%00001001"); /* Auto release */
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asm("sta %w", ETHCTR+1);
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/* Set MAC address */
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asm("lda %v", uip_ethaddr);
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asm("sta %w", ETHIAR);
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asm("lda %v+1", uip_ethaddr);
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asm("sta %w", ETHIAR+1);
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asm("lda %v+2", uip_ethaddr);
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asm("sta %w", ETHIAR+2);
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asm("lda %v+3", uip_ethaddr);
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asm("sta %w", ETHIAR+3);
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asm("lda %v+4", uip_ethaddr);
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asm("sta %w", ETHIAR+4);
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asm("lda %v+5", uip_ethaddr);
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asm("sta %w", ETHIAR+5);
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BANK(2);
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asm("lda #%%00001111"); /* RCV INT, ALLOC INT, TX INT, TX EMPTY */
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asm("sta %w", ETHMSK);
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}
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#pragma optimize(pop)
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/*-----------------------------------------------------------------------------------*/
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#pragma optimize(push, off)
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u16_t lan91c96_poll(void)
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{
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#ifdef DEBUG
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BANK(0);
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printf("RAM: %d ", ((*(unsigned int *)(ETHMIR)) & 0xff00));
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BANK(2);
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#endif
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asm("lda %w", ETHIST);
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asm("and #%%00000001"); /* RCV INT */
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asm("bne %g", L1);
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/* No packet available */
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return 0;
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L1:
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#ifdef DEBUG
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printf("RCV: IRQ\n");
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#endif
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asm("lda #0");
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asm("sta %w", ETHPTR);
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asm("lda #%%11100000"); /* RCV,AUTO INCR.,READ */
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asm("sta %w", ETHPTR+1);
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asm("lda %w", ETHDATA); /* Status word */
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asm("lda %w", ETHDATA);
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asm("sta %v", packet_status); /* High byte only */
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asm("lda %w", ETHDATA); /* Total number of bytes */
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asm("sta %v", packet_length);
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asm("lda %w", ETHDATA);
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asm("sta %v+1", packet_length);
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/* Last word contain 'last data byte' and 0x60 */
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/* or 'fill byte' and 0x40 */
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packet_length -= 6; /* The packet contains 3 extra words */
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asm("lda %v", packet_status);
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asm("and #$10");
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asm("beq %g", L2);
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packet_length++;
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#ifdef DEBUG
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printf("RCV: odd number of bytes\n");
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#endif
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L2:
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#ifdef DEBUG
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printf("RCV: L:%d ST-HIGH:0x%02x ", packet_length, packet_status);
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#endif
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if(packet_length > UIP_BUFSIZE) {
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/* Remove and release RX packet from FIFO */
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asm("lda #%%10000000");
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asm("sta %w", ETHMMUCR);
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#ifdef DEBUG
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printf("RCV: UIP_BUFSIZE exceeded - packet dropped!\n");
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#endif
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return 0;
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}
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asm("lda #<%v", uip_buf);
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asm("sta ptr1");
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asm("lda #>%v", uip_buf);
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asm("sta ptr1+1");
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asm("lda %v+1", packet_length);
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asm("sta tmp1");
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asm("ldy #0");
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L3:
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asm("lda %w", ETHDATA);
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asm("sta (ptr1),y");
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asm("iny");
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asm("bne %g", L4);
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asm("inc ptr1+1");
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L4:
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asm("cpy %v", packet_length);
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asm("bne %g", L3);
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asm("dec tmp1");
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asm("bpl %g", L3);
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/* Remove and release RX packet from FIFO */
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asm("lda #%%10000000");
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asm("sta %w", ETHMMUCR);
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#ifdef DEBUG
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print_packet(uip_buf, packet_length);
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#endif
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return packet_length;
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}
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#pragma optimize(pop)
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/*-----------------------------------------------------------------------------------*/
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#pragma optimize(push, off)
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void lan91c96_send(void)
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{
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/* First 14+40 (IP and TCP header) is send from uip_buf */
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/* than data from uip_appdata */
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#ifdef DEBUG
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printf("SND: send packet\n");
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#endif
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asm("lda %v+1", uip_len);
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asm("ora #%%00100000"); /* Allocate memory for TX */
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asm("sta %w", ETHMMUCR);
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asm("ldy #8"); /* Wait... */
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L1: /* Wait for allocation ready */
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asm("lda %w", ETHIST);
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asm("and #%%00001000"); /* ALLOC INT */
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asm("bne %g", L2);
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asm("dey");
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asm("bne %g", L1);
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#ifdef DEBUG
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printf("SND: ERR: memory alloc timeout\n");
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#endif
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return;
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L2:
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#ifdef DEBUG
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printf("SND: packet memory allocated\n");
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#endif
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asm("lda #%%00001000"); /* Acknowledge int, is it necessary ??? */
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asm("sta %w", ETHACK);
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asm("lda %w", ETHARR);
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asm("sta %w", ETHPNR); /* Set packet address */
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asm("lda #0");
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asm("sta %w", ETHPTR);
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asm("lda #%%01000000"); /* AUTO INCR. */
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asm("sta %w", ETHPTR+1);
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#ifdef DEBUG
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printf("SND: L:%d ", uip_len);
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#endif
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asm("lda #0"); /* Status written by CSMA */
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asm("sta %w", ETHDATA);
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asm("sta %w", ETHDATA);
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asm("lda %v", uip_len);
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asm("and #$01");
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asm("beq %g", L3);
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packet_length = uip_len + 5;
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asm("jmp %g", L4);
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L3:
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packet_length = uip_len + 6; /* +6 for status word, length and ctl byte */
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L4:
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#ifdef DEBUG
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printf("SND: L:%d ", packet_length);
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#endif
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asm("lda %v", packet_length);
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asm("sta %w", ETHDATA);
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asm("lda %v+1", packet_length);
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asm("sta %w", ETHDATA);
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#ifdef DEBUG
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print_packet(uip_buf, uip_len);
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#endif
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/* Send 14+40=54 bytes of header */
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if(uip_len <= UIP_LLH_LEN + UIP_TCPIP_HLEN) {
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#ifdef DEBUG
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printf("SND: short packet sent.\n");
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#endif
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asm("ldy #0");
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L5:
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asm("lda %v,y", uip_buf);
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asm("sta %w", ETHDATA);
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asm("iny");
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asm("cpy %v", uip_len);
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asm("bne %g", L5);
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} else {
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asm("ldy #0");
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L6:
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asm("lda %v,y", uip_buf);
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asm("sta %w", ETHDATA);
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asm("iny");
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asm("cpy #%b", UIP_LLH_LEN + UIP_TCPIP_HLEN);
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asm("bne %g", L6);
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packet_length = uip_len - (UIP_LLH_LEN + UIP_TCPIP_HLEN);
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asm("lda %v", uip_appdata); /* uip_appdata is pointer */
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asm("sta ptr1");
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asm("lda %v+1", uip_appdata);
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asm("sta ptr1+1");
|
||
|
|
|
||
|
|
asm("ldy #0");
|
||
|
|
L7:
|
||
|
|
asm("lda (ptr1),y");
|
||
|
|
asm("sta %w", ETHDATA);
|
||
|
|
asm("iny");
|
||
|
|
asm("bne %g", L8);
|
||
|
|
asm("inc ptr1+1");
|
||
|
|
L8:
|
||
|
|
asm("cpy %v", packet_length);
|
||
|
|
asm("bne %g", L7);
|
||
|
|
asm("dec %v+1", packet_length);
|
||
|
|
asm("bpl %g", L7);
|
||
|
|
}
|
||
|
|
|
||
|
|
asm("lda %v", packet_length);
|
||
|
|
asm("and #$01");
|
||
|
|
asm("beq %g", L9);
|
||
|
|
|
||
|
|
asm("lda #%%00100000");
|
||
|
|
asm("sta %w", ETHDATA); /* Control byte */
|
||
|
|
|
||
|
|
asm("lda #%%11000000"); /* ENQUEUE PACKET - transmit packet */
|
||
|
|
asm("sta %w", ETHMMUCR);
|
||
|
|
|
||
|
|
#ifdef DEBUG
|
||
|
|
printf("\n## %02x", *(unsigned char *)(ETHIST));
|
||
|
|
#endif
|
||
|
|
|
||
|
|
return;
|
||
|
|
|
||
|
|
L9:
|
||
|
|
asm("lda #0");
|
||
|
|
asm("sta %w", ETHDATA); /* Fill byte */
|
||
|
|
asm("sta %w", ETHDATA); /* Control byte */
|
||
|
|
|
||
|
|
asm("lda #%%11000000"); /* ENQUEUE PACKET - transmit packet */
|
||
|
|
asm("sta %w", ETHMMUCR);
|
||
|
|
|
||
|
|
#ifdef DEBUG
|
||
|
|
printf("\n## %02x\n", *(unsigned char *)(ETHIST));
|
||
|
|
#endif
|
||
|
|
|
||
|
|
}
|
||
|
|
#pragma optimize(pop)
|
||
|
|
/*-----------------------------------------------------------------------------------*/
|
||
|
|
#ifdef DEBUG
|
||
|
|
static void print_packet(u8_t *buf, u16_t length)
|
||
|
|
{
|
||
|
|
int i;
|
||
|
|
int remainder;
|
||
|
|
int lines;
|
||
|
|
u8_t a;
|
||
|
|
int cur;
|
||
|
|
int address=0;
|
||
|
|
|
||
|
|
printf("\nPacket of length %d \n", length);
|
||
|
|
|
||
|
|
lines = length / 8;
|
||
|
|
remainder = length % 8;
|
||
|
|
|
||
|
|
for(i = 0; i < lines; i++) {
|
||
|
|
printf(":%04x ", address=i*8);
|
||
|
|
|
||
|
|
for(cur = 0; cur < 8; cur++) {
|
||
|
|
a = *(buf++);
|
||
|
|
printf("%02x ", a);
|
||
|
|
}
|
||
|
|
printf("\n");
|
||
|
|
}
|
||
|
|
|
||
|
|
printf(":%04x ", address+8);
|
||
|
|
|
||
|
|
for (i = 0; i < remainder; i++) {
|
||
|
|
a = *(buf++);
|
||
|
|
printf("%02x ", a);
|
||
|
|
}
|
||
|
|
printf("\n");
|
||
|
|
}
|
||
|
|
#endif /* DEBUG */
|