2011-03-11 21:20:41 +00:00
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/*
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* Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
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* to the MC1322x project (http://mc1322x.devl.org)
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of libmc1322x: see http://mc1322x.devl.org
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* for details.
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*
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*
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*/
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#include <stdint.h>
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2012-10-21 15:38:37 +00:00
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#include "mc1322x.h"
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2011-03-11 21:20:41 +00:00
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//#define ADC_CHANS_ENABLED 0x3F // channels 0-5 enabled
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//#define ADC_CHANS_ENABLED 0x7E // channels 1-6 enabled
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//#define ADC_CHANS_ENABLED (1 << 6) // only channel 6 enabled
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#define ADC_CHANS_ENABLED 0x1FF // all channels, including battery reference voltage
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//#define ADC_PRESCALE_VALUE 24 // divide by 24 for 1MHz.
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#define ADC_SAMPLE_FREQ 400 // Hz (minimum of ~366.21 Hz)
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#define ADC_PRESCALE_VALUE (REF_OSC / ADC_SAMPLE_FREQ)
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#define ADC_USE_TIMER 0
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#define ADC_USE_INTERRUPTS 0 // incomplete support
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uint16_t adc_reading[NUM_ADC_CHAN];
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void ADC_flush(void) {
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while(ADC->FIFO_STATUSbits.EMPTY == 0) ADC->FIFO_READ;
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}
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uint16_t ADC_READ(void) {
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while(ADC->FIFO_STATUSbits.EMPTY); // loop while empty
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return ADC->FIFO_READ; // upper 4 bits are channel number
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}
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void adc_service(void) {
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uint16_t value;
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uint8_t channel;
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while (ADC->FIFO_STATUSbits.EMPTY == 0) {
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value = ADC->FIFO_READ;
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channel = value >> 12;
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if (channel < NUM_ADC_CHAN) adc_reading[channel] = value & 0xFFF;
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}
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}
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2012-10-21 15:38:37 +00:00
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#define _adc_setup_chan(x) do { \
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if ( channel == x ) { \
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ADC->SEQ_1bits.CH##x = 1; \
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GPIO->FUNC_SEL.ADC##x = 1; \
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GPIO->PAD_DIR.ADC##x = 0; \
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2012-11-29 12:49:54 +00:00
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GPIO->PAD_KEEP.ADC##x = 0; \
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2012-10-21 15:38:37 +00:00
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GPIO->PAD_PU_EN.ADC##x = 0; \
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}} while (0)
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void adc_setup_chan(uint8_t channel) {
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_adc_setup_chan(0);
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_adc_setup_chan(1);
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_adc_setup_chan(2);
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_adc_setup_chan(3);
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_adc_setup_chan(4);
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_adc_setup_chan(5);
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_adc_setup_chan(6);
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_adc_setup_chan(7);
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}
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2011-03-11 21:20:41 +00:00
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2012-10-21 15:38:37 +00:00
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void adc_init(void) {
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2011-03-11 21:20:41 +00:00
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ADC->CLOCK_DIVIDER = 80; // 300 KHz
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ADC->PRESCALE = ADC_PRESCALE_VALUE - 1; // divide by 24 for 1MHz.
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ADC->CONTROL = 1;
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// The ON-TIME must always be 10µs or greater - typical On-Time value = 0x000A (10dec)
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ADC->ON_TIME = 10;
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/*
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NOTE
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The ADC analog block requires 6 ADC_Clocks per conversion, and the
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ADC_Clock must 300kHz or less. With 6 clocks/conversion and a 33.33µs
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clock period:
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* The ADC convert time must always be 20µs or greater
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* If the ADC_Clock is a frequency lower than 300kHz, the convert time
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must always be 6 ADC_Clock periods or greater
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* For override mode, extend convert time to 40µs minimum or greater
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For the convert time:
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* This delay is a function of the Prescale Clock (typically 1 MHz)
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* The register must be initialized for proper operation
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* For a 20µs convert time with 1MHz, value = 0x0014 (20dec)
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* If convert time is insufficient, inaccurate sample data will result
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*/
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ADC->CONVERT_TIME = 1000000 / (115200 / 8) - 1;
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ADC->MODE = 0; // Automatic
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#if ADC_USE_INTERRUPTS
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ADC->FIFO_CONTROL = 7;
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#else
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ADC->FIFO_CONTROL = 0;
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#endif
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#if ADC_USE_TIMER
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ADC->SR_1_HIGH = 0x0000;
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ADC->SR_1_LOW = (REF_OSC / ADC_PRESCALE_VALUE) / (115200 / 8) + 1;
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#endif
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2012-10-21 15:38:37 +00:00
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ADC->SEQ_1 = 0;
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2011-03-11 21:20:41 +00:00
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#if ADC_USE_TIMER
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2012-10-21 15:38:37 +00:00
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ADC->SEQ_1bits.SEQ_MODE = 1; // sequence based on Timer 1
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2011-03-11 21:20:41 +00:00
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#else
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2012-10-21 15:38:37 +00:00
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ADC->SEQ_1bits.SEQ_MODE = 0; // sequence based on convert time.
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2011-03-11 21:20:41 +00:00
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#endif
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2012-10-21 15:38:37 +00:00
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ADC->SEQ_1bits.BATT = 1;
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2011-03-11 21:20:41 +00:00
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ADC->CONTROL = 0xF001
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//#if ADC_USE_TIMER
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| (1 << 1) // Timer 1 enable
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//#endif
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;
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ADC->OVERRIDE = (1 << 8);
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}
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