2017-11-17 15:10:45 +00:00
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/*
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* Copyright (c) 2016-2017, Yanzi Networks.
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2017-11-28 19:03:47 +00:00
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* Copyright (c) 2017, University of Bristol - http://www.bristol.ac.uk/
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2017-11-17 15:10:45 +00:00
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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2018-03-02 18:06:19 +00:00
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/*---------------------------------------------------------------------------*/
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/**
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* \addtogroup spi-hal
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* @{
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*
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* \file
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* Implementation of the platform-independent aspects of the SPI HAL
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*/
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/*---------------------------------------------------------------------------*/
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2018-03-02 20:37:28 +00:00
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#include <dev/spi.h>
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2018-03-02 18:07:42 +00:00
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#include "contiki.h"
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#include <stdint.h>
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#include <stdbool.h>
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2017-11-17 15:10:45 +00:00
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/*---------------------------------------------------------------------------*/
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2017-11-28 19:03:47 +00:00
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spi_status_t
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2018-09-24 16:51:47 +00:00
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spi_acquire(const spi_device_t *dev)
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2017-11-17 15:10:45 +00:00
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{
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2018-03-02 19:36:22 +00:00
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if(dev == NULL || dev->spi_controller >= SPI_CONTROLLER_COUNT) {
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2017-11-17 15:10:45 +00:00
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return SPI_DEV_STATUS_EINVAL;
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}
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2017-11-28 19:03:47 +00:00
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2018-04-03 11:58:47 +00:00
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/* lock and open the bus */
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return spi_arch_lock_and_open(dev);
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2017-11-17 15:10:45 +00:00
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}
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/*---------------------------------------------------------------------------*/
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2017-11-28 19:03:47 +00:00
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spi_status_t
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2018-09-24 16:51:47 +00:00
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spi_release(const spi_device_t *dev)
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2017-11-17 15:10:45 +00:00
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{
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2018-03-02 19:36:22 +00:00
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if(dev == NULL || dev->spi_controller >= SPI_CONTROLLER_COUNT) {
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2017-11-17 15:10:45 +00:00
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return SPI_DEV_STATUS_EINVAL;
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}
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2017-11-28 19:03:47 +00:00
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2018-04-03 11:58:47 +00:00
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/* close and unlock the bus */
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return spi_arch_close_and_unlock(dev);
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2017-11-17 15:10:45 +00:00
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}
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/*---------------------------------------------------------------------------*/
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2017-11-28 19:03:47 +00:00
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spi_status_t
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2018-09-24 16:51:47 +00:00
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spi_select(const spi_device_t *dev)
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2017-11-17 15:10:45 +00:00
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{
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2018-09-26 20:42:06 +00:00
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if(!spi_arch_has_lock(dev)) {
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return SPI_DEV_STATUS_BUS_NOT_OWNED;
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}
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gpio_hal_arch_clear_pin(dev->pin_spi_cs);
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return SPI_DEV_STATUS_OK;
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2017-11-17 15:10:45 +00:00
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}
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/*---------------------------------------------------------------------------*/
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2017-11-28 19:03:47 +00:00
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spi_status_t
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2018-09-24 16:51:47 +00:00
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spi_deselect(const spi_device_t *dev)
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2017-11-17 15:10:45 +00:00
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{
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2018-09-26 20:42:06 +00:00
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gpio_hal_arch_set_pin(dev->pin_spi_cs);
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return SPI_DEV_STATUS_OK;
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2017-11-28 19:03:47 +00:00
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}
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/*---------------------------------------------------------------------------*/
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bool
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2018-09-24 16:51:47 +00:00
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spi_has_bus(const spi_device_t *dev)
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2017-11-28 19:03:47 +00:00
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{
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2018-03-02 19:36:22 +00:00
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if(dev == NULL || dev->spi_controller >= SPI_CONTROLLER_COUNT) {
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2017-11-28 19:03:47 +00:00
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return false;
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}
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2017-11-28 19:03:47 +00:00
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return spi_arch_has_lock(dev);
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2017-11-17 15:10:45 +00:00
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}
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/*---------------------------------------------------------------------------*/
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2017-11-28 19:03:47 +00:00
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spi_status_t
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2018-09-24 16:51:47 +00:00
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spi_write_byte(const spi_device_t *dev, uint8_t data)
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2017-11-17 15:10:45 +00:00
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{
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2018-03-02 19:36:22 +00:00
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if(dev == NULL || dev->spi_controller >= SPI_CONTROLLER_COUNT) {
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2017-11-17 15:10:45 +00:00
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return SPI_DEV_STATUS_EINVAL;
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}
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2017-11-28 19:03:47 +00:00
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if(!spi_arch_has_lock(dev)) {
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2017-11-17 15:10:45 +00:00
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return SPI_DEV_STATUS_BUS_LOCKED;
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}
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2017-11-28 19:03:47 +00:00
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return spi_arch_transfer(dev, &data, 1, 0, 0, 0);
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2017-11-17 15:10:45 +00:00
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}
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/*---------------------------------------------------------------------------*/
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2017-11-28 19:03:47 +00:00
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spi_status_t
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2018-09-24 16:51:47 +00:00
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spi_write(const spi_device_t *dev, const uint8_t *data, int size)
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2017-11-17 15:10:45 +00:00
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{
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2018-03-02 19:36:22 +00:00
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if(dev == NULL || dev->spi_controller >= SPI_CONTROLLER_COUNT) {
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2017-11-17 15:10:45 +00:00
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return SPI_DEV_STATUS_EINVAL;
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}
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2017-11-28 19:03:47 +00:00
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if(!spi_arch_has_lock(dev)) {
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2017-11-17 15:10:45 +00:00
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return SPI_DEV_STATUS_BUS_LOCKED;
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}
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2017-11-28 19:03:47 +00:00
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return spi_arch_transfer(dev, data, size, 0, 0, 0);
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2017-11-17 15:10:45 +00:00
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}
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/*---------------------------------------------------------------------------*/
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2017-11-28 19:03:47 +00:00
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spi_status_t
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2018-09-24 16:51:47 +00:00
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spi_read_byte(const spi_device_t *dev, uint8_t *buf)
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2017-11-17 15:10:45 +00:00
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{
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2018-03-02 19:36:22 +00:00
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if(dev == NULL || dev->spi_controller >= SPI_CONTROLLER_COUNT) {
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2017-11-17 15:10:45 +00:00
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return SPI_DEV_STATUS_EINVAL;
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}
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2017-11-28 19:03:47 +00:00
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if(!spi_arch_has_lock(dev)) {
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2017-11-17 15:10:45 +00:00
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return SPI_DEV_STATUS_BUS_LOCKED;
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}
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2017-11-28 19:03:47 +00:00
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return spi_arch_transfer(dev, NULL, 0, buf, 1, 0);
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2017-11-17 15:10:45 +00:00
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}
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/*---------------------------------------------------------------------------*/
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2017-11-28 19:03:47 +00:00
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spi_status_t
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2018-09-24 16:51:47 +00:00
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spi_read(const spi_device_t *dev, uint8_t *buf, int size)
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2017-11-17 15:10:45 +00:00
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{
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2018-03-02 19:36:22 +00:00
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if(dev == NULL || dev->spi_controller >= SPI_CONTROLLER_COUNT) {
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2017-11-17 15:10:45 +00:00
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return SPI_DEV_STATUS_EINVAL;
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}
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2017-11-28 19:03:47 +00:00
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if(!spi_arch_has_lock(dev)) {
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2017-11-17 15:10:45 +00:00
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return SPI_DEV_STATUS_BUS_LOCKED;
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}
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2017-11-28 19:03:47 +00:00
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return spi_arch_transfer(dev, NULL, 0, buf, size, 0);
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2017-11-17 15:10:45 +00:00
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}
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/*---------------------------------------------------------------------------*/
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2017-11-28 19:03:47 +00:00
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spi_status_t
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2018-09-24 16:51:47 +00:00
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spi_read_skip(const spi_device_t *dev, int size)
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2017-11-17 15:10:45 +00:00
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{
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2018-03-02 19:36:22 +00:00
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if(dev == NULL || dev->spi_controller >= SPI_CONTROLLER_COUNT) {
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2017-11-17 15:10:45 +00:00
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return SPI_DEV_STATUS_EINVAL;
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}
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2017-11-28 19:03:47 +00:00
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if(!spi_arch_has_lock(dev)) {
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2017-11-17 15:10:45 +00:00
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return SPI_DEV_STATUS_BUS_LOCKED;
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}
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2017-11-28 19:03:47 +00:00
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return spi_arch_transfer(dev, NULL, 0, NULL, 0, size);
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2017-11-17 15:10:45 +00:00
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}
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/*---------------------------------------------------------------------------*/
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2017-11-28 19:03:47 +00:00
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spi_status_t
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2018-09-24 16:51:47 +00:00
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spi_transfer(const spi_device_t *dev,
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2017-11-28 19:03:47 +00:00
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const uint8_t *wdata, int wsize,
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uint8_t *rbuf, int rsize, int ignore)
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2017-11-17 15:10:45 +00:00
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{
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2018-03-02 19:36:22 +00:00
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if(dev == NULL || dev->spi_controller >= SPI_CONTROLLER_COUNT) {
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2017-11-17 15:10:45 +00:00
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return SPI_DEV_STATUS_EINVAL;
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}
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2017-11-28 19:03:47 +00:00
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if(!spi_arch_has_lock(dev)) {
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2017-11-17 15:10:45 +00:00
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return SPI_DEV_STATUS_BUS_LOCKED;
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}
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if(wdata == NULL && wsize > 0) {
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return SPI_DEV_STATUS_EINVAL;
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}
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if(rbuf == NULL && rsize > 0) {
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return SPI_DEV_STATUS_EINVAL;
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}
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2017-11-28 19:03:47 +00:00
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return spi_arch_transfer(dev, wdata, wsize, rbuf, rsize, ignore);
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2017-11-17 15:10:45 +00:00
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}
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/*---------------------------------------------------------------------------*/
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2017-11-28 19:03:47 +00:00
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spi_status_t
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2018-09-24 16:51:47 +00:00
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spi_read_register(const spi_device_t *dev, uint8_t reg, uint8_t *data, int size)
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2017-11-17 15:10:45 +00:00
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{
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2017-11-28 19:03:47 +00:00
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spi_status_t status;
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2018-03-02 19:36:22 +00:00
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if(dev == NULL || dev->spi_controller >= SPI_CONTROLLER_COUNT) {
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2017-11-17 15:10:45 +00:00
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return SPI_DEV_STATUS_EINVAL;
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}
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/* write the register first (will read a status) */
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2017-11-28 19:03:47 +00:00
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status = spi_write_byte(dev, reg);
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2017-11-17 15:10:45 +00:00
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if(status != SPI_DEV_STATUS_OK) {
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return status;
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}
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2017-11-28 19:03:47 +00:00
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2017-11-17 15:10:45 +00:00
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/* then read the value (will read the value) */
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2017-11-28 19:03:47 +00:00
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status = spi_read(dev, data, size);
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2017-11-17 15:10:45 +00:00
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if(status != SPI_DEV_STATUS_OK) {
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return status;
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}
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2017-11-28 19:03:47 +00:00
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2017-11-17 15:10:45 +00:00
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return status;
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}
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/*---------------------------------------------------------------------------*/
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2017-11-28 19:03:47 +00:00
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spi_status_t
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2018-09-24 16:51:47 +00:00
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spi_strobe(const spi_device_t *dev, uint8_t strobe, uint8_t *result)
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2017-11-17 15:10:45 +00:00
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{
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2018-03-02 19:36:22 +00:00
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if(dev == NULL || dev->spi_controller >= SPI_CONTROLLER_COUNT) {
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2017-11-17 15:10:45 +00:00
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return SPI_DEV_STATUS_EINVAL;
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}
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2017-11-28 19:03:47 +00:00
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if(!spi_arch_has_lock(dev)) {
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2017-11-17 15:10:45 +00:00
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return SPI_DEV_STATUS_BUS_LOCKED;
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}
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2017-11-28 19:03:47 +00:00
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return spi_arch_transfer(dev, &strobe, 1, result, 1, 0);
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2017-11-17 15:10:45 +00:00
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}
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/*---------------------------------------------------------------------------*/
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2018-03-02 18:06:19 +00:00
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/**
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* @}
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*/
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