2006-06-17 22:41:10 +00:00
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/*
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* Copyright (c) 2005, Swedish Institute of Computer Science
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2007-03-25 21:51:31 +00:00
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* All rights reserved.
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2006-06-17 22:41:10 +00:00
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*
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2007-03-25 21:51:31 +00:00
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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2006-06-17 22:41:10 +00:00
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*
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2007-03-25 21:51:31 +00:00
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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2006-06-17 22:41:10 +00:00
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*
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* This file is part of the Contiki operating system.
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*
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2007-03-25 21:51:31 +00:00
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* @(#)$Id: clock.c,v 1.5 2007/03/25 21:52:00 adamdunkels Exp $
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2006-06-17 22:41:10 +00:00
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*/
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#include <io.h>
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#include <signal.h>
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#include "contiki-conf.h"
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#include "sys/clock.h"
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#include "sys/etimer.h"
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/* 38400 cycles @ 2.4576MHz with divisor 8 ==> 1/8 s */
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/* #define INTERVAL (307200ULL / CLOCK_SECOND) */
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#define INTERVAL (4096ULL / CLOCK_SECOND)
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2006-08-17 15:25:46 +00:00
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#define MAX_TICKS (~((clock_time_t)0) / 2)
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2006-06-17 22:41:10 +00:00
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static volatile clock_time_t count = 0;
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2007-03-25 21:51:31 +00:00
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static unsigned short last_tar = 0;
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2006-06-17 22:41:10 +00:00
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/*---------------------------------------------------------------------------*/
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interrupt(TIMERA1_VECTOR) timera1 (void) {
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if(TAIV == 2) {
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TACCR1 += INTERVAL;
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2007-03-25 21:51:31 +00:00
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last_tar = TAR;
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2006-06-17 22:41:10 +00:00
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++count;
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2006-08-17 15:25:46 +00:00
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if(etimer_pending()
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2006-08-25 09:40:21 +00:00
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&& (etimer_next_expiration_time() - count - 1) > MAX_TICKS) {
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2006-06-17 22:41:10 +00:00
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etimer_request_poll();
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2006-08-17 15:41:13 +00:00
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LPM4_EXIT;
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2006-06-17 22:41:10 +00:00
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}
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}
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}
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/*---------------------------------------------------------------------------*/
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clock_time_t
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clock_time(void)
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{
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return count;
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}
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/*---------------------------------------------------------------------------*/
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void
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clock_set(clock_time_t clock, clock_time_t fclock)
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2007-03-25 21:51:31 +00:00
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{
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2006-06-17 22:41:10 +00:00
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TAR = fclock;
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TACCR1 = fclock + INTERVAL;
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count = clock;
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}
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/*---------------------------------------------------------------------------*/
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2007-03-25 21:51:31 +00:00
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int
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clock_fine_max(void)
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{
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return INTERVAL;
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}
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/*---------------------------------------------------------------------------*/
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unsigned short
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clock_fine(void)
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{
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unsigned short t;
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dint();
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t = TAR;
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eint();
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return (unsigned short)((unsigned long)t - (unsigned long)last_tar);
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}
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/*---------------------------------------------------------------------------*/
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2006-06-17 22:41:10 +00:00
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void
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clock_init(void)
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{
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dint();
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/* Select SMCLK (2.4576MHz), clear TAR */
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/* TACTL = TASSEL1 | TACLR | ID_3; */
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TACTL = TASSEL0 | TACLR | ID_3;
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/* Initialize ccr1 to create the X ms interval. */
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/* CCR1 interrupt enabled, interrupt occurs when timer equals CCR1. */
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TACCTL1 = CCIE;
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/* Interrupt after X ms. */
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2007-03-25 21:51:31 +00:00
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TACCR1 = INTERVAL;
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2006-06-17 22:41:10 +00:00
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/* Start Timer_A in continuous mode. */
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TACTL |= MC1;
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count = 0;
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BCSCTL1 &= ~(DIVA1 + DIVA0); /* remove /8 divisor from ACLK again */
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/* Enable interrupts. */
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2007-03-25 21:51:31 +00:00
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eint();
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2006-06-17 22:41:10 +00:00
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}
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/*---------------------------------------------------------------------------*/
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/**
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2007-03-25 21:51:31 +00:00
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* Delay the CPU for a multiple of 2.83 us.
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2006-06-17 22:41:10 +00:00
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*/
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void
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clock_delay(unsigned int i)
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{
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asm("add #-1, r15");
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asm("jnz $-2");
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/*
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* This means that delay(i) will delay the CPU for CONST + 3x
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* cycles. On a 2.4756 CPU, this means that each i adds 1.22us of
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* delay.
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*
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* do {
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* --i;
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* } while(i > 0);
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*/
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}
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/*---------------------------------------------------------------------------*/
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/**
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* Wait for a multiple of 10 ms.
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*
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*/
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void
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clock_wait(int i)
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{
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clock_time_t start;
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start = clock_time();
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while(clock_time() - start < (clock_time_t)i);
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}
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/*---------------------------------------------------------------------------*/
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void
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clock_set_seconds(unsigned long sec)
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{
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}
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unsigned long
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clock_seconds(void)
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{
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return count / CLOCK_SECOND;
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}
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