giomba/nes-proj
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity
a4a3eca41d
nes-proj/cpu/6502/net/cs8900a.S

392 lines
7.8 KiB
ArmAsm
Raw Normal View History

Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
;
; Copyright (c) 2007, Adam Dunkels and Oliver Schmidt
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
; 1. Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; 2. Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
; 3. Neither the name of the Institute nor the names of its contributors
; may be used to endorse or promote products derived from this software
; without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
; OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
; HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
; OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
; SUCH DAMAGE.
;
; This file is part of the Contiki operating system.
;
; Author: Adam Dunkels <adam@sics.se>, Oliver Schmidt <ol.sc@web.de>
;
;---------------------------------------------------------------------
Build static Ethernet drivers directly from source.
2014-06-09 21:14:11 +00:00
.macpack module
module_header _cs8900a
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
; Driver signature
.byte $65, $74, $68 ; "eth"
.byte $01 ; Ethernet driver API version number
Do not reject frames with a length exactly equal to the uIP bufer size.
2013-01-30 22:39:01 +00:00
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
; Ethernet address
mac: .byte $00, $0E, $3A ; OUI of Cirrus Logic
.byte $11, $11, $11
; Buffer attributes
bufaddr:.res 2 ; Address
bufsize:.res 2 ; Size
; Jump table.
Enhanced Ethernet drivers. Made Ethernet drivers easier to consume by assembly programs. * Replaced function pointers with JMP instructions. * Provide return values additionally via Carry flag. Reset Ethernet chips on initialization. Both for the CS8900A and the W5100 the data sheets just say that the RESET bit is automatically cleared after the RESET. This may be interpreted in two ways: 1) There's no need to be afraid of reading the RESET bit as 1 and unintentionally trigger a RESET by writing it back after ORing in some other bit. 2) The RESET process isn't complete before the RESET bit hasn't become 0 again. It's impossible for me to empirically falsify the latter option as the drivers are supposed to work on faster machines than the ones I have access to. And if the RESET process includes things like oscillators then the time to complete the RESET could differ even between multiple exemplars of the same chip. Therefore I opted to presume the latter option. However that means a non-exsistent chip may cause an infinite loop while waiting for the RESET bit to be cleared so I finally added code to detect the presence of the Ethernet chips. There's a risk of a chip being locked up in a way that makes the detection fail - and therefore the RESET not being performed. This catch-22 needs to be solved by the user doing a hard RESET.
2014-06-12 20:56:35 +00:00
jmp init
jmp poll
jmp send
jmp exit
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
;---------------------------------------------------------------------
Build static Ethernet drivers directly from source.
2014-06-09 21:14:11 +00:00
.if DYN_DRV
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
Build static Ethernet drivers directly from source.
2014-06-09 21:14:11 +00:00
.zeropage
Added 6502 driver for WIZnet W5100 in MACRAW mode.
2013-11-09 22:15:20 +00:00
sp: .res 2 ; Stack pointer (Do not trash !)
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
reg: .res 2 ; Address of rxtxreg
ptr: .res 2 ; Indirect addressing pointer
len: .res 2 ; Frame length
cnt: .res 2 ; Frame length counter
Build static Ethernet drivers directly from source.
2014-06-09 21:14:11 +00:00
.else
.include "zeropage.inc"
reg := ptr1 ; Address of rxtxreg
ptr := ptr2 ; Indirect addressing pointer
len := ptr3 ; Frame length
cnt := ptr4 ; Frame length counter
.endif
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
;---------------------------------------------------------------------
.rodata
Do not reject frames with a length exactly equal to the uIP bufer size.
2013-01-30 22:39:01 +00:00
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
fixup: .byte fixup02-fixup01, fixup03-fixup02, fixup04-fixup03
.byte fixup05-fixup04, fixup06-fixup05, fixup07-fixup06
.byte fixup08-fixup07, fixup09-fixup08, fixup10-fixup09
.byte fixup11-fixup10, fixup12-fixup11, fixup13-fixup12
.byte fixup14-fixup13, fixup15-fixup14, fixup16-fixup15
.byte fixup17-fixup16, fixup18-fixup17, fixup19-fixup18
.byte fixup20-fixup19, fixup21-fixup20, fixup22-fixup21
Enhanced Ethernet drivers. Made Ethernet drivers easier to consume by assembly programs. * Replaced function pointers with JMP instructions. * Provide return values additionally via Carry flag. Reset Ethernet chips on initialization. Both for the CS8900A and the W5100 the data sheets just say that the RESET bit is automatically cleared after the RESET. This may be interpreted in two ways: 1) There's no need to be afraid of reading the RESET bit as 1 and unintentionally trigger a RESET by writing it back after ORing in some other bit. 2) The RESET process isn't complete before the RESET bit hasn't become 0 again. It's impossible for me to empirically falsify the latter option as the drivers are supposed to work on faster machines than the ones I have access to. And if the RESET process includes things like oscillators then the time to complete the RESET could differ even between multiple exemplars of the same chip. Therefore I opted to presume the latter option. However that means a non-exsistent chip may cause an infinite loop while waiting for the RESET bit to be cleared so I finally added code to detect the presence of the Ethernet chips. There's a risk of a chip being locked up in a way that makes the detection fail - and therefore the RESET not being performed. This catch-22 needs to be solved by the user doing a hard RESET.
2014-06-12 20:56:35 +00:00
.byte fixup23-fixup22, fixup24-fixup23, fixup25-fixup24
.byte fixup26-fixup25
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
fixups = * - fixup
;---------------------------------------------------------------------
rxtxreg := $FF00 ; High byte patched at runtime
txcmd := $FF04 ; High byte patched at runtime
txlen := $FF06 ; High byte patched at runtime
Take in account that the C64 Retro Replay clockport needs to be activated in order to work with the RR-Net Ethernet card.
2007-12-08 21:05:48 +00:00
isq := $FF08 ; High byte patched at runtime
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
packetpp := $FF0A ; High byte patched at runtime
ppdata := $FF0C ; High byte patched at runtime
.data
;---------------------------------------------------------------------
init:
; Save address of rxtxreg
sta reg
stx reg+1
; Start with first fixup location
lda #<(fixup01+1)
ldx #>(fixup01+1)
sta ptr
stx ptr+1
ldx #$FF
ldy #$00
; Fixup address at location
: lda reg
Minor change in comment.
2007-11-24 12:57:09 +00:00
eor (ptr),y ; Use XOR to support C64 RR-Net
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
sta (ptr),y
iny
lda reg+1
sta (ptr),y
dey
Saved six more bytes ;-)
2013-11-13 22:32:49 +00:00
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
; Advance to next fixup location
inx
cpx #fixups
bcs :+
lda ptr
clc
adc fixup,x
sta ptr
bcc :-
inc ptr+1
bcs :- ; Always
Fixed typo.
2007-12-08 21:19:06 +00:00
; Activate C64 RR clockport in order to operate RR-Net
Take in account that the C64 Retro Replay clockport needs to be activated in order to work with the RR-Net Ethernet card.
2007-12-08 21:05:48 +00:00
; - RR config register overlays CS8900A ISQ register
; - No need to distinguish as ISQ access doesn't hurt
:
fixup01:lda isq+1
ora #$01 ; Set clockport bit
fixup02:sta isq+1
Enhanced Ethernet drivers. Made Ethernet drivers easier to consume by assembly programs. * Replaced function pointers with JMP instructions. * Provide return values additionally via Carry flag. Reset Ethernet chips on initialization. Both for the CS8900A and the W5100 the data sheets just say that the RESET bit is automatically cleared after the RESET. This may be interpreted in two ways: 1) There's no need to be afraid of reading the RESET bit as 1 and unintentionally trigger a RESET by writing it back after ORing in some other bit. 2) The RESET process isn't complete before the RESET bit hasn't become 0 again. It's impossible for me to empirically falsify the latter option as the drivers are supposed to work on faster machines than the ones I have access to. And if the RESET process includes things like oscillators then the time to complete the RESET could differ even between multiple exemplars of the same chip. Therefore I opted to presume the latter option. However that means a non-exsistent chip may cause an infinite loop while waiting for the RESET bit to be cleared so I finally added code to detect the presence of the Ethernet chips. There's a risk of a chip being locked up in a way that makes the detection fail - and therefore the RESET not being performed. This catch-22 needs to be solved by the user doing a hard RESET.
2014-06-12 20:56:35 +00:00
; Check EISA registration number of Crystal Semiconductor
; PACKETPP = $0000, PPDATA == $630E ?
lda #$00
tax
jsr packetpp_ax
lda #$63^$0E
fixup03:eor ppdata
fixup04:eor ppdata+1
beq :+
sec
rts
; Initiate a chip-wide reset
; PACKETPP = $0114, PPDATA = $0040
: lda #$14
jsr packetpp_a1
ldy #$40
fixup05:sty ppdata
: jsr packetpp_a1
fixup06:ldy ppdata
and #$40
bne :-
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
; Accept valid unicast + broadcast frames
; PACKETPP = $0104, PPDATA = $0D05
lda #$04
Saved six more bytes ;-)
2013-11-13 22:32:49 +00:00
jsr packetpp_a1
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
lda #$05
ldx #$0D
Saved six more bytes ;-)
2013-11-13 22:32:49 +00:00
jsr ppdata_ax
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
; Set MAC address
; PACKETPP = $0158, PPDATA = MAC[0], MAC[1]
; PACKETPP = $015A, PPDATA = MAC[2], MAC[3]
Optimized CS8900A driver for speed and size. - Speed: The primary byte copy loops are reduzed to the bare minimum by adjusting the base pointer 'ptr' and loop register 'y' in such a way that the 'y' overflow matches the low byte of the loop size. - Size: Factored out all repeated code into subroutines. Introduced a loop for setting the MAC address. Additional minor changes: - Activate frame reception as last step of initialization after CS8900A configuration. - Properly set internal address bits used by the CS8900A.
2013-09-11 18:48:23 +00:00
; PACKETPP = $015C, PPDATA = MAC[4], MAC[5]
ldy #$58
: tya
Saved six more bytes ;-)
2013-11-13 22:32:49 +00:00
jsr packetpp_a1
Optimized CS8900A driver for speed and size. - Speed: The primary byte copy loops are reduzed to the bare minimum by adjusting the base pointer 'ptr' and loop register 'y' in such a way that the 'y' overflow matches the low byte of the loop size. - Size: Factored out all repeated code into subroutines. Introduced a loop for setting the MAC address. Additional minor changes: - Activate frame reception as last step of initialization after CS8900A configuration. - Properly set internal address bits used by the CS8900A.
2013-09-11 18:48:23 +00:00
lda mac-$58,y
ldx mac-$58+1,y
Saved six more bytes ;-)
2013-11-13 22:32:49 +00:00
jsr ppdata_ax
Optimized CS8900A driver for speed and size. - Speed: The primary byte copy loops are reduzed to the bare minimum by adjusting the base pointer 'ptr' and loop register 'y' in such a way that the 'y' overflow matches the low byte of the loop size. - Size: Factored out all repeated code into subroutines. Introduced a loop for setting the MAC address. Additional minor changes: - Activate frame reception as last step of initialization after CS8900A configuration. - Properly set internal address bits used by the CS8900A.
2013-09-11 18:48:23 +00:00
iny
iny
cpy #$58+6
bcc :-
; Turn on transmission and reception of frames
; PACKETPP = $0112, PPDATA = $00D3
lda #$12
Saved six more bytes ;-)
2013-11-13 22:32:49 +00:00
jsr packetpp_a1
Optimized CS8900A driver for speed and size. - Speed: The primary byte copy loops are reduzed to the bare minimum by adjusting the base pointer 'ptr' and loop register 'y' in such a way that the 'y' overflow matches the low byte of the loop size. - Size: Factored out all repeated code into subroutines. Introduced a loop for setting the MAC address. Additional minor changes: - Activate frame reception as last step of initialization after CS8900A configuration. - Properly set internal address bits used by the CS8900A.
2013-09-11 18:48:23 +00:00
lda #$D3
ldx #$00
Saved six more bytes ;-)
2013-11-13 22:32:49 +00:00
jsr ppdata_ax
Enhanced Ethernet drivers. Made Ethernet drivers easier to consume by assembly programs. * Replaced function pointers with JMP instructions. * Provide return values additionally via Carry flag. Reset Ethernet chips on initialization. Both for the CS8900A and the W5100 the data sheets just say that the RESET bit is automatically cleared after the RESET. This may be interpreted in two ways: 1) There's no need to be afraid of reading the RESET bit as 1 and unintentionally trigger a RESET by writing it back after ORing in some other bit. 2) The RESET process isn't complete before the RESET bit hasn't become 0 again. It's impossible for me to empirically falsify the latter option as the drivers are supposed to work on faster machines than the ones I have access to. And if the RESET process includes things like oscillators then the time to complete the RESET could differ even between multiple exemplars of the same chip. Therefore I opted to presume the latter option. However that means a non-exsistent chip may cause an infinite loop while waiting for the RESET bit to be cleared so I finally added code to detect the presence of the Ethernet chips. There's a risk of a chip being locked up in a way that makes the detection fail - and therefore the RESET not being performed. This catch-22 needs to be solved by the user doing a hard RESET.
2014-06-12 20:56:35 +00:00
txa
clc
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
rts
;---------------------------------------------------------------------
poll:
; Check receiver event register to see if there
; are any valid unicast frames avaliable
; PACKETPP = $0124, PPDATA & $0D00 ?
lda #$24
Saved six more bytes ;-)
2013-11-13 22:32:49 +00:00
jsr packetpp_a1
Enhanced Ethernet drivers. Made Ethernet drivers easier to consume by assembly programs. * Replaced function pointers with JMP instructions. * Provide return values additionally via Carry flag. Reset Ethernet chips on initialization. Both for the CS8900A and the W5100 the data sheets just say that the RESET bit is automatically cleared after the RESET. This may be interpreted in two ways: 1) There's no need to be afraid of reading the RESET bit as 1 and unintentionally trigger a RESET by writing it back after ORing in some other bit. 2) The RESET process isn't complete before the RESET bit hasn't become 0 again. It's impossible for me to empirically falsify the latter option as the drivers are supposed to work on faster machines than the ones I have access to. And if the RESET process includes things like oscillators then the time to complete the RESET could differ even between multiple exemplars of the same chip. Therefore I opted to presume the latter option. However that means a non-exsistent chip may cause an infinite loop while waiting for the RESET bit to be cleared so I finally added code to detect the presence of the Ethernet chips. There's a risk of a chip being locked up in a way that makes the detection fail - and therefore the RESET not being performed. This catch-22 needs to be solved by the user doing a hard RESET.
2014-06-12 20:56:35 +00:00
fixup07:lda ppdata+1
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
and #$0D
Enhanced Ethernet drivers. Made Ethernet drivers easier to consume by assembly programs. * Replaced function pointers with JMP instructions. * Provide return values additionally via Carry flag. Reset Ethernet chips on initialization. Both for the CS8900A and the W5100 the data sheets just say that the RESET bit is automatically cleared after the RESET. This may be interpreted in two ways: 1) There's no need to be afraid of reading the RESET bit as 1 and unintentionally trigger a RESET by writing it back after ORing in some other bit. 2) The RESET process isn't complete before the RESET bit hasn't become 0 again. It's impossible for me to empirically falsify the latter option as the drivers are supposed to work on faster machines than the ones I have access to. And if the RESET process includes things like oscillators then the time to complete the RESET could differ even between multiple exemplars of the same chip. Therefore I opted to presume the latter option. However that means a non-exsistent chip may cause an infinite loop while waiting for the RESET bit to be cleared so I finally added code to detect the presence of the Ethernet chips. There's a risk of a chip being locked up in a way that makes the detection fail - and therefore the RESET not being performed. This catch-22 needs to be solved by the user doing a hard RESET.
2014-06-12 20:56:35 +00:00
beq :+
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
; Process the incoming frame
; --------------------------
; Read receiver event and discard it
; RXTXREG
Enhanced Ethernet drivers. Made Ethernet drivers easier to consume by assembly programs. * Replaced function pointers with JMP instructions. * Provide return values additionally via Carry flag. Reset Ethernet chips on initialization. Both for the CS8900A and the W5100 the data sheets just say that the RESET bit is automatically cleared after the RESET. This may be interpreted in two ways: 1) There's no need to be afraid of reading the RESET bit as 1 and unintentionally trigger a RESET by writing it back after ORing in some other bit. 2) The RESET process isn't complete before the RESET bit hasn't become 0 again. It's impossible for me to empirically falsify the latter option as the drivers are supposed to work on faster machines than the ones I have access to. And if the RESET process includes things like oscillators then the time to complete the RESET could differ even between multiple exemplars of the same chip. Therefore I opted to presume the latter option. However that means a non-exsistent chip may cause an infinite loop while waiting for the RESET bit to be cleared so I finally added code to detect the presence of the Ethernet chips. There's a risk of a chip being locked up in a way that makes the detection fail - and therefore the RESET not being performed. This catch-22 needs to be solved by the user doing a hard RESET.
2014-06-12 20:56:35 +00:00
fixup08:ldx rxtxreg+1
fixup09:lda rxtxreg
Saved six more bytes ;-)
2013-11-13 22:32:49 +00:00
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
; Read frame length
; cnt = len = RXTXREG
Enhanced Ethernet drivers. Made Ethernet drivers easier to consume by assembly programs. * Replaced function pointers with JMP instructions. * Provide return values additionally via Carry flag. Reset Ethernet chips on initialization. Both for the CS8900A and the W5100 the data sheets just say that the RESET bit is automatically cleared after the RESET. This may be interpreted in two ways: 1) There's no need to be afraid of reading the RESET bit as 1 and unintentionally trigger a RESET by writing it back after ORing in some other bit. 2) The RESET process isn't complete before the RESET bit hasn't become 0 again. It's impossible for me to empirically falsify the latter option as the drivers are supposed to work on faster machines than the ones I have access to. And if the RESET process includes things like oscillators then the time to complete the RESET could differ even between multiple exemplars of the same chip. Therefore I opted to presume the latter option. However that means a non-exsistent chip may cause an infinite loop while waiting for the RESET bit to be cleared so I finally added code to detect the presence of the Ethernet chips. There's a risk of a chip being locked up in a way that makes the detection fail - and therefore the RESET not being performed. This catch-22 needs to be solved by the user doing a hard RESET.
2014-06-12 20:56:35 +00:00
fixup10:ldx rxtxreg+1
fixup11:lda rxtxreg
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
sta len
stx len+1
sta cnt
stx cnt+1
; Adjust odd frame length
Optimized CS8900A driver for speed and size. - Speed: The primary byte copy loops are reduzed to the bare minimum by adjusting the base pointer 'ptr' and loop register 'y' in such a way that the 'y' overflow matches the low byte of the loop size. - Size: Factored out all repeated code into subroutines. Introduced a loop for setting the MAC address. Additional minor changes: - Activate frame reception as last step of initialization after CS8900A configuration. - Properly set internal address bits used by the CS8900A.
2013-09-11 18:48:23 +00:00
jsr adjustcnt
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
Do not reject frames with a length exactly equal to the uIP bufer size.
2013-01-30 22:39:01 +00:00
; Is bufsize < cnt ?
lda bufsize
Saved another byte ;-)
2013-10-03 20:32:12 +00:00
cmp cnt
Do not reject frames with a length exactly equal to the uIP bufer size.
2013-01-30 22:39:01 +00:00
lda bufsize+1
sbc cnt+1
Enhanced Ethernet drivers. Made Ethernet drivers easier to consume by assembly programs. * Replaced function pointers with JMP instructions. * Provide return values additionally via Carry flag. Reset Ethernet chips on initialization. Both for the CS8900A and the W5100 the data sheets just say that the RESET bit is automatically cleared after the RESET. This may be interpreted in two ways: 1) There's no need to be afraid of reading the RESET bit as 1 and unintentionally trigger a RESET by writing it back after ORing in some other bit. 2) The RESET process isn't complete before the RESET bit hasn't become 0 again. It's impossible for me to empirically falsify the latter option as the drivers are supposed to work on faster machines than the ones I have access to. And if the RESET process includes things like oscillators then the time to complete the RESET could differ even between multiple exemplars of the same chip. Therefore I opted to presume the latter option. However that means a non-exsistent chip may cause an infinite loop while waiting for the RESET bit to be cleared so I finally added code to detect the presence of the Ethernet chips. There's a risk of a chip being locked up in a way that makes the detection fail - and therefore the RESET not being performed. This catch-22 needs to be solved by the user doing a hard RESET.
2014-06-12 20:56:35 +00:00
bcs :++
Do not reject frames with a length exactly equal to the uIP bufer size.
2013-01-30 22:39:01 +00:00
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
; Yes, skip frame
Optimized CS8900A driver for speed and size. - Speed: The primary byte copy loops are reduzed to the bare minimum by adjusting the base pointer 'ptr' and loop register 'y' in such a way that the 'y' overflow matches the low byte of the loop size. - Size: Factored out all repeated code into subroutines. Introduced a loop for setting the MAC address. Additional minor changes: - Activate frame reception as last step of initialization after CS8900A configuration. - Properly set internal address bits used by the CS8900A.
2013-09-11 18:48:23 +00:00
jsr skipframe
Do not reject frames with a length exactly equal to the uIP bufer size.
2013-01-30 22:39:01 +00:00
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
; No frame ready
lda #$00
Enhanced Ethernet drivers. Made Ethernet drivers easier to consume by assembly programs. * Replaced function pointers with JMP instructions. * Provide return values additionally via Carry flag. Reset Ethernet chips on initialization. Both for the CS8900A and the W5100 the data sheets just say that the RESET bit is automatically cleared after the RESET. This may be interpreted in two ways: 1) There's no need to be afraid of reading the RESET bit as 1 and unintentionally trigger a RESET by writing it back after ORing in some other bit. 2) The RESET process isn't complete before the RESET bit hasn't become 0 again. It's impossible for me to empirically falsify the latter option as the drivers are supposed to work on faster machines than the ones I have access to. And if the RESET process includes things like oscillators then the time to complete the RESET could differ even between multiple exemplars of the same chip. Therefore I opted to presume the latter option. However that means a non-exsistent chip may cause an infinite loop while waiting for the RESET bit to be cleared so I finally added code to detect the presence of the Ethernet chips. There's a risk of a chip being locked up in a way that makes the detection fail - and therefore the RESET not being performed. This catch-22 needs to be solved by the user doing a hard RESET.
2014-06-12 20:56:35 +00:00
: tax
sec
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
rts
; Read bytes into buffer
Optimized CS8900A driver for speed and size. - Speed: The primary byte copy loops are reduzed to the bare minimum by adjusting the base pointer 'ptr' and loop register 'y' in such a way that the 'y' overflow matches the low byte of the loop size. - Size: Factored out all repeated code into subroutines. Introduced a loop for setting the MAC address. Additional minor changes: - Activate frame reception as last step of initialization after CS8900A configuration. - Properly set internal address bits used by the CS8900A.
2013-09-11 18:48:23 +00:00
: jsr adjustptr
:
Enhanced Ethernet drivers. Made Ethernet drivers easier to consume by assembly programs. * Replaced function pointers with JMP instructions. * Provide return values additionally via Carry flag. Reset Ethernet chips on initialization. Both for the CS8900A and the W5100 the data sheets just say that the RESET bit is automatically cleared after the RESET. This may be interpreted in two ways: 1) There's no need to be afraid of reading the RESET bit as 1 and unintentionally trigger a RESET by writing it back after ORing in some other bit. 2) The RESET process isn't complete before the RESET bit hasn't become 0 again. It's impossible for me to empirically falsify the latter option as the drivers are supposed to work on faster machines than the ones I have access to. And if the RESET process includes things like oscillators then the time to complete the RESET could differ even between multiple exemplars of the same chip. Therefore I opted to presume the latter option. However that means a non-exsistent chip may cause an infinite loop while waiting for the RESET bit to be cleared so I finally added code to detect the presence of the Ethernet chips. There's a risk of a chip being locked up in a way that makes the detection fail - and therefore the RESET not being performed. This catch-22 needs to be solved by the user doing a hard RESET.
2014-06-12 20:56:35 +00:00
fixup12:lda rxtxreg
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
sta (ptr),y
iny
Enhanced Ethernet drivers. Made Ethernet drivers easier to consume by assembly programs. * Replaced function pointers with JMP instructions. * Provide return values additionally via Carry flag. Reset Ethernet chips on initialization. Both for the CS8900A and the W5100 the data sheets just say that the RESET bit is automatically cleared after the RESET. This may be interpreted in two ways: 1) There's no need to be afraid of reading the RESET bit as 1 and unintentionally trigger a RESET by writing it back after ORing in some other bit. 2) The RESET process isn't complete before the RESET bit hasn't become 0 again. It's impossible for me to empirically falsify the latter option as the drivers are supposed to work on faster machines than the ones I have access to. And if the RESET process includes things like oscillators then the time to complete the RESET could differ even between multiple exemplars of the same chip. Therefore I opted to presume the latter option. However that means a non-exsistent chip may cause an infinite loop while waiting for the RESET bit to be cleared so I finally added code to detect the presence of the Ethernet chips. There's a risk of a chip being locked up in a way that makes the detection fail - and therefore the RESET not being performed. This catch-22 needs to be solved by the user doing a hard RESET.
2014-06-12 20:56:35 +00:00
fixup13:lda rxtxreg+1
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
sta (ptr),y
iny
Optimized CS8900A driver for speed and size. - Speed: The primary byte copy loops are reduzed to the bare minimum by adjusting the base pointer 'ptr' and loop register 'y' in such a way that the 'y' overflow matches the low byte of the loop size. - Size: Factored out all repeated code into subroutines. Introduced a loop for setting the MAC address. Additional minor changes: - Activate frame reception as last step of initialization after CS8900A configuration. - Properly set internal address bits used by the CS8900A.
2013-09-11 18:48:23 +00:00
bne :-
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
inc ptr+1
Minor optimization.
2007-11-29 21:56:55 +00:00
dex
Optimized CS8900A driver for speed and size. - Speed: The primary byte copy loops are reduzed to the bare minimum by adjusting the base pointer 'ptr' and loop register 'y' in such a way that the 'y' overflow matches the low byte of the loop size. - Size: Factored out all repeated code into subroutines. Introduced a loop for setting the MAC address. Additional minor changes: - Activate frame reception as last step of initialization after CS8900A configuration. - Properly set internal address bits used by the CS8900A.
2013-09-11 18:48:23 +00:00
bpl :-
Take in account that the C64 Retro Replay clockport needs to be activated in order to work with the RR-Net Ethernet card.
2007-12-08 21:05:48 +00:00
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
; Return frame length
lda len
ldx len+1
Enhanced Ethernet drivers. Made Ethernet drivers easier to consume by assembly programs. * Replaced function pointers with JMP instructions. * Provide return values additionally via Carry flag. Reset Ethernet chips on initialization. Both for the CS8900A and the W5100 the data sheets just say that the RESET bit is automatically cleared after the RESET. This may be interpreted in two ways: 1) There's no need to be afraid of reading the RESET bit as 1 and unintentionally trigger a RESET by writing it back after ORing in some other bit. 2) The RESET process isn't complete before the RESET bit hasn't become 0 again. It's impossible for me to empirically falsify the latter option as the drivers are supposed to work on faster machines than the ones I have access to. And if the RESET process includes things like oscillators then the time to complete the RESET could differ even between multiple exemplars of the same chip. Therefore I opted to presume the latter option. However that means a non-exsistent chip may cause an infinite loop while waiting for the RESET bit to be cleared so I finally added code to detect the presence of the Ethernet chips. There's a risk of a chip being locked up in a way that makes the detection fail - and therefore the RESET not being performed. This catch-22 needs to be solved by the user doing a hard RESET.
2014-06-12 20:56:35 +00:00
clc
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
rts
;---------------------------------------------------------------------
send:
; Save frame length
sta cnt
stx cnt+1
Do not reject frames with a length exactly equal to the uIP bufer size.
2013-01-30 22:39:01 +00:00
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
; Transmit command
Optimized CS8900A driver for speed and size. - Speed: The primary byte copy loops are reduzed to the bare minimum by adjusting the base pointer 'ptr' and loop register 'y' in such a way that the 'y' overflow matches the low byte of the loop size. - Size: Factored out all repeated code into subroutines. Introduced a loop for setting the MAC address. Additional minor changes: - Activate frame reception as last step of initialization after CS8900A configuration. - Properly set internal address bits used by the CS8900A.
2013-09-11 18:48:23 +00:00
lda #$C9
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
ldx #$00
Enhanced Ethernet drivers. Made Ethernet drivers easier to consume by assembly programs. * Replaced function pointers with JMP instructions. * Provide return values additionally via Carry flag. Reset Ethernet chips on initialization. Both for the CS8900A and the W5100 the data sheets just say that the RESET bit is automatically cleared after the RESET. This may be interpreted in two ways: 1) There's no need to be afraid of reading the RESET bit as 1 and unintentionally trigger a RESET by writing it back after ORing in some other bit. 2) The RESET process isn't complete before the RESET bit hasn't become 0 again. It's impossible for me to empirically falsify the latter option as the drivers are supposed to work on faster machines than the ones I have access to. And if the RESET process includes things like oscillators then the time to complete the RESET could differ even between multiple exemplars of the same chip. Therefore I opted to presume the latter option. However that means a non-exsistent chip may cause an infinite loop while waiting for the RESET bit to be cleared so I finally added code to detect the presence of the Ethernet chips. There's a risk of a chip being locked up in a way that makes the detection fail - and therefore the RESET not being performed. This catch-22 needs to be solved by the user doing a hard RESET.
2014-06-12 20:56:35 +00:00
fixup14:sta txcmd
fixup15:stx txcmd+1
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
lda cnt
ldx cnt+1
Enhanced Ethernet drivers. Made Ethernet drivers easier to consume by assembly programs. * Replaced function pointers with JMP instructions. * Provide return values additionally via Carry flag. Reset Ethernet chips on initialization. Both for the CS8900A and the W5100 the data sheets just say that the RESET bit is automatically cleared after the RESET. This may be interpreted in two ways: 1) There's no need to be afraid of reading the RESET bit as 1 and unintentionally trigger a RESET by writing it back after ORing in some other bit. 2) The RESET process isn't complete before the RESET bit hasn't become 0 again. It's impossible for me to empirically falsify the latter option as the drivers are supposed to work on faster machines than the ones I have access to. And if the RESET process includes things like oscillators then the time to complete the RESET could differ even between multiple exemplars of the same chip. Therefore I opted to presume the latter option. However that means a non-exsistent chip may cause an infinite loop while waiting for the RESET bit to be cleared so I finally added code to detect the presence of the Ethernet chips. There's a risk of a chip being locked up in a way that makes the detection fail - and therefore the RESET not being performed. This catch-22 needs to be solved by the user doing a hard RESET.
2014-06-12 20:56:35 +00:00
fixup16:sta txlen
fixup17:stx txlen+1
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
; Adjust odd frame length
Optimized CS8900A driver for speed and size. - Speed: The primary byte copy loops are reduzed to the bare minimum by adjusting the base pointer 'ptr' and loop register 'y' in such a way that the 'y' overflow matches the low byte of the loop size. - Size: Factored out all repeated code into subroutines. Introduced a loop for setting the MAC address. Additional minor changes: - Activate frame reception as last step of initialization after CS8900A configuration. - Properly set internal address bits used by the CS8900A.
2013-09-11 18:48:23 +00:00
jsr adjustcnt
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
; 8 retries
Optimized CS8900A driver for speed and size. - Speed: The primary byte copy loops are reduzed to the bare minimum by adjusting the base pointer 'ptr' and loop register 'y' in such a way that the 'y' overflow matches the low byte of the loop size. - Size: Factored out all repeated code into subroutines. Introduced a loop for setting the MAC address. Additional minor changes: - Activate frame reception as last step of initialization after CS8900A configuration. - Properly set internal address bits used by the CS8900A.
2013-09-11 18:48:23 +00:00
ldy #$08
Do not reject frames with a length exactly equal to the uIP bufer size.
2013-01-30 22:39:01 +00:00
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
; Check for avaliable buffer space
; PACKETPP = $0138, PPDATA & $0100 ?
: lda #$38
Saved six more bytes ;-)
2013-11-13 22:32:49 +00:00
jsr packetpp_a1
Enhanced Ethernet drivers. Made Ethernet drivers easier to consume by assembly programs. * Replaced function pointers with JMP instructions. * Provide return values additionally via Carry flag. Reset Ethernet chips on initialization. Both for the CS8900A and the W5100 the data sheets just say that the RESET bit is automatically cleared after the RESET. This may be interpreted in two ways: 1) There's no need to be afraid of reading the RESET bit as 1 and unintentionally trigger a RESET by writing it back after ORing in some other bit. 2) The RESET process isn't complete before the RESET bit hasn't become 0 again. It's impossible for me to empirically falsify the latter option as the drivers are supposed to work on faster machines than the ones I have access to. And if the RESET process includes things like oscillators then the time to complete the RESET could differ even between multiple exemplars of the same chip. Therefore I opted to presume the latter option. However that means a non-exsistent chip may cause an infinite loop while waiting for the RESET bit to be cleared so I finally added code to detect the presence of the Ethernet chips. There's a risk of a chip being locked up in a way that makes the detection fail - and therefore the RESET not being performed. This catch-22 needs to be solved by the user doing a hard RESET.
2014-06-12 20:56:35 +00:00
fixup18:lda ppdata+1
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
and #$01
bne :+
; No space avaliable, skip a received frame
Optimized CS8900A driver for speed and size. - Speed: The primary byte copy loops are reduzed to the bare minimum by adjusting the base pointer 'ptr' and loop register 'y' in such a way that the 'y' overflow matches the low byte of the loop size. - Size: Factored out all repeated code into subroutines. Introduced a loop for setting the MAC address. Additional minor changes: - Activate frame reception as last step of initialization after CS8900A configuration. - Properly set internal address bits used by the CS8900A.
2013-09-11 18:48:23 +00:00
jsr skipframe
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
; And try again
dey
bne :-
Enhanced Ethernet drivers. Made Ethernet drivers easier to consume by assembly programs. * Replaced function pointers with JMP instructions. * Provide return values additionally via Carry flag. Reset Ethernet chips on initialization. Both for the CS8900A and the W5100 the data sheets just say that the RESET bit is automatically cleared after the RESET. This may be interpreted in two ways: 1) There's no need to be afraid of reading the RESET bit as 1 and unintentionally trigger a RESET by writing it back after ORing in some other bit. 2) The RESET process isn't complete before the RESET bit hasn't become 0 again. It's impossible for me to empirically falsify the latter option as the drivers are supposed to work on faster machines than the ones I have access to. And if the RESET process includes things like oscillators then the time to complete the RESET could differ even between multiple exemplars of the same chip. Therefore I opted to presume the latter option. However that means a non-exsistent chip may cause an infinite loop while waiting for the RESET bit to be cleared so I finally added code to detect the presence of the Ethernet chips. There's a risk of a chip being locked up in a way that makes the detection fail - and therefore the RESET not being performed. This catch-22 needs to be solved by the user doing a hard RESET.
2014-06-12 20:56:35 +00:00
sec
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
rts
; Send the frame
; --------------
; Write bytes from buffer
Optimized CS8900A driver for speed and size. - Speed: The primary byte copy loops are reduzed to the bare minimum by adjusting the base pointer 'ptr' and loop register 'y' in such a way that the 'y' overflow matches the low byte of the loop size. - Size: Factored out all repeated code into subroutines. Introduced a loop for setting the MAC address. Additional minor changes: - Activate frame reception as last step of initialization after CS8900A configuration. - Properly set internal address bits used by the CS8900A.
2013-09-11 18:48:23 +00:00
: jsr adjustptr
: lda (ptr),y
Enhanced Ethernet drivers. Made Ethernet drivers easier to consume by assembly programs. * Replaced function pointers with JMP instructions. * Provide return values additionally via Carry flag. Reset Ethernet chips on initialization. Both for the CS8900A and the W5100 the data sheets just say that the RESET bit is automatically cleared after the RESET. This may be interpreted in two ways: 1) There's no need to be afraid of reading the RESET bit as 1 and unintentionally trigger a RESET by writing it back after ORing in some other bit. 2) The RESET process isn't complete before the RESET bit hasn't become 0 again. It's impossible for me to empirically falsify the latter option as the drivers are supposed to work on faster machines than the ones I have access to. And if the RESET process includes things like oscillators then the time to complete the RESET could differ even between multiple exemplars of the same chip. Therefore I opted to presume the latter option. However that means a non-exsistent chip may cause an infinite loop while waiting for the RESET bit to be cleared so I finally added code to detect the presence of the Ethernet chips. There's a risk of a chip being locked up in a way that makes the detection fail - and therefore the RESET not being performed. This catch-22 needs to be solved by the user doing a hard RESET.
2014-06-12 20:56:35 +00:00
fixup19:sta rxtxreg
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
iny
lda (ptr),y
Enhanced Ethernet drivers. Made Ethernet drivers easier to consume by assembly programs. * Replaced function pointers with JMP instructions. * Provide return values additionally via Carry flag. Reset Ethernet chips on initialization. Both for the CS8900A and the W5100 the data sheets just say that the RESET bit is automatically cleared after the RESET. This may be interpreted in two ways: 1) There's no need to be afraid of reading the RESET bit as 1 and unintentionally trigger a RESET by writing it back after ORing in some other bit. 2) The RESET process isn't complete before the RESET bit hasn't become 0 again. It's impossible for me to empirically falsify the latter option as the drivers are supposed to work on faster machines than the ones I have access to. And if the RESET process includes things like oscillators then the time to complete the RESET could differ even between multiple exemplars of the same chip. Therefore I opted to presume the latter option. However that means a non-exsistent chip may cause an infinite loop while waiting for the RESET bit to be cleared so I finally added code to detect the presence of the Ethernet chips. There's a risk of a chip being locked up in a way that makes the detection fail - and therefore the RESET not being performed. This catch-22 needs to be solved by the user doing a hard RESET.
2014-06-12 20:56:35 +00:00
fixup20:sta rxtxreg+1
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
iny
Optimized CS8900A driver for speed and size. - Speed: The primary byte copy loops are reduzed to the bare minimum by adjusting the base pointer 'ptr' and loop register 'y' in such a way that the 'y' overflow matches the low byte of the loop size. - Size: Factored out all repeated code into subroutines. Introduced a loop for setting the MAC address. Additional minor changes: - Activate frame reception as last step of initialization after CS8900A configuration. - Properly set internal address bits used by the CS8900A.
2013-09-11 18:48:23 +00:00
bne :-
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
inc ptr+1
Minor optimization.
2007-11-29 21:56:55 +00:00
dex
Optimized CS8900A driver for speed and size. - Speed: The primary byte copy loops are reduzed to the bare minimum by adjusting the base pointer 'ptr' and loop register 'y' in such a way that the 'y' overflow matches the low byte of the loop size. - Size: Factored out all repeated code into subroutines. Introduced a loop for setting the MAC address. Additional minor changes: - Activate frame reception as last step of initialization after CS8900A configuration. - Properly set internal address bits used by the CS8900A.
2013-09-11 18:48:23 +00:00
bpl :-
Enhanced Ethernet drivers. Made Ethernet drivers easier to consume by assembly programs. * Replaced function pointers with JMP instructions. * Provide return values additionally via Carry flag. Reset Ethernet chips on initialization. Both for the CS8900A and the W5100 the data sheets just say that the RESET bit is automatically cleared after the RESET. This may be interpreted in two ways: 1) There's no need to be afraid of reading the RESET bit as 1 and unintentionally trigger a RESET by writing it back after ORing in some other bit. 2) The RESET process isn't complete before the RESET bit hasn't become 0 again. It's impossible for me to empirically falsify the latter option as the drivers are supposed to work on faster machines than the ones I have access to. And if the RESET process includes things like oscillators then the time to complete the RESET could differ even between multiple exemplars of the same chip. Therefore I opted to presume the latter option. However that means a non-exsistent chip may cause an infinite loop while waiting for the RESET bit to be cleared so I finally added code to detect the presence of the Ethernet chips. There's a risk of a chip being locked up in a way that makes the detection fail - and therefore the RESET not being performed. This catch-22 needs to be solved by the user doing a hard RESET.
2014-06-12 20:56:35 +00:00
clc
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
rts
;---------------------------------------------------------------------
exit:
rts
Do not reject frames with a length exactly equal to the uIP bufer size.
2013-01-30 22:39:01 +00:00
Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations: - C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
2007-11-19 23:14:14 +00:00
;---------------------------------------------------------------------
Optimized CS8900A driver for speed and size. - Speed: The primary byte copy loops are reduzed to the bare minimum by adjusting the base pointer 'ptr' and loop register 'y' in such a way that the 'y' overflow matches the low byte of the loop size. - Size: Factored out all repeated code into subroutines. Introduced a loop for setting the MAC address. Additional minor changes: - Activate frame reception as last step of initialization after CS8900A configuration. - Properly set internal address bits used by the CS8900A.
2013-09-11 18:48:23 +00:00
Saved six more bytes ;-)
2013-11-13 22:32:49 +00:00
packetpp_a1:
Optimized CS8900A driver for speed and size. - Speed: The primary byte copy loops are reduzed to the bare minimum by adjusting the base pointer 'ptr' and loop register 'y' in such a way that the 'y' overflow matches the low byte of the loop size. - Size: Factored out all repeated code into subroutines. Introduced a loop for setting the MAC address. Additional minor changes: - Activate frame reception as last step of initialization after CS8900A configuration. - Properly set internal address bits used by the CS8900A.
2013-09-11 18:48:23 +00:00
ldx #$01
Enhanced Ethernet drivers. Made Ethernet drivers easier to consume by assembly programs. * Replaced function pointers with JMP instructions. * Provide return values additionally via Carry flag. Reset Ethernet chips on initialization. Both for the CS8900A and the W5100 the data sheets just say that the RESET bit is automatically cleared after the RESET. This may be interpreted in two ways: 1) There's no need to be afraid of reading the RESET bit as 1 and unintentionally trigger a RESET by writing it back after ORing in some other bit. 2) The RESET process isn't complete before the RESET bit hasn't become 0 again. It's impossible for me to empirically falsify the latter option as the drivers are supposed to work on faster machines than the ones I have access to. And if the RESET process includes things like oscillators then the time to complete the RESET could differ even between multiple exemplars of the same chip. Therefore I opted to presume the latter option. However that means a non-exsistent chip may cause an infinite loop while waiting for the RESET bit to be cleared so I finally added code to detect the presence of the Ethernet chips. There's a risk of a chip being locked up in a way that makes the detection fail - and therefore the RESET not being performed. This catch-22 needs to be solved by the user doing a hard RESET.
2014-06-12 20:56:35 +00:00
packetpp_ax:
fixup21:sta packetpp
fixup22:stx packetpp+1
Saved six more bytes ;-)
2013-11-13 22:32:49 +00:00
rts
;---------------------------------------------------------------------
ppdata_ax:
Enhanced Ethernet drivers. Made Ethernet drivers easier to consume by assembly programs. * Replaced function pointers with JMP instructions. * Provide return values additionally via Carry flag. Reset Ethernet chips on initialization. Both for the CS8900A and the W5100 the data sheets just say that the RESET bit is automatically cleared after the RESET. This may be interpreted in two ways: 1) There's no need to be afraid of reading the RESET bit as 1 and unintentionally trigger a RESET by writing it back after ORing in some other bit. 2) The RESET process isn't complete before the RESET bit hasn't become 0 again. It's impossible for me to empirically falsify the latter option as the drivers are supposed to work on faster machines than the ones I have access to. And if the RESET process includes things like oscillators then the time to complete the RESET could differ even between multiple exemplars of the same chip. Therefore I opted to presume the latter option. However that means a non-exsistent chip may cause an infinite loop while waiting for the RESET bit to be cleared so I finally added code to detect the presence of the Ethernet chips. There's a risk of a chip being locked up in a way that makes the detection fail - and therefore the RESET not being performed. This catch-22 needs to be solved by the user doing a hard RESET.
2014-06-12 20:56:35 +00:00
fixup23:sta ppdata
fixup24:stx ppdata+1
Optimized CS8900A driver for speed and size. - Speed: The primary byte copy loops are reduzed to the bare minimum by adjusting the base pointer 'ptr' and loop register 'y' in such a way that the 'y' overflow matches the low byte of the loop size. - Size: Factored out all repeated code into subroutines. Introduced a loop for setting the MAC address. Additional minor changes: - Activate frame reception as last step of initialization after CS8900A configuration. - Properly set internal address bits used by the CS8900A.
2013-09-11 18:48:23 +00:00
rts
;---------------------------------------------------------------------
skipframe:
; PACKETPP = $0102, PPDATA = PPDATA | $0040
lda #$02
Saved six more bytes ;-)
2013-11-13 22:32:49 +00:00
jsr packetpp_a1
Enhanced Ethernet drivers. Made Ethernet drivers easier to consume by assembly programs. * Replaced function pointers with JMP instructions. * Provide return values additionally via Carry flag. Reset Ethernet chips on initialization. Both for the CS8900A and the W5100 the data sheets just say that the RESET bit is automatically cleared after the RESET. This may be interpreted in two ways: 1) There's no need to be afraid of reading the RESET bit as 1 and unintentionally trigger a RESET by writing it back after ORing in some other bit. 2) The RESET process isn't complete before the RESET bit hasn't become 0 again. It's impossible for me to empirically falsify the latter option as the drivers are supposed to work on faster machines than the ones I have access to. And if the RESET process includes things like oscillators then the time to complete the RESET could differ even between multiple exemplars of the same chip. Therefore I opted to presume the latter option. However that means a non-exsistent chip may cause an infinite loop while waiting for the RESET bit to be cleared so I finally added code to detect the presence of the Ethernet chips. There's a risk of a chip being locked up in a way that makes the detection fail - and therefore the RESET not being performed. This catch-22 needs to be solved by the user doing a hard RESET.
2014-06-12 20:56:35 +00:00
fixup25:lda ppdata
Optimized CS8900A driver for speed and size. - Speed: The primary byte copy loops are reduzed to the bare minimum by adjusting the base pointer 'ptr' and loop register 'y' in such a way that the 'y' overflow matches the low byte of the loop size. - Size: Factored out all repeated code into subroutines. Introduced a loop for setting the MAC address. Additional minor changes: - Activate frame reception as last step of initialization after CS8900A configuration. - Properly set internal address bits used by the CS8900A.
2013-09-11 18:48:23 +00:00
ora #$40
Enhanced Ethernet drivers. Made Ethernet drivers easier to consume by assembly programs. * Replaced function pointers with JMP instructions. * Provide return values additionally via Carry flag. Reset Ethernet chips on initialization. Both for the CS8900A and the W5100 the data sheets just say that the RESET bit is automatically cleared after the RESET. This may be interpreted in two ways: 1) There's no need to be afraid of reading the RESET bit as 1 and unintentionally trigger a RESET by writing it back after ORing in some other bit. 2) The RESET process isn't complete before the RESET bit hasn't become 0 again. It's impossible for me to empirically falsify the latter option as the drivers are supposed to work on faster machines than the ones I have access to. And if the RESET process includes things like oscillators then the time to complete the RESET could differ even between multiple exemplars of the same chip. Therefore I opted to presume the latter option. However that means a non-exsistent chip may cause an infinite loop while waiting for the RESET bit to be cleared so I finally added code to detect the presence of the Ethernet chips. There's a risk of a chip being locked up in a way that makes the detection fail - and therefore the RESET not being performed. This catch-22 needs to be solved by the user doing a hard RESET.
2014-06-12 20:56:35 +00:00
fixup26:sta ppdata
Optimized CS8900A driver for speed and size. - Speed: The primary byte copy loops are reduzed to the bare minimum by adjusting the base pointer 'ptr' and loop register 'y' in such a way that the 'y' overflow matches the low byte of the loop size. - Size: Factored out all repeated code into subroutines. Introduced a loop for setting the MAC address. Additional minor changes: - Activate frame reception as last step of initialization after CS8900A configuration. - Properly set internal address bits used by the CS8900A.
2013-09-11 18:48:23 +00:00
rts
;---------------------------------------------------------------------
adjustcnt:
lsr
bcc :+
inc cnt
bne :+
inc cnt+1
: rts
;---------------------------------------------------------------------
adjustptr:
lda cnt
Saved another byte ;-)
2013-10-03 20:32:12 +00:00
ldx cnt+1
Optimized CS8900A driver for speed and size. - Speed: The primary byte copy loops are reduzed to the bare minimum by adjusting the base pointer 'ptr' and loop register 'y' in such a way that the 'y' overflow matches the low byte of the loop size. - Size: Factored out all repeated code into subroutines. Introduced a loop for setting the MAC address. Additional minor changes: - Activate frame reception as last step of initialization after CS8900A configuration. - Properly set internal address bits used by the CS8900A.
2013-09-11 18:48:23 +00:00
eor #$FF ; Two's complement part 1
tay
iny ; Two's complement part 2
sty reg
sec
lda bufaddr
sbc reg
sta ptr
lda bufaddr+1
sbc #$00
sta ptr+1
rts
;---------------------------------------------------------------------
Reference in New Issue Copy Permalink