2014-10-06 22:07:22 +00:00
|
|
|
/**
|
2016-07-17 19:50:42 +00:00
|
|
|
* \addtogroup CMSIS_Core_FunctionInterface
|
|
|
|
* \ingroup cmsis
|
2014-10-06 22:07:22 +00:00
|
|
|
*/
|
|
|
|
|
|
|
|
/**
|
2016-07-17 19:50:42 +00:00
|
|
|
* \addtogroup CMSIS_core_register
|
|
|
|
* \ingroup cmsis
|
2014-10-06 22:07:22 +00:00
|
|
|
*/
|
|
|
|
|
|
|
|
/**
|
2016-07-17 19:50:42 +00:00
|
|
|
* \addtogroup CMSIS_glob_defs
|
|
|
|
* \ingroup cmsis
|
2014-10-06 22:07:22 +00:00
|
|
|
*/
|
|
|
|
|
|
|
|
/**
|
2016-07-17 19:50:42 +00:00
|
|
|
* \addtogroup CMSIS_MISRA_Exceptions
|
|
|
|
* \ingroup cmsis
|
2014-10-06 22:07:22 +00:00
|
|
|
*/
|
|
|
|
|
|
|
|
/**
|
2016-07-17 19:50:42 +00:00
|
|
|
* \addtogroup CMSIS_core_definitions
|
|
|
|
* \ingroup cmsis
|
2014-10-06 22:07:22 +00:00
|
|
|
*/
|
|
|
|
|
|
|
|
/**
|
2016-07-17 19:50:42 +00:00
|
|
|
* \addtogroup CMSIS_SIMD_intrinsics
|
|
|
|
* \ingroup cmsis
|
2014-10-06 22:07:22 +00:00
|
|
|
*/
|
|
|
|
|
|
|
|
/**
|
2016-07-17 19:50:42 +00:00
|
|
|
* \addtogroup CMSIS_Core_InstructionInterface
|
|
|
|
* \ingroup cmsis
|
2014-10-06 22:07:22 +00:00
|
|
|
*/
|
|
|
|
|
|
|
|
/**
|
2016-07-17 19:50:42 +00:00
|
|
|
* \defgroup Cortex_M0 Cortex-M0
|
|
|
|
* \ingroup cmsis
|
2014-10-06 22:07:22 +00:00
|
|
|
*/
|
|
|
|
|
2016-07-13 22:20:59 +00:00
|
|
|
/**
|
|
|
|
* \defgroup Cortex-M0+ Cortex-M0+
|
|
|
|
* \ingroup cmsis
|
|
|
|
*/
|
|
|
|
|
2014-10-06 22:07:22 +00:00
|
|
|
/**
|
2016-07-17 19:50:42 +00:00
|
|
|
* \defgroup Cortex_M3 Cortex-M3
|
|
|
|
* \ingroup cmsis
|
2014-10-06 22:07:22 +00:00
|
|
|
*/
|
|
|
|
|
|
|
|
/**
|
2016-07-17 19:50:42 +00:00
|
|
|
* \defgroup Cortex_M4 Cortex-M4
|
|
|
|
* \ingroup cmsis
|
2014-10-06 22:07:22 +00:00
|
|
|
*/
|
|
|
|
|
2016-07-13 22:20:59 +00:00
|
|
|
/**
|
|
|
|
* \defgroup Cortex_M7 Cortex-M7
|
|
|
|
* \ingroup cmsis
|
|
|
|
*/
|