2015-09-21 08:57:54 +00:00
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/*
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* Copyright (c) 2014, SICS Swedish ICT.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of the Contiki operating system.
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*
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*/
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/**
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* \file
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2015-12-02 09:25:32 +00:00
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* Tickless clock implementation for NXP jn516x.
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2015-09-21 08:57:54 +00:00
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* \author
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* Beshr Al Nahas <beshr@sics.se>
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2015-12-02 09:25:32 +00:00
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* Atis Elsts <atis.elsts@sics.se>
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2015-09-21 08:57:54 +00:00
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*
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*/
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#include <AppHardwareApi.h>
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#include <PeripheralRegs.h>
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#include "contiki.h"
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#include "sys/energest.h"
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#include "sys/clock.h"
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#include "sys/etimer.h"
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#include "rtimer-arch.h"
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#include "dev/watchdog.h"
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#define DEBUG 0
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#if DEBUG
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#include <stdio.h>
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#define PRINTF(...) printf(__VA_ARGS__)
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#else
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#define PRINTF(...)
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#endif
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#define CLOCK_TIMER E_AHI_TIMER_1
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2015-12-02 09:25:32 +00:00
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#define CLOCK_TIMER_ISR_DEV E_AHI_DEVICE_TIMER1
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#define OVERFLOW_TIMER E_AHI_TIMER_0
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#define OVERFLOW_TIMER_ISR_DEV E_AHI_DEVICE_TIMER0
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/* 16Mhz / 2^10 = 15.625 kHz */
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#define CLOCK_PRESCALE 10
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#define PRESCALED_TICKS_PER_SECOND 15625
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/* 8ms tick --> overflow after ~397.7 days */
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#define CLOCK_INTERVAL 125
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/* Max schedulable number of ticks.
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* Must not be more than:
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* 0xffff / (16'000'000 / (1 << CLOCK_PRESCALE) / CLOCK_SECOND)
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*/
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#define CLOCK_MAX_SCHEDULABLE_TICKS 520
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/* Min guard time an etimer can be scheduled before an rtimer */
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#define CLOCK_RTIMER_GUARD_TIME US_TO_RTIMERTICKS(16)
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/* Clock tick expressed as rtimer ticks */
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#define CLOCK_TICK ((1 << CLOCK_PRESCALE) * CLOCK_INTERVAL)
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#define RTIMER_OVERFLOW_PRESCALED 4194304 /* = 0x100000000 / (2^CLOCK_PRESCALE) */
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#define RTIMER_OVERFLOW_REMAINDER 54 /* in prescaled ticks, per one overflow */
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#define CLOCK_LT(a, b) ((int32_t)((a)-(b)) < 0)
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/*---------------------------------------------------------------------------*/
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static uint32_t
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clock(void)
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{
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/* same as rtimer_arch_now() */
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return u32AHI_TickTimerRead();
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}
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/*---------------------------------------------------------------------------*/
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static uint32_t
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check_rtimer_overflow(rtimer_clock_t now)
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{
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static rtimer_clock_t last_rtimer_ticks;
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static uint32_t clock_ticks_remainder;
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static uint32_t clock_ticks_base;
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if(last_rtimer_ticks > now) {
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clock_ticks_base += RTIMER_OVERFLOW_PRESCALED / CLOCK_INTERVAL;
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clock_ticks_remainder += RTIMER_OVERFLOW_REMAINDER;
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if(clock_ticks_remainder > CLOCK_INTERVAL) {
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clock_ticks_remainder -= CLOCK_INTERVAL;
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clock_ticks_base += 1;
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}
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}
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last_rtimer_ticks = now;
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return clock_ticks_base;
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}
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/*---------------------------------------------------------------------------*/
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static void
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check_etimers(void)
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{
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if(etimer_pending()) {
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clock_time_t now = clock_time();
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if(!CLOCK_LT(now, etimer_next_expiration_time())) {
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etimer_request_poll();
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}
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}
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process_nevents();
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}
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2015-09-21 08:57:54 +00:00
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/*---------------------------------------------------------------------------*/
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void
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clockTimerISR(uint32 u32Device, uint32 u32ItemBitmap)
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{
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2015-12-02 09:25:32 +00:00
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if(u32Device != CLOCK_TIMER_ISR_DEV && u32Device != OVERFLOW_TIMER_ISR_DEV) {
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2015-09-21 08:57:54 +00:00
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return;
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}
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2015-12-02 09:25:32 +00:00
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ENERGEST_ON(ENERGEST_TYPE_IRQ);
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2015-09-21 08:57:54 +00:00
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2015-12-02 09:25:32 +00:00
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if(u32Device == CLOCK_TIMER_ISR_DEV) {
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check_etimers();
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2015-09-21 08:57:54 +00:00
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}
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2015-12-02 09:25:32 +00:00
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if(u32Device == OVERFLOW_TIMER_ISR_DEV) {
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check_rtimer_overflow(clock());
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}
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2015-09-21 08:57:54 +00:00
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ENERGEST_OFF(ENERGEST_TYPE_IRQ);
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}
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/*---------------------------------------------------------------------------*/
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2015-12-02 09:25:32 +00:00
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void
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clock_arch_calibrate(void)
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2015-09-21 08:57:54 +00:00
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{
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2015-12-02 09:25:32 +00:00
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bAHI_SetClockRate(E_AHI_XTAL_32MHZ);
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/* Wait for oscillator to stabilise */
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while(bAHI_GetClkSource() == 1) ;
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while(bAHI_Clock32MHzStable() == 0) ;
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vAHI_OptimiseWaitStates();
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/* Turn on SPI master */
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vREG_SysWrite(REG_SYS_PWR_CTRL, u32REG_SysRead(REG_SYS_PWR_CTRL)
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| REG_SYSCTRL_PWRCTRL_SPIMEN_MASK);
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}
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/*---------------------------------------------------------------------------*/
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void
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clock_arch_init(int is_reinitialization)
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{
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/* initialize etimer interrupt timer */
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2015-09-21 08:57:54 +00:00
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vAHI_TimerEnable(CLOCK_TIMER, CLOCK_PRESCALE, 0, 1, 0);
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vAHI_TimerClockSelect(CLOCK_TIMER, 0, 0);
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vAHI_TimerConfigureOutputs(CLOCK_TIMER, 0, 1);
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vAHI_TimerDIOControl(CLOCK_TIMER, 0);
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vAHI_Timer1RegisterCallback(clockTimerISR);
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2015-12-02 09:25:32 +00:00
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/* initialize and start rtimer overflow timer */
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vAHI_TimerEnable(OVERFLOW_TIMER, CLOCK_PRESCALE, 0, 1, 0);
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vAHI_TimerClockSelect(OVERFLOW_TIMER, 0, 0);
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vAHI_TimerConfigureOutputs(OVERFLOW_TIMER, 0, 1);
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vAHI_TimerDIOControl(OVERFLOW_TIMER, 0);
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vAHI_Timer0RegisterCallback(clockTimerISR);
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vAHI_TimerStartRepeat(OVERFLOW_TIMER, 0, PRESCALED_TICKS_PER_SECOND * 4);
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if(is_reinitialization) {
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/* check if the etimer has overflowed (useful when this is executed after sleep */
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check_rtimer_overflow(clock());
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}
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2015-09-21 08:57:54 +00:00
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}
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/*---------------------------------------------------------------------------*/
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void
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clock_init(void)
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{
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/* gMAC_u8MaxBuffers = 2; */
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#ifdef JENNIC_CHIP_FAMILY_JN516x
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/* Turn off debugger */
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*(volatile uint32 *)0x020000a0 = 0;
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#endif
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2015-12-02 09:25:32 +00:00
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clock_arch_calibrate();
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2015-09-21 08:57:54 +00:00
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2015-12-02 09:25:32 +00:00
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/* setup clock mode and interrupt handler */
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clock_arch_init(0);
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2015-09-21 08:57:54 +00:00
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}
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/*---------------------------------------------------------------------------*/
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clock_time_t
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clock_time(void)
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{
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2015-12-02 09:25:32 +00:00
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uint32_t now = clock();
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clock_time_t base = check_rtimer_overflow(now);
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return base + now / CLOCK_TICK;
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2015-09-21 08:57:54 +00:00
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}
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/*---------------------------------------------------------------------------*/
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/**
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* Delay the CPU for a multiple of 0.0625 us.
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*/
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void
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clock_delay_usec(uint16_t dt)
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{
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2015-12-02 09:25:32 +00:00
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uint32_t end = clock() + dt;
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/* Note: this does not call watchdog periodic() */
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while(CLOCK_LT(clock(), end));
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2015-09-21 08:57:54 +00:00
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}
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/*---------------------------------------------------------------------------*/
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/**
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* Delay the CPU for a multiple of 8 us.
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*/
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void
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2015-12-02 09:25:32 +00:00
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clock_delay(unsigned int dt)
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2015-09-21 08:57:54 +00:00
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{
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2015-12-02 09:25:32 +00:00
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uint32_t end = clock() + dt * 128;
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while(CLOCK_LT(clock(), end)) {
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2015-09-21 08:57:54 +00:00
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watchdog_periodic();
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}
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}
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/*---------------------------------------------------------------------------*/
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/**
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* Wait for a multiple of 10 ms.
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*
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*/
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void
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clock_wait(clock_time_t t)
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{
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2015-12-02 09:25:32 +00:00
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clock_time_t end = clock_time() + t;
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while(CLOCK_LT(clock_time(), end)) {
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2015-09-21 08:57:54 +00:00
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watchdog_periodic();
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}
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}
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/*---------------------------------------------------------------------------*/
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2015-12-02 09:25:32 +00:00
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unsigned long
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clock_seconds(void)
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2015-09-21 08:57:54 +00:00
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{
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2015-12-02 09:25:32 +00:00
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return clock_time() / CLOCK_SECOND;
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2015-09-21 08:57:54 +00:00
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}
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/*---------------------------------------------------------------------------*/
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2015-12-02 09:25:32 +00:00
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clock_time_t
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clock_arch_time_to_etimer(void)
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2015-09-21 08:57:54 +00:00
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{
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2015-12-02 09:25:32 +00:00
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clock_time_t time_to_etimer;
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if(etimer_pending()) {
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time_to_etimer = etimer_next_expiration_time() - clock_time();
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if(time_to_etimer < 0) {
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time_to_etimer = 0;
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}
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} else {
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/* no active etimers */
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time_to_etimer = (clock_time_t)-1;
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}
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return time_to_etimer;
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2015-09-21 08:57:54 +00:00
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}
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/*---------------------------------------------------------------------------*/
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2015-12-02 09:25:32 +00:00
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void
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clock_arch_schedule_interrupt(clock_time_t time_to_etimer, rtimer_clock_t ticks_to_rtimer)
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2015-09-21 08:57:54 +00:00
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{
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2015-12-02 09:25:32 +00:00
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if(time_to_etimer > CLOCK_MAX_SCHEDULABLE_TICKS) {
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time_to_etimer = CLOCK_MAX_SCHEDULABLE_TICKS;
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}
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time_to_etimer *= CLOCK_INTERVAL;
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if(ticks_to_rtimer != (rtimer_clock_t)-1) {
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/* if the next rtimer is close enough to the etimer... */
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rtimer_clock_t ticks_to_etimer = time_to_etimer * (1 << CLOCK_PRESCALE);
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#if RTIMER_USE_32KHZ
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ticks_to_rtimer = (uint64_t)ticks_to_rtimer * (F_CPU / 2) / RTIMER_SECOND;
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#endif
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if(!CLOCK_LT(ticks_to_rtimer, ticks_to_etimer)
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&& CLOCK_LT(ticks_to_rtimer, ticks_to_etimer + CLOCK_RTIMER_GUARD_TIME)) {
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/* ..then schedule the etimer after the rtimer */
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time_to_etimer += 2;
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}
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}
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/* interrupt will not be generated if 0 is passed as the parameter */
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if(time_to_etimer == 0) {
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time_to_etimer = 1;
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}
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vAHI_TimerStartSingleShot(CLOCK_TIMER, 0, time_to_etimer);
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2015-09-21 08:57:54 +00:00
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}
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2015-12-02 09:25:32 +00:00
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/*---------------------------------------------------------------------------*/
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