found problems and fixed them.
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@ -6371,7 +6371,7 @@ Disassembly of section P2:
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403a3e: 5852 ldr r2, [r2, r1] r2 gets gaRFSynVCODivF_c[r1]
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403a3e: 5852 ldr r2, [r2, r1] r2 gets gaRFSynVCODivF_c[r1]
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403a40: 4903 ldr r1, [pc, #12] (403a50 <??DataTable3>) r1=0x00403c04 (gaRFSynVCODivI_c)
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403a40: 4903 ldr r1, [pc, #12] (403a50 <??DataTable3>) r1=0x00403c04 (gaRFSynVCODivI_c)
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403a42: 5c09 ldrb r1, [r1, r0] r1 gets gaRFSynVCODivI_c[r1]
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403a42: 5c09 ldrb r1, [r1, r0] r1 gets gaRFSynVCODivI_c[r1]
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403a44: f7ff fb52 bl 4030ec <SetChannel> // SetChannel(chan,gaRFSynVCODivF_c[chan],gaRFSynVCODivI_c[chan])
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403a44: f7ff fb52 bl 4030ec <SetChannel> // SetChannel(chan,gaRFSynVCODivI_c[chan],gaRFSynVCODivF_c[chan])
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403a48: 2000 movs r0, #0
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403a48: 2000 movs r0, #0
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403a4a: e01d b.n 403a88 <??Subroutine2_0>
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403a4a: e01d b.n 403a88 <??Subroutine2_0>
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@ -326,8 +326,8 @@ void set_channel(uint8_t chan) {
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tmp = tmp & 0xbfffffff;
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tmp = tmp & 0xbfffffff;
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reg(ADDR_CHAN1) = tmp;
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reg(ADDR_CHAN1) = tmp;
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reg(ADDR_CHAN2) = VCODivF[chan];
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reg(ADDR_CHAN2) = VCODivI[chan];
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reg(ADDR_CHAN2) = VCODivI[chan];
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reg(ADDR_CHAN3) = VCODivF[chan];
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tmp = reg(ADDR_CHAN4);
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tmp = reg(ADDR_CHAN4);
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tmp = tmp | 2;
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tmp = tmp | 2;
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