Harmonize usage across XXwares and CC2640R2-SDK
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@ -162,10 +162,10 @@ lpm_shutdown(uint32_t wakeup_pin, uint32_t io_pull, uint32_t wake_on)
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ti_lib_aon_wuc_mcu_power_off_config(MCU_VIRT_PWOFF_DISABLE);
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/* Latch the IOs in the padring and enable I/O pad sleep mode */
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#if !defined(ThisLibraryIsFor_CC26x0R2_HaltIfViolated)
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ti_lib_pwr_ctrl_io_freeze_enable();
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ti_lib_aon_ioc_freeze_enable();
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HWREG(AON_SYSCTL_BASE + AON_SYSCTL_O_SLEEPCTL) = 0;
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ti_lib_sys_ctrl_aon_sync();
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#endif
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/* Turn off VIMS cache, CRAM and TRAM - possibly not required */
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ti_lib_prcm_cache_retention_disable();
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ti_lib_vims_mode_set(VIMS_BASE, VIMS_MODE_OFF);
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@ -193,12 +193,7 @@ wake_up(void)
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ti_lib_sys_ctrl_aon_sync();
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/* Adjust recharge settings */
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#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
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// May need to change to XOSC_IN_LOW_POWER_MODE
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ti_lib_sys_ctrl_adjust_recharge_after_power_down(XOSC_IN_HIGH_POWER_MODE);
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#else
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ti_lib_sys_ctrl_adjust_recharge_after_power_down();
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#endif
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/*
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* Release the request to the uLDO
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@ -399,7 +399,7 @@ rf_core_set_modesel()
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} else if(chip_type == CHIP_TYPE_CC1350) {
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HWREG(PRCM_BASE + PRCM_O_RFCMODESEL) = PRCM_RFCMODESEL_CURR_MODE5;
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rv = RF_CORE_CMD_OK;
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#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
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#if CPU_FAMILY_CC26X0R2
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} else if(chip_type == CHIP_TYPE_CC2640R2) {
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HWREG(PRCM_BASE + PRCM_O_RFCMODESEL) = PRCM_RFCMODESEL_CURR_MODE1;
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rv = RF_CORE_CMD_OK;
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@ -197,14 +197,16 @@
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#define ti_lib_chipinfo_get_device_id_hw_rev_code(...) ChipInfo_GetDeviceIdHwRevCode(__VA_ARGS__)
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#define ti_lib_chipinfo_get_chip_type(...) ChipInfo_GetChipType(__VA_ARGS__)
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#define ti_lib_chipinfo_get_chip_family(...) ChipInfo_GetChipFamily(__VA_ARGS__)
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#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
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#if CPU_FAMILY_CC26X0R2
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#define ti_lib_chipinfo_chip_family_is_cc26xx(...) ChipInfo_ChipFamilyIs_CC26x0(__VA_ARGS__)
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#define ti_lib_chipinfo_chip_family_is_cc13xx(...) ChipInfo_ChipFamilyIs_CC13x0(__VA_ARGS__)
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#define ti_lib_chipinfo_chip_family_is_cc26x0r2(...) ChipInfo_ChipFamilyIs_CC26x0R2(__VA_ARGS__)
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#else
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#define ti_lib_chipinfo_chip_family_is_cc26xx(...) ChipInfo_ChipFamilyIsCC26xx(__VA_ARGS__)
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#define ti_lib_chipinfo_chip_family_is_cc13xx(...) ChipInfo_ChipFamilyIsCC13xx(__VA_ARGS__)
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#endif
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#endif /* CPU_FAMILY_CC26X0R2 */
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#define ti_lib_chipinfo_get_hw_revision(...) ChipInfo_GetHwRevision(__VA_ARGS__)
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#define ti_lib_chipinfo_hw_revision_is_1_0(...) ChipInfo_HwRevisionIs_1_0(__VA_ARGS__)
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#define ti_lib_chipinfo_hw_revision_is_gteq_2_0(...) ChipInfo_HwRevisionIs_GTEQ_2_0(__VA_ARGS__)
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@ -391,10 +393,6 @@
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#define ti_lib_pwr_ctrl_source_get(...) PowerCtrlSourceGet(__VA_ARGS__)
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#define ti_lib_pwr_ctrl_reset_source_get(...) PowerCtrlResetSourceGet(__VA_ARGS__)
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#define ti_lib_pwr_ctrl_reset_source_clear(...) PowerCtrlResetSourceClear(__VA_ARGS__)
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#if !defined(ThisLibraryIsFor_CC26x0R2_HaltIfViolated)
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#define ti_lib_pwr_ctrl_io_freeze_enable(...) PowerCtrlIOFreezeEnable(__VA_ARGS__)
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#define ti_lib_pwr_ctrl_io_freeze_disable(...) PowerCtrlIOFreezeDisable(__VA_ARGS__)
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#endif
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/*---------------------------------------------------------------------------*/
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/* rfc.h */
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#include "driverlib/rfc.h"
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@ -413,7 +411,14 @@
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#define ti_lib_sys_ctrl_aon_sync(...) SysCtrlAonSync(__VA_ARGS__)
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#define ti_lib_sys_ctrl_aon_update(...) SysCtrlAonUpdate(__VA_ARGS__)
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#define ti_lib_sys_ctrl_set_recharge_before_power_down(...) SysCtrlSetRechargeBeforePowerDown(__VA_ARGS__)
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#define ti_lib_sys_ctrl_adjust_recharge_after_power_down(...) SysCtrlAdjustRechargeAfterPowerDown(__VA_ARGS__)
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#if CPU_FAMILY_CC26X0R2
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/* May need to change to XOSC_IN_LOW_POWER_MODE */
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#define ti_lib_sys_ctrl_adjust_recharge_after_power_down() SysCtrlAdjustRechargeAfterPowerDown(XOSC_IN_HIGH_POWER_MODE)
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#else
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#define ti_lib_sys_ctrl_adjust_recharge_after_power_down() SysCtrlAdjustRechargeAfterPowerDown()
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#endif /* CPU_FAMILY_CC26X0R2 */
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#define ti_lib_sys_ctrl_dcdc_voltage_conditional_control(...) SysCtrl_DCDC_VoltageConditionalControl(__VA_ARGS__)
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#define ti_lib_sys_ctrl_reset_source_get(...) SysCtrlResetSourceGet(__VA_ARGS__)
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#define ti_lib_sys_ctrl_system_reset(...) SysCtrlSystemReset(__VA_ARGS__)
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@ -158,10 +158,10 @@ platform_init_stage_one()
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* latches in the first place. Before doing these things though, we should
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* allow software to first regain control of pins
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*/
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#if !defined(ThisLibraryIsFor_CC26x0R2_HaltIfViolated)
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ti_lib_pwr_ctrl_io_freeze_disable();
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ti_lib_aon_ioc_freeze_disable();
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HWREG(AON_SYSCTL_BASE + AON_SYSCTL_O_SLEEPCTL) = 1;
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ti_lib_sys_ctrl_aon_sync();
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#endif
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ti_lib_int_enable(INT_AON_GPIO_EDGE);
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ti_lib_int_master_enable();
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