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add support for TI's CC2640R2

This commit is contained in:
Jinyan BAI 2018-09-11 12:43:27 +01:00
parent 5e9cbceee0
commit 3ece31be30
17 changed files with 314 additions and 36 deletions
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3
.gitmodules vendored
View File

@ -22,3 +22,6 @@
[submodule "tools/motelist"]
path = tools/motelist
url = https://github.com/contiki-ng/motelist
[submodule "arch/cpu/cc26xx-cc13xx/lib/cc2640r2-sdk"]
path = arch/cpu/cc26xx-cc13xx/lib/cc2640r2-sdk
url = https://github.com/contiki-ng/cc2640r2-sdk.git

3
arch/cpu/cc26xx-cc13xx/Makefile.cc26x0r2f Normal file
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@ -0,0 +1,3 @@
TI_XXWARE_PATH = lib/cc2640r2-sdk
include $(CONTIKI_CPU)/Makefile.cc26xx-cc13xx

9
arch/cpu/cc26xx-cc13xx/Makefile.cc26xx-cc13xx
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@ -1,13 +1,8 @@
CPU_ABS_PATH = arch/cpu/cc26xx-cc13xx
TI_XXWARE = $(CONTIKI_CPU)/$(TI_XXWARE_PATH)
ifeq (,$(wildcard $(TI_XXWARE)))
$(warning $(TI_XXWARE) does not exist.)
$(warning Did you run 'git submodule update --init' ?)
$(error "")
endif
### cc26xxware sources under driverlib will be added to the MODULES list
### cc26xxware / cc26x0r2fware sources under driverlib will be added to the
### MODULES list
TI_XXWARE_SRC = $(CPU_ABS_PATH)/$(TI_XXWARE_PATH)/driverlib
### The directory with startup sources will be added to the CONTIKI_CPU_DIRS

1
arch/cpu/cc26xx-cc13xx/cc26xx.ld
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@ -76,6 +76,7 @@ SECTIONS
*(.data*)
_edata = .;
} > SRAM AT > FLASH
_ldata = LOADADDR(.data);
.ARM.exidx :
{

10
arch/cpu/cc26xx-cc13xx/dev/gpio-hal-arch.c
View File

@ -53,7 +53,11 @@ gpio_hal_arch_pin_cfg_set(gpio_hal_pin_t pin, gpio_hal_pin_cfg_t cfg)
gpio_hal_pin_cfg_t tmp;
/* Clear settings that we are about to change, keep everything else */
#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
config = ti_lib_ioc_port_configure_get(pin);
#else
config = ti_lib_rom_ioc_port_configure_get(pin);
#endif
config &= ~CONFIG_MASK;
tmp = cfg & GPIO_HAL_PIN_CFG_EDGE_BOTH;
@ -94,7 +98,11 @@ gpio_hal_arch_pin_cfg_get(gpio_hal_pin_t pin)
uint32_t config;
cfg = 0;
config = ti_lib_rom_ioc_port_configure_get(pin);
#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
config = ti_lib_ioc_port_configure_get(pin);
#else
config = ti_lib_rom_ioc_port_configure_get(pin);
#endif
/* Pull */
tmp = config & IOC_IOPULL_M;

12
arch/cpu/cc26xx-cc13xx/dev/gpio-hal-arch.h
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@ -56,9 +56,13 @@
#define gpio_hal_arch_interrupt_enable(p) interrupt_enable(p)
#define gpio_hal_arch_interrupt_disable(p) ti_lib_rom_ioc_int_disable(p)
#define gpio_hal_arch_pin_set_input(p) ti_lib_rom_ioc_pin_type_gpio_input(p)
#define gpio_hal_arch_pin_set_output(p) ti_lib_rom_ioc_pin_type_gpio_output(p)
#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
#define gpio_hal_arch_pin_set_input(p) ti_lib_ioc_pin_type_gpio_input(p)
#define gpio_hal_arch_pin_set_output(p) ti_lib_ioc_pin_type_gpio_output(p)
#else
#define gpio_hal_arch_pin_set_input(p) ti_lib_rom_ioc_pin_type_gpio_input(p)
#define gpio_hal_arch_pin_set_output(p) ti_lib_rom_ioc_pin_type_gpio_output(p)
#endif
#define gpio_hal_arch_set_pin(p) ti_lib_gpio_set_dio(p)
#define gpio_hal_arch_clear_pin(p) ti_lib_gpio_clear_dio(p)
#define gpio_hal_arch_toggle_pin(p) ti_lib_gpio_toggle_dio(p)
@ -73,7 +77,9 @@ static inline void
interrupt_enable(gpio_hal_pin_t pin)
{
ti_lib_gpio_clear_event_dio(pin);
#ifndef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
ti_lib_rom_ioc_int_enable(pin);
#endif
}
/*---------------------------------------------------------------------------*/
#endif /* GPIO_HAL_ARCH_H_ */

22
arch/cpu/cc26xx-cc13xx/dev/spi-arch.c
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@ -130,10 +130,18 @@ spi_arch_lock_and_open(spi_device_t *dev)
/* SPI configuration */
ti_lib_ssi_int_disable(spi_controller[dev->spi_controller].ssi_base, SSI_RXOR | SSI_RXFF | SSI_RXTO | SSI_TXFF);
ti_lib_ssi_int_clear(spi_controller[dev->spi_controller].ssi_base, SSI_RXOR | SSI_RXTO);
ti_lib_rom_ssi_config_set_exp_clk(spi_controller[dev->spi_controller].ssi_base, ti_lib_sys_ctrl_clock_get(),
#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
ti_lib_ssi_config_set_exp_clk(spi_controller[dev->spi_controller].ssi_base, ti_lib_sys_ctrl_clock_get(),
get_mode(dev), SSI_MODE_MASTER, dev->spi_bit_rate, 8);
ti_lib_rom_ioc_pin_type_ssi_master(spi_controller[dev->spi_controller].ssi_base, dev->pin_spi_miso,
ti_lib_ioc_pin_type_ssi_master(spi_controller[dev->spi_controller].ssi_base, dev->pin_spi_miso,
dev->pin_spi_mosi, IOID_UNUSED, dev->pin_spi_sck);
#else
ti_lib_rom_ssi_config_set_exp_clk(spi_controller[dev->spi_controller].ssi_base, ti_lib_sys_ctrl_clock_get(),
get_mode(dev), SSI_MODE_MASTER, dev->spi_bit_rate, 8);
ti_lib_rom_ioc_pin_type_ssi_master(spi_controller[dev->spi_controller].ssi_base, dev->pin_spi_miso,
dev->pin_spi_mosi, IOID_UNUSED, dev->pin_spi_sck);
#endif
ti_lib_ssi_enable(spi_controller[dev->spi_controller].ssi_base);
@ -205,14 +213,20 @@ spi_arch_transfer(spi_device_t *dev,
for(i = 0; i < totlen; i++) {
c = i < wlen ? write_buf[i] : 0;
ti_lib_ssi_data_put(spi_controller[dev->spi_controller].ssi_base, (uint8_t)c);
#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
ti_lib_ssi_data_get(spi_controller[dev->spi_controller].ssi_base, &c);
#else
ti_lib_rom_ssi_data_get(spi_controller[dev->spi_controller].ssi_base, &c);
#endif
if(i < rlen) {
inbuf[i] = (uint8_t)c;
}
}
#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
while(ti_lib_ssi_data_get_non_blocking(spi_controller[dev->spi_controller].ssi_base, &c)) ;
#else
while(ti_lib_rom_ssi_data_get_non_blocking(spi_controller[dev->spi_controller].ssi_base, &c)) ;
#endif
return SPI_DEV_STATUS_OK;
}
/*---------------------------------------------------------------------------*/

1
arch/cpu/cc26xx-cc13xx/lib/cc2640r2-sdk Submodule

@ -0,0 +1 @@
Subproject commit 0c01cfd363fd421d43baaa52af551a4ce8bf9e2b

5
arch/cpu/cc26xx-cc13xx/lpm.c
View File

@ -162,8 +162,10 @@ lpm_shutdown(uint32_t wakeup_pin, uint32_t io_pull, uint32_t wake_on)
ti_lib_aon_wuc_mcu_power_off_config(MCU_VIRT_PWOFF_DISABLE);
/* Latch the IOs in the padring and enable I/O pad sleep mode */
#if !defined(ThisLibraryIsFor_CC26x0R2_HaltIfViolated)
ti_lib_pwr_ctrl_io_freeze_enable();
#endif
/* Turn off VIMS cache, CRAM and TRAM - possibly not required */
ti_lib_prcm_cache_retention_disable();
ti_lib_vims_mode_set(VIMS_BASE, VIMS_MODE_OFF);
@ -191,7 +193,8 @@ wake_up(void)
ti_lib_sys_ctrl_aon_sync();
/* Adjust recharge settings */
ti_lib_sys_ctrl_adjust_recharge_after_power_down();
// May need to change to XOSC_IN_LOW_POWER_MODE
ti_lib_sys_ctrl_adjust_recharge_after_power_down(XOSC_IN_HIGH_POWER_MODE);
/*
* Release the request to the uLDO

3
arch/cpu/cc26xx-cc13xx/rf-core/rf-core.c
View File

@ -399,6 +399,9 @@ rf_core_set_modesel()
} else if(chip_type == CHIP_TYPE_CC1350) {
HWREG(PRCM_BASE + PRCM_O_RFCMODESEL) = PRCM_RFCMODESEL_CURR_MODE5;
rv = RF_CORE_CMD_OK;
} else if (chip_type == CHIP_TYPE_CC2640R2) {
HWREG(PRCM_BASE + PRCM_O_RFCMODESEL) = PRCM_RFCMODESEL_CURR_MODE1;
rv = RF_CORE_CMD_OK;
}
return rv;

40
arch/cpu/cc26xx-cc13xx/ti-lib-rom.h
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@ -90,25 +90,27 @@
/* IOC API */
#define ti_lib_rom_ioc_port_configure_set ROM_IOCPortConfigureSet
#define ti_lib_rom_ioc_port_configure_get ROM_IOCPortConfigureGet
#define ti_lib_rom_ioc_io_shutdown_set ROM_IOCIOShutdownSet
#define ti_lib_rom_ioc_io_mode_set ROM_IOCIOModeSet
#define ti_lib_rom_ioc_io_int_set ROM_IOCIOIntSet
#define ti_lib_rom_ioc_io_port_pull_set ROM_IOCIOPortPullSet
#define ti_lib_rom_ioc_io_hyst_set ROM_IOCIOHystSet
#define ti_lib_rom_ioc_io_input_set ROM_IOCIOInputSet
#define ti_lib_rom_ioc_io_slew_ctrl_set ROM_IOCIOSlewCtrlSet
#define ti_lib_rom_ioc_io_drv_strength_set ROM_IOCIODrvStrengthSet
#define ti_lib_rom_ioc_io_port_id_set ROM_IOCIOPortIdSet
#define ti_lib_rom_ioc_int_enable ROM_IOCIntEnable
#define ti_lib_rom_ioc_int_disable ROM_IOCIntDisable
#define ti_lib_rom_ioc_pin_type_gpio_input ROM_IOCPinTypeGpioInput
#define ti_lib_rom_ioc_pin_type_gpio_output ROM_IOCPinTypeGpioOutput
#define ti_lib_rom_ioc_pin_type_uart ROM_IOCPinTypeUart
#define ti_lib_rom_ioc_pin_type_ssi_master ROM_IOCPinTypeSsiMaster
#define ti_lib_rom_ioc_pin_type_ssi_slave ROM_IOCPinTypeSsiSlave
#define ti_lib_rom_ioc_pin_type_i2c ROM_IOCPinTypeI2c
#define ti_lib_rom_ioc_pin_type_aux ROM_IOCPinTypeAux
#if !defined(ThisLibraryIsFor_CC26x0R2_HaltIfViolated)
#define ti_lib_rom_ioc_port_configure_get ROM_IOCPortConfigureGet
#define ti_lib_rom_ioc_io_shutdown_set ROM_IOCIOShutdownSet
#define ti_lib_rom_ioc_io_mode_set ROM_IOCIOModeSet
#define ti_lib_rom_ioc_io_int_set ROM_IOCIOIntSet
#define ti_lib_rom_ioc_io_port_pull_set ROM_IOCIOPortPullSet
#define ti_lib_rom_ioc_io_hyst_set ROM_IOCIOHystSet
#define ti_lib_rom_ioc_io_input_set ROM_IOCIOInputSet
#define ti_lib_rom_ioc_io_slew_ctrl_set ROM_IOCIOSlewCtrlSet
#define ti_lib_rom_ioc_io_drv_strength_set ROM_IOCIODrvStrengthSet
#define ti_lib_rom_ioc_io_port_id_set ROM_IOCIOPortIdSet
#define ti_lib_rom_ioc_int_enable ROM_IOCIntEnable
#define ti_lib_rom_ioc_int_disable ROM_IOCIntDisable
#define ti_lib_rom_ioc_pin_type_gpio_input ROM_IOCPinTypeGpioInput
#define ti_lib_rom_ioc_pin_type_gpio_output ROM_IOCPinTypeGpioOutput
#define ti_lib_rom_ioc_pin_type_uart ROM_IOCPinTypeUart
#define ti_lib_rom_ioc_pin_type_ssi_master ROM_IOCPinTypeSsiMaster
#define ti_lib_rom_ioc_pin_type_ssi_slave ROM_IOCPinTypeSsiSlave
#define ti_lib_rom_ioc_pin_type_i2c ROM_IOCPinTypeI2c
#define ti_lib_rom_ioc_pin_type_aux ROM_IOCPinTypeAux
#endif
/* PRCM API */
#define ti_lib_rom_prcm_inf_clock_configure_set ROM_PRCMInfClockConfigureSet

8
arch/cpu/cc26xx-cc13xx/ti-lib.h
View File

@ -200,8 +200,14 @@
#define ti_lib_chipinfo_get_device_id_hw_rev_code(...) ChipInfo_GetDeviceIdHwRevCode(__VA_ARGS__)
#define ti_lib_chipinfo_get_chip_type(...) ChipInfo_GetChipType(__VA_ARGS__)
#define ti_lib_chipinfo_get_chip_family(...) ChipInfo_GetChipFamily(__VA_ARGS__)
#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
#define ti_lib_chipinfo_chip_family_is_cc26xx(...) ChipInfo_ChipFamilyIs_CC26x0(__VA_ARGS__)
#define ti_lib_chipinfo_chip_family_is_cc13xx(...) ChipInfo_ChipFamilyIs_CC13x0(__VA_ARGS__)
#define ti_lib_chipinfo_chip_family_is_cc26x0r2(...) ChipInfo_ChipFamilyIs_CC26x0R2(__VA_ARGS__)
#else
#define ti_lib_chipinfo_chip_family_is_cc26xx(...) ChipInfo_ChipFamilyIsCC26xx(__VA_ARGS__)
#define ti_lib_chipinfo_chip_family_is_cc13xx(...) ChipInfo_ChipFamilyIsCC13xx(__VA_ARGS__)
#endif
#define ti_lib_chipinfo_get_hw_revision(...) ChipInfo_GetHwRevision(__VA_ARGS__)
#define ti_lib_chipinfo_hw_revision_is_1_0(...) ChipInfo_HwRevisionIs_1_0(__VA_ARGS__)
#define ti_lib_chipinfo_hw_revision_is_gteq_2_0(...) ChipInfo_HwRevisionIs_GTEQ_2_0(__VA_ARGS__)
@ -388,8 +394,10 @@
#define ti_lib_pwr_ctrl_source_get(...) PowerCtrlSourceGet(__VA_ARGS__)
#define ti_lib_pwr_ctrl_reset_source_get(...) PowerCtrlResetSourceGet(__VA_ARGS__)
#define ti_lib_pwr_ctrl_reset_source_clear(...) PowerCtrlResetSourceClear(__VA_ARGS__)
#if !defined(ThisLibraryIsFor_CC26x0R2_HaltIfViolated)
#define ti_lib_pwr_ctrl_io_freeze_enable(...) PowerCtrlIOFreezeEnable(__VA_ARGS__)
#define ti_lib_pwr_ctrl_io_freeze_disable(...) PowerCtrlIOFreezeDisable(__VA_ARGS__)
#endif
/*---------------------------------------------------------------------------*/
/* rfc.h */
#include "driverlib/rfc.h"

2
arch/platform/srf06-cc26xx/Makefile.srf06-cc26xx
View File

@ -6,7 +6,7 @@ endif
### Board and BSP selection
BOARD ?= srf06/cc26xx
BOARDS = srf06/cc26xx srf06/cc13xx launchpad/cc2650 launchpad/cc1310 launchpad/cc1350 sensortag/cc2650 sensortag/cc1350
BOARDS = srf06/cc26xx srf06/cc13xx launchpad/cc2640r2 launchpad/cc2650 launchpad/cc1310 launchpad/cc1350 sensortag/cc2650 sensortag/cc1350
CONTIKI_TARGET_DIRS += .

8
arch/platform/srf06-cc26xx/launchpad/cc2640r2/Makefile.cc2640r2 Normal file
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@ -0,0 +1,8 @@
### Will allow the inclusion of the correct CPU makefile
CPU_FAMILY = cc26x0r2f
### Add to the source dirs
CONTIKI_TARGET_DIRS += launchpad/cc2640r2
### Include the common launchpad makefile
include $(PLATFORM_ROOT_DIR)/launchpad/Makefile.launchpad

219
arch/platform/srf06-cc26xx/launchpad/cc2640r2/board.h Normal file
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@ -0,0 +1,219 @@
/*
* Copyright (c) 2015, Texas Instruments Incorporated - http://www.ti.com/
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*---------------------------------------------------------------------------*/
/** \addtogroup launchpad-peripherals
* @{
*
* \defgroup launchpad-cc26xx-specific CC2650 LaunchPad Peripherals
*
* Defines related to the CC2650 LaunchPad
*
* This file provides connectivity information on LEDs, Buttons, UART and
* other peripherals
*
* This file is not meant to be modified by the user.
* @{
*
* \file
* Header file with definitions related to the I/O connections on the TI
* CC2650 LaunchPad
*
* \note Do not include this file directly. It gets included by contiki-conf
* after all relevant directives have been set.
*/
/*---------------------------------------------------------------------------*/
#ifndef BOARD_H_
#define BOARD_H_
/*---------------------------------------------------------------------------*/
#include "ioc.h"
/*---------------------------------------------------------------------------*/
/**
* \name LED HAL configuration
*
* Those values are not meant to be modified by the user
* @{
*/
#define LEDS_CONF_COUNT 2
#define LEDS_CONF_RED 1
#define LEDS_CONF_GREEN 2
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name LED IOID mappings
*
* Those values are not meant to be modified by the user
* @{
*/
#define BOARD_IOID_LED_1 IOID_6
#define BOARD_IOID_LED_2 IOID_7
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name UART IOID mapping
*
* Those values are not meant to be modified by the user
* @{
*/
#define BOARD_IOID_UART_RX IOID_2
#define BOARD_IOID_UART_TX IOID_3
#define BOARD_IOID_UART_RTS IOID_18
#define BOARD_IOID_UART_CTS IOID_19
#define BOARD_UART_RX (1 << BOARD_IOID_UART_RX)
#define BOARD_UART_TX (1 << BOARD_IOID_UART_TX)
#define BOARD_UART_RTS (1 << BOARD_IOID_UART_RTS)
#define BOARD_UART_CTS (1 << BOARD_IOID_UART_CTS)
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name Button IOID mapping
*
* Those values are not meant to be modified by the user
* @{
*/
#define BOARD_IOID_KEY_LEFT IOID_13
#define BOARD_IOID_KEY_RIGHT IOID_14
#define BOARD_KEY_LEFT (1 << BOARD_IOID_KEY_LEFT)
#define BOARD_KEY_RIGHT (1 << BOARD_IOID_KEY_RIGHT)
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name External flash IOID mapping
*
* Those values are not meant to be modified by the user
* @{
*/
#define EXT_FLASH_SPI_CONTROLLER SPI_CONTROLLER_SPI0
#define BOARD_IOID_FLASH_SCK IOID_10
#define BOARD_IOID_FLASH_MOSI IOID_9
#define BOARD_IOID_FLASH_MISO IOID_8
#define BOARD_IOID_FLASH_CS IOID_20
#define EXT_FLASH_SPI_PIN_SCK 10
#define EXT_FLASH_SPI_PIN_MOSI 9
#define EXT_FLASH_SPI_PIN_MISO 8
#define EXT_FLASH_SPI_PIN_CS 20
#define EXT_FLASH_DEVICE_ID 0x14
#define EXT_FLASH_MID 0xC2
#define EXT_FLASH_PROGRAM_PAGE_SIZE 256
#define EXT_FLASH_ERASE_SECTOR_SIZE 4096
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \brief I2C IOID mappings
*
* Those values are not meant to be modified by the user
* @{
*/
#define BOARD_IOID_SCL IOID_4
#define BOARD_IOID_SDA IOID_5
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \brief ROM bootloader configuration
*
* Change SET_CCFG_BL_CONFIG_BL_PIN_NUMBER to BOARD_IOID_KEY_xyz to select
* which button triggers the bootloader on reset.
*
* The remaining values are not meant to be modified by the user
* @{
*/
#if ROM_BOOTLOADER_ENABLE
#define SET_CCFG_BL_CONFIG_BOOTLOADER_ENABLE 0xC5
#define SET_CCFG_BL_CONFIG_BL_LEVEL 0x00
#define SET_CCFG_BL_CONFIG_BL_PIN_NUMBER BOARD_IOID_KEY_LEFT
#define SET_CCFG_BL_CONFIG_BL_ENABLE 0xC5
#else
#define SET_CCFG_BL_CONFIG_BOOTLOADER_ENABLE 0x00
#define SET_CCFG_BL_CONFIG_BL_LEVEL 0x01
#define SET_CCFG_BL_CONFIG_BL_PIN_NUMBER 0xFF
#define SET_CCFG_BL_CONFIG_BL_ENABLE 0xFF
#endif
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \brief Remaining pins
*
* Those values are not meant to be modified by the user
* @{
*/
#define BOARD_IOID_DIO0 IOID_0
#define BOARD_IOID_DIO1 IOID_1
#define BOARD_IOID_CS IOID_11
#define BOARD_IOID_TDO IOID_16
#define BOARD_IOID_TDI IOID_17
#define BOARD_IOID_DIO12 IOID_12
#define BOARD_IOID_DIO15 IOID_15
#define BOARD_IOID_DIO21 IOID_21
#define BOARD_IOID_DIO22 IOID_22
#define BOARD_IOID_DIO23 IOID_23
#define BOARD_IOID_DIO24 IOID_24
#define BOARD_IOID_DIO25 IOID_25
#define BOARD_IOID_DIO26 IOID_26
#define BOARD_IOID_DIO27 IOID_27
#define BOARD_IOID_DIO28 IOID_28
#define BOARD_IOID_DIO29 IOID_29
#define BOARD_IOID_DIO30 IOID_30
#define BOARD_UNUSED_PINS { \
BOARD_IOID_DIO0, BOARD_IOID_DIO1, BOARD_IOID_CS, BOARD_IOID_TDO, \
BOARD_IOID_TDI, BOARD_IOID_DIO12, BOARD_IOID_DIO15, BOARD_IOID_DIO21, \
BOARD_IOID_DIO22, BOARD_IOID_DIO23, BOARD_IOID_DIO24, BOARD_IOID_DIO25, \
BOARD_IOID_DIO26, BOARD_IOID_DIO27, BOARD_IOID_DIO28, BOARD_IOID_DIO29, \
BOARD_IOID_DIO30, IOID_UNUSED \
}
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \brief Board indices for the button HAL
*
* Those values are not meant to be modified by the user
* @{
*/
#define BOARD_BUTTON_HAL_INDEX_KEY_LEFT 0x00
#define BOARD_BUTTON_HAL_INDEX_KEY_RIGHT 0x01
/** @} */
/*---------------------------------------------------------------------------*/
/**
* \name Device string used on startup
* @{
*/
#define BOARD_STRING "LAUNCHXL-CC2640R2"
/** @} */
/*---------------------------------------------------------------------------*/
#endif /* BOARD_H_ */
/*---------------------------------------------------------------------------*/
/**
* @}
* @}
*/

2
arch/platform/srf06-cc26xx/platform.c
View File

@ -158,8 +158,10 @@ platform_init_stage_one()
* latches in the first place. Before doing these things though, we should
* allow software to first regain control of pins
*/
#if !defined(ThisLibraryIsFor_CC26x0R2_HaltIfViolated)
ti_lib_pwr_ctrl_io_freeze_disable();
#endif
ti_lib_rom_int_enable(INT_AON_GPIO_EDGE);
ti_lib_int_master_enable();

2
tests/02-compile-arm-ports-01/Makefile
View File

@ -24,6 +24,7 @@ dev/gpio-hal/srf06-cc26xx:BOARD=sensortag/cc2650 \
dev/gpio-hal/srf06-cc26xx:BOARD=launchpad/cc1310 \
dev/gpio-hal/srf06-cc26xx:BOARD=launchpad/cc1350 \
dev/gpio-hal/srf06-cc26xx:BOARD=launchpad/cc2650 \
dev/gpio-hal/srf06-cc26xx:BOARD=launchpad/cc2640r2 \
dev/leds/srf06-cc26xx:BOARD=srf06/cc13xx \
dev/leds/srf06-cc26xx:BOARD=srf06/cc26xx \
dev/leds/srf06-cc26xx:BOARD=sensortag/cc1350 \
@ -31,6 +32,7 @@ dev/leds/srf06-cc26xx:BOARD=sensortag/cc2650 \
dev/leds/srf06-cc26xx:BOARD=launchpad/cc1310 \
dev/leds/srf06-cc26xx:BOARD=launchpad/cc1350 \
dev/leds/srf06-cc26xx:BOARD=launchpad/cc2650 \
dev/leds/srf06-cc26xx:BOARD=launchpad/cc2640r2 \
6tisch/etsi-plugtest-2017/srf06-cc26xx:BOARD=launchpad/cc2650 \
mqtt-client/srf06-cc26xx:BOARD=srf06/cc26xx \
mqtt-client/srf06-cc26xx:BOARD=launchpad/cc2650 \