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code style compliancy

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This commit is contained in:
nvt-se 2009-06-29 12:46:49 +00:00
parent 89ce58f576
commit 828439c922
8 changed files with 85 additions and 85 deletions
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BIN
platform/msb430/buildscripts/jtag/pyjtag/elf.pyc
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11
platform/msb430/dev/dma.c
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@ -84,8 +84,9 @@ interrupt(DACDMA_VECTOR) irq_dacdma(void)
int
dma_subscribe(int line, void (*callback)(void))
{
if (line >= DMA_LINES)
if(line >= DMA_LINES) {
return -1;
}
callbacks[line] = callback;
return 0;
@ -94,10 +95,10 @@ dma_subscribe(int line, void (*callback)(void))
void
dma_transfer(unsigned char *dst, unsigned char *src, unsigned len)
{
// Configure DMA Channel 0 for UART0 TXIFG.
/* Configure DMA Channel 0 for UART0 TXIFG. */
DMACTL0 = DMA0TSEL_4;
// No DMAONFETCH, ROUNDROBIN, ENNMI.
/* No DMAONFETCH, ROUNDROBIN, ENNMI. */
DMACTL1 = 0x0000;
/*
@ -116,6 +117,6 @@ dma_transfer(unsigned char *dst, unsigned char *src, unsigned len)
DMA0DA = (unsigned) dst;
DMA0SZ = len;
DMA0CTL |= DMAEN | DMAIE; // enable DMA and interrupts
U0CTL &= ~SWRST; // enable UART state machine, starts transfer
DMA0CTL |= DMAEN | DMAIE; /* enable DMA and interrupts */
U0CTL &= ~SWRST; /* enable the UART state machine */
}

13
platform/msb430/dev/infomem.c
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@ -76,17 +76,18 @@ infomem_write(unsigned int offset, unsigned char count, ...)
uint8_t *data;
int s;
if (offset > (2 * INFOMEM_BLOCK_SIZE))
if(offset > (2 * INFOMEM_BLOCK_SIZE)) {
return FALSE;
}
flash = (uint8_t *)INFOMEM_START + offset;
s = splhigh();
// backup into RAM
/* backup into RAM */
memcpy(backup, flash, INFOMEM_BLOCK_SIZE);
// merge backup with new data
/* merge backup with new data */
va_start(argp, count);
buffer = (uint8_t *)backup;
@ -99,15 +100,15 @@ infomem_write(unsigned int offset, unsigned char count, ...)
va_end(argp);
// init flash access
/* init flash access */
FCTL2 = FWKEY + FSSEL1 + FN2;
FCTL3 = FWKEY;
// erase flash
/* erase flash */
FCTL1 = FWKEY + ERASE;
*flash = 0;
// write flash
/* write flash */
FCTL1 = FWKEY + WRT;
buffer = (uint8_t *)backup;
for(i = 0; i < INFOMEM_BLOCK_SIZE; i++) {

84
platform/msb430/dev/msb430-uart1.c
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@ -69,73 +69,71 @@ volatile uint8_t uart_edge = 0;
static unsigned char uart_speed_br0[UART_NUM_MODES];
static unsigned char uart_speed_br1[UART_NUM_MODES];
static unsigned char uart_speed_bmn[UART_NUM_MODES];
static fp_uart_handler uart_handler[UART_NUM_MODES] = {NULL, NULL};
static uart_handler_t uart_handler[UART_NUM_MODES] = {NULL, NULL};
/*---------------------------------------------------------------------------*/
static void
uart_configure(unsigned mode)
{
_DINT(); // disable interrupts
_DINT(); /* disable interrupts */
UART_WAIT_TXDONE(); // wait till all buffered data has been transmitted
UART_WAIT_TXDONE(); /* wait till all buffered data has been transmitted */
// configure
if(mode == UART_MODE_RS232) {
P5OUT |= 0x01;
// unselect SPI
/* unselect SPI */
P3SEL |= 0xC0;
// select rs232
// to RS232 mode
UCTL1 = SWRST | CHAR; // 8-bit character
UTCTL1 |= SSEL1; // UCLK = MCLK
// activate
U1ME |= UTXE1 | URXE1; // Enable USART1 TXD/RXD
/* select rs232 */
UCTL1 = SWRST | CHAR; /* 8-bit character */
UTCTL1 |= SSEL1; /* UCLK = MCLK */
/* activate */
U1ME |= UTXE1 | URXE1; /* Enable USART1 TXD/RXD */
} else if(mode == UART_MODE_SPI) {
P3SEL &= ~0xC0; // unselect RS232
P3SEL &= ~0xC0; /* unselect RS232 */
// to SPI mode
UCTL1 = SWRST | CHAR | SYNC | MM; // 8-bit SPI Master
UCTL1 = SWRST | CHAR | SYNC | MM; /* 8-bit SPI Master */
/*
* SMCLK, 3-pin mode, clock idle low, data valid on
* rising edge, UCLK delayed
*/
UTCTL1 |= CKPH | SSEL1 | SSEL0 | STC; // activate
U1ME |= USPIE1; // Enable USART1 SPI
UTCTL1 |= CKPH | SSEL1 | SSEL0 | STC; /* activate */
U1ME |= USPIE1; /* Enable USART1 SPI */
}
// restore speed settings
UBR01 = uart_speed_br0[mode]; // set baudrate
/* restore speed settings */
UBR01 = uart_speed_br0[mode]; /* set baudrate */
UBR11 = uart_speed_br1[mode];
UMCTL1 = uart_speed_bmn[mode]; // set modulation
UMCTL1 = uart_speed_bmn[mode]; /* set modulation */
UCTL1 &= ~SWRST; // clear reset flag
_EINT(); // enable interrupts
UCTL1 &= ~SWRST; /* clear reset flag */
_EINT(); /* enable interrupts */
}
/*---------------------------------------------------------------------------*/
void
uart_set_speed(unsigned mode, unsigned ubr0,
unsigned ubr1, unsigned umctl)
{
// store setting
uart_speed_br0[mode] = ubr0; // baudrate
uart_speed_br1[mode] = ubr1; // baudrate
uart_speed_bmn[mode] = umctl; // modulation
/* store the setting */
uart_speed_br0[mode] = ubr0; /* baudrate */
uart_speed_br1[mode] = ubr1; /* baudrate */
uart_speed_bmn[mode] = umctl; /* modulation */
// reconfigure, if mode active
/* reconfigure, if mode active */
if(uart_mode == mode) {
uart_configure(mode);
}
}
/*---------------------------------------------------------------------------*/
void
uart_set_handler(unsigned mode, fp_uart_handler fpHandler)
uart_set_handler(unsigned mode, uart_handler_t handler)
{
// store setting
uart_handler[mode] = fpHandler;
/* store the setting */
uart_handler[mode] = handler;
if(mode == uart_mode) {
if (fpHandler == NULL) {
IE2 &= ~URXIE1; // Disable USART1 RX interrupt
if(handler == NULL) {
IE2 &= ~URXIE1; /* Disable USART1 RX interrupt */
} else {
IE2 |= URXIE1; // Enable USART1 RX interrupt
IE2 |= URXIE1; /* Enable USART1 RX interrupt */
}
}
}
@ -143,14 +141,14 @@ uart_set_handler(unsigned mode, fp_uart_handler fpHandler)
int
uart_lock(unsigned mode)
{
// already locked?
/* already locked? */
if(uart_mode != mode && uart_lockcnt > 0) {
return 0;
}
// increase lock count
/* increase lock count */
uart_lockcnt++;
// switch mode (if neccessary)
/* switch mode (if neccessary) */
uart_set_mode(mode);
return 1;
}
@ -173,10 +171,10 @@ uart_unlock(unsigned mode)
return 0;
}
// decrement lock
/* decrement lock */
if(uart_lockcnt > 0) {
uart_lockcnt--;
// if no more locks, switch back to default mode
/* if no more locks, switch back to default mode */
if(uart_lockcnt == 0) {
uart_set_mode(UART_MODE_DEFAULT);
}
@ -188,17 +186,17 @@ uart_unlock(unsigned mode)
void
uart_set_mode(unsigned mode)
{
// do nothing if mode already set
/* do nothing if the mode is already set */
if(mode == uart_mode) {
return;
}
IE2 &= ~(URXIE1 | UTXIE1); // disable irq
uart_configure(mode); // configure uart parameters
IE2 &= ~(URXIE1 | UTXIE1); /* disable irq */
uart_configure(mode); /* configure uart parameters */
uart_mode = mode;
if(uart_handler[mode] != NULL) {
IE2 |= URXIE1; // Enable USART1 RX interrupt
IE2 |= URXIE1; /* Enable USART1 RX interrupt */
}
}
/*---------------------------------------------------------------------------*/
@ -211,11 +209,11 @@ uart_get_mode(void)
interrupt(UART1RX_VECTOR)
uart_rx(void)
{
fp_uart_handler handler = uart_handler[uart_mode];
uart_handler_t handler = uart_handler[uart_mode];
int c;
if(!(IFG2 & URXIFG1)) {
// If start edge detected, toggle & return
/* If rising edge is detected, toggle & return */
uart_edge = 1;
U1TCTL &= ~URXSE;
U1TCTL |= URXSE;
@ -229,7 +227,7 @@ uart_rx(void)
_BIC_SR_IRQ(LPM3_bits);
}
} else {
// read out the char to clear the I-flags, etc.
/* read out the char to clear the interrupt flags. */
c = UART_RX;
}
}

10
platform/msb430/dev/msb430-uart1.h
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@ -56,8 +56,8 @@ Berlin, 2007
* \author Michael Baar <baar@inf.fu-berlin.de>
*/
#ifndef MSB430_UART_H
#define MSB430_UART_H
#ifndef MSB430_UART1_H
#define MSB430_UART1_H
#define UART_RX RXBUF1
#define UART_TX TXBUF1
@ -87,7 +87,7 @@ extern volatile unsigned char uart_lockcnt;
#define UART_WAIT_LOCK(x) ((uart_mode != x) && (uart_lockcnt))
#define UART_MODE_IS(x) (uart_mode == x)
typedef int(*fp_uart_handler)(unsigned char);
typedef int(*uart_handler_t)(unsigned char);
/**
* \brief Initialize the UART module
@ -98,14 +98,14 @@ typedef int(*fp_uart_handler)(unsigned char);
void uart_init(void);
void uart_set_speed(unsigned, unsigned, unsigned, unsigned);
void uart_set_handler(unsigned, fp_uart_handler);
void uart_set_handler(unsigned, uart_handler_t);
int uart_lock(unsigned);
int uart_lock_wait(unsigned);
int uart_unlock(unsigned);
void uart_set_mode(unsigned);
int uart_get_mode(void);
#endif /* !UART_H */
#endif /* !MSB430_UART1_H */
/** @} */
/** @} */

6
platform/msb430/dev/rs232.c
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@ -28,7 +28,7 @@
*
* This file is part of the Contiki operating system.
*
* @(#)$Id: rs232.c,v 1.8 2009/04/08 14:56:03 nvt-se Exp $
* @(#)$Id: rs232.c,v 1.9 2009/06/29 12:46:50 nvt-se Exp $
*/
/** \addtogroup esbrs232
@ -108,7 +108,7 @@ rs232_set_speed(enum rs232_speed speed)
void
rs232_print(char *cptr)
{
// lock UART for print operation
/* lock UART for the print operation */
if(uart_lock(UART_MODE_RS232)) {
while(*cptr != 0) {
rs232_send(*cptr);
@ -119,7 +119,7 @@ rs232_print(char *cptr)
}
/*---------------------------------------------------------------------------*/
void
rs232_set_input(fp_uart_handler f)
rs232_set_input(uart_handler_t f)
{
uart_set_handler(UART_MODE_RS232, f);
}

4
platform/msb430/dev/rs232.h
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@ -28,7 +28,7 @@
*
* This file is part of the Contiki operating system.
*
* @(#)$Id: rs232.h,v 1.5 2009/03/12 12:23:22 nvt-se Exp $
* @(#)$Id: rs232.h,v 1.6 2009/06/29 12:46:50 nvt-se Exp $
*/
/** \addtogroup esb
@ -84,7 +84,7 @@ void rs232_init(void);
* take place. If the input handler returns zero, the CPU
* is kept sleeping.
*/
void rs232_set_input(fp_uart_handler f);
void rs232_set_input(uart_handler_t f);
/**
* \brief Configure the speed of the RS232 hardware