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cc2538: gpio: Add pin read / write and interrupt clear macros

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Introduce new useful GPIO macros to:
 - read the levels of some port pins,
 - write the levels of some port pins (pass bit-field value to be set),
 - clear the interrupt flags for some port pins.

These macros are cleaner and less error prone than raw register access code
copied all over the place.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
This commit is contained in:
Benoît Thébaudeau 2013-11-15 19:48:24 +01:00
parent 300d2d79ae
commit 923f161b7b
1 changed files with 22 additions and 0 deletions
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22
cpu/cc2538/dev/gpio.h
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@ -114,6 +114,20 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
#define GPIO_CLR_PIN(PORT_BASE, PIN_MASK) \ #define GPIO_CLR_PIN(PORT_BASE, PIN_MASK) \
do { REG(((PORT_BASE) | GPIO_DATA) + ((PIN_MASK) << 2)) = 0x00; } while(0) do { REG(((PORT_BASE) | GPIO_DATA) + ((PIN_MASK) << 2)) = 0x00; } while(0)
/** \brief Set pins with PIN_MASK of port with PORT_BASE to value.
* \param PORT_BASE GPIO Port register offset
* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
*/
#define GPIO_WRITE_PIN(PORT_BASE, PIN_MASK, value) \
do { REG(((PORT_BASE) | GPIO_DATA) + ((PIN_MASK) << 2)) = (value); } while(0)
/** \brief Read pins with PIN_MASK of port with PORT_BASE.
* \param PORT_BASE GPIO Port register offset
* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
*/
#define GPIO_READ_PIN(PORT_BASE, PIN_MASK) \
REG(((PORT_BASE) | GPIO_DATA) + ((PIN_MASK) << 2))
/** \brief Set pins with PIN_MASK of port with PORT_BASE to detect edge. /** \brief Set pins with PIN_MASK of port with PORT_BASE to detect edge.
* \param PORT_BASE GPIO Port register offset * \param PORT_BASE GPIO Port register offset
* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80 * \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
@ -176,6 +190,14 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
#define GPIO_DISABLE_INTERRUPT(PORT_BASE, PIN_MASK) \ #define GPIO_DISABLE_INTERRUPT(PORT_BASE, PIN_MASK) \
do { REG((PORT_BASE) | GPIO_IE) &= ~(PIN_MASK); } while(0) do { REG((PORT_BASE) | GPIO_IE) &= ~(PIN_MASK); } while(0)
/** \brief Clear interrupt triggering for pins with PIN_MASK of port with
* PORT_BASE.
* \param PORT_BASE GPIO Port register offset
* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
*/
#define GPIO_CLEAR_INTERRUPT(PORT_BASE, PIN_MASK) \
do { REG((PORT_BASE) | GPIO_IC) = (PIN_MASK); } while(0)
/** \brief Configure the pin to be under peripheral control with PIN_MASK of /** \brief Configure the pin to be under peripheral control with PIN_MASK of
* port with PORT_BASE. * port with PORT_BASE.
* \param PORT_BASE GPIO Port register offset * \param PORT_BASE GPIO Port register offset