use MAC timer instead of SFD interrupt
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fb6e6d9ea3
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a4f575b8f0
@ -120,16 +120,15 @@ static const uint8_t magic[] = { 0x53, 0x6E, 0x69, 0x66 }; /** Snif */
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#define CC2538_RF_AUTOACK 1
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#define CC2538_RF_AUTOACK 1
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#endif
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#endif
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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#if CC2538_RF_CONF_SFD_TIMESTAMPS
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static rtimer_clock_t volatile cc2538_sfd_rtime;
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#endif
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/* Are we currently in poll mode? Disabled by default */
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/* Are we currently in poll mode? Disabled by default */
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static uint8_t volatile poll_mode = 0;
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static uint8_t volatile poll_mode = 0;
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/* Do we perform a CCA before sending? Enabled by default. */
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/* Do we perform a CCA before sending? Enabled by default. */
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static uint8_t send_on_cca = 1;
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static uint8_t send_on_cca = 1;
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static int8_t rssi;
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static int8_t rssi;
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static uint8_t crc_corr;
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static uint8_t crc_corr;
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void mac_timer_init(void);
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uint32_t get_sfd_timestamp(void);
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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static uint8_t rf_flags;
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static uint8_t rf_flags;
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static uint8_t rf_channel = CC2538_RF_CHANNEL;
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static uint8_t rf_channel = CC2538_RF_CHANNEL;
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@ -347,13 +346,14 @@ set_poll_mode(uint8_t enable)
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if(enable) {
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if(enable) {
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REG(RFCORE_XREG_RFIRQM0) &= ~RFCORE_XREG_RFIRQM0_FIFOP; // mask out FIFOP interrupt source
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REG(RFCORE_XREG_RFIRQM0) &= ~RFCORE_XREG_RFIRQM0_FIFOP; // mask out FIFOP interrupt source
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REG(RFCORE_SFR_RFIRQF0) &= ~RFCORE_SFR_RFIRQF0_FIFOP; // clear pending FIFOP interrupt
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REG(RFCORE_SFR_RFIRQF0) &= ~RFCORE_SFR_RFIRQF0_FIFOP; // clear pending FIFOP interrupt
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REG(RFCORE_XREG_RFIRQM0) |= RFCORE_XREG_RFIRQM0_SFD; // enable SFD interrupt source
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REG(RFCORE_XREG_RFIRQM0) &= ~RFCORE_XREG_RFIRQM0_SFD; // disable SFD interrupt source
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nvic_interrupt_disable(NVIC_INT_RF_RXTX);
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} else {
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} else {
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REG(RFCORE_XREG_RFIRQM0) |= RFCORE_XREG_RFIRQM0_FIFOP; // enable FIFOP interrupt source
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REG(RFCORE_XREG_RFIRQM0) |= RFCORE_XREG_RFIRQM0_FIFOP; // enable FIFOP interrupt source
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REG(RFCORE_XREG_RFIRQM0) &= ~RFCORE_XREG_RFIRQM0_SFD; // mask out SFD interrupt source
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REG(RFCORE_XREG_RFIRQM0) &= ~RFCORE_XREG_RFIRQM0_SFD; // mask out SFD interrupt source
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REG(RFCORE_SFR_RFIRQF0) &= ~RFCORE_SFR_RFIRQF0_SFD; // clear pending SFD interrupt
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REG(RFCORE_SFR_RFIRQF0) &= ~RFCORE_SFR_RFIRQF0_SFD; // clear pending SFD interrupt
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}
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nvic_interrupt_enable(NVIC_INT_RF_RXTX); // enable RF interrupts
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nvic_interrupt_enable(NVIC_INT_RF_RXTX); // enable RF interrupts
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}
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}
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}
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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static void
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static void
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@ -521,6 +521,8 @@ init(void)
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udma_set_channel_src(CC2538_RF_CONF_RX_DMA_CHAN, RFCORE_SFR_RFDATA);
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udma_set_channel_src(CC2538_RF_CONF_RX_DMA_CHAN, RFCORE_SFR_RFDATA);
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}
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}
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mac_timer_init();
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set_poll_mode(poll_mode);
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set_poll_mode(poll_mode);
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process_start(&cc2538_rf_process, NULL);
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process_start(&cc2538_rf_process, NULL);
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@ -956,15 +958,11 @@ get_object(radio_param_t param, void *dest, size_t size)
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}
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}
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if(param == RADIO_PARAM_LAST_PACKET_TIMESTAMP) {
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if(param == RADIO_PARAM_LAST_PACKET_TIMESTAMP) {
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#if CC2538_RF_CONF_SFD_TIMESTAMPS
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if(size != sizeof(rtimer_clock_t) || !dest) {
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if(size != sizeof(rtimer_clock_t) || !dest) {
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return RADIO_RESULT_INVALID_VALUE;
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return RADIO_RESULT_INVALID_VALUE;
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}
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}
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*(rtimer_clock_t*)dest = cc2538_sfd_rtime;
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*(rtimer_clock_t*)dest = cc2538_sfd_rtime;
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return RADIO_RESULT_OK;
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return RADIO_RESULT_OK;
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#else
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return RADIO_RESULT_NOT_SUPPORTED;
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#endif
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}
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}
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return RADIO_RESULT_NOT_SUPPORTED;
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return RADIO_RESULT_NOT_SUPPORTED;
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@ -1071,14 +1069,6 @@ cc2538_rf_rx_tx_isr(void)
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{
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{
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ENERGEST_ON(ENERGEST_TYPE_IRQ);
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ENERGEST_ON(ENERGEST_TYPE_IRQ);
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#if CC2538_RF_CONF_SFD_TIMESTAMPS
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if(poll_mode) {
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if(REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_RX_ACTIVE) {
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cc2538_sfd_rtime = RTIMER_NOW();
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}
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}
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#endif
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if(!poll_mode) {
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if(!poll_mode) {
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process_poll(&cc2538_rf_process);
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process_poll(&cc2538_rf_process);
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}
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}
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@ -1130,4 +1120,39 @@ cc2538_rf_set_promiscous_mode(char p)
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set_frame_filtering(p);
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set_frame_filtering(p);
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}
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}
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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uint32_t get_sfd_timestamp(void)
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{
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uint32_t sfd, timer_val;
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REG(RFCORE_SFR_MTMSEL) = (REG(RFCORE_SFR_MTMSEL) & ~RFCORE_SFR_MTMSEL_MTMSEL) | 0x00000000;
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REG(RFCORE_SFR_MTCTRL) |= RFCORE_SFR_MTCTRL_LATCH_MODE;
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timer_val = REG(RFCORE_SFR_MTM0) & RFCORE_SFR_MTM0_MTM0;
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timer_val |= ((REG(RFCORE_SFR_MTM1) & RFCORE_SFR_MTM1_MTM1) << 8);
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REG(RFCORE_SFR_MTMSEL) = (REG(RFCORE_SFR_MTMSEL) & ~RFCORE_SFR_MTMSEL_MTMOVFSEL) | 0x00000000;
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timer_val |= ((REG(RFCORE_SFR_MTMOVF0) & RFCORE_SFR_MTMOVF0_MTMOVF0) << 16);
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timer_val |= ((REG(RFCORE_SFR_MTMOVF1) & RFCORE_SFR_MTMOVF1_MTMOVF1) << 24);
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REG(RFCORE_SFR_MTMSEL) = (REG(RFCORE_SFR_MTMSEL) & ~RFCORE_SFR_MTMSEL_MTMSEL) | 0x00000001;
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REG(RFCORE_SFR_MTCTRL) |= RFCORE_SFR_MTCTRL_LATCH_MODE;
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sfd = REG(RFCORE_SFR_MTM0) & RFCORE_SFR_MTM0_MTM0;
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sfd |= ((REG(RFCORE_SFR_MTM1) & RFCORE_SFR_MTM1_MTM1) << 8);
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REG(RFCORE_SFR_MTMSEL) = (REG(RFCORE_SFR_MTMSEL) & ~RFCORE_SFR_MTMSEL_MTMOVFSEL) | 0x00000010;
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sfd |= ((REG(RFCORE_SFR_MTMOVF0) & RFCORE_SFR_MTMOVF0_MTMOVF0) << 16);
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sfd |= ((REG(RFCORE_SFR_MTMOVF1) & RFCORE_SFR_MTMOVF1_MTMOVF1) << 24);
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return (RTIMER_NOW() - RADIO_TO_RTIMER(timer_val - sfd));
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}
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/*---------------------------------------------------------------------------*/
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void mac_timer_init(void)
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{
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CLOCK_STABLE();
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REG(RFCORE_SFR_MTCTRL) |= RFCORE_SFR_MTCTRL_SYNC;
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REG(RFCORE_SFR_MTCTRL) |= RFCORE_SFR_MTCTRL_RUN;
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while(!(REG(RFCORE_SFR_MTCTRL) & RFCORE_SFR_MTCTRL_STATE));
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REG(RFCORE_SFR_MTCTRL) &= ~RFCORE_SFR_MTCTRL_RUN;
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while(REG(RFCORE_SFR_MTCTRL) & RFCORE_SFR_MTCTRL_STATE);
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REG(RFCORE_SFR_MTCTRL) |= (RFCORE_SFR_MTCTRL_RUN | RFCORE_SFR_MTCTRL_SYNC);
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while(!(REG(RFCORE_SFR_MTCTRL) & RFCORE_SFR_MTCTRL_STATE));
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}
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/*---------------------------------------------------------------------------*/
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/** @} */
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/** @} */
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