fixup the uart tx isr.
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parent
1460eac9cd
commit
e278ec0242
27
lib/uart1.c
27
lib/uart1.c
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@ -36,7 +36,7 @@
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#include <mc1322x.h>
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#include <mc1322x.h>
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#include <types.h>
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#include <types.h>
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volatile char u1_tx_buf[1024];
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volatile char u1_tx_buf[64];
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volatile uint32_t u1_head, u1_tail;
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volatile uint32_t u1_head, u1_tail;
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void uart1_isr(void) {
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void uart1_isr(void) {
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@ -50,20 +50,25 @@ void uart1_isr(void) {
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if (u1_tail >= sizeof(u1_tx_buf))
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if (u1_tail >= sizeof(u1_tx_buf))
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u1_tail = 0;
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u1_tail = 0;
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}
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}
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enable_irq(UART1);
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}
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}
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void uart1_putc(char c) {
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void uart1_putc(char c) {
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uint32_t h = u1_head;
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/* disable UART1 since */
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h = u1_head + 1;
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/* UART1 isr modifies u1_head and u1_tail */
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if (h >= sizeof(u1_tx_buf))
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disable_irq(UART1);
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h = 0;
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if (h == u1_tail) /* drop chars when no room */
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return;
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u1_tx_buf[u1_head] = c;
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u1_head = h;
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uart1_isr();
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if( (u1_head == u1_tail) &&
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(*UART1_UTXCON != 0)) {
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*UART1_UDATA = c;
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} else {
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u1_tx_buf[u1_head] = c;
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u1_head += 1;
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if (u1_head >= sizeof(u1_tx_buf))
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u1_head = 0;
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if (u1_head == u1_tail) /* drop chars when no room */
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return;
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enable_irq(UART1);
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}
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}
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}
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uint8_t uart1_getc(void) {
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uint8_t uart1_getc(void) {
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@ -60,9 +60,13 @@ void uart1_init(uint16_t inc, uint16_t mod, uint8_t samp) {
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set_bit(*UART1_UCON,UCON_SAMP);
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set_bit(*UART1_UCON,UCON_SAMP);
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*GPIO_FUNC_SEL0 = ( (0x01 << (14*2)) | (0x01 << (15*2)) ); /* set GPIO15-14 to UART (UART1 TX and RX)*/
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*GPIO_FUNC_SEL0 = ( (0x01 << (14*2)) | (0x01 << (15*2)) ); /* set GPIO15-14 to UART (UART1 TX and RX)*/
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/* interrupt when 28 bytes are free */
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/* interrupt when there are this number or more bytes free in the TX buffer*/
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*UART1_UTXCON = 28;
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*UART1_UTXCON = 16;
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u1_head = 0; u1_tail = 0;
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u1_head = 0; u1_tail = 0;
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/* tx and rx interrupts are enabled in the UART by default */
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/* see status register bits 13 and 14 */
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/* enable UART1 interrupts in the interrupt controller */
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enable_irq(UART1);
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enable_irq(UART1);
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}
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}
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