generic spi driver for cc26xx-cc13xx

launchpad and ext-flash implementation

arch/cpu/cc26xx-cc13xx/Makefile.cc26xx-cc13xx

@@ -36,6 +36,7 @@ CONTIKI_CPU_SOURCEFILES += gpio-interrupt.c gpio-hal-arch.c oscillators.c
 CONTIKI_CPU_SOURCEFILES += rf-core.c rf-ble.c ieee-mode.c
 CONTIKI_CPU_SOURCEFILES += ble-cc2650.c ble-hal-cc26xx.c ble-addr.c rf-ble-cmd.c
 CONTIKI_CPU_SOURCEFILES += random.c soc-trng.c int-master.c
+CONTIKI_CPU_SOURCEFILES += spi-hal-arch.c
 
 MODULES += os/lib/dbg-io
 

arch/cpu/cc26xx-cc13xx/dev/spi-hal-arch.c

@@ -0,0 +1,248 @@
+/*
+ * Copyright (c) 2017, University of Bristol - http://www.bristol.ac.uk/
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "ti-lib.h"
+#include "spi-hal.h"
+#include "spi-hal-arch.h"
+#include "sys/mutex.h"
+
+#include <stdint.h>
+#include <stdbool.h>
+
+typedef struct spi_locks_s {
+  mutex_t lock;
+  spi_device_t *owner;
+} spi_locks_t;
+
+/* One lock per SPI controller */
+spi_locks_t board_spi_locks_spi[BOARD_SPI_CONTROLLERS] = { { MUTEX_STATUS_UNLOCKED, NULL } };
+
+/* Arch-specific properties of each SPI controller */
+static const board_spi_controller_t spi_controller[BOARD_SPI_CONTROLLERS] = {
+  {
+    .ssi_base = SSI0_BASE,
+    .power_domain = PRCM_DOMAIN_SERIAL,
+    .prcm_periph = PRCM_PERIPH_SSI0,
+    .ssi_clkgr_clk_en = PRCM_SSICLKGR_CLK_EN_SSI0
+  },
+  {
+    .ssi_base = SSI1_BASE,
+    .power_domain = PRCM_DOMAIN_PERIPH,
+    .prcm_periph = PRCM_PERIPH_SSI1,
+    .ssi_clkgr_clk_en = PRCM_SSICLKGR_CLK_EN_SSI1
+  }
+};
+/*---------------------------------------------------------------------------*/
+spi_status_t
+spi_arch_lock(spi_device_t *dev)
+{
+  if(mutex_try_lock(&board_spi_locks_spi[dev->spi_controller].lock) == false) {
+    return SPI_DEV_STATUS_BUS_LOCKED;
+  }
+
+  board_spi_locks_spi[dev->spi_controller].owner = dev;
+
+  return SPI_DEV_STATUS_OK;
+}
+/*---------------------------------------------------------------------------*/
+bool
+spi_arch_has_lock(spi_device_t *dev)
+{
+  if(board_spi_locks_spi[dev->spi_controller].owner == dev) {
+    return true;
+  }
+
+  return false;
+}
+/*---------------------------------------------------------------------------*/
+bool
+spi_arch_is_bus_locked(spi_device_t *dev)
+{
+  if(board_spi_locks_spi[dev->spi_controller].lock == MUTEX_STATUS_LOCKED) {
+    return true;
+  }
+
+  return false;
+}
+/*---------------------------------------------------------------------------*/
+spi_status_t
+spi_arch_unlock(spi_device_t *dev)
+{
+  if(!spi_arch_has_lock(dev)) {
+    return SPI_DEV_STATUS_BUS_NOT_OWNED;
+  }
+
+  board_spi_locks_spi[dev->spi_controller].owner = NULL;
+  mutex_unlock(&board_spi_locks_spi[dev->spi_controller].lock);
+
+  return SPI_DEV_STATUS_OK;
+}
+/*---------------------------------------------------------------------------*/
+static uint32_t
+get_mode(spi_device_t *dev)
+{
+  /* Select the correct SPI mode */
+  if(dev->spi_pha == 0 && dev->spi_pol == 0) {
+    return SSI_FRF_MOTO_MODE_0;
+  } else if(dev->spi_pha != 0 && dev->spi_pol == 0) {
+    return SSI_FRF_MOTO_MODE_1;
+  } else if(dev->spi_pha == 0 && dev->spi_pol != 0) {
+    return SSI_FRF_MOTO_MODE_2;
+  } else {
+    return SSI_FRF_MOTO_MODE_3;
+  }
+}
+/*---------------------------------------------------------------------------*/
+spi_status_t
+spi_arch_open(spi_device_t *dev)
+{
+  uint32_t c;
+
+  if(!spi_arch_has_lock(dev)) {
+    return SPI_DEV_STATUS_BUS_NOT_OWNED;
+  }
+
+  /* CS pin configuration */
+  ti_lib_ioc_pin_type_gpio_output(dev->pin_spi_cs);
+
+  /* First, make sure the SERIAL PD is on */
+  ti_lib_prcm_power_domain_on(spi_controller[dev->spi_controller].power_domain);
+  while((ti_lib_prcm_power_domain_status(spi_controller[dev->spi_controller].power_domain)
+         != PRCM_DOMAIN_POWER_ON)) ;
+
+  /* Enable clock in active mode */
+  ti_lib_rom_prcm_peripheral_run_enable(spi_controller[dev->spi_controller].prcm_periph);
+  ti_lib_prcm_load_set();
+  while(!ti_lib_prcm_load_get()) ;
+
+  /* SPI configuration */
+  ti_lib_ssi_int_disable(spi_controller[dev->spi_controller].ssi_base, SSI_RXOR | SSI_RXFF | SSI_RXTO | SSI_TXFF);
+  ti_lib_ssi_int_clear(spi_controller[dev->spi_controller].ssi_base, SSI_RXOR | SSI_RXTO);
+  ti_lib_rom_ssi_config_set_exp_clk(spi_controller[dev->spi_controller].ssi_base, ti_lib_sys_ctrl_clock_get(),
+                                    get_mode(dev), SSI_MODE_MASTER, dev->spi_bit_rate, 8);
+  ti_lib_rom_ioc_pin_type_ssi_master(spi_controller[dev->spi_controller].ssi_base, dev->pin_spi_miso,
+                                     dev->pin_spi_mosi, IOID_UNUSED, dev->pin_spi_sck);
+
+  ti_lib_ssi_enable(spi_controller[dev->spi_controller].ssi_base);
+
+  /* Get rid of residual data from SSI port */
+  while(ti_lib_ssi_data_get_non_blocking(spi_controller[dev->spi_controller].ssi_base, &c)) ;
+
+  return SPI_DEV_STATUS_OK;
+}
+/*---------------------------------------------------------------------------*/
+spi_status_t
+spi_arch_close(spi_device_t *dev)
+{
+  if(!spi_arch_has_lock(dev)) {
+    return SPI_DEV_STATUS_BUS_NOT_OWNED;
+  }
+
+  /* Power down SSI */
+  ti_lib_rom_prcm_peripheral_run_disable(spi_controller[dev->spi_controller].prcm_periph);
+  ti_lib_prcm_load_set();
+  while(!ti_lib_prcm_load_get()) ;
+
+  /* Restore pins to a low-consumption state */
+  ti_lib_ioc_pin_type_gpio_input(dev->pin_spi_miso);
+  ti_lib_ioc_io_port_pull_set(dev->pin_spi_miso, IOC_IOPULL_DOWN);
+
+  ti_lib_ioc_pin_type_gpio_input(dev->pin_spi_mosi);
+  ti_lib_ioc_io_port_pull_set(dev->pin_spi_mosi, IOC_IOPULL_DOWN);
+
+  ti_lib_ioc_pin_type_gpio_input(dev->pin_spi_sck);
+  ti_lib_ioc_io_port_pull_set(dev->pin_spi_sck, IOC_IOPULL_DOWN);
+
+  return SPI_DEV_STATUS_OK;
+}
+/*---------------------------------------------------------------------------*/
+spi_status_t
+spi_arch_transfer(spi_device_t *dev,
+                  const uint8_t *write_buf, int wlen,
+                  uint8_t *inbuf, int rlen, int ignore_len)
+{
+  int i;
+  int totlen;
+  uint32_t c;
+
+  if(!spi_arch_has_lock(dev)) {
+    return SPI_DEV_STATUS_BUS_NOT_OWNED;
+  }
+
+  if(ti_lib_prcm_power_domain_status(spi_controller[dev->spi_controller].power_domain)
+     != PRCM_DOMAIN_POWER_ON) {
+    return SPI_DEV_STATUS_CLOSED;
+  }
+
+  /* Then check the 'run mode' clock gate */
+  if(!(HWREG(PRCM_BASE + PRCM_O_SSICLKGR) & spi_controller[dev->spi_controller].ssi_clkgr_clk_en)) {
+    return SPI_DEV_STATUS_CLOSED;
+  }
+
+  totlen = MAX(rlen + ignore_len, wlen);
+
+  if(totlen == 0) {
+    /* Nothing to do */
+    return SPI_DEV_STATUS_OK;
+  }
+
+  for(i = 0; i < totlen; i++) {
+    c = i < wlen ? write_buf[i] : 0;
+    ti_lib_ssi_data_put(spi_controller[dev->spi_controller].ssi_base, (uint8_t)c);
+    ti_lib_rom_ssi_data_get(spi_controller[dev->spi_controller].ssi_base, &c);
+    if(i < rlen) {
+      inbuf[i] = (uint8_t)c;
+    }
+  }
+
+  while(ti_lib_rom_ssi_data_get_non_blocking(spi_controller[dev->spi_controller].ssi_base, &c)) ;
+
+  return SPI_DEV_STATUS_OK;
+}
+/*---------------------------------------------------------------------------*/
+spi_status_t
+spi_arch_select(spi_device_t *dev)
+{
+
+  if(!spi_arch_has_lock(dev)) {
+    return SPI_DEV_STATUS_BUS_NOT_OWNED;
+  }
+
+  ti_lib_gpio_clear_dio(dev->pin_spi_cs);
+
+  return SPI_DEV_STATUS_OK;
+}
+spi_status_t
+spi_arch_deselect(spi_device_t *dev)
+{
+  ti_lib_gpio_set_dio(dev->pin_spi_cs);
+
+  return SPI_DEV_STATUS_OK;
+}

arch/cpu/cc26xx-cc13xx/dev/spi-hal-arch.h

@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2017, University of Bristol - http://www.bristol.ac.uk/
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef SPI_ARCH_H_
+#define SPI_ARCH_H_
+
+#include "ti-lib.h"
+
+#include <stdint.h>
+
+/*---------------------------------------------------------------------------*/
+#define BOARD_SPI_CONTROLLERS               2
+/*---------------------------------------------------------------------------*/
+#define BOARD_SPI_CONTROLLER_SPI0           0
+#define BOARD_SPI_CONTROLLER_SPI1           1
+/*---------------------------------------------------------------------------*/
+typedef struct board_spi_controller_s {
+  uint32_t ssi_base;
+  uint32_t power_domain;
+  uint32_t prcm_periph;
+  uint32_t ssi_clkgr_clk_en;
+} board_spi_controller_t;
+
+#endif /* SPI_ARCH_H_ */

arch/platform/srf06-cc26xx/common/board-spi.c

@@ -1,163 +0,0 @@
-/*
- * Copyright (c) 2014, Texas Instruments Incorporated - http://www.ti.com/
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the names of its
- *    contributors may be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
- * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
- * OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-/*---------------------------------------------------------------------------*/
-/**
- * \addtogroup sensortag-cc26xx-spi
- * @{
- *
- * \file
- * Board-specific SPI driver common to the Sensortag and LaunchPad
- */
-/*---------------------------------------------------------------------------*/
-#include "contiki.h"
-#include "ti-lib.h"
-#include "board-spi.h"
-#include "board.h"
-
-#include <stdbool.h>
-/*---------------------------------------------------------------------------*/
-static bool
-accessible(void)
-{
-  /* First, check the PD */
-  if(ti_lib_prcm_power_domain_status(PRCM_DOMAIN_SERIAL)
-     != PRCM_DOMAIN_POWER_ON) {
-    return false;
-  }
-
-  /* Then check the 'run mode' clock gate */
-  if(!(HWREG(PRCM_BASE + PRCM_O_SSICLKGR) & PRCM_SSICLKGR_CLK_EN_SSI0)) {
-    return false;
-  }
-
-  return true;
-}
-/*---------------------------------------------------------------------------*/
-bool
-board_spi_write(const uint8_t *buf, size_t len)
-{
-  if(accessible() == false) {
-    return false;
-  }
-
-  while(len > 0) {
-    uint32_t ul;
-
-    ti_lib_ssi_data_put(SSI0_BASE, *buf);
-    ti_lib_rom_ssi_data_get(SSI0_BASE, &ul);
-    len--;
-    buf++;
-  }
-
-  return true;
-}
-/*---------------------------------------------------------------------------*/
-bool
-board_spi_read(uint8_t *buf, size_t len)
-{
-  if(accessible() == false) {
-    return false;
-  }
-
-  while(len > 0) {
-    uint32_t ul;
-
-    if(!ti_lib_rom_ssi_data_put_non_blocking(SSI0_BASE, 0)) {
-      /* Error */
-      return false;
-    }
-    ti_lib_rom_ssi_data_get(SSI0_BASE, &ul);
-    *buf = (uint8_t)ul;
-    len--;
-    buf++;
-  }
-  return true;
-}
-/*---------------------------------------------------------------------------*/
-void
-board_spi_flush()
-{
-  if(accessible() == false) {
-    return;
-  }
-
-  uint32_t ul;
-  while(ti_lib_rom_ssi_data_get_non_blocking(SSI0_BASE, &ul));
-}
-/*---------------------------------------------------------------------------*/
-void
-board_spi_open(uint32_t bit_rate, uint32_t clk_pin)
-{
-  uint32_t buf;
-
-  /* First, make sure the SERIAL PD is on */
-  ti_lib_prcm_power_domain_on(PRCM_DOMAIN_SERIAL);
-  while((ti_lib_prcm_power_domain_status(PRCM_DOMAIN_SERIAL)
-         != PRCM_DOMAIN_POWER_ON));
-
-  /* Enable clock in active mode */
-  ti_lib_rom_prcm_peripheral_run_enable(PRCM_PERIPH_SSI0);
-  ti_lib_prcm_load_set();
-  while(!ti_lib_prcm_load_get());
-
-  /* SPI configuration */
-  ti_lib_ssi_int_disable(SSI0_BASE, SSI_RXOR | SSI_RXFF | SSI_RXTO | SSI_TXFF);
-  ti_lib_ssi_int_clear(SSI0_BASE, SSI_RXOR | SSI_RXTO);
-  ti_lib_rom_ssi_config_set_exp_clk(SSI0_BASE, ti_lib_sys_ctrl_clock_get(),
-                                    SSI_FRF_MOTO_MODE_0,
-                                    SSI_MODE_MASTER, bit_rate, 8);
-  ti_lib_rom_ioc_pin_type_ssi_master(SSI0_BASE, BOARD_IOID_SPI_MISO,
-                                     BOARD_IOID_SPI_MOSI, IOID_UNUSED, clk_pin);
-  ti_lib_ssi_enable(SSI0_BASE);
-
-  /* Get rid of residual data from SSI port */
-  while(ti_lib_ssi_data_get_non_blocking(SSI0_BASE, &buf));
-}
-/*---------------------------------------------------------------------------*/
-void
-board_spi_close()
-{
-  /* Power down SSI0 */
-  ti_lib_rom_prcm_peripheral_run_disable(PRCM_PERIPH_SSI0);
-  ti_lib_prcm_load_set();
-  while(!ti_lib_prcm_load_get());
-
-  /* Restore pins to a low-consumption state */
-  ti_lib_ioc_pin_type_gpio_input(BOARD_IOID_SPI_MISO);
-  ti_lib_ioc_io_port_pull_set(BOARD_IOID_SPI_MISO, IOC_IOPULL_DOWN);
-
-  ti_lib_ioc_pin_type_gpio_input(BOARD_IOID_SPI_MOSI);
-  ti_lib_ioc_io_port_pull_set(BOARD_IOID_SPI_MOSI, IOC_IOPULL_DOWN);
-
-  ti_lib_ioc_pin_type_gpio_input(BOARD_IOID_SPI_CLK_FLASH);
-  ti_lib_ioc_io_port_pull_set(BOARD_IOID_SPI_CLK_FLASH, IOC_IOPULL_DOWN);
-}
-/*---------------------------------------------------------------------------*/
-/** @} */

arch/platform/srf06-cc26xx/common/board-spi.h

@@ -1,114 +0,0 @@
-/*
- * Copyright (c) 2014, Texas Instruments Incorporated - http://www.ti.com/
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the names of its
- *    contributors may be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
- * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
- * OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-/*---------------------------------------------------------------------------*/
-/**
- * \addtogroup cc26xx-srf-tag
- * @{
- *
- * \defgroup common-cc26xx-peripherals CC13xx/CC26xx peripheral driver pool
- *
- * Drivers for peripherals present on more than one CC13xx/CC26xx board. For
- * example, the same external flash driver is used for both the part found on
- * the Sensortag as well as the part on the LaunchPad.
- *
- * @{
- *
- * \defgroup sensortag-cc26xx-spi SensorTag/LaunchPad SPI functions
- * @{
- *
- * \file
- * Header file for the Sensortag/LaunchPad SPI Driver
- */
-/*---------------------------------------------------------------------------*/
-#ifndef BOARD_SPI_H_
-#define BOARD_SPI_H_
-/*---------------------------------------------------------------------------*/
-#include <stdlib.h>
-#include <stdint.h>
-#include <stdbool.h>
-/*---------------------------------------------------------------------------*/
-/**
- * \brief Initialize the SPI interface
- * \param bit_rate The bit rate to use
- * \param clk_pin The IOID for the clock pin. This can be IOID_0 etc
- * \return none
- *
- * This function will make sure the peripheral is powered, clocked and
- * initialised. A chain of calls to board_spi_read(), board_spi_write() and
- * board_spi_flush() must be preceded by a call to this function. It is
- * recommended to call board_spi_close() after such chain of calls.
- */
-void board_spi_open(uint32_t bit_rate, uint32_t clk_pin);
-
-/**
- * \brief Close the SPI interface
- * \return True when successful.
- *
- * This function will stop clocks to the SSI module and will set MISO, MOSI
- * and CLK to a low leakage state. It is recommended to call this function
- * after a chain of calls to board_spi_read() and board_spi_write()
- */
-void board_spi_close(void);
-
-/**
- * \brief Clear data from the SPI interface
- * \return none
- */
-void board_spi_flush(void);
-
-/**
- * \brief Read from an SPI device
- * \param buf The buffer to store data
- * \param length The number of bytes to read
- * \return True when successful.
- *
- * Calls to this function must be preceded by a call to board_spi_open(). It is
- * recommended to call board_spi_close() at the end of an operation.
- */
-bool board_spi_read(uint8_t *buf, size_t length);
-
-/**
- * \brief Write to an SPI device
- * \param buf The buffer with the data to write
- * \param length The number of bytes to write
- * \return True when successful.
- *
- * Calls to this function must be preceded by a call to board_spi_open(). It is
- * recommended to call board_spi_close() at the end of an operation.
- */
-bool board_spi_write(const uint8_t *buf, size_t length);
-/*---------------------------------------------------------------------------*/
-#endif /* BOARD_SPI_H_ */
-/*---------------------------------------------------------------------------*/
-/**
- * @}
- * @}
- * @}
- */

arch/platform/srf06-cc26xx/contiki-conf.h

@@ -72,6 +72,9 @@
 /* Platform-specific define to signify sensor reading failure */
 #define CC26XX_SENSOR_READING_ERROR        0x80000000
 /*---------------------------------------------------------------------------*/
+/* SPI HAL: Path to arch-specific implementation  */
+#define SPI_HAL_CONF_ARCH_HDR_PATH         "dev/spi-hal-arch.h"
+/*---------------------------------------------------------------------------*/
 /* Include CPU-related configuration */
 #include "cc13xx-cc26xx-conf.h"
 /*---------------------------------------------------------------------------*/

arch/platform/srf06-cc26xx/launchpad/Makefile.launchpad

@@ -3,7 +3,6 @@ CFLAGS += -DBOARD_LAUNCHPAD=1
 CONTIKI_TARGET_DIRS += launchpad common
 
 BOARD_SOURCEFILES += board.c board-buttons.c xmem.c
-BOARD_SOURCEFILES += ext-flash.c board-spi.c
 
 ### Signal that we can be programmed with cc2538-bsl
 BOARD_SUPPORTS_BSL=1

arch/platform/srf06-cc26xx/launchpad/board.c

@@ -93,7 +93,7 @@ board_init()
   while(!ti_lib_prcm_load_get());
 
   /* Make sure the external flash is in the lower power mode */
-  ext_flash_init();
+  ext_flash_init(NULL);
 
   lpm_register_module(&launchpad_module);
 

arch/platform/srf06-cc26xx/launchpad/cc1310/board.h

@@ -103,25 +103,29 @@
 #define BOARD_KEY_RIGHT           (1 << BOARD_IOID_KEY_RIGHT)
 /** @} */
 /*---------------------------------------------------------------------------*/
-/**
- * \brief SPI IOID mappings
- *
- * Those values are not meant to be modified by the user
- * @{
- */
-#define BOARD_IOID_SPI_MOSI       IOID_9
-#define BOARD_IOID_SPI_MISO       IOID_8
-/** @} */
-/*---------------------------------------------------------------------------*/
 /**
  * \name External flash IOID mapping
  *
  * Those values are not meant to be modified by the user
  * @{
  */
-#define BOARD_IOID_FLASH_CS       IOID_20
+#define EXT_FLASH_SPI_CONTROLLER    BOARD_SPI_CONTROLLER_SPI0
-#define BOARD_FLASH_CS            (1 << BOARD_IOID_FLASH_CS)
+
-#define BOARD_IOID_SPI_CLK_FLASH  IOID_10
+#define BOARD_IOID_FLASH_SCK        IOID_10
+#define BOARD_IOID_FLASH_MOSI       IOID_9
+#define BOARD_IOID_FLASH_MISO       IOID_8
+#define BOARD_IOID_FLASH_CS         IOID_20
+
+#define EXT_FLASH_SPI_PIN_SCK       10
+#define EXT_FLASH_SPI_PIN_MOSI      9
+#define EXT_FLASH_SPI_PIN_MISO      8
+#define EXT_FLASH_SPI_PIN_CS        20
+
+#define EXT_FLASH_DEVICE_ID         0x14
+#define EXT_FLASH_MID               0xC2
+
+#define EXT_FLASH_PROGRAM_PAGE_SIZE 256
+#define EXT_FLASH_ERASE_SECTOR_SIZE 4096
 /** @} */
 /*---------------------------------------------------------------------------*/
 /**

arch/platform/srf06-cc26xx/launchpad/cc1350/board.h

@@ -103,26 +103,29 @@
 #define BOARD_KEY_RIGHT           (1 << BOARD_IOID_KEY_RIGHT)
 /** @} */
 /*---------------------------------------------------------------------------*/
-/**
- * \brief SPI IOID mappings
- *
- * Those values are not meant to be modified by the user
- * @{
- */
-#define BOARD_IOID_SPI_MOSI       IOID_9
-#define BOARD_IOID_SPI_MISO       IOID_8
-/** @} */
-/*---------------------------------------------------------------------------*/
 /**
  * \name External flash IOID mapping
  *
  * Those values are not meant to be modified by the user
  * @{
  */
-#define BOARD_IOID_FLASH_CS       IOID_20
+#define EXT_FLASH_SPI_CONTROLLER    BOARD_SPI_CONTROLLER_SPI0
-#define BOARD_FLASH_CS            (1 << BOARD_IOID_FLASH_CS)
+
-#define BOARD_IOID_SPI_CLK_FLASH  IOID_10
+#define BOARD_IOID_FLASH_SCK        IOID_10
-/** @} */
+#define BOARD_IOID_FLASH_MOSI       IOID_9
+#define BOARD_IOID_FLASH_MISO       IOID_8
+#define BOARD_IOID_FLASH_CS         IOID_20
+
+#define EXT_FLASH_SPI_PIN_SCK       10
+#define EXT_FLASH_SPI_PIN_MOSI      9
+#define EXT_FLASH_SPI_PIN_MISO      8
+#define EXT_FLASH_SPI_PIN_CS        20
+
+#define EXT_FLASH_DEVICE_ID         0x14
+#define EXT_FLASH_MID               0xC2
+
+#define EXT_FLASH_PROGRAM_PAGE_SIZE 256
+#define EXT_FLASH_ERASE_SECTOR_SIZE 4096
 /*---------------------------------------------------------------------------*/
 /**
  * \brief I2C IOID mappings

arch/platform/srf06-cc26xx/launchpad/cc2650/board.h

@@ -103,25 +103,29 @@
 #define BOARD_KEY_RIGHT           (1 << BOARD_IOID_KEY_RIGHT)
 /** @} */
 /*---------------------------------------------------------------------------*/
-/**
- * \brief SPI IOID mappings
- *
- * Those values are not meant to be modified by the user
- * @{
- */
-#define BOARD_IOID_SPI_MOSI       IOID_9
-#define BOARD_IOID_SPI_MISO       IOID_8
-/** @} */
-/*---------------------------------------------------------------------------*/
 /**
  * \name External flash IOID mapping
  *
  * Those values are not meant to be modified by the user
  * @{
  */
-#define BOARD_IOID_FLASH_CS       IOID_20
+#define EXT_FLASH_SPI_CONTROLLER    BOARD_SPI_CONTROLLER_SPI0
-#define BOARD_FLASH_CS            (1 << BOARD_IOID_FLASH_CS)
+
-#define BOARD_IOID_SPI_CLK_FLASH  IOID_10
+#define BOARD_IOID_FLASH_SCK        IOID_10
+#define BOARD_IOID_FLASH_MOSI       IOID_9
+#define BOARD_IOID_FLASH_MISO       IOID_8
+#define BOARD_IOID_FLASH_CS         IOID_20
+
+#define EXT_FLASH_SPI_PIN_SCK       10
+#define EXT_FLASH_SPI_PIN_MOSI      9
+#define EXT_FLASH_SPI_PIN_MISO      8
+#define EXT_FLASH_SPI_PIN_CS        20
+
+#define EXT_FLASH_DEVICE_ID         0x14
+#define EXT_FLASH_MID               0xC2
+
+#define EXT_FLASH_PROGRAM_PAGE_SIZE 256
+#define EXT_FLASH_ERASE_SECTOR_SIZE 4096
 /** @} */
 /*---------------------------------------------------------------------------*/
 /**

os/dev/ext-flash.c

@@ -38,12 +38,34 @@
 /*---------------------------------------------------------------------------*/
 #include "contiki.h"
 #include "ext-flash.h"
-#include "ti-lib.h"
+#include "spi-hal.h"
-#include "board-spi.h"
+#include "gpio-hal.h"
+#include "sys/log.h"
 
 #include <stdint.h>
 #include <stdbool.h>
 /*---------------------------------------------------------------------------*/
+#ifndef EXT_FLASH_SPI_CONTROLLER
+
+#define EXT_FLASH_SPI_CONTROLLER      0xFF /* No controller */
+
+#define EXT_FLASH_SPI_PIN_SCK         GPIO_HAL_PIN_UNKNOWN
+#define EXT_FLASH_SPI_PIN_MOSI        GPIO_HAL_PIN_UNKNOWN
+#define EXT_FLASH_SPI_PIN_MISO        GPIO_HAL_PIN_UNKNOWN
+#define EXT_FLASH_SPI_PIN_CS          GPIO_HAL_PIN_UNKNOWN
+
+#define EXT_FLASH_DEVICE_ID           0xFF
+#define EXT_FLASH_MID                 0xFF
+
+#define EXT_FLASH_PROGRAM_PAGE_SIZE   256
+#define EXT_FLASH_ERASE_SECTOR_SIZE   4096
+
+#endif /* EXT_FLASH_SPI_CONTROLLER */
+/*---------------------------------------------------------------------------*/
+/* Log configuration */
+#define LOG_MODULE "ext-flash"
+#define LOG_LEVEL LOG_LEVEL_NONE
+/*---------------------------------------------------------------------------*/
 /* Instruction codes */
 
 #define BLS_CODE_PROGRAM          0x02 /**< Page Program */
@@ -72,29 +94,33 @@
 
 #define BLS_STATUS_BIT_BUSY       0x01 /**< Busy bit of the status register */
 /*---------------------------------------------------------------------------*/
-/* Part specific constants */
+#define VERIFY_PART_LOCKED          -2
-#define BLS_DEVICE_ID_W25X20CL    0x11
-#define BLS_DEVICE_ID_W25X40CL    0x12
-#define BLS_DEVICE_ID_MX25R8035F  0x14
-#define BLS_DEVICE_ID_MX25R1635F  0x15
-
-#define BLS_WINBOND_MID           0xEF
-#define BLS_MACRONIX_MID          0xC2
-
-#define BLS_PROGRAM_PAGE_SIZE      256
-#define BLS_ERASE_SECTOR_SIZE     4096
-/*---------------------------------------------------------------------------*/
 #define VERIFY_PART_ERROR           -1
 #define VERIFY_PART_POWERED_DOWN     0
 #define VERIFY_PART_OK               1
 /*---------------------------------------------------------------------------*/
+static spi_device_t flash_spi_configuration_default = {
+  .spi_controller = EXT_FLASH_SPI_CONTROLLER,
+  .pin_spi_sck = EXT_FLASH_SPI_PIN_SCK,
+  .pin_spi_miso = EXT_FLASH_SPI_PIN_MISO,
+  .pin_spi_mosi = EXT_FLASH_SPI_PIN_MOSI,
+  .pin_spi_cs = EXT_FLASH_SPI_PIN_CS,
+  .spi_bit_rate = 4000000,
+  .spi_pha = 0,
+  .spi_pol = 0
+};
+
+static spi_device_t *flash_spi_configuration;
 /**
  * Clear external flash CSN line
  */
-static void
+static bool
 select_on_bus(void)
 {
-  ti_lib_gpio_clear_dio(BOARD_IOID_FLASH_CS);
+  if(spi_select(flash_spi_configuration) == SPI_DEV_STATUS_OK) {
+    return true;
+  }
+  return false;
 }
 /*---------------------------------------------------------------------------*/
 /**
@@ -103,7 +129,7 @@ select_on_bus(void)
 static void
 deselect(void)
 {
-  ti_lib_gpio_set_dio(BOARD_IOID_FLASH_CS);
+  spi_deselect(flash_spi_configuration);
 }
 /*---------------------------------------------------------------------------*/
 /**
@@ -116,14 +142,13 @@ wait_ready(void)
   bool ret;
   const uint8_t wbuf[1] = { BLS_CODE_READ_STATUS };
 
-  select_on_bus();
+  if(select_on_bus() == false) {
+    return false;
+  }
 
-  /* Throw away all garbages */
+  ret = spi_write(flash_spi_configuration, wbuf, sizeof(wbuf));
-  board_spi_flush();
 
-  ret = board_spi_write(wbuf, sizeof(wbuf));
+  if(ret != SPI_DEV_STATUS_OK) {
-
-  if(ret == false) {
     deselect();
     return false;
   }
@@ -135,13 +160,14 @@ wait_ready(void)
      * Thread could have yielded while waiting for flash
      * erase/program to complete.
      */
-    ret = board_spi_read(&buf, sizeof(buf));
+    ret = spi_read(flash_spi_configuration, &buf, sizeof(buf));
 
-    if(ret == false) {
+    if(ret != SPI_DEV_STATUS_OK) {
       /* Error */
       deselect();
       return false;
     }
+
     if(!(buf & BLS_STATUS_BIT_BUSY)) {
       /* Now ready */
       break;
@@ -165,26 +191,24 @@ verify_part(void)
   uint8_t rbuf[2] = { 0, 0 };
   bool ret;
 
-  select_on_bus();
+  if(select_on_bus() == false) {
+    return VERIFY_PART_LOCKED;
+  }
 
-  ret = board_spi_write(wbuf, sizeof(wbuf));
+  if(spi_write(flash_spi_configuration, wbuf, sizeof(wbuf)) != SPI_DEV_STATUS_OK) {
-
-  if(ret == false) {
     deselect();
     return VERIFY_PART_ERROR;
   }
 
-  ret = board_spi_read(rbuf, sizeof(rbuf));
+  ret = spi_read(flash_spi_configuration, rbuf, sizeof(rbuf));
   deselect();
-
+  if(ret != SPI_DEV_STATUS_OK) {
-  if(ret == false) {
     return VERIFY_PART_ERROR;
   }
 
-  if((rbuf[0] != BLS_WINBOND_MID && rbuf[0] != BLS_MACRONIX_MID) ||
+  LOG_DBG("Verify: %02x %02x\n", rbuf[0], rbuf[1]);
-     (rbuf[1] != BLS_DEVICE_ID_W25X20CL && rbuf[1] != BLS_DEVICE_ID_W25X40CL
+
-      && rbuf[1] != BLS_DEVICE_ID_MX25R8035F
+  if(rbuf[0] != EXT_FLASH_MID || rbuf[1] != EXT_FLASH_DEVICE_ID) {
-      && rbuf[1] != BLS_DEVICE_ID_MX25R1635F)) {
     return VERIFY_PART_POWERED_DOWN;
   }
   return VERIFY_PART_OK;
@@ -194,7 +218,7 @@ verify_part(void)
  * \brief Put the device in power save mode. No access to data; only
  *        the status register is accessible.
  */
-static void
+static bool
 power_down(void)
 {
   uint8_t cmd;
@@ -203,25 +227,32 @@ power_down(void)
   /* First, wait for the device to be ready */
   if(wait_ready() == false) {
     /* Entering here will leave the device in standby instead of powerdown */
-    return;
+    return false;
   }
 
   cmd = BLS_CODE_PD;
-  select_on_bus();
+  if(select_on_bus() == false) {
-  board_spi_write(&cmd, sizeof(cmd));
+    return false;
+  }
+
+  if(spi_write_byte(flash_spi_configuration, cmd) != SPI_DEV_STATUS_OK) {
+    deselect();
+    return false;
+  }
   deselect();
 
   i = 0;
   while(i < 10) {
     if(verify_part() == VERIFY_PART_POWERED_DOWN) {
       /* Device is powered down */
-      return;
+      return true;
     }
     i++;
   }
 
   /* Should not be required */
   deselect();
+  return false;
 }
 /*---------------------------------------------------------------------------*/
 /**
@@ -235,8 +266,11 @@ power_standby(void)
   bool success;
 
   cmd = BLS_CODE_RPD;
-  select_on_bus();
+  if(select_on_bus() == false) {
-  success = board_spi_write(&cmd, sizeof(cmd));
+    return false;
+  }
+
+  success = (spi_write(flash_spi_configuration, &cmd, sizeof(cmd)) == SPI_DEV_STATUS_OK);
 
   if(success) {
     success = wait_ready() == true ? true : false;
@@ -257,8 +291,11 @@ write_enable(void)
   bool ret;
   const uint8_t wbuf[] = { BLS_CODE_WRITE_ENABLE };
 
-  select_on_bus();
+  if(select_on_bus() == false) {
-  ret = board_spi_write(wbuf, sizeof(wbuf));
+    return false;
+  }
+
+  ret = (spi_write(flash_spi_configuration, wbuf, sizeof(wbuf)) == SPI_DEV_STATUS_OK);
   deselect();
 
   if(ret == false) {
@@ -270,11 +307,14 @@ write_enable(void)
 bool
 ext_flash_open()
 {
-  board_spi_open(4000000, BOARD_IOID_SPI_CLK_FLASH);
+  /* Check if platform has ext-flash */
-
+  if(flash_spi_configuration->pin_spi_sck == 255) {
-  /* GPIO pin configuration */
+    return false;
-  ti_lib_ioc_pin_type_gpio_output(BOARD_IOID_FLASH_CS);
+  }
 
+  if(spi_acquire(flash_spi_configuration) != SPI_DEV_STATUS_OK) {
+    return false;
+  }
   /* Default output to clear chip select */
   deselect();
 
@@ -284,23 +324,29 @@ ext_flash_open()
   return verify_part() == VERIFY_PART_OK ? true : false;
 }
 /*---------------------------------------------------------------------------*/
-void
+bool
 ext_flash_close()
 {
   /* Put the part in low power mode */
-  power_down();
+  if(power_down() == false) {
+    return false;
+  }
 
-  board_spi_close();
+  if(spi_release(flash_spi_configuration) != SPI_DEV_STATUS_OK) {
+    return false;
+  }
+
+  return true;
 }
 /*---------------------------------------------------------------------------*/
 bool
-ext_flash_read(size_t offset, size_t length, uint8_t *buf)
+ext_flash_read(uint32_t offset, uint32_t length, uint8_t *buf)
 {
   uint8_t wbuf[4];
+  bool ret;
 
   /* Wait till previous erase/program operation completes */
-  bool ret = wait_ready();
+  if(wait_ready() == false) {
-  if(ret == false) {
     return false;
   }
 
@@ -313,15 +359,17 @@ ext_flash_read(size_t offset, size_t length, uint8_t *buf)
   wbuf[2] = (offset >> 8) & 0xff;
   wbuf[3] = offset & 0xff;
 
-  select_on_bus();
+  if(select_on_bus() == false) {
+    return false;
+  }
 
-  if(board_spi_write(wbuf, sizeof(wbuf)) == false) {
+  if(spi_write(flash_spi_configuration, wbuf, sizeof(wbuf)) != SPI_DEV_STATUS_OK) {
     /* failure */
     deselect();
     return false;
   }
 
-  ret = board_spi_read(buf, length);
+  ret = (spi_read(flash_spi_configuration, buf, length) == SPI_DEV_STATUS_OK);
 
   deselect();
 
@@ -329,25 +377,22 @@ ext_flash_read(size_t offset, size_t length, uint8_t *buf)
 }
 /*---------------------------------------------------------------------------*/
 bool
-ext_flash_write(size_t offset, size_t length, const uint8_t *buf)
+ext_flash_write(uint32_t offset, uint32_t length, const uint8_t *buf)
 {
   uint8_t wbuf[4];
-  bool ret;
+  uint32_t ilen; /* interim length per instruction */
-  size_t ilen; /* interim length per instruction */
 
   while(length > 0) {
     /* Wait till previous erase/program operation completes */
-    ret = wait_ready();
+    if(wait_ready() == false) {
-    if(ret == false) {
       return false;
     }
 
-    ret = write_enable();
+    if(write_enable() == false) {
-    if(ret == false) {
       return false;
     }
 
-    ilen = BLS_PROGRAM_PAGE_SIZE - (offset % BLS_PROGRAM_PAGE_SIZE);
+    ilen = EXT_FLASH_PROGRAM_PAGE_SIZE - (offset % EXT_FLASH_PROGRAM_PAGE_SIZE);
     if(length < ilen) {
       ilen = length;
     }
@@ -365,15 +410,17 @@ ext_flash_write(size_t offset, size_t length, const uint8_t *buf)
      * is not imposed here since above instructions
      * should be enough to delay
      * as much. */
-    select_on_bus();
+    if(select_on_bus() == false) {
+      return false;
+    }
 
-    if(board_spi_write(wbuf, sizeof(wbuf)) == false) {
+    if(spi_write(flash_spi_configuration, wbuf, sizeof(wbuf)) != SPI_DEV_STATUS_OK) {
       /* failure */
       deselect();
       return false;
     }
 
-    if(board_spi_write(buf, ilen) == false) {
+    if(spi_write(flash_spi_configuration, buf, ilen) != SPI_DEV_STATUS_OK) {
       /* failure */
       deselect();
       return false;
@@ -386,7 +433,7 @@ ext_flash_write(size_t offset, size_t length, const uint8_t *buf)
 }
 /*---------------------------------------------------------------------------*/
 bool
-ext_flash_erase(size_t offset, size_t length)
+ext_flash_erase(uint32_t offset, uint32_t length)
 {
   /*
    * Note that Block erase might be more efficient when the floor map
@@ -394,24 +441,21 @@ ext_flash_erase(size_t offset, size_t length)
    * sector erase is used blindly.
    */
   uint8_t wbuf[4];
-  bool ret;
+  uint32_t i, numsectors;
-  size_t i, numsectors;
+  uint32_t endoffset = offset + length - 1;
-  size_t endoffset = offset + length - 1;
 
-  offset = (offset / BLS_ERASE_SECTOR_SIZE) * BLS_ERASE_SECTOR_SIZE;
+  offset = (offset / EXT_FLASH_ERASE_SECTOR_SIZE) * EXT_FLASH_ERASE_SECTOR_SIZE;
-  numsectors = (endoffset - offset + BLS_ERASE_SECTOR_SIZE - 1) / BLS_ERASE_SECTOR_SIZE;
+  numsectors = (endoffset - offset + EXT_FLASH_ERASE_SECTOR_SIZE - 1) / EXT_FLASH_ERASE_SECTOR_SIZE;
 
   wbuf[0] = BLS_CODE_SECTOR_ERASE;
 
   for(i = 0; i < numsectors; i++) {
     /* Wait till previous erase/program operation completes */
-    ret = wait_ready();
+    if(wait_ready() == false) {
-    if(ret == false) {
       return false;
     }
 
-    ret = write_enable();
+    if(write_enable() == false) {
-    if(ret == false) {
       return false;
     }
 
@@ -419,16 +463,18 @@ ext_flash_erase(size_t offset, size_t length)
     wbuf[2] = (offset >> 8) & 0xff;
     wbuf[3] = offset & 0xff;
 
-    select_on_bus();
+    if(select_on_bus() == false) {
+      return false;
+    }
 
-    if(board_spi_write(wbuf, sizeof(wbuf)) == false) {
+    if(spi_write(flash_spi_configuration, wbuf, sizeof(wbuf)) != SPI_DEV_STATUS_OK) {
       /* failure */
       deselect();
       return false;
     }
     deselect();
 
-    offset += BLS_ERASE_SECTOR_SIZE;
+    offset += EXT_FLASH_ERASE_SECTOR_SIZE;
   }
 
   return true;
@@ -437,19 +483,31 @@ ext_flash_erase(size_t offset, size_t length)
 bool
 ext_flash_test(void)
 {
-  bool ret;
+  flash_spi_configuration = &flash_spi_configuration_default;
 
-  ret = ext_flash_open();
+  if(ext_flash_open() == false) {
-  ext_flash_close();
+    return false;
+  }
 
-  return ret;
+  if(ext_flash_close() == false) {
+    return false;
+  }
+
+  LOG_INFO("Flash test successful\n");
+
+  return true;
 }
 /*---------------------------------------------------------------------------*/
-void
+bool
-ext_flash_init()
+ext_flash_init(spi_device_t *conf)
 {
-  ext_flash_open();
+  if(conf == NULL) {
-  ext_flash_close();
+    flash_spi_configuration = &flash_spi_configuration_default;
+  } else {
+    flash_spi_configuration = conf;
+  }
+
+  return ext_flash_test();
 }
 /*---------------------------------------------------------------------------*/
 /** @} */

os/dev/ext-flash.h

@@ -42,6 +42,8 @@
 #ifndef EXT_FLASH_H_
 #define EXT_FLASH_H_
 /*---------------------------------------------------------------------------*/
+#include "spi-hal.h"
+
 #include <stdint.h>
 #include <stdlib.h>
 #include <stdbool.h>
@@ -57,7 +59,7 @@ bool ext_flash_open(void);
  *
  * This call will put the device in its lower power mode (power down).
  */
-void ext_flash_close(void);
+bool ext_flash_close(void);
 
 /**
  * \brief Read storage content
@@ -68,7 +70,7 @@ void ext_flash_close(void);
  *
  * buf must be allocated by the caller
  */
-bool ext_flash_read(size_t offset, size_t length, uint8_t *buf);
+bool ext_flash_read(uint32_t offset, uint32_t length, uint8_t *buf);
 
 /**
  * \brief Erase storage sectors corresponding to the range.
@@ -79,7 +81,7 @@ bool ext_flash_read(size_t offset, size_t length, uint8_t *buf);
  * The erase operation will be sector-wise, therefore a call to this function
  * will generally start the erase procedure at an address lower than offset
  */
-bool ext_flash_erase(size_t offset, size_t length);
+bool ext_flash_erase(uint32_t offset, uint32_t length);
 
 /**
  * \brief Write to storage sectors.
@@ -89,7 +91,7 @@ bool ext_flash_erase(size_t offset, size_t length);
  *
  * \return True when successful.
  */
-bool ext_flash_write(size_t offset, size_t length, const uint8_t *buf);
+bool ext_flash_write(uint32_t offset, uint32_t length, const uint8_t *buf);
 
 /**
  * \brief Test the flash (power on self-test)
@@ -106,7 +108,7 @@ bool ext_flash_test(void);
  * In order to perform any operation, the caller must first wake the device
  * up by calling ext_flash_open()
  */
-void ext_flash_init(void);
+bool ext_flash_init(spi_device_t *conf);
 /*---------------------------------------------------------------------------*/
 #endif /* EXT_FLASH_H_ */
 /*---------------------------------------------------------------------------*/