Merge pull request #685 from g-oikonomou/contrib/cc26xx/remove-lib-rom
Improve usage of CCxxwares and CC2640R2 SDK
This commit is contained in:
commit
f101e473a9
@ -2,6 +2,6 @@ TI_XXWARE_PATH = lib/cc13xxware
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CONTIKI_CPU_SOURCEFILES += smartrf-settings.c prop-mode.c prop-mode-tx-power.c
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CFLAGS += -DCPU_FAMILY_CC13XX=1
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CFLAGS += -DCPU_FAMILY_CC13X0=1 -DCPU_FAMILY_CC13XX=1
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include $(CONTIKI_CPU)/Makefile.cc26xx-cc13xx
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@ -1,3 +1,5 @@
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TI_XXWARE_PATH = lib/cc2640r2-sdk
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CFLAGS += -DCPU_FAMILY_CC26X0R2=1 -DCPU_FAMILY_CC26XXR2=1
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include $(CONTIKI_CPU)/Makefile.cc26xx-cc13xx
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@ -1,3 +1,5 @@
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TI_XXWARE_PATH = lib/cc26xxware
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CFLAGS += -DCPU_FAMILY_CC26X0=1 -DCPU_FAMILY_CC26XX=1
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include $(CONTIKI_CPU)/Makefile.cc26xx-cc13xx
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@ -64,11 +64,11 @@
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* project has specified otherwise. Depending on the final mode, determine a
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* default channel (again, if unspecified) and configure RDC params
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*/
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#if CPU_FAMILY_CC13XX
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#if CPU_FAMILY_CC13X0
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#ifndef CC13XX_CONF_PROP_MODE
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#define CC13XX_CONF_PROP_MODE 1
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#endif /* CC13XX_CONF_PROP_MODE */
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#endif /* CPU_FAMILY_CC13XX */
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#endif /* CPU_FAMILY_CC13X0 */
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#if CC13XX_CONF_PROP_MODE
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#ifndef NETSTACK_CONF_RADIO
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@ -39,7 +39,6 @@
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/*---------------------------------------------------------------------------*/
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#include "contiki.h"
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#include "ti-lib.h"
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#include "ti-lib-rom.h"
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#include "dev/gpio-hal.h"
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#include <stdint.h>
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@ -53,11 +52,7 @@ gpio_hal_arch_pin_cfg_set(gpio_hal_pin_t pin, gpio_hal_pin_cfg_t cfg)
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gpio_hal_pin_cfg_t tmp;
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/* Clear settings that we are about to change, keep everything else */
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#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
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config = ti_lib_ioc_port_configure_get(pin);
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#else
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config = ti_lib_rom_ioc_port_configure_get(pin);
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#endif
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config &= ~CONFIG_MASK;
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tmp = cfg & GPIO_HAL_PIN_CFG_EDGE_BOTH;
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@ -87,7 +82,7 @@ gpio_hal_arch_pin_cfg_set(gpio_hal_pin_t pin, gpio_hal_pin_cfg_t cfg)
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config |= IOC_INT_ENABLE;
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}
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ti_lib_rom_ioc_port_configure_set(pin, IOC_PORT_GPIO, config);
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ti_lib_ioc_port_configure_set(pin, IOC_PORT_GPIO, config);
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}
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/*---------------------------------------------------------------------------*/
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gpio_hal_pin_cfg_t
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@ -98,11 +93,7 @@ gpio_hal_arch_pin_cfg_get(gpio_hal_pin_t pin)
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uint32_t config;
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cfg = 0;
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#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
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config = ti_lib_ioc_port_configure_get(pin);
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#else
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config = ti_lib_rom_ioc_port_configure_get(pin);
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#endif
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/* Pull */
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tmp = config & IOC_IOPULL_M;
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@ -49,7 +49,6 @@
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/*---------------------------------------------------------------------------*/
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#include "contiki.h"
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#include "ti-lib.h"
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#include "ti-lib-rom.h"
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#include <stdint.h>
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/*---------------------------------------------------------------------------*/
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@ -57,15 +56,10 @@
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#define gpio_hal_arch_interrupt_enable(p) interrupt_enable(p)
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#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
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#define gpio_hal_arch_interrupt_disable(p) ti_lib_ioc_int_disable(p)
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#define gpio_hal_arch_pin_set_input(p) ti_lib_ioc_pin_type_gpio_input(p)
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#define gpio_hal_arch_pin_set_output(p) ti_lib_ioc_pin_type_gpio_output(p)
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#else
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#define gpio_hal_arch_interrupt_disable(p) ti_lib_rom_ioc_int_disable(p)
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#define gpio_hal_arch_pin_set_input(p) ti_lib_rom_ioc_pin_type_gpio_input(p)
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#define gpio_hal_arch_pin_set_output(p) ti_lib_rom_ioc_pin_type_gpio_output(p)
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#endif
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#define gpio_hal_arch_set_pin(p) ti_lib_gpio_set_dio(p)
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#define gpio_hal_arch_clear_pin(p) ti_lib_gpio_clear_dio(p)
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#define gpio_hal_arch_toggle_pin(p) ti_lib_gpio_toggle_dio(p)
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@ -80,11 +74,7 @@ static inline void
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interrupt_enable(gpio_hal_pin_t pin)
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{
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ti_lib_gpio_clear_event_dio(pin);
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#ifndef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
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ti_lib_rom_ioc_int_enable(pin);
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#else
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ti_lib_ioc_int_enable(pin);
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#endif
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}
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/*---------------------------------------------------------------------------*/
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#endif /* GPIO_HAL_ARCH_H_ */
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@ -99,7 +99,7 @@ soc_rtc_init(void)
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ti_lib_aon_rtc_channel_enable(AON_RTC_CH1);
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ti_lib_aon_rtc_enable();
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ti_lib_rom_int_enable(INT_AON_RTC_COMB);
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ti_lib_int_enable(INT_AON_RTC_COMB);
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/* Re-enable interrupts */
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if(!interrupts_disabled) {
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@ -71,7 +71,7 @@ static void
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disable_number_ready_interrupt(void)
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{
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ti_lib_trng_int_disable(TRNG_NUMBER_READY);
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ti_lib_rom_int_disable(INT_TRNG_IRQ);
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ti_lib_int_disable(INT_TRNG_IRQ);
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}
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/*---------------------------------------------------------------------------*/
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static void
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@ -79,14 +79,14 @@ enable_number_ready_interrupt(void)
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{
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ti_lib_trng_int_clear(TRNG_NUMBER_READY);
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ti_lib_trng_int_enable(TRNG_NUMBER_READY);
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ti_lib_rom_int_enable(INT_TRNG_IRQ);
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ti_lib_int_enable(INT_TRNG_IRQ);
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}
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/*---------------------------------------------------------------------------*/
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static bool
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accessible(void)
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{
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/* First, check the PD */
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if(ti_lib_rom_prcm_power_domain_status(PRCM_DOMAIN_PERIPH)
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if(ti_lib_prcm_power_domain_status(PRCM_DOMAIN_PERIPH)
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!= PRCM_DOMAIN_POWER_ON) {
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return false;
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}
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@ -104,12 +104,12 @@ static void
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power_up(void)
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{
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/* First, make sure the PERIPH PD is on */
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ti_lib_rom_prcm_power_domain_on(PRCM_DOMAIN_PERIPH);
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while((ti_lib_rom_prcm_power_domain_status(PRCM_DOMAIN_PERIPH)
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ti_lib_prcm_power_domain_on(PRCM_DOMAIN_PERIPH);
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while((ti_lib_prcm_power_domain_status(PRCM_DOMAIN_PERIPH)
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!= PRCM_DOMAIN_POWER_ON));
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/* Enable clock in active mode */
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ti_lib_rom_prcm_peripheral_run_enable(PRCM_PERIPH_TRNG);
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ti_lib_prcm_peripheral_run_enable(PRCM_PERIPH_TRNG);
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ti_lib_prcm_load_set();
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while(!ti_lib_prcm_load_get());
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}
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@ -136,7 +136,7 @@ static uint64_t
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read_number(void)
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{
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uint64_t ran = (uint64_t)HWREG(TRNG_BASE + TRNG_O_OUT1) << 32;
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ran += ti_lib_rom_trng_number_get(TRNG_LOW_WORD);
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ran += ti_lib_trng_number_get(TRNG_LOW_WORD);
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return ran;
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}
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@ -237,7 +237,7 @@ soc_trng_rand_asynchronous(uint32_t samples, soc_trng_callback_t cb)
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ti_lib_trng_int_clear(TRNG_NUMBER_READY);
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/* Enable clock in sleep mode and register with LPM */
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ti_lib_rom_prcm_peripheral_sleep_enable(PRCM_PERIPH_TRNG);
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ti_lib_prcm_peripheral_sleep_enable(PRCM_PERIPH_TRNG);
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ti_lib_prcm_load_set();
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while(!ti_lib_prcm_load_get());
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@ -271,7 +271,7 @@ PROCESS_THREAD(soc_trng_process, ev, data)
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}
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/* Disable clock in sleep mode */
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ti_lib_rom_prcm_peripheral_sleep_disable(PRCM_PERIPH_TRNG);
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ti_lib_prcm_peripheral_sleep_disable(PRCM_PERIPH_TRNG);
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ti_lib_prcm_load_set();
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while(!ti_lib_prcm_load_get());
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@ -123,7 +123,7 @@ spi_arch_lock_and_open(const spi_device_t *dev)
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!= PRCM_DOMAIN_POWER_ON)) ;
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/* Enable clock in active mode */
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ti_lib_rom_prcm_peripheral_run_enable(spi_controller[dev->spi_controller].prcm_periph);
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ti_lib_prcm_peripheral_run_enable(spi_controller[dev->spi_controller].prcm_periph);
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ti_lib_prcm_load_set();
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while(!ti_lib_prcm_load_get()) ;
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@ -131,17 +131,14 @@ spi_arch_lock_and_open(const spi_device_t *dev)
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ti_lib_ssi_int_disable(spi_controller[dev->spi_controller].ssi_base, SSI_RXOR | SSI_RXFF | SSI_RXTO | SSI_TXFF);
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ti_lib_ssi_int_clear(spi_controller[dev->spi_controller].ssi_base, SSI_RXOR | SSI_RXTO);
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#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
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ti_lib_ssi_config_set_exp_clk(spi_controller[dev->spi_controller].ssi_base, ti_lib_sys_ctrl_clock_get(),
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get_mode(dev), SSI_MODE_MASTER, dev->spi_bit_rate, 8);
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ti_lib_ioc_pin_type_ssi_master(spi_controller[dev->spi_controller].ssi_base, dev->pin_spi_miso,
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dev->pin_spi_mosi, IOID_UNUSED, dev->pin_spi_sck);
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#else
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ti_lib_rom_ssi_config_set_exp_clk(spi_controller[dev->spi_controller].ssi_base, ti_lib_sys_ctrl_clock_get(),
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get_mode(dev), SSI_MODE_MASTER, dev->spi_bit_rate, 8);
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ti_lib_rom_ioc_pin_type_ssi_master(spi_controller[dev->spi_controller].ssi_base, dev->pin_spi_miso,
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dev->pin_spi_mosi, IOID_UNUSED, dev->pin_spi_sck);
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#endif
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ti_lib_ssi_config_set_exp_clk(spi_controller[dev->spi_controller].ssi_base,
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ti_lib_sys_ctrl_clock_get(),
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get_mode(dev), SSI_MODE_MASTER,
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dev->spi_bit_rate, 8);
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ti_lib_ioc_pin_type_ssi_master(spi_controller[dev->spi_controller].ssi_base,
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dev->pin_spi_miso,
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dev->pin_spi_mosi, IOID_UNUSED,
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dev->pin_spi_sck);
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ti_lib_ssi_enable(spi_controller[dev->spi_controller].ssi_base);
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@ -159,7 +156,7 @@ spi_arch_close_and_unlock(const spi_device_t *dev)
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}
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/* Power down SSI */
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ti_lib_rom_prcm_peripheral_run_disable(spi_controller[dev->spi_controller].prcm_periph);
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ti_lib_prcm_peripheral_run_disable(spi_controller[dev->spi_controller].prcm_periph);
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ti_lib_prcm_load_set();
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while(!ti_lib_prcm_load_get()) ;
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@ -213,20 +210,12 @@ spi_arch_transfer(const spi_device_t *dev,
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for(i = 0; i < totlen; i++) {
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c = i < wlen ? write_buf[i] : 0;
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ti_lib_ssi_data_put(spi_controller[dev->spi_controller].ssi_base, (uint8_t)c);
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#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
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ti_lib_ssi_data_get(spi_controller[dev->spi_controller].ssi_base, &c);
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#else
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ti_lib_rom_ssi_data_get(spi_controller[dev->spi_controller].ssi_base, &c);
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#endif
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if(i < rlen) {
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inbuf[i] = (uint8_t)c;
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}
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}
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#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
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while(ti_lib_ssi_data_get_non_blocking(spi_controller[dev->spi_controller].ssi_base, &c)) ;
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#else
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while(ti_lib_rom_ssi_data_get_non_blocking(spi_controller[dev->spi_controller].ssi_base, &c)) ;
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#endif
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return SPI_DEV_STATUS_OK;
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}
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/*---------------------------------------------------------------------------*/
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@ -162,10 +162,10 @@ lpm_shutdown(uint32_t wakeup_pin, uint32_t io_pull, uint32_t wake_on)
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ti_lib_aon_wuc_mcu_power_off_config(MCU_VIRT_PWOFF_DISABLE);
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/* Latch the IOs in the padring and enable I/O pad sleep mode */
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#if !defined(ThisLibraryIsFor_CC26x0R2_HaltIfViolated)
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ti_lib_pwr_ctrl_io_freeze_enable();
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ti_lib_aon_ioc_freeze_enable();
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HWREG(AON_SYSCTL_BASE + AON_SYSCTL_O_SLEEPCTL) = 0;
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ti_lib_sys_ctrl_aon_sync();
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#endif
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/* Turn off VIMS cache, CRAM and TRAM - possibly not required */
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ti_lib_prcm_cache_retention_disable();
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ti_lib_vims_mode_set(VIMS_BASE, VIMS_MODE_OFF);
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@ -193,12 +193,7 @@ wake_up(void)
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ti_lib_sys_ctrl_aon_sync();
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/* Adjust recharge settings */
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#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
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// May need to change to XOSC_IN_LOW_POWER_MODE
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ti_lib_sys_ctrl_adjust_recharge_after_power_down(XOSC_IN_HIGH_POWER_MODE);
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#else
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ti_lib_sys_ctrl_adjust_recharge_after_power_down();
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#endif
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/*
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* Release the request to the uLDO
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@ -399,8 +399,8 @@ rf_core_set_modesel()
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} else if(chip_type == CHIP_TYPE_CC1350) {
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HWREG(PRCM_BASE + PRCM_O_RFCMODESEL) = PRCM_RFCMODESEL_CURR_MODE5;
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rv = RF_CORE_CMD_OK;
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#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
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} else if (chip_type == CHIP_TYPE_CC2640R2) {
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#if CPU_FAMILY_CC26X0R2
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} else if(chip_type == CHIP_TYPE_CC2640R2) {
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HWREG(PRCM_BASE + PRCM_O_RFCMODESEL) = PRCM_RFCMODESEL_CURR_MODE1;
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rv = RF_CORE_CMD_OK;
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#endif
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@ -1,195 +0,0 @@
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/*
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* Copyright (c) 2016, Texas Instruments Incorporated - http://www.ti.com/
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
|
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
|
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* notice, this list of conditions and the following disclaimer.
|
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* 2. Redistributions in binary form must reproduce the above copyright
|
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* notice, this list of conditions and the following disclaimer in the
|
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* documentation and/or other materials provided with the distribution.
|
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* 3. Neither the name of the copyright holder nor the names of its
|
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* contributors may be used to endorse or promote products derived
|
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* from this software without specific prior written permission.
|
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*
|
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*---------------------------------------------------------------------------*/
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/**
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* \addtogroup cc26xx-ti-lib
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* @{
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*
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* \file
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* Header file with CC13xxware/CC26xxware ROM API.
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*/
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/*---------------------------------------------------------------------------*/
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#ifndef TI_LIB_ROM_H_
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#define TI_LIB_ROM_H_
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/*---------------------------------------------------------------------------*/
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/* rom.h */
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#include "driverlib/rom.h"
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/* AON API */
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#define ti_lib_rom_aon_event_mcu_wake_up_set ROM_AONEventMcuWakeUpSet
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#define ti_lib_rom_aon_event_mcu_wake_up_get ROM_AONEventMcuWakeUpGet
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#define ti_lib_rom_aon_event_aux_wake_up_set ROM_AONEventAuxWakeUpSet
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#define ti_lib_rom_aon_event_aux_wake_up_get ROM_AONEventAuxWakeUpGet
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#define ti_lib_rom_aon_event_mcu_set ROM_AONEventMcuSet
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#define ti_lib_rom_aon_event_mcu_get ROM_AONEventMcuGet
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/* AON_WUC API */
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#define ti_lib_rom_aon_wuc_aux_reset ROM_AONWUCAuxReset
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#define ti_lib_rom_aon_wuc_recharge_ctrl_config_set ROM_AONWUCRechargeCtrlConfigSet
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#define ti_lib_rom_aon_wuc_osc_config ROM_AONWUCOscConfig
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/* AUX_TDC API */
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#define ti_lib_rom_aux_tdc_config_set ROM_AUXTDCConfigSet
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#define ti_lib_rom_aux_tdc_measurement_done ROM_AUXTDCMeasurementDone
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/* AUX_WUC API */
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#define ti_lib_rom_aux_wuc_clock_enable ROM_AUXWUCClockEnable
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#define ti_lib_rom_aux_wuc_clock_disable ROM_AUXWUCClockDisable
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#define ti_lib_rom_aux_wuc_clock_status ROM_AUXWUCClockStatus
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#define ti_lib_rom_aux_wuc_power_ctrl ROM_AUXWUCPowerCtrl
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/* FLASH API */
|
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#define ti_lib_rom_flash_power_mode_get ROM_FlashPowerModeGet
|
||||
#define ti_lib_rom_flash_protection_set ROM_FlashProtectionSet
|
||||
#define ti_lib_rom_flash_protection_get ROM_FlashProtectionGet
|
||||
#define ti_lib_rom_flash_protection_save ROM_FlashProtectionSave
|
||||
#define ti_lib_rom_flash_efuse_read_row ROM_FlashEfuseReadRow
|
||||
#define ti_lib_rom_flash_disable_sectors_for_write ROM_FlashDisableSectorsForWrite
|
||||
|
||||
/* I2C API */
|
||||
#define ti_lib_rom_i2c_master_init_exp_clk ROM_I2CMasterInitExpClk
|
||||
#define ti_lib_rom_i2c_master_err ROM_I2CMasterErr
|
||||
|
||||
/* INTERRUPT API */
|
||||
#define ti_lib_rom_int_priority_grouping_set ROM_IntPriorityGroupingSet
|
||||
#define ti_lib_rom_int_priority_grouping_get ROM_IntPriorityGroupingGet
|
||||
#define ti_lib_rom_int_priority_set ROM_IntPrioritySet
|
||||
#define ti_lib_rom_int_priority_get ROM_IntPriorityGet
|
||||
#define ti_lib_rom_int_enable ROM_IntEnable
|
||||
#define ti_lib_rom_int_disable ROM_IntDisable
|
||||
#define ti_lib_rom_int_pend_set ROM_IntPendSet
|
||||
#define ti_lib_rom_int_pend_get ROM_IntPendGet
|
||||
#define ti_lib_rom_int_pend_clear ROM_IntPendClear
|
||||
|
||||
/* IOC API */
|
||||
#define ti_lib_rom_ioc_port_configure_set ROM_IOCPortConfigureSet
|
||||
#if !defined(ThisLibraryIsFor_CC26x0R2_HaltIfViolated)
|
||||
#define ti_lib_rom_ioc_port_configure_get ROM_IOCPortConfigureGet
|
||||
#define ti_lib_rom_ioc_io_shutdown_set ROM_IOCIOShutdownSet
|
||||
#define ti_lib_rom_ioc_io_mode_set ROM_IOCIOModeSet
|
||||
#define ti_lib_rom_ioc_io_int_set ROM_IOCIOIntSet
|
||||
#define ti_lib_rom_ioc_io_port_pull_set ROM_IOCIOPortPullSet
|
||||
#define ti_lib_rom_ioc_io_hyst_set ROM_IOCIOHystSet
|
||||
#define ti_lib_rom_ioc_io_input_set ROM_IOCIOInputSet
|
||||
#define ti_lib_rom_ioc_io_slew_ctrl_set ROM_IOCIOSlewCtrlSet
|
||||
#define ti_lib_rom_ioc_io_drv_strength_set ROM_IOCIODrvStrengthSet
|
||||
#define ti_lib_rom_ioc_io_port_id_set ROM_IOCIOPortIdSet
|
||||
#define ti_lib_rom_ioc_int_enable ROM_IOCIntEnable
|
||||
#define ti_lib_rom_ioc_int_disable ROM_IOCIntDisable
|
||||
#define ti_lib_rom_ioc_pin_type_gpio_input ROM_IOCPinTypeGpioInput
|
||||
#define ti_lib_rom_ioc_pin_type_gpio_output ROM_IOCPinTypeGpioOutput
|
||||
#define ti_lib_rom_ioc_pin_type_uart ROM_IOCPinTypeUart
|
||||
#define ti_lib_rom_ioc_pin_type_ssi_master ROM_IOCPinTypeSsiMaster
|
||||
#define ti_lib_rom_ioc_pin_type_ssi_slave ROM_IOCPinTypeSsiSlave
|
||||
#define ti_lib_rom_ioc_pin_type_i2c ROM_IOCPinTypeI2c
|
||||
#define ti_lib_rom_ioc_pin_type_aux ROM_IOCPinTypeAux
|
||||
#endif
|
||||
|
||||
/* PRCM API */
|
||||
#define ti_lib_rom_prcm_inf_clock_configure_set ROM_PRCMInfClockConfigureSet
|
||||
#define ti_lib_rom_prcm_inf_clock_configure_get ROM_PRCMInfClockConfigureGet
|
||||
#define ti_lib_rom_prcm_audio_clock_config_set ROM_PRCMAudioClockConfigSet
|
||||
#define ti_lib_rom_prcm_power_domain_on ROM_PRCMPowerDomainOn
|
||||
#define ti_lib_rom_prcm_power_domain_off ROM_PRCMPowerDomainOff
|
||||
#define ti_lib_rom_prcm_peripheral_run_enable ROM_PRCMPeripheralRunEnable
|
||||
#define ti_lib_rom_prcm_peripheral_run_disable ROM_PRCMPeripheralRunDisable
|
||||
#define ti_lib_rom_prcm_peripheral_sleep_enable ROM_PRCMPeripheralSleepEnable
|
||||
#define ti_lib_rom_prcm_peripheral_sleep_disable ROM_PRCMPeripheralSleepDisable
|
||||
#define ti_lib_rom_prcm_peripheral_deep_sleep_enable ROM_PRCMPeripheralDeepSleepEnable
|
||||
#define ti_lib_rom_prcm_peripheral_deep_sleep_disable ROM_PRCMPeripheralDeepSleepDisable
|
||||
#define ti_lib_rom_prcm_power_domain_status ROM_PRCMPowerDomainStatus
|
||||
#define ti_lib_rom_prcm_deep_sleep ROM_PRCMDeepSleep
|
||||
|
||||
/* SMPH API */
|
||||
#define ti_lib_rom_smph_acquire ROM_SMPHAcquire
|
||||
|
||||
/* SSI API */
|
||||
#define ti_lib_rom_ssi_config_set_exp_clk ROM_SSIConfigSetExpClk
|
||||
#define ti_lib_rom_ssi_data_put ROM_SSIDataPut
|
||||
#define ti_lib_rom_ssi_data_put_non_blocking ROM_SSIDataPutNonBlocking
|
||||
#define ti_lib_rom_ssi_data_get ROM_SSIDataGet
|
||||
#define ti_lib_rom_ssi_data_get_non_blocking ROM_SSIDataGetNonBlocking
|
||||
|
||||
/* TIMER API */
|
||||
#define ti_lib_rom_timer_configure ROM_TimerConfigure
|
||||
#define ti_lib_rom_timer_level_control ROM_TimerLevelControl
|
||||
#define ti_lib_rom_timer_stall_control ROM_TimerStallControl
|
||||
#define ti_lib_rom_timer_wait_on_trigger_control ROM_TimerWaitOnTriggerControl
|
||||
|
||||
/* TRNG API */
|
||||
#define ti_lib_rom_trng_number_get ROM_TRNGNumberGet
|
||||
|
||||
/* UART API */
|
||||
#define ti_lib_rom_uart_fifo_level_get ROM_UARTFIFOLevelGet
|
||||
#define ti_lib_rom_uart_config_set_exp_clk ROM_UARTConfigSetExpClk
|
||||
#define ti_lib_rom_uart_config_get_exp_clk ROM_UARTConfigGetExpClk
|
||||
#define ti_lib_rom_uart_disable ROM_UARTDisable
|
||||
#define ti_lib_rom_uart_char_get_non_blocking ROM_UARTCharGetNonBlocking
|
||||
#define ti_lib_rom_uart_char_get ROM_UARTCharGet
|
||||
#define ti_lib_rom_uart_char_put_non_blocking ROM_UARTCharPutNonBlocking
|
||||
#define ti_lib_rom_uart_char_put ROM_UARTCharPut
|
||||
|
||||
/* UDMA API */
|
||||
#define ti_lib_rom_udma_channel_attribute_enable ROM_uDMAChannelAttributeEnable
|
||||
#define ti_lib_rom_udma_channel_attribute_disable ROM_uDMAChannelAttributeDisable
|
||||
#define ti_lib_rom_udma_channel_attribute_get ROM_uDMAChannelAttributeGet
|
||||
#define ti_lib_rom_udma_channel_control_set ROM_uDMAChannelControlSet
|
||||
#define ti_lib_rom_udma_channel_transfer_set ROM_uDMAChannelTransferSet
|
||||
#define ti_lib_rom_udma_channel_scatter_gather_set ROM_uDMAChannelScatterGatherSet
|
||||
#define ti_lib_rom_udma_channel_size_get ROM_uDMAChannelSizeGet
|
||||
#define ti_lib_rom_udma_channel_mode_get ROM_uDMAChannelModeGet
|
||||
|
||||
/* VIMS API */
|
||||
#define ti_lib_rom_vims_configure ROM_VIMSConfigure
|
||||
#define ti_lib_rom_vims_mode_set ROM_VIMSModeSet
|
||||
|
||||
/* HAPI */
|
||||
#define ti_lib_hapi_crc32(a, b, c) HapiCrc32(a, b, c)
|
||||
#define ti_lib_hapi_get_flash_size() HapiGetFlashSize()
|
||||
#define ti_lib_hapi_get_chip_id() HapiGetChipId()
|
||||
#define ti_lib_hapi_sector_erase(a) HapiSectorErase(a)
|
||||
#define ti_lib_hapi_program_flash(a, b, c) HapiProgramFlash(a, b, c)
|
||||
#define ti_lib_hapi_reset_device() HapiResetDevice()
|
||||
#define ti_lib_hapi_fletcher32(a, b, c) HapiFletcher32(a, b, c)
|
||||
#define ti_lib_hapi_min_value(a, b) HapiMinValue(a,b)
|
||||
#define ti_lib_hapi_max_value(a, b) HapiMaxValue(a,b)
|
||||
#define ti_lib_hapi_mean_value(a, b) HapiMeanValue(a,b)
|
||||
#define ti_lib_hapi_stand_deviation_value(a, b) HapiStandDeviationValue(a,b)
|
||||
#define ti_lib_hapi_hf_source_safe_switch() HapiHFSourceSafeSwitch()
|
||||
#define ti_lib_hapi_select_comp_a_input(a) HapiSelectCompAInput(a)
|
||||
#define ti_lib_hapi_select_comp_a_ref(a) HapiSelectCompARef(a)
|
||||
#define ti_lib_hapi_select_adc_comp_b_input(a) HapiSelectADCCompBInput(a)
|
||||
#define ti_lib_hapi_select_comp_b_ref(a) HapiSelectCompBRef(a)
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#endif /* TI_LIB_ROM_H_ */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
@ -52,9 +52,6 @@
|
||||
#ifndef TI_LIB_H_
|
||||
#define TI_LIB_H_
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/* Include ROM API */
|
||||
#include "ti-lib-rom.h"
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/* aon_batmon.h */
|
||||
#include "driverlib/aon_batmon.h"
|
||||
|
||||
@ -200,14 +197,16 @@
|
||||
#define ti_lib_chipinfo_get_device_id_hw_rev_code(...) ChipInfo_GetDeviceIdHwRevCode(__VA_ARGS__)
|
||||
#define ti_lib_chipinfo_get_chip_type(...) ChipInfo_GetChipType(__VA_ARGS__)
|
||||
#define ti_lib_chipinfo_get_chip_family(...) ChipInfo_GetChipFamily(__VA_ARGS__)
|
||||
#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
|
||||
|
||||
#if CPU_FAMILY_CC26X0R2
|
||||
#define ti_lib_chipinfo_chip_family_is_cc26xx(...) ChipInfo_ChipFamilyIs_CC26x0(__VA_ARGS__)
|
||||
#define ti_lib_chipinfo_chip_family_is_cc13xx(...) ChipInfo_ChipFamilyIs_CC13x0(__VA_ARGS__)
|
||||
#define ti_lib_chipinfo_chip_family_is_cc26x0r2(...) ChipInfo_ChipFamilyIs_CC26x0R2(__VA_ARGS__)
|
||||
#define ti_lib_chipinfo_chip_family_is_cc26x0r2(...) ChipInfo_ChipFamilyIs_CC26x0R2(__VA_ARGS__)
|
||||
#else
|
||||
#define ti_lib_chipinfo_chip_family_is_cc26xx(...) ChipInfo_ChipFamilyIsCC26xx(__VA_ARGS__)
|
||||
#define ti_lib_chipinfo_chip_family_is_cc13xx(...) ChipInfo_ChipFamilyIsCC13xx(__VA_ARGS__)
|
||||
#endif
|
||||
#endif /* CPU_FAMILY_CC26X0R2 */
|
||||
|
||||
#define ti_lib_chipinfo_get_hw_revision(...) ChipInfo_GetHwRevision(__VA_ARGS__)
|
||||
#define ti_lib_chipinfo_hw_revision_is_1_0(...) ChipInfo_HwRevisionIs_1_0(__VA_ARGS__)
|
||||
#define ti_lib_chipinfo_hw_revision_is_gteq_2_0(...) ChipInfo_HwRevisionIs_GTEQ_2_0(__VA_ARGS__)
|
||||
@ -394,10 +393,6 @@
|
||||
#define ti_lib_pwr_ctrl_source_get(...) PowerCtrlSourceGet(__VA_ARGS__)
|
||||
#define ti_lib_pwr_ctrl_reset_source_get(...) PowerCtrlResetSourceGet(__VA_ARGS__)
|
||||
#define ti_lib_pwr_ctrl_reset_source_clear(...) PowerCtrlResetSourceClear(__VA_ARGS__)
|
||||
#if !defined(ThisLibraryIsFor_CC26x0R2_HaltIfViolated)
|
||||
#define ti_lib_pwr_ctrl_io_freeze_enable(...) PowerCtrlIOFreezeEnable(__VA_ARGS__)
|
||||
#define ti_lib_pwr_ctrl_io_freeze_disable(...) PowerCtrlIOFreezeDisable(__VA_ARGS__)
|
||||
#endif
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/* rfc.h */
|
||||
#include "driverlib/rfc.h"
|
||||
@ -416,7 +411,14 @@
|
||||
#define ti_lib_sys_ctrl_aon_sync(...) SysCtrlAonSync(__VA_ARGS__)
|
||||
#define ti_lib_sys_ctrl_aon_update(...) SysCtrlAonUpdate(__VA_ARGS__)
|
||||
#define ti_lib_sys_ctrl_set_recharge_before_power_down(...) SysCtrlSetRechargeBeforePowerDown(__VA_ARGS__)
|
||||
#define ti_lib_sys_ctrl_adjust_recharge_after_power_down(...) SysCtrlAdjustRechargeAfterPowerDown(__VA_ARGS__)
|
||||
|
||||
#if CPU_FAMILY_CC26X0R2
|
||||
/* May need to change to XOSC_IN_LOW_POWER_MODE */
|
||||
#define ti_lib_sys_ctrl_adjust_recharge_after_power_down() SysCtrlAdjustRechargeAfterPowerDown(XOSC_IN_HIGH_POWER_MODE)
|
||||
#else
|
||||
#define ti_lib_sys_ctrl_adjust_recharge_after_power_down() SysCtrlAdjustRechargeAfterPowerDown()
|
||||
#endif /* CPU_FAMILY_CC26X0R2 */
|
||||
|
||||
#define ti_lib_sys_ctrl_dcdc_voltage_conditional_control(...) SysCtrl_DCDC_VoltageConditionalControl(__VA_ARGS__)
|
||||
#define ti_lib_sys_ctrl_reset_source_get(...) SysCtrlResetSourceGet(__VA_ARGS__)
|
||||
#define ti_lib_sys_ctrl_system_reset(...) SysCtrlSystemReset(__VA_ARGS__)
|
||||
|
@ -63,9 +63,9 @@ LPM_MODULE(rf_switch_module, NULL, shutdown_handler, NULL, LPM_DOMAIN_NONE);
|
||||
void
|
||||
rf_switch_init()
|
||||
{
|
||||
ti_lib_rom_ioc_pin_type_gpio_output(POWER_PIN);
|
||||
ti_lib_ioc_pin_type_gpio_output(POWER_PIN);
|
||||
ti_lib_gpio_clear_dio(POWER_PIN);
|
||||
ti_lib_rom_ioc_pin_type_gpio_output(SELECT_PIN);
|
||||
ti_lib_ioc_pin_type_gpio_output(SELECT_PIN);
|
||||
ti_lib_gpio_clear_dio(SELECT_PIN);
|
||||
|
||||
lpm_register_module(&rf_switch_module);
|
||||
|
@ -158,11 +158,11 @@ platform_init_stage_one()
|
||||
* latches in the first place. Before doing these things though, we should
|
||||
* allow software to first regain control of pins
|
||||
*/
|
||||
#if !defined(ThisLibraryIsFor_CC26x0R2_HaltIfViolated)
|
||||
ti_lib_pwr_ctrl_io_freeze_disable();
|
||||
ti_lib_aon_ioc_freeze_disable();
|
||||
HWREG(AON_SYSCTL_BASE + AON_SYSCTL_O_SLEEPCTL) = 1;
|
||||
ti_lib_sys_ctrl_aon_sync();
|
||||
|
||||
#endif
|
||||
ti_lib_rom_int_enable(INT_AON_GPIO_EDGE);
|
||||
ti_lib_int_enable(INT_AON_GPIO_EDGE);
|
||||
ti_lib_int_master_enable();
|
||||
|
||||
soc_rtc_init();
|
||||
|
@ -601,11 +601,11 @@ configure(int type, int enable)
|
||||
{
|
||||
switch(type) {
|
||||
case SENSORS_HW_INIT:
|
||||
ti_lib_rom_ioc_pin_type_gpio_input(BOARD_IOID_MPU_INT);
|
||||
ti_lib_ioc_pin_type_gpio_input(BOARD_IOID_MPU_INT);
|
||||
ti_lib_ioc_io_port_pull_set(BOARD_IOID_MPU_INT, IOC_IOPULL_DOWN);
|
||||
ti_lib_ioc_io_hyst_set(BOARD_IOID_MPU_INT, IOC_HYST_ENABLE);
|
||||
|
||||
ti_lib_rom_ioc_pin_type_gpio_output(BOARD_IOID_MPU_POWER);
|
||||
ti_lib_ioc_pin_type_gpio_output(BOARD_IOID_MPU_POWER);
|
||||
ti_lib_ioc_io_drv_strength_set(BOARD_IOID_MPU_POWER, IOC_CURRENT_4MA,
|
||||
IOC_STRENGTH_MAX);
|
||||
ti_lib_gpio_clear_dio(BOARD_IOID_MPU_POWER);
|
||||
|
@ -59,10 +59,10 @@ config(int type, int enable)
|
||||
ti_lib_ioc_pin_type_gpio_output(BOARD_IOID_ALS_PWR);
|
||||
break;
|
||||
case SENSORS_ACTIVE:
|
||||
ti_lib_rom_ioc_pin_type_gpio_output(BOARD_IOID_ALS_PWR);
|
||||
ti_lib_rom_ioc_port_configure_set(BOARD_IOID_ALS_OUT, IOC_PORT_GPIO,
|
||||
IOC_STD_OUTPUT);
|
||||
ti_lib_rom_ioc_pin_type_gpio_input(BOARD_IOID_ALS_OUT);
|
||||
ti_lib_ioc_pin_type_gpio_output(BOARD_IOID_ALS_PWR);
|
||||
ti_lib_ioc_port_configure_set(BOARD_IOID_ALS_OUT, IOC_PORT_GPIO,
|
||||
IOC_STD_OUTPUT);
|
||||
ti_lib_ioc_pin_type_gpio_input(BOARD_IOID_ALS_OUT);
|
||||
|
||||
if(enable) {
|
||||
ti_lib_gpio_set_dio(BOARD_IOID_ALS_PWR);
|
||||
|
@ -119,7 +119,7 @@
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/* Default configuration values */
|
||||
#define CC26XX_WEB_DEMO_DEFAULT_ORG_ID "quickstart"
|
||||
#if CPU_FAMILY_CC13XX
|
||||
#if CPU_FAMILY_CC13X0
|
||||
#define CC26XX_WEB_DEMO_DEFAULT_TYPE_ID "cc13xx"
|
||||
#else
|
||||
#define CC26XX_WEB_DEMO_DEFAULT_TYPE_ID "cc26xx"
|
||||
|
Loading…
Reference in New Issue
Block a user