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Merge branch 'develop' into contrib/rpl-schedule-dao

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Simon Duquennoy 2019-02-25 21:35:57 +01:00 committed by GitHub
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554 changed files with 17841 additions and 5564 deletions
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6
.gitignore vendored
View File

@ -12,7 +12,7 @@
*.ihex
*.pyc
*~
obj_*
build/*
Makefile.target
Makefile.*.defines
tools/doxygen/html
@ -36,7 +36,7 @@ COOJA.testlog
*.simplelink
*.sky
*.firmware
*.srf06-cc26xx
*.cc26x0-cc13x0
*.zoul
# do not ignore platform makefiles
@ -47,7 +47,7 @@ COOJA.testlog
!Makefile.nrf52dk
!Makefile.openmote-cc2538
!Makefile.sky
!Makefile.srf06-cc26xx
!Makefile.cc26x0-cc13x0
!Makefile.zoul
# other nRF52 build artifacts

6
.gitmodules vendored
View File

@ -2,10 +2,10 @@
path = tools/cc2538-bsl
url = https://github.com/JelmerT/cc2538-bsl.git
[submodule "arch/cpu/cc26xx-cc13xx/lib/cc26xxware"]
path = arch/cpu/cc26xx-cc13xx/lib/cc26xxware
path = arch/cpu/cc26x0-cc13x0/lib/cc26xxware
url = https://github.com/contiki-ng/cc26xxware.git
[submodule "arch/cpu/cc26xx-cc13xx/lib/cc13xxware"]
path = arch/cpu/cc26xx-cc13xx/lib/cc13xxware
path = arch/cpu/cc26x0-cc13x0/lib/cc13xxware
url = https://github.com/contiki-ng/cc13xxware.git
[submodule "tools/sensniff"]
path = tools/sensniff
@ -26,5 +26,5 @@
path = arch/cpu/simplelink-cc13xx-cc26xx/lib/coresdk_cc13xx_cc26xx
url = https://github.com/contiki-ng/coresdk_cc13xx_cc26xx.git
[submodule "arch/cpu/cc26xx-cc13xx/lib/cc2640r2-sdk"]
path = arch/cpu/cc26xx-cc13xx/lib/cc2640r2-sdk
path = arch/cpu/cc26x0-cc13x0/lib/cc2640r2-sdk
url = https://github.com/contiki-ng/cc2640r2-sdk.git

36
.travis.yml
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@ -30,14 +30,26 @@ before_install:
docker push $DOCKER_IMG;
fi
fi
# Build Cooja
- ant -q -f $CNG_HOST_PATH/tools/cooja/build.xml jar
# Build Cooja conditionally
- if [ ${BUILD_COOJA:-false} = true ] ; then
ant -q -f $CNG_HOST_PATH/tools/cooja/build.xml jar ;
fi
# Create a directory for out of tree tests and clone the test repo therein
# The directory will need created unconditionally so we can always chgrp and
# mount it, even if empty. Checkout a pre-defined version.
- mkdir -p $OUT_OF_TREE_TEST_PATH
- if [ ${TEST_NAME} = "out-of-tree-build" ] ; then
git clone --depth 1 https://github.com/contiki-ng/out-of-tree-tests $OUT_OF_TREE_TEST_PATH &&
cd $OUT_OF_TREE_TEST_PATH &&
git checkout $OUT_OF_TREE_TEST_VER ;
fi
# Set permissions for Docker mount
- sudo chgrp -hR 1000 $CNG_HOST_PATH
- sudo chgrp -hR 1000 $CNG_HOST_PATH $OUT_OF_TREE_TEST_PATH
# The test script for each build
script:
- docker run --privileged -v $CNG_HOST_PATH:/home/user/contiki-ng -ti $DOCKER_IMG bash --login -c "make -C tests/??-$TEST_NAME";
- docker run --privileged -v $OUT_OF_TREE_TEST_PATH:/home/user/out-of-tree-tests -v $CNG_HOST_PATH:/home/user/contiki-ng -ti $DOCKER_IMG bash --login -c "make -C tests/??-$TEST_NAME";
# Check outcome of the test
- $CNG_HOST_PATH/tests/check-test.sh $CNG_HOST_PATH/tests/??-$TEST_NAME; exit $?;
@ -47,6 +59,8 @@ env:
global:
- DOCKER_IMG='contiker/contiki-ng'
- CNG_HOST_PATH=`pwd`
- OUT_OF_TREE_TEST_PATH=$HOME/out-of-tree-tests
- OUT_OF_TREE_TEST_VER=2869ae7
# Encrypted environment variables.
# Only available on builds of contiki-ng/contiki-ng branches, not PRs or forks.
- secure: 0nrV5yjpT2kE19Hlm7t619Qbmyjx/G7bSUI1c+U3kZbyuxnRlASjVcDN5uPBoimIfGiBRI0nRq690BogAJt4EKwbC1Dy8kC1XD8mRtQ2AIZ6PHaUoG9iS5sBhFBQK0XkB83bwh6omRn/04O0uuX74ooSWT7fDrWxi/y5+0ysXK6gRtOhdrJ3FU5OkNVewX8NeCdx3pOWhMOtXWdFkMIi1XRdDnvMM5/hHlHMkdXXtaZQX9UsK3Q3DSjPRLZjKRiOlcx9MIg2ebh9ITmd2Du2p2q/LKtoutJckvhbKQPWcZi/B+1ZTSff0FHBIg+EYxf6TeFuia7XSTWH7sr2CDCCtcvSR9bB5yW6jdmGfa8Af8I1TCBuqoSUo0Re50BZBZF7COleEh+IojbjXn2CIDMg5rT4Sh3qcMGvFn9OW1cz5h5UNSOk7EIAXXPcI7Aloxh2sBo4/DrvvbfIsKrvxV9Fx4bdyNtR7dZ7xsoOw6L0zttC3K9naf3VAOeBAyjBiRwm0tWxJC/buhTsKlYrthhyUrwLtYAFL4UHcazvz57hY/cEzR2X6F//9Hp7HFoNtn1E36doX3ZfeI22yxHMo9SYW7O69C45wbhJ29lAA9XXbYVyGBKFkY8C1NCZ0Xckt9H8/Ow5Sz8HmW/NNBJCn0Fsx+jezdGc4ED5naugNbLAyNg=
@ -55,14 +69,16 @@ env:
- TEST_NAME='compile-base'
- TEST_NAME='compile-arm-ports-01'
- TEST_NAME='compile-arm-ports-02'
- TEST_NAME='rpl-lite'
- TEST_NAME='rpl-classic'
- TEST_NAME='tun-rpl-br'
- TEST_NAME='rpl-lite' BUILD_COOJA=true
- TEST_NAME='rpl-classic' BUILD_COOJA=true
- TEST_NAME='tun-rpl-br' BUILD_COOJA=true
- TEST_NAME='coap-lwm2m'
- TEST_NAME='simulation-base'
- TEST_NAME='ieee802154'
- TEST_NAME='simulation-base' BUILD_COOJA=true
- TEST_NAME='ieee802154' BUILD_COOJA=true
- TEST_NAME='compile-nxp-ports'
- TEST_NAME='documentation'
- TEST_NAME='compile-tools'
- TEST_NAME='native-runs'
- TEST_NAME='ipv6'
- TEST_NAME='ipv6' BUILD_COOJA=true
- TEST_NAME='ipv6-nbr' BUILD_COOJA=true
- TEST_NAME='out-of-tree-build'

14
Makefile.embedded
View File

@ -3,6 +3,9 @@
# Future extensions to the build system that are of a similar nature (for
# embedded devices only), can be achieved by extending this Makefile here.
###
### Targets using the tools/serial-io
###
RLWRAPGOALS = login serialdump serialview
.PHONY: $(RLWRAPGOALS)
@ -31,3 +34,14 @@ serialview: $(SERIAL_DUMP_BIN)
login: $(SERIAL_DUMP_BIN)
$(SERIALDUMP) -b$(BAUDRATE) $(PORT)
###
### Targets using tools/motelist
###
CONTIKI_NG_MOTELIST_DIR = $(TOOLS_DIR)/motelist
CONTIKI_NG_MOTELIST = python $(CONTIKI_NG_MOTELIST_DIR)/motelist.py
.PHONY: motelist-all
motelist-all:
$(CONTIKI_NG_MOTELIST)

29
Makefile.help Normal file
View File

@ -0,0 +1,29 @@
usage:
@echo "Usage:"
@echo " make [TARGET=(TARGET)] [BOARD=(BOARD)] [DEFINES=(DEFINES)] [PORT=(PORT)] [target]"
@echo ""
@echo "Typical usage:"
@echo " make [TARGET=(TARGET)] [BOARD=(BOARD)] [all]"
@echo ""
@echo " Will build Contiki-NG firmware(s) from the current example dir"
@echo " for platform TARGET, board BOARD."
@echo ""
@echo "Miscellaneous targets:"
@echo " targets Prints list of supported platforms"
@echo " boards Prints a list of supported boards for TARGET"
@echo " savetarget Saves TARGET and BOARD for future invocations of make"
@echo " savedefines Saves DEFINES for future invocations of make"
@echo " clean Removes all compiled files for TARGET"
@echo " distclean Removes all compiled files for all TARGETs"
@echo " viewconf Prints Contiki-NG build configuration for TARGET"
@echo " %.flashprof Shows a Flash/ROM profile of a given firmware (e.g. hello-world.flashprof)"
@echo " %.ramprof Shows a RAM profile of a given firmware (e.g. hello-world.ramprof)"
@echo " %.o Produces an object file from a given source file (e.g. hello-world.o)"
@echo " %.e Produces the pre-processed version of a given source file (e.g. hello-world.e)"
@echo " %.s Produces an assembly file from a given source file (e.g. hello-world.s)"
@echo " login View the serial output of the device connected to PORT"
@echo " serialview Same as login, but prepend serial output with a unix timestamp"
@echo " serialdump same as serialview, but also save the output to a file"
@echo " motelist-all Prints a list of connected devices"
help: usage

99
Makefile.include
View File

@ -13,8 +13,6 @@ include $(CONTIKI)/Makefile.identify-target
### Include Makefile.tools to pull in targets that allow us to build tools dir
include $(CONTIKI)/Makefile.tools
CONTIKI_NG_TARGET_LIB = contiki-ng-$(TARGET).a
ifeq ($(DEFINES),)
-include Makefile.$(TARGET).defines
ifneq ($(DEFINES),)
@ -39,18 +37,18 @@ ifdef CI
endif
endif
OBJECTDIR = obj_$(TARGET)
BUILD_DIR = build
BUILD_DIR_TARGET = $(BUILD_DIR)/$(TARGET)
BUILD_DIR_BOARD = $(BUILD_DIR_TARGET)/$(BOARD)/$(BUILD_DIR_CONFIG)
OBJECTDIR = $(BUILD_DIR_BOARD)/obj
CONTIKI_NG_TARGET_LIB = $(BUILD_DIR_BOARD)/contiki-ng-$(TARGET).a
LOWERCASE = -abcdefghijklmnopqrstuvwxyz/
UPPERCASE = _ABCDEFGHIJKLMNOPQRSTUVWXYZ_
TARGET_UPPERCASE := ${strip ${shell echo $(TARGET) | sed y!$(LOWERCASE)!$(UPPERCASE)!}}
CFLAGS += -DCONTIKI=1 -DCONTIKI_TARGET_$(TARGET_UPPERCASE)=1
CFLAGS += -DCONTIKI_TARGET_STRING=\"$(TARGET)\"
ifneq ($(BOARD),)
TARGET_BOARD_UPPERCASE := ${strip ${shell echo $(BOARD) | sed y!$(LOWERCASE)!$(UPPERCASE)!}}
CFLAGS += -DCONTIKI_BOARD_$(TARGET_BOARD_UPPERCASE)=1
CFLAGS += -DCONTIKI_BOARD_STRING=\"$(BOARD)\"
endif
CFLAGS += -Wno-unused-const-variable
@ -80,15 +78,14 @@ endef
CONTIKI_OBJECTFILES = ${addprefix $(OBJECTDIR)/,${call oname, $(CONTIKI_SOURCEFILES)}}
PROJECT_OBJECTFILES = ${addprefix $(OBJECTDIR)/,${call oname, $(PROJECT_SOURCEFILES)}}
# Provide way to create $(OBJECTDIR) if it has been removed by make clean
$(OBJECTDIR):
mkdir $@
uniq = $(if $1,$(firstword $1) $(call uniq,$(filter-out $(firstword $1),$1)))
### Include target makefile (TODO Unsafe?)
target_makefile := $(wildcard $(CONTIKI)/arch/platform/$(TARGET)/Makefile.$(TARGET) ${foreach TDIR, $(TARGETDIRS), $(TDIR)/$(TARGET)/Makefile.$(TARGET)})
# Configurable arch path
ARCH_PATH ?= $(CONTIKI)/arch
target_makefile := $(wildcard $(ARCH_PATH)/platform/$(TARGET)/Makefile.$(TARGET) ${foreach TDIR, $(TARGETDIRS), $(TDIR)/$(TARGET)/Makefile.$(TARGET)})
# Check if the target makefile exists, and create the object directory if necessary.
ifeq ($(strip $(target_makefile)),)
@ -129,6 +126,17 @@ endif # $(BOARD) not empty
PLATFORM_ACTION ?= build
# Provide way to create $(OBJECTDIR) if it has been removed by make clean
$(OBJECTDIR):
$(TRACE_MKDIR)
$(Q)mkdir -p $@
ifneq ($(BOARD),)
TARGET_BOARD_UPPERCASE := ${strip ${shell echo $(BOARD) | sed y!$(LOWERCASE)!$(UPPERCASE)!}}
CFLAGS += -DCONTIKI_BOARD_$(TARGET_BOARD_UPPERCASE)=1
CFLAGS += -DCONTIKI_BOARD_STRING=\"$(BOARD)\"
endif
# Configure MAC layer
# The different options
@ -240,12 +248,20 @@ ifeq ($(V),1)
TRACE_LD =
TRACE_AR =
TRACE_AS =
TRACE_OBJCOPY =
TRACE_OBJDUMP =
TRACE_MKDIR =
TRACE_CP =
Q=
else
TRACE_CC = @echo " CC " $<
TRACE_LD = @echo " LD " $@
TRACE_AR = @echo " AR " $@
TRACE_AS = @echo " AS " $<
TRACE_OBJCOPY = @echo " OBJCOPY " $< "-->" $@
TRACE_OBJDUMP = @echo " OBJDUMP " $< "-->" $@
TRACE_MKDIR = @echo " MKDIR " $@
TRACE_CP = @echo " CP " $< "-->" $@
Q=@
endif
@ -302,24 +318,24 @@ endef
### Harmonize filename of a .map file, if the platform's build system wants
### to create one
CONTIKI_NG_PROJECT_MAP = $(addsuffix -$(TARGET).map, $(basename $@))
CONTIKI_NG_PROJECT_MAP = $(BUILD_DIR_BOARD)/$(basename $(notdir $@)).map
.PHONY: clean distclean usage help targets boards savetarget savedefines viewconf
clean:
-$(Q)rm -f *.d *.e *.o $(CONTIKI_NG_TARGET_LIB) $(CLEAN)
-$(Q)rm -rf $(OBJECTDIR)
-$(Q)rm -f $(addsuffix -$(TARGET).map, $(CONTIKI_PROJECT))
-$(Q)rm -f *.d *.e *.o $(CLEAN)
-$(Q)rm -rf $(BUILD_DIR_TARGET)
-$(Q)rm -f $(addsuffix .$(TARGET), $(CONTIKI_PROJECT))
@echo Target $(TARGET) cleaned
distclean:
@for TARG in `ls $(CONTIKI)/arch/platform $(TARGETDIRS)`; do \
@for TARG in `ls $(ARCH_PATH)/platform $(TARGETDIRS)`; do \
echo Running: $(MAKE) TARGET=$$TARG clean; \
$(MAKE) TARGET=$$TARG clean; \
done
-$(Q)rm -rf $(BUILD_DIR)
-include $(CONTIKI)/arch/platform/$(TARGET)/Makefile.customrules-$(TARGET)
-include $(ARCH_PATH)/platform/$(TARGET)/Makefile.customrules-$(TARGET)
ifndef CUSTOM_RULE_C_TO_OBJECTDIR_O
$(OBJECTDIR)/%.o: %.c | $(OBJECTDIR)
@ -382,49 +398,26 @@ ifndef LD
endif
ifndef CUSTOM_RULE_LINK
%.$(TARGET): %.o $(PROJECT_OBJECTFILES) $(PROJECT_LIBRARIES) $(CONTIKI_NG_TARGET_LIB)
$(BUILD_DIR_BOARD)/%.$(TARGET): %.o $(PROJECT_OBJECTFILES) $(PROJECT_LIBRARIES) $(CONTIKI_NG_TARGET_LIB)
$(TRACE_LD)
$(Q)$(LD) $(LDFLAGS) $(TARGET_STARTFILES) ${filter-out %.a,$^} \
${filter %.a,$^} $(TARGET_LIBFILES) -o $@
endif
%.$(TARGET): $(BUILD_DIR_BOARD)/%.$(TARGET)
$(TRACE_CP)
$(Q)cp $< $@
%.ramprof: %.$(TARGET)
$(NM) -S -td --size-sort $< | grep -i " [abdrw] " | cut -d' ' -f2,4
%.flashprof: %.$(TARGET)
$(NM) -S -td --size-sort $< | grep -i " [t] " | cut -d' ' -f2,4
usage:
@echo "Usage:"
@echo " make [TARGET=(TARGET)] [BOARD=(BOARD)] [DEFINES=(DEFINES)] [PORT=(PORT)] [target]"
@echo ""
@echo "Typical usage:"
@echo " make [TARGET=(TARGET)] [BOARD=(BOARD)] [all]"
@echo ""
@echo " Will build Contiki-NG firmware(s) from the current example dir"
@echo " for platform TARGET, board BOARD."
@echo ""
@echo "Miscellaneous targets:"
@echo " targets Prints list of supported platforms"
@echo " boards Prints a list of supported boards for TARGET"
@echo " savetarget Saves TARGET and BOARD for future invocations of make"
@echo " savedefines Saves DEFINES for future invocations of make"
@echo " clean Removes all compiled files for TARGET"
@echo " distclean Removes all compiled files for all TARGETs"
@echo " viewconf Prints Contiki-NG build configuration for TARGET"
@echo " %.flashprof Shows a Flash/ROM profile of a given firmware (e.g. hello-world.flashprof)"
@echo " %.ramprof Shows a RAM profile of a given firmware (e.g. hello-world.ramprof)"
@echo " %.o Produces an object file from a given source file (e.g. hello-world.o)"
@echo " %.e Produces the pre-processed version of a given source file (e.g. hello-world.e)"
@echo " %.s Produces an assembly file from a given source file (e.g. hello-world.s)"
@echo " login View the serial output of the device connected to PORT"
@echo " serialview Same as login, but prepend serial output with a unix timestamp"
@echo " serialdump same as serialview, but also save the output to a file"
help: usage
include $(CONTIKI)/Makefile.help
targets:
@ls $(CONTIKI)/arch/platform $(TARGETDIRS)
@ls $(ARCH_PATH)/platform $(TARGETDIRS)
boards:
ifdef BOARD
@ -472,9 +465,9 @@ ifeq ($(findstring $(TARGET),native cooja),)
include $(CONTIKI)/Makefile.embedded
endif
# Don't treat %.$(TARGET) as an intermediate file because it is
# in fact the primary target.
.PRECIOUS: %.$(TARGET)
# Don't treat $(BUILD_DIR_BOARD)/%.$(TARGET) and $(TARGET) as intermediate
# files because for many platforms they are in fact the primary target.
.PRECIOUS: $(BUILD_DIR_BOARD)/%.$(TARGET) %.$(TARGET)
# Cancel the predefined implict rule for compiling and linking
# a single C source into a binary to force GNU make to consider
@ -485,6 +478,8 @@ ifeq ($(PLATFORM_ACTION),skip)
# Skip this target.
$(CONTIKI_PROJECT):
@echo "Skipping $@: not for the '$(TARGET)/$(BOARD)' platform!"
%.$(TARGET):
@echo "Skipping $@: not for the '$(TARGET)/$(BOARD)' platform!"
else
# Build this target.
# Match-anything pattern rule to allow the project makefiles to

2
README.md
View File

@ -8,7 +8,7 @@
Contiki-NG is an open-source, cross-platform operating system for Next-Generation IoT devices. It focuses on dependable (secure and reliable) low-power communication and standard protocols, such as IPv6/6LoWPAN, 6TiSCH, RPL, and CoAP. Contiki-NG comes with extensive documentation, tutorials, a roadmap, release cycle, and well-defined development flow for smooth integration of community contributions.
Unless excplicitly stated otherwise, Contiki-NG sources are distributed under
Unless explicitly stated otherwise, Contiki-NG sources are distributed under
the terms of the [3-clause BSD license](LICENSE.md). This license gives
everyone the right to use and distribute the code, either in binary or
source code format, as long as the copyright license is retained in

40
arch/cpu/arm/Makefile.arm
View File

@ -1,3 +1,11 @@
### Verbosity control. Use make V=1 to get verbose builds.
### Extends what we already have in the top-level Makefile
ifeq ($(V),1)
TRACE_SREC_CAT =
else
TRACE_SREC_CAT = @echo " SREC_CAT " $< "-->" $@
endif
CC = arm-none-eabi-gcc
CPP = arm-none-eabi-cpp
LD = arm-none-eabi-gcc
@ -43,22 +51,32 @@ endif
### CPU-dependent cleanup files
CLEAN += *.elf *.bin *.lst *.hex *.i16hex
OUT_HEX = $(BUILD_DIR_BOARD)/%.hex
OUT_I16HEX = $(BUILD_DIR_BOARD)/%.i16hex
OUT_BIN = $(BUILD_DIR_BOARD)/%.bin
OUT_LST = $(BUILD_DIR_BOARD)/%.lst
### Don't treat the following files as intermediate
.PRECIOUS: %.elf %.hex %.bin
.PRECIOUS: $(OUT_ELF) $(OUT_HEX) $(OUT_BIN)
%.i16hex: %.elf
$(OBJCOPY) -O ihex $< $@
$(OUT_I16HEX): $(OUT_ELF)
$(TRACE_OBJCOPY)
$(Q)$(OBJCOPY) -O ihex $< $@
%.hex: %.i16hex
$(SREC_CAT) $< -intel -o $@ -intel
$(OUT_HEX): $(OUT_I16HEX)
$(TRACE_SREC_CAT)
$(Q)$(SREC_CAT) $< -intel -o $@ -intel
%.bin: %.elf
$(OBJCOPY) -O binary $(OBJCOPY_FLAGS) $< $@
$(OUT_BIN): $(OUT_ELF)
$(TRACE_OBJCOPY)
$(Q)$(OBJCOPY) -O binary $(OBJCOPY_FLAGS) $< $@
%.lst: %.elf
$(OBJDUMP) $(OBJDUMP_FLAGS) $< > $@
$(OUT_LST): $(OUT_ELF)
$(TRACE_OBJDUMP)
$(Q)$(OBJDUMP) $(OBJDUMP_FLAGS) $< > $@
### We don't really need the .hex and .bin for the .$(TARGET) but let's make
### sure they get built
%.$(TARGET): %.elf %.hex %.bin
cp $< $@
$(BUILD_DIR_BOARD)/%.$(TARGET): $(OUT_ELF) $(OUT_HEX) $(OUT_BIN)
$(TRACE_CP)
$(Q)cp $< $@

27
arch/cpu/arm/cortex-m/Makefile.cortex-m
View File

@ -1,3 +1,28 @@
CONTIKI_ARM_DIRS += cortex-m cortex-m/CMSIS
include $(CONTIKI)/arch/cpu/arm/Makefile.arm
### Build syscalls for newlib
MODULES += os/lib/newlib
LDFLAGS += -T $(LDSCRIPT)
LDFLAGS += -Wl,--gc-sections,--sort-section=alignment
LDFLAGS += -Wl,-Map=$(CONTIKI_NG_PROJECT_MAP),--cref,--no-warn-mismatch
OBJCOPY_FLAGS += --gap-fill 0xff
CPU_STARTFILES = ${addprefix $(OBJECTDIR)/,${call oname, $(CPU_START_SOURCEFILES)}}
### Resolve any potential circular dependencies between the linked libraries
### See: https://stackoverflow.com/questions/5651869/gcc-what-are-the-start-group-and-end-group-command-line-options/5651895
TARGET_LIBFLAGS := -Wl,--start-group $(TARGET_LIBFILES) -Wl,--end-group
CUSTOM_RULE_LINK = 1
OUT_ELF = $(BUILD_DIR_BOARD)/%.elf
.SECONDEXPANSION:
$(OUT_ELF): $(CPU_STARTFILES) $$(CONTIKI_OBJECTFILES) %.o $(PROJECT_OBJECTFILES) $(PROJECT_LIBRARIES) $(LDSCRIPT) $(TARGET_LIBS)
$(TRACE_LD)
$(Q)$(LD) $(LDFLAGS) ${filter-out $(LDSCRIPT) %.a,$^} ${filter %.a,$^} $(TARGET_LIBFLAGS) -o $@
include $(ARCH_PATH)/cpu/arm/Makefile.arm

25
arch/cpu/arm/cortex-m/cm3/Makefile.cm3
View File

@ -3,28 +3,7 @@ CONTIKI_ARM_DIRS += cortex-m/cm3
CFLAGS += -mcpu=cortex-m3
LDFLAGS += -mcpu=cortex-m3 -nostartfiles
LDFLAGS += -T $(LDSCRIPT)
LDFLAGS += -Wl,--gc-sections,--sort-section=alignment
LDFLAGS += -Wl,-Map=$(CONTIKI_NG_PROJECT_MAP),--cref,--no-warn-mismatch
OBJCOPY_FLAGS += --gap-fill 0xff
TARGET_LIBFILES += -lm
### Build syscalls for newlib
MODULES += os/lib/newlib
CPU_STARTFILES = ${addprefix $(OBJECTDIR)/,${call oname, $(CPU_START_SOURCEFILES)}}
### Compilation rules
CUSTOM_RULE_LINK = 1
### Resolve any potential circular dependencies between the linked libraries
### See: https://stackoverflow.com/questions/5651869/gcc-what-are-the-start-group-and-end-group-command-line-options/5651895
TARGET_LIBFLAGS := -Wl,--start-group $(TARGET_LIBFILES) -lm -Wl,--end-group
.SECONDEXPANSION:
%.elf: $(CPU_STARTFILES) $$(CONTIKI_OBJECTFILES) %.o $(PROJECT_OBJECTFILES) $(PROJECT_LIBRARIES) $(LDSCRIPT)
$(TRACE_LD)
$(Q)$(LD) $(LDFLAGS) ${filter-out $(LDSCRIPT) %.a,$^} ${filter %.a,$^} $(TARGET_LIBFLAGS) -o $@
include $(CONTIKI)/arch/cpu/arm/cortex-m/Makefile.cortex-m
include $(ARCH_PATH)/cpu/arm/cortex-m/Makefile.cortex-m

23
arch/cpu/arm/cortex-m/cm4/Makefile.cm4
View File

@ -3,26 +3,5 @@ CONTIKI_ARM_DIRS += cortex-m/cm4
CFLAGS += -mcpu=cortex-m4
LDFLAGS += -mcpu=cortex-m4
LDFLAGS += -T $(LDSCRIPT)
LDFLAGS += -Wl,--gc-sections,--sort-section=alignment
LDFLAGS += -Wl,-Map=$(CONTIKI_NG_PROJECT_MAP),--cref,--no-warn-mismatch
OBJCOPY_FLAGS += --gap-fill 0xff
### Build syscalls for newlib
MODULES += os/lib/newlib
CPU_STARTFILES = ${addprefix $(OBJECTDIR)/,${call oname, $(CPU_START_SOURCEFILES)}}
### Compilation rules
CUSTOM_RULE_LINK = 1
### Resolve any potential circular dependencies between the linked libraries
### See: https://stackoverflow.com/questions/5651869/gcc-what-are-the-start-group-and-end-group-command-line-options/5651895
TARGET_LIBFLAGS := -Wl,--start-group $(TARGET_LIBFILES) -Wl,--end-group
%.elf: $(CPU_STARTFILES) %.o $(PROJECT_OBJECTFILES) $(PROJECT_LIBRARIES) $(CONTIKI_NG_TARGET_LIB) $(TARGET_LIBS)
$(TRACE_LD)
$(Q)$(LD) $(LDFLAGS) ${filter %.o %.a,$^} $(TARGET_LIBFLAGS) -o $@
include $(CONTIKI)/arch/cpu/arm/cortex-m/Makefile.cortex-m
include $(ARCH_PATH)/cpu/arm/cortex-m/Makefile.cortex-m

2
arch/cpu/cc2538/Makefile.cc2538
View File

@ -52,4 +52,4 @@ $(LDSCRIPT): $(SOURCE_LDSCRIPT) FORCE | $(OBJECTDIR)
$(TRACE_CC)
$(Q)$(CC) $(LDGENFLAGS) $< | grep -v '^\s*#\s*pragma\>' > $@
include $(CONTIKI)/arch/cpu/arm/cortex-m/cm3/Makefile.cm3
include $(ARCH_PATH)/cpu/arm/cortex-m/cm3/Makefile.cm3

8
arch/cpu/cc2538/cc2538-def.h
View File

@ -36,11 +36,13 @@
/*---------------------------------------------------------------------------*/
#define RTIMER_ARCH_SECOND 32768
/*---------------------------------------------------------------------------*/
#define CC2538_PHY_OVERHEAD 3
#define CC2538_BYTE_AIR_TIME 32
/* 352us from calling transmit() until the SFD byte has been sent */
#define CC2538_DELAY_BEFORE_TX ((unsigned)US_TO_RTIMERTICKS(352))
#define CC2538_DELAY_BEFORE_TX ((unsigned)US_TO_RTIMERTICKS(352))
/* 192us as in datasheet but ACKs are not always received, so adjusted to 250us */
#define CC2538_DELAY_BEFORE_RX ((unsigned)US_TO_RTIMERTICKS(250))
#define CC2538_DELAY_BEFORE_DETECT 0
#define CC2538_DELAY_BEFORE_RX ((unsigned)US_TO_RTIMERTICKS(250))
#define CC2538_DELAY_BEFORE_DETECT 0
/* Frame filtering done in software */
#define TSCH_CONF_HW_FRAME_FILTERING 0

57
arch/cpu/cc2538/dev/cc2538-rf.c
View File

@ -140,6 +140,8 @@ static const output_config_t output_power[] = {
{-24, 0x00 },
};
static radio_result_t get_value(radio_param_t param, radio_value_t *value);
#define OUTPUT_CONFIG_COUNT (sizeof(output_power) / sizeof(output_config_t))
/* Max and Min Output Power in dBm */
@ -394,6 +396,48 @@ get_sfd_timestamp(void)
return RTIMER_NOW() - RADIO_TO_RTIMER(timer_val - sfd);
}
/*---------------------------------------------------------------------------*/
/* Enable or disable radio test mode emmiting modulated or unmodulated
* (carrier) signal. See User's Guide pages 719 and 741.
*/
static uint32_t prev_FRMCTRL0, prev_MDMTEST1;
static uint8_t was_on;
static void
set_test_mode(uint8_t enable, uint8_t modulated)
{
radio_value_t mode;
get_value(RADIO_PARAM_POWER_MODE, &mode);
if(enable) {
if(mode == RADIO_POWER_MODE_CARRIER_ON) {
return;
}
was_on = (mode == RADIO_POWER_MODE_ON);
off();
prev_FRMCTRL0 = REG(RFCORE_XREG_FRMCTRL0);
/* This constantly transmits random data */
REG(RFCORE_XREG_FRMCTRL0) = 0x00000042;
if(!modulated) {
prev_MDMTEST1 = REG(RFCORE_XREG_MDMTEST1);
/* ...adding this we send an unmodulated carrier instead */
REG(RFCORE_XREG_MDMTEST1) = 0x00000018;
}
CC2538_RF_CSP_ISTXON();
} else {
if(mode != RADIO_POWER_MODE_CARRIER_ON) {
return;
}
CC2538_RF_CSP_ISRFOFF();
REG(RFCORE_XREG_FRMCTRL0) = prev_FRMCTRL0;
if(!modulated) {
REG(RFCORE_XREG_MDMTEST1) = prev_MDMTEST1;
}
if(was_on) {
on();
}
}
}
/*---------------------------------------------------------------------------*/
/* Netstack API radio driver functions */
/*---------------------------------------------------------------------------*/
static int
@ -806,8 +850,12 @@ get_value(radio_param_t param, radio_value_t *value)
switch(param) {
case RADIO_PARAM_POWER_MODE:
*value = (REG(RFCORE_XREG_RXENABLE) && RFCORE_XREG_RXENABLE_RXENMASK) == 0
? RADIO_POWER_MODE_OFF : RADIO_POWER_MODE_ON;
if((REG(RFCORE_XREG_RXENABLE) & RFCORE_XREG_RXENABLE_RXENMASK) == 0) {
*value = RADIO_POWER_MODE_OFF;
} else {
*value = (REG(RFCORE_XREG_FRMCTRL0) & RFCORE_XREG_FRMCTRL0_TX_MODE) == 0
? RADIO_POWER_MODE_ON : RADIO_POWER_MODE_CARRIER_ON;
}
return RADIO_RESULT_OK;
case RADIO_PARAM_CHANNEL:
*value = (radio_value_t)get_channel();
@ -896,6 +944,11 @@ set_value(radio_param_t param, radio_value_t value)
off();
return RADIO_RESULT_OK;
}
if(value == RADIO_POWER_MODE_CARRIER_ON ||
value == RADIO_POWER_MODE_CARRIER_OFF) {
set_test_mode((value == RADIO_POWER_MODE_CARRIER_ON), 0);
return RADIO_RESULT_OK;
}
return RADIO_RESULT_INVALID_VALUE;
case RADIO_PARAM_CHANNEL:
if(value < CC2538_RF_CHANNEL_MIN ||

21
arch/cpu/cc2538/dev/spi-arch.c
View File

@ -281,27 +281,6 @@ spi_arch_close_and_unlock(const spi_device_t *dev)
return SPI_DEV_STATUS_OK;
}
/*---------------------------------------------------------------------------*/
spi_status_t
spi_arch_select(const spi_device_t *dev)
{
if(!spi_arch_has_lock(dev)) {
return SPI_DEV_STATUS_BUS_NOT_OWNED;
}
SPIX_CS_CLR(PIN_TO_PORT(dev->pin_spi_cs), PIN_TO_NUM(dev->pin_spi_cs));
return SPI_DEV_STATUS_OK;
}
/*---------------------------------------------------------------------------*/
spi_status_t
spi_arch_deselect(const spi_device_t *dev)
{
SPIX_CS_SET(PIN_TO_PORT(dev->pin_spi_cs), PIN_TO_NUM(dev->pin_spi_cs));
return SPI_DEV_STATUS_OK;
}
/*---------------------------------------------------------------------------*/
/* Assumes that checking dev and bus is not NULL before calling this */
spi_status_t
spi_arch_transfer(const spi_device_t *dev,

7
arch/cpu/cc26x0-cc13x0/Makefile.cc13x0 Normal file
View File

@ -0,0 +1,7 @@
TI_XXWARE_PATH = lib/cc13xxware
CONTIKI_CPU_SOURCEFILES += smartrf-settings.c prop-mode.c prop-mode-tx-power.c cc13xx-50kbps-tsch.c
CFLAGS += -DCPU_FAMILY_CC13X0=1 -DCPU_FAMILY_CC13XX=1
include $(CONTIKI_CPU)/Makefile.cc26x0-cc13x0

5
arch/cpu/cc26x0-cc13x0/Makefile.cc26x0 Normal file
View File

@ -0,0 +1,5 @@
TI_XXWARE_PATH = lib/cc26xxware
CFLAGS += -DCPU_FAMILY_CC26X0=1 -DCPU_FAMILY_CC26XX=1
include $(CONTIKI_CPU)/Makefile.cc26x0-cc13x0

15
arch/cpu/cc26xx-cc13xx/Makefile.cc26xx-cc13xx → arch/cpu/cc26x0-cc13x0/Makefile.cc26x0-cc13x0
View File

@ -1,8 +1,8 @@
CPU_ABS_PATH = arch/cpu/cc26xx-cc13xx
CPU_ABS_PATH = arch/cpu/cc26x0-cc13x0
TI_XXWARE = $(CONTIKI_CPU)/$(TI_XXWARE_PATH)
ifeq (,$(wildcard $(TI_XXWARE)))
$(warning $(TI_XXWARE) does not exist.)
ifeq (,$(wildcard $(TI_XXWARE)/*))
$(warning $(TI_XXWARE) does not exist or is empty.)
$(warning Did you run 'git submodule update --init' ?)
$(error "")
endif
@ -24,7 +24,7 @@ CFLAGS += -I$(TI_XXWARE) -I$(CONTIKI)/$(TI_XXWARE_SRC)
CFLAGS += -I$(TI_XXWARE)/inc
MODULES += $(TI_XXWARE_SRC)
LDSCRIPT = $(CONTIKI_CPU)/cc26xx.ld
LDSCRIPT ?= $(CONTIKI_CPU)/cc26xx.ld
### If the user-specified a Node ID, pass a define
ifdef NODEID
@ -44,6 +44,7 @@ CONTIKI_CPU_SOURCEFILES += rf-core.c rf-ble.c ieee-mode.c
CONTIKI_CPU_SOURCEFILES += ble-cc2650.c ble-hal-cc26xx.c ble-addr.c rf-ble-cmd.c
CONTIKI_CPU_SOURCEFILES += random.c soc-trng.c int-master.c
CONTIKI_CPU_SOURCEFILES += spi-arch.c
CONTIKI_CPU_SOURCEFILES += cc26xx-aes.c
CONTIKI_SOURCEFILES += $(CONTIKI_CPU_SOURCEFILES)
@ -81,8 +82,10 @@ STACK_SIZE = 0
@$(SIZE) -A $< | egrep "data|bss" | awk '{s+=$$2} END {s=s+$(STACK_SIZE); f=$(RAM_SIZE)-s; printf "[RAM] used %6d, free %6d\n",s,f;}'
@$(SIZE) -A $< | egrep "text|isr_vector" | awk '{s+=$$2} END {f=$(FLASH_SIZE)-s; printf "[Flash] used %6d, free %6d\n",s,f;}'
include $(ARCH_PATH)/cpu/arm/cortex-m/cm3/Makefile.cm3
ifeq ($(BOARD_SUPPORTS_BSL),1)
%.upload: %.bin
%.upload: $(OUT_BIN)
ifeq ($(wildcard $(BSL)), )
@echo "ERROR: Could not find the cc2538-bsl script. Did you run 'git submodule update --init' ?"
else
@ -95,5 +98,3 @@ endif
### For the login etc targets
BAUDRATE = 115200
include $(CONTIKI)/arch/cpu/arm/cortex-m/cm3/Makefile.cm3

5
arch/cpu/cc26x0-cc13x0/Makefile.cc26x0r2f Normal file
View File

@ -0,0 +1,5 @@
TI_XXWARE_PATH = lib/cc2640r2-sdk
CFLAGS += -DCPU_FAMILY_CC26X0R2=1 -DCPU_FAMILY_CC26XXR2=1
include $(CONTIKI_CPU)/Makefile.cc26x0-cc13x0

0
arch/cpu/cc26xx-cc13xx/ble-addr.c → arch/cpu/cc26x0-cc13x0/ble-addr.c
View File

0
arch/cpu/cc26xx-cc13xx/ble-addr.h → arch/cpu/cc26x0-cc13x0/ble-addr.h
View File

0
arch/cpu/cc26xx-cc13xx/cc13x0-cc26x0-cm3.h → arch/cpu/cc26x0-cc13x0/cc13x0-cc26x0-cm3.h
View File

9
arch/cpu/cc26xx-cc13xx/cc13xx-cc26xx-conf.h → arch/cpu/cc26x0-cc13x0/cc13xx-cc26xx-conf.h
View File

@ -64,11 +64,11 @@
* project has specified otherwise. Depending on the final mode, determine a
* default channel (again, if unspecified) and configure RDC params
*/
#if CPU_FAMILY_CC13XX
#if CPU_FAMILY_CC13X0
#ifndef CC13XX_CONF_PROP_MODE
#define CC13XX_CONF_PROP_MODE 1
#endif /* CC13XX_CONF_PROP_MODE */
#endif /* CPU_FAMILY_CC13XX */
#endif /* CPU_FAMILY_CC13X0 */
#if CC13XX_CONF_PROP_MODE
#ifndef NETSTACK_CONF_RADIO
@ -102,6 +102,11 @@
#define NETSTACK_RADIO_MAX_PAYLOAD_LEN 125
/* Platform-specific (H/W) AES implementation */
#ifndef AES_128_CONF
#define AES_128_CONF cc26xx_aes_128_driver
#endif /* AES_128_CONF */
/** @} */
/*---------------------------------------------------------------------------*/
/**

42
arch/cpu/cc26xx-cc13xx/cc13xx-cc26xx-def.h → arch/cpu/cc26x0-cc13x0/cc13xx-cc26xx-def.h
View File

@ -36,12 +36,43 @@
/*---------------------------------------------------------------------------*/
/* TSCH related defines */
/* 2 bytes header, 4 bytes CRC */
#define CC13XX_RADIO_PHY_OVERHEAD 6
/* 3 bytes preamble, 3 bytes sync */
#define CC13XX_RADIO_PHY_HEADER_LEN 6
/* The default data rate is 50 kbps */
#define CC13XX_RADIO_BIT_RATE 50000
/* 1 len byte, 2 bytes CRC */
#define RADIO_PHY_OVERHEAD 3
/* 250kbps data rate. One byte = 32us */
#define RADIO_BYTE_AIR_TIME 32
#define CC26XX_RADIO_PHY_OVERHEAD 3
/* 4 bytes preamble, 1 byte sync */
#define CC26XX_RADIO_PHY_HEADER_LEN 5
/* The fixed data rate is 250 kbps */
#define CC26XX_RADIO_BIT_RATE 250000
#if CPU_FAMILY_CC13XX
#define RADIO_PHY_HEADER_LEN CC13XX_RADIO_PHY_HEADER_LEN
#define RADIO_PHY_OVERHEAD CC13XX_RADIO_PHY_OVERHEAD
#define RADIO_BIT_RATE CC13XX_RADIO_BIT_RATE
/* The TSCH default slot length of 10ms is too short, use custom one instead */
#ifndef TSCH_CONF_DEFAULT_TIMESLOT_TIMING
#define TSCH_CONF_DEFAULT_TIMESLOT_TIMING tsch_timing_cc13xx_50kbps
#endif /* TSCH_CONF_DEFAULT_TIMESLOT_TIMING */
/* Symbol for the custom TSCH timeslot timing template */
#define TSCH_CONF_ARCH_HDR_PATH "rf-core/cc13xx-50kbps-tsch.h"
#else
#define RADIO_PHY_HEADER_LEN CC26XX_RADIO_PHY_HEADER_LEN
#define RADIO_PHY_OVERHEAD CC26XX_RADIO_PHY_OVERHEAD
#define RADIO_BIT_RATE CC26XX_RADIO_BIT_RATE
#endif
#define RADIO_BYTE_AIR_TIME (1000000 / (RADIO_BIT_RATE / 8))
/* Delay between GO signal and SFD */
#define RADIO_DELAY_BEFORE_TX ((unsigned)US_TO_RTIMERTICKS(81))
#define RADIO_DELAY_BEFORE_TX ((unsigned)US_TO_RTIMERTICKS(RADIO_PHY_HEADER_LEN * RADIO_BYTE_AIR_TIME))
/* Delay between GO signal and start listening.
* This value is so small because the radio is constantly on within each timeslot. */
#define RADIO_DELAY_BEFORE_RX ((unsigned)US_TO_RTIMERTICKS(15))
@ -56,9 +87,6 @@
#define RADIO_TO_RTIMER(X) ((uint32_t)(((uint64_t)(X) * (RTIMER_SECOND / 256)) / (RADIO_TIMER_SECOND / 256)))
#define USEC_TO_RADIO(X) ((X) * 4)
/* The PHY header (preamble + SFD, 4+1 bytes) duration is equivalent to 10 symbols */
#define RADIO_IEEE_802154_PHY_HEADER_DURATION_USEC 160
/* Do not turn off TSCH within a timeslot: not enough time */
#define TSCH_CONF_RADIO_ON_DURING_TIMESLOT 1

2
arch/cpu/cc26xx-cc13xx/cc26xx.ld → arch/cpu/cc26x0-cc13x0/cc26xx.ld
View File

@ -96,6 +96,8 @@ SECTIONS
/* These symbols are used by the stack check library. */
_stack = .;
_stack_origin = ORIGIN(SRAM) + LENGTH(SRAM);
_heap = _stack;
_eheap = _stack_origin;
.ccfg :
{

2
arch/cpu/cc26xx-cc13xx/ccxxware-conf.h → arch/cpu/cc26x0-cc13x0/ccxxware-conf.h
View File

@ -36,7 +36,7 @@
* @{
*
* \file
* CCxxware-specific configuration for the cc26xx-cc13xx CPU family
* CCxxware-specific configuration for the cc26x0-cc13x0 CPU family
*/
#ifndef CCXXWARE_CONF_H_
#define CCXXWARE_CONF_H_

0
arch/cpu/cc26xx-cc13xx/clock.c → arch/cpu/cc26x0-cc13x0/clock.c
View File

0
arch/cpu/cc26xx-cc13xx/dbg.c → arch/cpu/cc26x0-cc13x0/dbg.c
View File

0
arch/cpu/cc26xx-cc13xx/dev/adc-sensor.c → arch/cpu/cc26x0-cc13x0/dev/adc-sensor.c
View File

0
arch/cpu/cc26xx-cc13xx/dev/adc-sensor.h → arch/cpu/cc26x0-cc13x0/dev/adc-sensor.h
View File

0
arch/cpu/cc26xx-cc13xx/dev/aux-ctrl.c → arch/cpu/cc26x0-cc13x0/dev/aux-ctrl.c
View File

0
arch/cpu/cc26xx-cc13xx/dev/aux-ctrl.h → arch/cpu/cc26x0-cc13x0/dev/aux-ctrl.h
View File

0
arch/cpu/cc26xx-cc13xx/dev/batmon-sensor.c → arch/cpu/cc26x0-cc13x0/dev/batmon-sensor.c
View File

0
arch/cpu/cc26xx-cc13xx/dev/batmon-sensor.h → arch/cpu/cc26x0-cc13x0/dev/batmon-sensor.h
View File

127
arch/cpu/cc26x0-cc13x0/dev/cc26xx-aes.c Executable file
View File

@ -0,0 +1,127 @@
/*
* Copyright (c) 2016, University of Bristol - http://www.bristol.ac.uk
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the Institute nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
/**
* \addtogroup cc26xx-aes
* @{
*
* \file
* Implementation of the AES driver for the CC26x0/CC13x0 SoC
* \author
* Atis Elsts <atis.elsts@gmail.com>
*/
#include "contiki.h"
#include "dev/cc26xx-aes.h"
#include "ti-lib.h"
/*---------------------------------------------------------------------------*/
#include "sys/log.h"
#define LOG_MODULE "cc26xx-aes"
#define LOG_LEVEL LOG_LEVEL_MAIN
/*---------------------------------------------------------------------------*/
static uint32_t skey[AES_128_KEY_LENGTH / sizeof(uint32_t)];
/*---------------------------------------------------------------------------*/
void
cc26xx_aes_set_key(const uint8_t *key)
{
memcpy(skey, key, AES_128_KEY_LENGTH);
}
/*---------------------------------------------------------------------------*/
static void
encrypt_decrypt(uint8_t *plaintext_and_result, bool do_encrypt)
{
uint32_t result[AES_128_BLOCK_SIZE / sizeof(uint32_t)];
unsigned status;
int i;
/* First, make sure the PERIPH PD is on */
ti_lib_prcm_power_domain_on(PRCM_DOMAIN_PERIPH);
while((ti_lib_prcm_power_domain_status(PRCM_DOMAIN_PERIPH)
!= PRCM_DOMAIN_POWER_ON));
/* Enable CRYPTO peripheral */
ti_lib_prcm_peripheral_run_enable(PRCM_PERIPH_CRYPTO);
ti_lib_prcm_load_set();
while(!ti_lib_prcm_load_get());
status = ti_lib_crypto_aes_load_key(skey, CRYPTO_KEY_AREA_0);
if(status != AES_SUCCESS) {
LOG_WARN("load key failed: %u\n", status);
} else {
status = ti_lib_crypto_aes_ecb((uint32_t *)plaintext_and_result, result, CRYPTO_KEY_AREA_0, do_encrypt, false);
if(status != AES_SUCCESS) {
LOG_WARN("ecb failed: %u\n", status);
} else {
for(i = 0; i < 100; ++i) {
ti_lib_cpu_delay(10);
status = ti_lib_crypto_aes_ecb_status();
if(status != AES_DMA_BSY) {
break;
}
}
ti_lib_crypto_aes_ecb_finish();
if(status != AES_SUCCESS) {
LOG_WARN("ecb get result failed: %u\n", status);
}
}
}
ti_lib_prcm_peripheral_run_disable(PRCM_PERIPH_CRYPTO);
ti_lib_prcm_load_set();
while(!ti_lib_prcm_load_get());
if(status == AES_SUCCESS) {
memcpy(plaintext_and_result, result, AES_128_BLOCK_SIZE);
} else {
/* corrupt the result */
plaintext_and_result[0] ^= 1;
}
}
/*---------------------------------------------------------------------------*/
void
cc26xx_aes_encrypt(uint8_t *plaintext_and_result)
{
encrypt_decrypt(plaintext_and_result, true);
}
/*---------------------------------------------------------------------------*/
void
cc26xx_aes_decrypt(uint8_t *cyphertext_and_result)
{
encrypt_decrypt(cyphertext_and_result, false);
}
/*---------------------------------------------------------------------------*/
const struct aes_128_driver cc26xx_aes_128_driver = {
cc26xx_aes_set_key,
cc26xx_aes_encrypt
};
/** @} */

80
arch/cpu/cc26x0-cc13x0/dev/cc26xx-aes.h Executable file
View File

@ -0,0 +1,80 @@
/*
* Copyright (c) 2016, University of Bristol - http://www.bristol.ac.uk
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the Institute nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
/**
* \addtogroup cc26xx
* @{
*
* \defgroup cc26xx-aes CC26x0/CC13x0 AES-128
*
* AES-128 driver for the CC26x0/CC13x0 SoC
* @{
*
* \file
* Header file of the AES-128 driver for the CC26xx SoC
* \author
* Atis Elsts <atis.elsts@gmail.com>
*/
#ifndef CC2538_AES_H_
#define CC2538_AES_H_
#include "lib/aes-128.h"
/**
* \brief Set a key to use in subsequent encryption & decryption operations.
* \param key The key to use
*
* The size of the key must be AES_128_KEY_LENGTH.
*/
void cc26xx_aes_set_key(const uint8_t *key);
/**
* \brief Encrypt a message using the SoC AES-128 hardware implementation
* \param plaintext_and_result In: message to encrypt, out: the encrypted message.
*
* The size of the message must be AES_128_BLOCK_SIZE.
* The key to use in the encryption must be set before calling this function.
*/
void cc26xx_aes_encrypt(uint8_t *plaintext_and_result);
/**
* \brief Decrypt a message using the SoC AES-128 hardware implementation
* \param cyphertext_and_result In: message to decrypt, out: the decrypted message.
*
* The size of the message must be AES_128_BLOCK_SIZE.
* The key to use in the decryption must be set before calling this function.
*/
void cc26xx_aes_decrypt(uint8_t *cyphertext_and_result);
extern const struct aes_128_driver cc26xx_aes_128_driver;
#endif /* CC2538_AES_H_ */
/**
* @}
* @}
*/

0
arch/cpu/cc26xx-cc13xx/dev/cc26xx-uart.c → arch/cpu/cc26x0-cc13x0/dev/cc26xx-uart.c
View File

0
arch/cpu/cc26xx-cc13xx/dev/cc26xx-uart.h → arch/cpu/cc26x0-cc13x0/dev/cc26xx-uart.h
View File

0
arch/cpu/cc26xx-cc13xx/dev/contiki-watchdog.c → arch/cpu/cc26x0-cc13x0/dev/contiki-watchdog.c
View File

11
arch/cpu/cc26xx-cc13xx/dev/gpio-hal-arch.c → arch/cpu/cc26x0-cc13x0/dev/gpio-hal-arch.c
View File

@ -39,7 +39,6 @@
/*---------------------------------------------------------------------------*/
#include "contiki.h"
#include "ti-lib.h"
#include "ti-lib-rom.h"
#include "dev/gpio-hal.h"
#include <stdint.h>
@ -53,11 +52,7 @@ gpio_hal_arch_pin_cfg_set(gpio_hal_pin_t pin, gpio_hal_pin_cfg_t cfg)
gpio_hal_pin_cfg_t tmp;
/* Clear settings that we are about to change, keep everything else */
#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
config = ti_lib_ioc_port_configure_get(pin);
#else
config = ti_lib_rom_ioc_port_configure_get(pin);
#endif
config &= ~CONFIG_MASK;
tmp = cfg & GPIO_HAL_PIN_CFG_EDGE_BOTH;
@ -87,7 +82,7 @@ gpio_hal_arch_pin_cfg_set(gpio_hal_pin_t pin, gpio_hal_pin_cfg_t cfg)
config |= IOC_INT_ENABLE;
}
ti_lib_rom_ioc_port_configure_set(pin, IOC_PORT_GPIO, config);
ti_lib_ioc_port_configure_set(pin, IOC_PORT_GPIO, config);
}
/*---------------------------------------------------------------------------*/
gpio_hal_pin_cfg_t
@ -98,11 +93,7 @@ gpio_hal_arch_pin_cfg_get(gpio_hal_pin_t pin)
uint32_t config;
cfg = 0;
#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
config = ti_lib_ioc_port_configure_get(pin);
#else
config = ti_lib_rom_ioc_port_configure_get(pin);
#endif
/* Pull */
tmp = config & IOC_IOPULL_M;

12
arch/cpu/cc26xx-cc13xx/dev/gpio-hal-arch.h → arch/cpu/cc26x0-cc13x0/dev/gpio-hal-arch.h
View File

@ -49,7 +49,6 @@
/*---------------------------------------------------------------------------*/
#include "contiki.h"
#include "ti-lib.h"
#include "ti-lib-rom.h"
#include <stdint.h>
/*---------------------------------------------------------------------------*/
@ -57,15 +56,10 @@
#define gpio_hal_arch_interrupt_enable(p) interrupt_enable(p)
#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
#define gpio_hal_arch_interrupt_disable(p) ti_lib_ioc_int_disable(p)
#define gpio_hal_arch_pin_set_input(p) ti_lib_ioc_pin_type_gpio_input(p)
#define gpio_hal_arch_pin_set_output(p) ti_lib_ioc_pin_type_gpio_output(p)
#else
#define gpio_hal_arch_interrupt_disable(p) ti_lib_rom_ioc_int_disable(p)
#define gpio_hal_arch_pin_set_input(p) ti_lib_rom_ioc_pin_type_gpio_input(p)
#define gpio_hal_arch_pin_set_output(p) ti_lib_rom_ioc_pin_type_gpio_output(p)
#endif
#define gpio_hal_arch_set_pin(p) ti_lib_gpio_set_dio(p)
#define gpio_hal_arch_clear_pin(p) ti_lib_gpio_clear_dio(p)
#define gpio_hal_arch_toggle_pin(p) ti_lib_gpio_toggle_dio(p)
@ -80,11 +74,7 @@ static inline void
interrupt_enable(gpio_hal_pin_t pin)
{
ti_lib_gpio_clear_event_dio(pin);
#ifndef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
ti_lib_rom_ioc_int_enable(pin);
#else
ti_lib_ioc_int_enable(pin);
#endif
}
/*---------------------------------------------------------------------------*/
#endif /* GPIO_HAL_ARCH_H_ */

0
arch/cpu/cc26xx-cc13xx/dev/gpio-interrupt.c → arch/cpu/cc26x0-cc13x0/dev/gpio-interrupt.c
View File

0
arch/cpu/cc26xx-cc13xx/dev/oscillators.c → arch/cpu/cc26x0-cc13x0/dev/oscillators.c
View File

0
arch/cpu/cc26xx-cc13xx/dev/oscillators.h → arch/cpu/cc26x0-cc13x0/dev/oscillators.h
View File

2
arch/cpu/cc26xx-cc13xx/dev/soc-rtc.c → arch/cpu/cc26x0-cc13x0/dev/soc-rtc.c
View File

@ -99,7 +99,7 @@ soc_rtc_init(void)
ti_lib_aon_rtc_channel_enable(AON_RTC_CH1);
ti_lib_aon_rtc_enable();
ti_lib_rom_int_enable(INT_AON_RTC_COMB);
ti_lib_int_enable(INT_AON_RTC_COMB);
/* Re-enable interrupts */
if(!interrupts_disabled) {

0
arch/cpu/cc26xx-cc13xx/dev/soc-rtc.h → arch/cpu/cc26x0-cc13x0/dev/soc-rtc.h
View File

18
arch/cpu/cc26xx-cc13xx/dev/soc-trng.c → arch/cpu/cc26x0-cc13x0/dev/soc-trng.c
View File

@ -71,7 +71,7 @@ static void
disable_number_ready_interrupt(void)
{
ti_lib_trng_int_disable(TRNG_NUMBER_READY);
ti_lib_rom_int_disable(INT_TRNG_IRQ);
ti_lib_int_disable(INT_TRNG_IRQ);
}
/*---------------------------------------------------------------------------*/
static void
@ -79,14 +79,14 @@ enable_number_ready_interrupt(void)
{
ti_lib_trng_int_clear(TRNG_NUMBER_READY);
ti_lib_trng_int_enable(TRNG_NUMBER_READY);
ti_lib_rom_int_enable(INT_TRNG_IRQ);
ti_lib_int_enable(INT_TRNG_IRQ);
}
/*---------------------------------------------------------------------------*/
static bool
accessible(void)
{
/* First, check the PD */
if(ti_lib_rom_prcm_power_domain_status(PRCM_DOMAIN_PERIPH)
if(ti_lib_prcm_power_domain_status(PRCM_DOMAIN_PERIPH)
!= PRCM_DOMAIN_POWER_ON) {
return false;
}
@ -104,12 +104,12 @@ static void
power_up(void)
{
/* First, make sure the PERIPH PD is on */
ti_lib_rom_prcm_power_domain_on(PRCM_DOMAIN_PERIPH);
while((ti_lib_rom_prcm_power_domain_status(PRCM_DOMAIN_PERIPH)
ti_lib_prcm_power_domain_on(PRCM_DOMAIN_PERIPH);
while((ti_lib_prcm_power_domain_status(PRCM_DOMAIN_PERIPH)
!= PRCM_DOMAIN_POWER_ON));
/* Enable clock in active mode */
ti_lib_rom_prcm_peripheral_run_enable(PRCM_PERIPH_TRNG);
ti_lib_prcm_peripheral_run_enable(PRCM_PERIPH_TRNG);
ti_lib_prcm_load_set();
while(!ti_lib_prcm_load_get());
}
@ -136,7 +136,7 @@ static uint64_t
read_number(void)
{
uint64_t ran = (uint64_t)HWREG(TRNG_BASE + TRNG_O_OUT1) << 32;
ran += ti_lib_rom_trng_number_get(TRNG_LOW_WORD);
ran += ti_lib_trng_number_get(TRNG_LOW_WORD);
return ran;
}
@ -237,7 +237,7 @@ soc_trng_rand_asynchronous(uint32_t samples, soc_trng_callback_t cb)
ti_lib_trng_int_clear(TRNG_NUMBER_READY);
/* Enable clock in sleep mode and register with LPM */
ti_lib_rom_prcm_peripheral_sleep_enable(PRCM_PERIPH_TRNG);
ti_lib_prcm_peripheral_sleep_enable(PRCM_PERIPH_TRNG);
ti_lib_prcm_load_set();
while(!ti_lib_prcm_load_get());
@ -271,7 +271,7 @@ PROCESS_THREAD(soc_trng_process, ev, data)
}
/* Disable clock in sleep mode */
ti_lib_rom_prcm_peripheral_sleep_disable(PRCM_PERIPH_TRNG);
ti_lib_prcm_peripheral_sleep_disable(PRCM_PERIPH_TRNG);
ti_lib_prcm_load_set();
while(!ti_lib_prcm_load_get());

0
arch/cpu/cc26xx-cc13xx/dev/soc-trng.h → arch/cpu/cc26x0-cc13x0/dev/soc-trng.h
View File

50
arch/cpu/cc26xx-cc13xx/dev/spi-arch.c → arch/cpu/cc26x0-cc13x0/dev/spi-arch.c
View File

@ -123,7 +123,7 @@ spi_arch_lock_and_open(const spi_device_t *dev)
!= PRCM_DOMAIN_POWER_ON)) ;
/* Enable clock in active mode */
ti_lib_rom_prcm_peripheral_run_enable(spi_controller[dev->spi_controller].prcm_periph);
ti_lib_prcm_peripheral_run_enable(spi_controller[dev->spi_controller].prcm_periph);
ti_lib_prcm_load_set();
while(!ti_lib_prcm_load_get()) ;
@ -131,17 +131,14 @@ spi_arch_lock_and_open(const spi_device_t *dev)
ti_lib_ssi_int_disable(spi_controller[dev->spi_controller].ssi_base, SSI_RXOR | SSI_RXFF | SSI_RXTO | SSI_TXFF);
ti_lib_ssi_int_clear(spi_controller[dev->spi_controller].ssi_base, SSI_RXOR | SSI_RXTO);
#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
ti_lib_ssi_config_set_exp_clk(spi_controller[dev->spi_controller].ssi_base, ti_lib_sys_ctrl_clock_get(),
get_mode(dev), SSI_MODE_MASTER, dev->spi_bit_rate, 8);
ti_lib_ioc_pin_type_ssi_master(spi_controller[dev->spi_controller].ssi_base, dev->pin_spi_miso,
dev->pin_spi_mosi, IOID_UNUSED, dev->pin_spi_sck);
#else
ti_lib_rom_ssi_config_set_exp_clk(spi_controller[dev->spi_controller].ssi_base, ti_lib_sys_ctrl_clock_get(),
get_mode(dev), SSI_MODE_MASTER, dev->spi_bit_rate, 8);
ti_lib_rom_ioc_pin_type_ssi_master(spi_controller[dev->spi_controller].ssi_base, dev->pin_spi_miso,
dev->pin_spi_mosi, IOID_UNUSED, dev->pin_spi_sck);
#endif
ti_lib_ssi_config_set_exp_clk(spi_controller[dev->spi_controller].ssi_base,
ti_lib_sys_ctrl_clock_get(),
get_mode(dev), SSI_MODE_MASTER,
dev->spi_bit_rate, 8);
ti_lib_ioc_pin_type_ssi_master(spi_controller[dev->spi_controller].ssi_base,
dev->pin_spi_miso,
dev->pin_spi_mosi, IOID_UNUSED,
dev->pin_spi_sck);
ti_lib_ssi_enable(spi_controller[dev->spi_controller].ssi_base);
@ -159,7 +156,7 @@ spi_arch_close_and_unlock(const spi_device_t *dev)
}
/* Power down SSI */
ti_lib_rom_prcm_peripheral_run_disable(spi_controller[dev->spi_controller].prcm_periph);
ti_lib_prcm_peripheral_run_disable(spi_controller[dev->spi_controller].prcm_periph);
ti_lib_prcm_load_set();
while(!ti_lib_prcm_load_get()) ;
@ -213,39 +210,12 @@ spi_arch_transfer(const spi_device_t *dev,
for(i = 0; i < totlen; i++) {
c = i < wlen ? write_buf[i] : 0;
ti_lib_ssi_data_put(spi_controller[dev->spi_controller].ssi_base, (uint8_t)c);
#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
ti_lib_ssi_data_get(spi_controller[dev->spi_controller].ssi_base, &c);
#else
ti_lib_rom_ssi_data_get(spi_controller[dev->spi_controller].ssi_base, &c);
#endif
if(i < rlen) {
inbuf[i] = (uint8_t)c;
}
}
#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
while(ti_lib_ssi_data_get_non_blocking(spi_controller[dev->spi_controller].ssi_base, &c)) ;
#else
while(ti_lib_rom_ssi_data_get_non_blocking(spi_controller[dev->spi_controller].ssi_base, &c)) ;
#endif
return SPI_DEV_STATUS_OK;
}
/*---------------------------------------------------------------------------*/
spi_status_t
spi_arch_select(const spi_device_t *dev)
{
if(!spi_arch_has_lock(dev)) {
return SPI_DEV_STATUS_BUS_NOT_OWNED;
}
ti_lib_gpio_clear_dio(dev->pin_spi_cs);
return SPI_DEV_STATUS_OK;
}
spi_status_t
spi_arch_deselect(const spi_device_t *dev)
{
ti_lib_gpio_set_dio(dev->pin_spi_cs);
return SPI_DEV_STATUS_OK;
}

0
arch/cpu/cc26xx-cc13xx/doxygen-group.txt → arch/cpu/cc26x0-cc13x0/doxygen-group.txt
View File

0
arch/cpu/cc26xx-cc13xx/fault-handlers.c → arch/cpu/cc26x0-cc13x0/fault-handlers.c
View File

0
arch/cpu/cc26xx-cc13xx/ieee-addr.c → arch/cpu/cc26x0-cc13x0/ieee-addr.c
View File

0
arch/cpu/cc26xx-cc13xx/ieee-addr.h → arch/cpu/cc26x0-cc13x0/ieee-addr.h
View File

0
arch/cpu/cc26xx-cc13xx/int-master.c → arch/cpu/cc26x0-cc13x0/int-master.c
View File

0
arch/cpu/cc26xx-cc13xx/lib/cc13xxware → arch/cpu/cc26x0-cc13x0/lib/cc13xxware
View File

0
arch/cpu/cc26xx-cc13xx/lib/cc2640r2-sdk → arch/cpu/cc26x0-cc13x0/lib/cc2640r2-sdk
View File

0
arch/cpu/cc26xx-cc13xx/lib/cc26xxware → arch/cpu/cc26x0-cc13x0/lib/cc26xxware
View File

11
arch/cpu/cc26xx-cc13xx/lpm.c → arch/cpu/cc26x0-cc13x0/lpm.c
View File

@ -162,10 +162,10 @@ lpm_shutdown(uint32_t wakeup_pin, uint32_t io_pull, uint32_t wake_on)
ti_lib_aon_wuc_mcu_power_off_config(MCU_VIRT_PWOFF_DISABLE);
/* Latch the IOs in the padring and enable I/O pad sleep mode */
#if !defined(ThisLibraryIsFor_CC26x0R2_HaltIfViolated)
ti_lib_pwr_ctrl_io_freeze_enable();
ti_lib_aon_ioc_freeze_enable();
HWREG(AON_SYSCTL_BASE + AON_SYSCTL_O_SLEEPCTL) = 0;
ti_lib_sys_ctrl_aon_sync();
#endif
/* Turn off VIMS cache, CRAM and TRAM - possibly not required */
ti_lib_prcm_cache_retention_disable();
ti_lib_vims_mode_set(VIMS_BASE, VIMS_MODE_OFF);
@ -193,12 +193,7 @@ wake_up(void)
ti_lib_sys_ctrl_aon_sync();
/* Adjust recharge settings */
#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
// May need to change to XOSC_IN_LOW_POWER_MODE
ti_lib_sys_ctrl_adjust_recharge_after_power_down(XOSC_IN_HIGH_POWER_MODE);
#else
ti_lib_sys_ctrl_adjust_recharge_after_power_down();
#endif
/*
* Release the request to the uLDO

0
arch/cpu/cc26xx-cc13xx/lpm.h → arch/cpu/cc26x0-cc13x0/lpm.h
View File

0
arch/cpu/cc26xx-cc13xx/random.c → arch/cpu/cc26x0-cc13x0/random.c
View File

0
arch/cpu/cc26xx-cc13xx/rf-core/api/ieee_cmd.h → arch/cpu/cc26x0-cc13x0/rf-core/api/ieee_cmd.h
View File

0
arch/cpu/cc26xx-cc13xx/rf-core/api/ieee_mailbox.h → arch/cpu/cc26x0-cc13x0/rf-core/api/ieee_mailbox.h
View File

0
arch/cpu/cc26xx-cc13xx/rf-core/ble-cc2650.c → arch/cpu/cc26x0-cc13x0/rf-core/ble-cc2650.c
View File

2
arch/cpu/cc26xx-cc13xx/rf-core/ble-hal/ble-hal-cc26xx.c → arch/cpu/cc26x0-cc13x0/rf-core/ble-hal/ble-hal-cc26xx.c
View File

@ -386,7 +386,7 @@ on(void)
rf_core_power_down();
return RF_CORE_CMD_ERROR;
}
rf_core_setup_interrupts(0);
rf_core_setup_interrupts();
oscillators_switch_to_hf_xosc();
if(rf_ble_cmd_setup_ble_mode() != RF_BLE_CMD_OK) {

0
arch/cpu/cc26xx-cc13xx/rf-core/ble-hal/ble-hal-cc26xx.h → arch/cpu/cc26x0-cc13x0/rf-core/ble-hal/ble-hal-cc26xx.h
View File

0
arch/cpu/cc26xx-cc13xx/rf-core/ble-hal/rf-ble-cmd.c → arch/cpu/cc26x0-cc13x0/rf-core/ble-hal/rf-ble-cmd.c
View File

0
arch/cpu/cc26xx-cc13xx/rf-core/ble-hal/rf-ble-cmd.h → arch/cpu/cc26x0-cc13x0/rf-core/ble-hal/rf-ble-cmd.h
View File

73
arch/cpu/cc26x0-cc13x0/rf-core/cc13xx-50kbps-tsch.c Normal file
View File

@ -0,0 +1,73 @@
/*
* Copyright (c) 2018, University of Bristol - http://www.bristol.ac.uk/
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the Institute nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* This file is part of the Contiki operating system.
*
*/
/**
* \file
* IEEE 802.15.4 TSCH timeslot timings for CC13xx chips at 50kbps datarate
* \author
* Atis Elsts <atis.elsts@bristol.ac.uk>
*
*/
#include "contiki.h"
#include "net/mac/tsch/tsch.h"
#define CC13XX_TSCH_DEFAULT_TS_CCA_OFFSET 1800
#define CC13XX_TSCH_DEFAULT_TS_CCA 128
#define CC13XX_TSCH_DEFAULT_TS_TX_OFFSET 2500
#define CC13XX_TSCH_DEFAULT_TS_RX_OFFSET (CC13XX_TSCH_DEFAULT_TS_TX_OFFSET - (TSCH_CONF_RX_WAIT / 2))
#define CC13XX_TSCH_DEFAULT_TS_RX_ACK_DELAY 2000
#define CC13XX_TSCH_DEFAULT_TS_TX_ACK_DELAY 3000
#define CC13XX_TSCH_DEFAULT_TS_RX_WAIT TSCH_CONF_RX_WAIT
#define CC13XX_TSCH_DEFAULT_TS_ACK_WAIT 3000
#define CC13XX_TSCH_DEFAULT_TS_RX_TX 192
#define CC13XX_TSCH_DEFAULT_TS_MAX_ACK 10000
#define CC13XX_TSCH_DEFAULT_TS_MAX_TX 21600
/* Timeslot length: 40000 usec */
#define CC13XX_TSCH_DEFAULT_TS_TIMESLOT_LENGTH 40000
/* TSCH timeslot timing (microseconds) */
const uint16_t tsch_timing_cc13xx_50kbps[tsch_ts_elements_count] = {
CC13XX_TSCH_DEFAULT_TS_CCA_OFFSET,
CC13XX_TSCH_DEFAULT_TS_CCA,
CC13XX_TSCH_DEFAULT_TS_TX_OFFSET,
CC13XX_TSCH_DEFAULT_TS_RX_OFFSET,
CC13XX_TSCH_DEFAULT_TS_RX_ACK_DELAY,
CC13XX_TSCH_DEFAULT_TS_TX_ACK_DELAY,
CC13XX_TSCH_DEFAULT_TS_RX_WAIT,
CC13XX_TSCH_DEFAULT_TS_ACK_WAIT,
CC13XX_TSCH_DEFAULT_TS_RX_TX,
CC13XX_TSCH_DEFAULT_TS_MAX_ACK,
CC13XX_TSCH_DEFAULT_TS_MAX_TX,
CC13XX_TSCH_DEFAULT_TS_TIMESLOT_LENGTH,
};

41
arch/cpu/cc26x0-cc13x0/rf-core/cc13xx-50kbps-tsch.h Normal file
View File

@ -0,0 +1,41 @@
/*
* Copyright (c) 2018, University of Bristol - http://www.bristol.ac.uk/
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the Institute nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* This file is part of the Contiki operating system.
*
*/
#ifndef CC13XX_50KBPS_TSCH_H_
#define CC13XX_50KBPS_TSCH_H_
#include "contiki.h"
/* TSCH timeslot timing (microseconds) */
extern const uint16_t tsch_timing_cc13xx_50kbps[];
#endif /* CC13XX_50KBPS_TSCH_H_ */

0
arch/cpu/cc26xx-cc13xx/rf-core/dot-15-4g.h → arch/cpu/cc26x0-cc13x0/rf-core/dot-15-4g.h
View File

334
arch/cpu/cc26xx-cc13xx/rf-core/ieee-mode.c → arch/cpu/cc26x0-cc13x0/rf-core/ieee-mode.c
View File

@ -120,6 +120,8 @@ static uint8_t rf_stats[16] = { 0 };
/* The size of the RF commands buffer */
#define RF_CMD_BUFFER_SIZE 128
/*---------------------------------------------------------------------------*/
#define RAT_TIMESTAMP_OFFSET_2_4_GHZ 0
/*---------------------------------------------------------------------------*/
/**
* \brief Returns the current status of a running Radio Op command
* \param a A pointer with the buffer used to initiate the command
@ -130,55 +132,9 @@ static uint8_t rf_stats[16] = { 0 };
*/
#define RF_RADIO_OP_GET_STATUS(a) (((rfc_radioOp_t *)a)->status)
/*---------------------------------------------------------------------------*/
/* Special value returned by CMD_IEEE_CCA_REQ when an RSSI is not available */
#define RF_CMD_CCA_REQ_RSSI_UNKNOWN -128
/* Used for the return value of channel_clear */
#define RF_CCA_CLEAR 1
#define RF_CCA_BUSY 0
/* Used as an error return value for get_cca_info */
#define RF_GET_CCA_INFO_ERROR 0xFF
/*
* Values of the individual bits of the ccaInfo field in CMD_IEEE_CCA_REQ's
* status struct
*/
#define RF_CMD_CCA_REQ_CCA_STATE_IDLE 0 /* 00 */
#define RF_CMD_CCA_REQ_CCA_STATE_BUSY 1 /* 01 */
#define RF_CMD_CCA_REQ_CCA_STATE_INVALID 2 /* 10 */
#define RF_CMD_CCA_REQ_CCA_CORR_IDLE (0 << 4)
#define RF_CMD_CCA_REQ_CCA_CORR_BUSY (1 << 4)
#define RF_CMD_CCA_REQ_CCA_CORR_INVALID (3 << 4)
#define RF_CMD_CCA_REQ_CCA_CORR_MASK (3 << 4)
#define RF_CMD_CCA_REQ_CCA_SYNC_BUSY (1 << 6)
/*---------------------------------------------------------------------------*/
#define IEEE_MODE_CHANNEL_MIN 11
#define IEEE_MODE_CHANNEL_MAX 26
/*---------------------------------------------------------------------------*/
/* How long to wait for an ongoing ACK TX to finish before starting frame TX */
#define TX_WAIT_TIMEOUT (RTIMER_SECOND >> 11)
/* How long to wait for the RF to enter RX in rf_cmd_ieee_rx */
#define ENTER_RX_WAIT_TIMEOUT (RTIMER_SECOND >> 10)
/* How long to wait for the RF to react on CMD_ABORT: around 1 msec */
#define RF_TURN_OFF_WAIT_TIMEOUT (RTIMER_SECOND >> 10)
/* How long to wait for the RF to finish TX of a packet or an ACK */
#define TX_FINISH_WAIT_TIMEOUT (RTIMER_SECOND >> 7)
#define LIMITED_BUSYWAIT(cond, timeout) do { \
rtimer_clock_t end_time = RTIMER_NOW() + timeout; \
while(cond) { \
if(!RTIMER_CLOCK_LT(RTIMER_NOW(), end_time)) { \
break; \
} \
} \
} while(0)
/*---------------------------------------------------------------------------*/
/* TX Power dBm lookup table - values from SmartRF Studio */
typedef struct output_config {
radio_value_t dbm;
@ -211,33 +167,6 @@ static const output_config_t output_power[] = {
/* Default TX Power - position in output_power[] */
static const output_config_t *tx_power_current = &output_power[0];
/*---------------------------------------------------------------------------*/
static volatile int8_t last_rssi = 0;
static volatile uint8_t last_corr_lqi = 0;
extern int32_t rat_offset;
/*---------------------------------------------------------------------------*/
/* SFD timestamp in RTIMER ticks */
static volatile uint32_t last_packet_timestamp = 0;
/* SFD timestamp in RAT ticks (but 64 bits) */
static uint64_t last_rat_timestamp64 = 0;
/* For RAT overflow handling */
static struct ctimer rat_overflow_timer;
static volatile uint32_t rat_overflow_counter = 0;
static rtimer_clock_t last_rat_overflow = 0;
/* RAT has 32-bit register, overflows once 18 minutes */
#define RAT_RANGE 4294967296ull
/* approximate value */
#define RAT_OVERFLOW_PERIOD_SECONDS (60 * 18)
/* XXX: don't know what exactly is this, looks like the time to Tx 3 octets */
#define TIMESTAMP_OFFSET -(USEC_TO_RADIO(32 * 3) - 1) /* -95.75 usec */
/*---------------------------------------------------------------------------*/
/* Are we currently in poll mode? */
static uint8_t poll_mode = 0;
static rfc_CMD_IEEE_MOD_FILT_t filter_cmd;
/*---------------------------------------------------------------------------*/
/*
@ -256,27 +185,28 @@ static uint8_t cmd_ieee_rx_buf[RF_CMD_BUFFER_SIZE] CC_ALIGN(4);
#define DATA_ENTRY_LENSZ_BYTE 1
#define DATA_ENTRY_LENSZ_WORD 2 /* 2 bytes */
#define RX_BUF_SIZE 144
/* Four receive buffers entries with room for 1 IEEE802.15.4 frame in each */
static uint8_t rx_buf_0[RX_BUF_SIZE] CC_ALIGN(4);
static uint8_t rx_buf_1[RX_BUF_SIZE] CC_ALIGN(4);
static uint8_t rx_buf_2[RX_BUF_SIZE] CC_ALIGN(4);
static uint8_t rx_buf_3[RX_BUF_SIZE] CC_ALIGN(4);
#define RX_BUF_INCLUDE_CRC 1
#define RX_BUF_INCLUDE_RSSI 1
#define RX_BUF_INCLUDE_CORR 1
#define RX_BUF_INCLUDE_TIMESTAMP 1
/* The size of the metadata (excluding the packet length field) */
#define RX_BUF_METADATA_SIZE \
(2 * RX_BUF_INCLUDE_CRC + RX_BUF_INCLUDE_RSSI + RX_BUF_INCLUDE_CORR + 4 * RX_BUF_INCLUDE_TIMESTAMP)
(2 * RF_CORE_RX_BUF_INCLUDE_CRC \
+ RF_CORE_RX_BUF_INCLUDE_RSSI \
+ RF_CORE_RX_BUF_INCLUDE_CORR \
+ 4 * RF_CORE_RX_BUF_INCLUDE_TIMESTAMP)
/* The offset of the packet length in a rx buffer */
#define RX_BUF_LENGTH_OFFSET sizeof(rfc_dataEntry_t)
/* The offset of the packet data in a rx buffer */
#define RX_BUF_DATA_OFFSET (RX_BUF_LENGTH_OFFSET + 1)
#define RX_BUF_SIZE (RX_BUF_DATA_OFFSET \
+ NETSTACK_RADIO_MAX_PAYLOAD_LEN \
+ RX_BUF_METADATA_SIZE)
/* Four receive buffers entries with room for 1 IEEE802.15.4 frame in each */
static uint8_t rx_buf_0[RX_BUF_SIZE] CC_ALIGN(4);
static uint8_t rx_buf_1[RX_BUF_SIZE] CC_ALIGN(4);
static uint8_t rx_buf_2[RX_BUF_SIZE] CC_ALIGN(4);
static uint8_t rx_buf_3[RX_BUF_SIZE] CC_ALIGN(4);
/* The RX Data Queue */
static dataQueue_t rx_data_queue = { 0 };
@ -358,8 +288,8 @@ transmitting(void)
return 0;
}
if((cmd.currentRssi == RF_CMD_CCA_REQ_RSSI_UNKNOWN) &&
(cmd.ccaInfo.ccaEnergy == RF_CMD_CCA_REQ_CCA_STATE_BUSY)) {
if((cmd.currentRssi == RF_CORE_CMD_CCA_REQ_RSSI_UNKNOWN) &&
(cmd.ccaInfo.ccaEnergy == RF_CORE_CMD_CCA_REQ_CCA_STATE_BUSY)) {
return 1;
}
@ -368,12 +298,12 @@ transmitting(void)
/*---------------------------------------------------------------------------*/
/**
* \brief Returns CCA information
* \return RF_GET_CCA_INFO_ERROR if the RF was not on
* \return RF_CORE_GET_CCA_INFO_ERROR if the RF was not on
* \return On success, the return value is formatted as per the ccaInfo field
* of CMD_IEEE_CCA_REQ
*
* It is the caller's responsibility to make sure the RF is on. This function
* will return RF_GET_CCA_INFO_ERROR if the RF is off
* will return RF_CORE_GET_CCA_INFO_ERROR if the RF is off
*
* This function will in fact wait for a valid CCA state
*/
@ -385,20 +315,20 @@ get_cca_info(void)
if(!rf_is_on()) {
PRINTF("get_cca_info: Not on\n");
return RF_GET_CCA_INFO_ERROR;
return RF_CORE_GET_CCA_INFO_ERROR;
}
memset(&cmd, 0x00, sizeof(cmd));
cmd.ccaInfo.ccaState = RF_CMD_CCA_REQ_CCA_STATE_INVALID;
cmd.ccaInfo.ccaState = RF_CORE_CMD_CCA_REQ_CCA_STATE_INVALID;
while(cmd.ccaInfo.ccaState == RF_CMD_CCA_REQ_CCA_STATE_INVALID) {
while(cmd.ccaInfo.ccaState == RF_CORE_CMD_CCA_REQ_CCA_STATE_INVALID) {
memset(&cmd, 0x00, sizeof(cmd));
cmd.commandNo = CMD_IEEE_CCA_REQ;
if(rf_core_send_cmd((uint32_t)&cmd, &cmd_status) == RF_CORE_CMD_ERROR) {
PRINTF("get_cca_info: CMDSTA=0x%08lx\n", cmd_status);
return RF_GET_CCA_INFO_ERROR;
return RF_CORE_GET_CCA_INFO_ERROR;
}
}
@ -425,14 +355,14 @@ get_rssi(void)
was_off = 1;
if(on() != RF_CORE_CMD_OK) {
PRINTF("get_rssi: on() failed\n");
return RF_CMD_CCA_REQ_RSSI_UNKNOWN;
return RF_CORE_CMD_CCA_REQ_RSSI_UNKNOWN;
}
}
memset(&cmd, 0x00, sizeof(cmd));
cmd.ccaInfo.ccaEnergy = RF_CMD_CCA_REQ_CCA_STATE_INVALID;
cmd.ccaInfo.ccaEnergy = RF_CORE_CMD_CCA_REQ_CCA_STATE_INVALID;
while(cmd.ccaInfo.ccaEnergy == RF_CMD_CCA_REQ_CCA_STATE_INVALID) {
while(cmd.ccaInfo.ccaEnergy == RF_CORE_CMD_CCA_REQ_CCA_STATE_INVALID) {
memset(&cmd, 0x00, sizeof(cmd));
cmd.commandNo = CMD_IEEE_CCA_REQ;
@ -440,7 +370,7 @@ get_rssi(void)
PRINTF("get_rssi: CMDSTA=0x%08lx\n", cmd_status);
/* Make sure to return RSSI unknown */
cmd.currentRssi = RF_CMD_CCA_REQ_RSSI_UNKNOWN;
cmd.currentRssi = RF_CORE_CMD_CCA_REQ_RSSI_UNKNOWN;
break;
}
}
@ -558,8 +488,8 @@ rf_cmd_ieee_rx()
return RF_CORE_CMD_ERROR;
}
LIMITED_BUSYWAIT(RF_RADIO_OP_GET_STATUS(cmd_ieee_rx_buf) != RF_CORE_RADIO_OP_STATUS_ACTIVE,
ENTER_RX_WAIT_TIMEOUT);
RTIMER_BUSYWAIT_UNTIL(RF_RADIO_OP_GET_STATUS(cmd_ieee_rx_buf) == RF_CORE_RADIO_OP_STATUS_ACTIVE,
RF_CORE_ENTER_RX_TIMEOUT);
/* Wait to enter RX */
if(RF_RADIO_OP_GET_STATUS(cmd_ieee_rx_buf) != RF_CORE_RADIO_OP_STATUS_ACTIVE) {
@ -615,11 +545,11 @@ init_rf_params(void)
cmd->rxConfig.bAutoFlushCrc = 1;
cmd->rxConfig.bAutoFlushIgn = 0;
cmd->rxConfig.bIncludePhyHdr = 0;
cmd->rxConfig.bIncludeCrc = RX_BUF_INCLUDE_CRC;
cmd->rxConfig.bAppendRssi = RX_BUF_INCLUDE_RSSI;
cmd->rxConfig.bAppendCorrCrc = RX_BUF_INCLUDE_CORR;
cmd->rxConfig.bIncludeCrc = RF_CORE_RX_BUF_INCLUDE_CRC;
cmd->rxConfig.bAppendRssi = RF_CORE_RX_BUF_INCLUDE_RSSI;
cmd->rxConfig.bAppendCorrCrc = RF_CORE_RX_BUF_INCLUDE_CORR;
cmd->rxConfig.bAppendSrcInd = 0;
cmd->rxConfig.bAppendTimestamp = RX_BUF_INCLUDE_TIMESTAMP;
cmd->rxConfig.bAppendTimestamp = RF_CORE_RX_BUF_INCLUDE_TIMESTAMP;
cmd->pRxQ = &rx_data_queue;
cmd->pOutput = (rfc_ieeeRxOutput_t *)rf_stats;
@ -714,7 +644,7 @@ rx_off(void)
}
/* Wait for ongoing ACK TX to finish */
LIMITED_BUSYWAIT(transmitting(), TX_FINISH_WAIT_TIMEOUT);
RTIMER_BUSYWAIT_UNTIL(!transmitting(), RF_CORE_TX_FINISH_TIMEOUT);
/* Send a CMD_ABORT command to RF Core */
if(rf_core_send_cmd(CMDR_DIR_CMD(CMD_ABORT), &cmd_status) != RF_CORE_CMD_OK) {
@ -722,7 +652,7 @@ rx_off(void)
/* Continue nonetheless */
}
LIMITED_BUSYWAIT(rf_is_on(), RF_TURN_OFF_WAIT_TIMEOUT);
RTIMER_BUSYWAIT_UNTIL(!rf_is_on(), RF_CORE_TURN_OFF_TIMEOUT);
if(RF_RADIO_OP_GET_STATUS(cmd_ieee_rx_buf) == IEEE_DONE_STOPPED ||
RF_RADIO_OP_GET_STATUS(cmd_ieee_rx_buf) == IEEE_DONE_ABORT) {
@ -773,8 +703,8 @@ soft_off(void)
return;
}
LIMITED_BUSYWAIT((cmd->status & RF_CORE_RADIO_OP_MASKED_STATUS) ==
RF_CORE_RADIO_OP_MASKED_STATUS_RUNNING, RF_TURN_OFF_WAIT_TIMEOUT);
RTIMER_BUSYWAIT_UNTIL((cmd->status & RF_CORE_RADIO_OP_MASKED_STATUS) !=
RF_CORE_RADIO_OP_MASKED_STATUS_RUNNING, RF_CORE_TURN_OFF_TIMEOUT);
}
/*---------------------------------------------------------------------------*/
static uint8_t
@ -791,71 +721,10 @@ soft_on(void)
static const rf_core_primary_mode_t mode_ieee = {
soft_off,
soft_on,
rf_is_on,
RAT_TIMESTAMP_OFFSET_2_4_GHZ
};
/*---------------------------------------------------------------------------*/
static uint8_t
check_rat_overflow(bool first_time)
{
static uint32_t last_value;
uint32_t current_value;
uint8_t interrupts_disabled;
/* Bail out if the RF is not on */
if(!rf_is_on()) {
return 0;
}
interrupts_disabled = ti_lib_int_master_disable();
if(first_time) {
last_value = HWREG(RFC_RAT_BASE + RATCNT);
} else {
current_value = HWREG(RFC_RAT_BASE + RATCNT);
if(current_value + RAT_RANGE / 4 < last_value) {
/* Overflow detected */
last_rat_overflow = RTIMER_NOW();
rat_overflow_counter++;
}
last_value = current_value;
}
if(!interrupts_disabled) {
ti_lib_int_master_enable();
}
return 1;
}
/*---------------------------------------------------------------------------*/
static void
handle_rat_overflow(void *unused)
{
uint8_t success;
uint8_t was_off = 0;
if(!rf_is_on()) {
was_off = 1;
if(on() != RF_CORE_CMD_OK) {
PRINTF("overflow: on() failed\n");
ctimer_set(&rat_overflow_timer, CLOCK_SECOND,
handle_rat_overflow, NULL);
return;
}
}
success = check_rat_overflow(false);
if(was_off) {
off();
}
if(success) {
/* Retry after half of the interval */
ctimer_set(&rat_overflow_timer, RAT_OVERFLOW_PERIOD_SECONDS * CLOCK_SECOND / 2,
handle_rat_overflow, NULL);
} else {
/* Retry sooner */
ctimer_set(&rat_overflow_timer, CLOCK_SECOND,
handle_rat_overflow, NULL);
}
}
/*---------------------------------------------------------------------------*/
static int
init(void)
{
@ -889,9 +758,7 @@ init(void)
rf_core_primary_mode_register(&mode_ieee);
check_rat_overflow(true);
ctimer_set(&rat_overflow_timer, RAT_OVERFLOW_PERIOD_SECONDS * CLOCK_SECOND / 2,
handle_rat_overflow, NULL);
rf_core_rat_init();
process_start(&rf_core_process, NULL);
return 1;
@ -935,7 +802,7 @@ transmit(unsigned short transmit_len)
do {
tx_active = transmitting();
} while(tx_active == 1 &&
(RTIMER_CLOCK_LT(RTIMER_NOW(), t0 + TX_WAIT_TIMEOUT)));
(RTIMER_CLOCK_LT(RTIMER_NOW(), t0 + RF_CORE_TX_TIMEOUT)));
if(tx_active) {
PRINTF("transmit: Already TXing and wait timed out\n");
@ -957,7 +824,7 @@ transmit(unsigned short transmit_len)
cmd.startTrigger.triggerType = TRIG_NOW;
/* Enable the LAST_FG_COMMAND_DONE interrupt, which will wake us up */
rf_core_cmd_done_en(true, poll_mode);
rf_core_cmd_done_en(true);
ret = rf_core_send_cmd((uint32_t)&cmd, &cmd_status);
@ -973,7 +840,7 @@ transmit(unsigned short transmit_len)
* 1) make the `lpm_sleep()` call here unconditional;
* 2) change the radio ISR priority to allow radio ISR to interrupt rtimer ISR.
*/
if(!poll_mode) {
if(!rf_core_poll_mode) {
lpm_sleep();
}
}
@ -1007,7 +874,7 @@ transmit(unsigned short transmit_len)
* Disable LAST_FG_COMMAND_DONE interrupt. We don't really care about it
* except when we are transmitting
*/
rf_core_cmd_done_dis(poll_mode);
rf_core_cmd_done_dis();
if(was_off) {
off();
@ -1036,46 +903,6 @@ release_data_entry(void)
rx_read_entry = entry->pNextEntry;
}
/*---------------------------------------------------------------------------*/
static uint32_t
calc_last_packet_timestamp(uint32_t rat_timestamp)
{
uint64_t rat_timestamp64;
uint32_t adjusted_overflow_counter;
uint8_t was_off = 0;
if(!rf_is_on()) {
was_off = 1;
on();
}
if(rf_is_on()) {
check_rat_overflow(false);
if(was_off) {
off();
}
}
adjusted_overflow_counter = rat_overflow_counter;
/* if the timestamp is large and the last oveflow was recently,
assume that the timestamp refers to the time before the overflow */
if(rat_timestamp > (uint32_t)(RAT_RANGE * 3 / 4)) {
if(RTIMER_CLOCK_LT(RTIMER_NOW(),
last_rat_overflow + RAT_OVERFLOW_PERIOD_SECONDS * RTIMER_SECOND / 4)) {
adjusted_overflow_counter--;
}
}
/* add the overflowed time to the timestamp */
rat_timestamp64 = rat_timestamp + RAT_RANGE * adjusted_overflow_counter;
/* correct timestamp so that it refers to the end of the SFD */
rat_timestamp64 += TIMESTAMP_OFFSET;
last_rat_timestamp64 = rat_timestamp64 - rat_offset;
return RADIO_TO_RTIMER(rat_timestamp64 - rat_offset);
}
/*---------------------------------------------------------------------------*/
static int
read_frame(void *buf, unsigned short buf_len)
{
@ -1111,20 +938,20 @@ read_frame(void *buf, unsigned short buf_len)
memcpy(buf, (uint8_t *)rx_read_entry + RX_BUF_DATA_OFFSET, len);
last_rssi = (int8_t)rx_read_entry[RX_BUF_DATA_OFFSET + len + 2];
last_corr_lqi = (uint8_t)rx_read_entry[RX_BUF_DATA_OFFSET + len + 3] & STATUS_CORRELATION;
rf_core_last_rssi = (int8_t)rx_read_entry[RX_BUF_DATA_OFFSET + len];
rf_core_last_corr_lqi = (uint8_t)rx_read_entry[RX_BUF_DATA_OFFSET + len + 1] & STATUS_CORRELATION;
/* get the timestamp */
memcpy(&rat_timestamp, (uint8_t *)rx_read_entry + RX_BUF_DATA_OFFSET + len + 4, 4);
memcpy(&rat_timestamp, (uint8_t *)rx_read_entry + RX_BUF_DATA_OFFSET + len + 2, 4);
last_packet_timestamp = calc_last_packet_timestamp(rat_timestamp);
rf_core_last_packet_timestamp = rf_core_convert_rat_to_rtimer(rat_timestamp);
if(!poll_mode) {
if(!rf_core_poll_mode) {
/* Not in poll mode: packetbuf should not be accessed in interrupt context.
* In poll mode, the last packet RSSI and link quality can be obtained through
* RADIO_PARAM_LAST_RSSI and RADIO_PARAM_LAST_LINK_QUALITY */
packetbuf_set_attr(PACKETBUF_ATTR_RSSI, last_rssi);
packetbuf_set_attr(PACKETBUF_ATTR_LINK_QUALITY, last_corr_lqi);
packetbuf_set_attr(PACKETBUF_ATTR_RSSI, rf_core_last_rssi);
packetbuf_set_attr(PACKETBUF_ATTR_LINK_QUALITY, rf_core_last_corr_lqi);
}
release_data_entry();
@ -1137,7 +964,7 @@ channel_clear(void)
{
uint8_t was_off = 0;
uint8_t cca_info;
int ret = RF_CCA_CLEAR;
int ret = RF_CORE_CCA_CLEAR;
/*
* If we are in the middle of a BLE operation, we got called by ContikiMAC
@ -1145,7 +972,7 @@ channel_clear(void)
*/
if(rf_ble_is_active() == RF_BLE_ACTIVE) {
PRINTF("channel_clear: Interrupt context but BLE in progress\n");
return RF_CCA_CLEAR;
return RF_CORE_CCA_CLEAR;
}
if(rf_is_on()) {
@ -1157,7 +984,7 @@ channel_clear(void)
*
* We could probably even simply return that the channel is clear
*/
LIMITED_BUSYWAIT(transmitting(), TX_FINISH_WAIT_TIMEOUT);
RTIMER_BUSYWAIT_UNTIL(!transmitting(), RF_CORE_TX_FINISH_TIMEOUT);
} else {
was_off = 1;
if(on() != RF_CORE_CMD_OK) {
@ -1165,21 +992,21 @@ channel_clear(void)
if(was_off) {
off();
}
return RF_CCA_CLEAR;
return RF_CORE_CCA_CLEAR;
}
}
cca_info = get_cca_info();
if(cca_info == RF_GET_CCA_INFO_ERROR) {
if(cca_info == RF_CORE_GET_CCA_INFO_ERROR) {
PRINTF("channel_clear: CCA error\n");
ret = RF_CCA_CLEAR;
ret = RF_CORE_CCA_CLEAR;
} else {
/*
* cca_info bits 1:0 - ccaStatus
* Return 1 (clear) if idle or invalid.
*/
ret = (cca_info & 0x03) != RF_CMD_CCA_REQ_CCA_STATE_BUSY;
ret = (cca_info & 0x03) != RF_CORE_CMD_CCA_REQ_CCA_STATE_BUSY;
}
if(was_off) {
@ -1218,12 +1045,12 @@ receiving_packet(void)
cca_info = get_cca_info();
/* If we can't read CCA info, return "not receiving" */
if(cca_info == RF_GET_CCA_INFO_ERROR) {
if(cca_info == RF_CORE_GET_CCA_INFO_ERROR) {
return 0;
}
/* If sync has been seen, return 1 (receiving) */
if(cca_info & RF_CMD_CCA_REQ_CCA_SYNC_BUSY) {
if(cca_info & RF_CORE_CMD_CCA_REQ_CCA_SYNC_BUSY) {
return 1;
}
@ -1241,7 +1068,7 @@ pending_packet(void)
if(entry->status == DATA_ENTRY_STATUS_FINISHED
|| entry->status == DATA_ENTRY_STATUS_BUSY) {
rv = 1;
if(!poll_mode) {
if(!rf_core_poll_mode) {
process_poll(&rf_core_process);
}
}
@ -1292,7 +1119,7 @@ on(void)
return RF_CORE_CMD_ERROR;
}
rf_core_setup_interrupts(poll_mode);
rf_core_setup_interrupts();
if(rf_radio_setup() != RF_CORE_CMD_OK) {
PRINTF("on: radio_setup() failed\n");
@ -1314,7 +1141,7 @@ off(void)
return RF_CORE_CMD_OK;
}
LIMITED_BUSYWAIT(transmitting(), TX_FINISH_WAIT_TIMEOUT);
RTIMER_BUSYWAIT_UNTIL(!transmitting(), RF_CORE_TX_FINISH_TIMEOUT);
/* stopping the rx explicitly results in lower sleep-mode power usage */
rx_off();
@ -1394,7 +1221,7 @@ get_value(radio_param_t param, radio_value_t *value)
if(cmd->frameFiltOpt.autoAckEn) {
*value |= RADIO_RX_MODE_AUTOACK;
}
if(poll_mode) {
if(rf_core_poll_mode) {
*value |= RADIO_RX_MODE_POLL_MODE;
}
@ -1411,7 +1238,7 @@ get_value(radio_param_t param, radio_value_t *value)
case RADIO_PARAM_RSSI:
*value = get_rssi();
if(*value == RF_CMD_CCA_REQ_RSSI_UNKNOWN) {
if(*value == RF_CORE_CMD_CCA_REQ_RSSI_UNKNOWN) {
return RADIO_RESULT_ERROR;
} else {
return RADIO_RESULT_OK;
@ -1429,10 +1256,25 @@ get_value(radio_param_t param, radio_value_t *value)
*value = OUTPUT_POWER_MAX;
return RADIO_RESULT_OK;
case RADIO_PARAM_LAST_RSSI:
*value = last_rssi;
*value = rf_core_last_rssi;
return RADIO_RESULT_OK;
case RADIO_PARAM_LAST_LINK_QUALITY:
*value = last_corr_lqi;
*value = rf_core_last_corr_lqi;
return RADIO_RESULT_OK;
case RADIO_CONST_PHY_OVERHEAD:
*value = (radio_value_t)RADIO_PHY_OVERHEAD;
return RADIO_RESULT_OK;
case RADIO_CONST_BYTE_AIR_TIME:
*value = (radio_value_t)RADIO_BYTE_AIR_TIME;
return RADIO_RESULT_OK;
case RADIO_CONST_DELAY_BEFORE_TX:
*value = (radio_value_t)RADIO_DELAY_BEFORE_TX;
return RADIO_RESULT_OK;
case RADIO_CONST_DELAY_BEFORE_RX:
*value = (radio_value_t)RADIO_DELAY_BEFORE_RX;
return RADIO_RESULT_OK;
case RADIO_CONST_DELAY_BEFORE_DETECT:
*value = (radio_value_t)RADIO_DELAY_BEFORE_DETECT;
return RADIO_RESULT_OK;
default:
return RADIO_RESULT_NOT_SUPPORTED;
@ -1498,9 +1340,9 @@ set_value(radio_param_t param, radio_value_t value)
cmd->frameFiltOpt.bPanCoord = 0;
cmd->frameFiltOpt.bStrictLenFilter = 0;
old_poll_mode = poll_mode;
poll_mode = (value & RADIO_RX_MODE_POLL_MODE) != 0;
if(poll_mode == old_poll_mode) {
old_poll_mode = rf_core_poll_mode;
rf_core_poll_mode = (value & RADIO_RX_MODE_POLL_MODE) != 0;
if(rf_core_poll_mode == old_poll_mode) {
uint32_t cmd_status;
/* do not turn the radio on and off, just send an update command */
@ -1552,7 +1394,7 @@ set_value(radio_param_t param, radio_value_t value)
/* Restart the radio timer (RAT).
This causes resynchronization between RAT and RTC: useful for TSCH. */
if(rf_core_restart_rat() == RF_CORE_CMD_OK) {
check_rat_overflow(false);
rf_core_check_rat_overflow();
}
if(rx_on() != RF_CORE_CMD_OK) {
@ -1590,7 +1432,7 @@ get_object(radio_param_t param, void *dest, size_t size)
if(size != sizeof(rtimer_clock_t) || !dest) {
return RADIO_RESULT_INVALID_VALUE;
}
*(rtimer_clock_t *)dest = last_packet_timestamp;
*(rtimer_clock_t *)dest = rf_core_last_packet_timestamp;
return RADIO_RESULT_OK;
}

0
arch/cpu/cc26xx-cc13xx/rf-core/prop-mode-tx-power.c → arch/cpu/cc26x0-cc13x0/rf-core/prop-mode-tx-power.c
View File

386
arch/cpu/cc26xx-cc13xx/rf-core/prop-mode.c → arch/cpu/cc26x0-cc13x0/rf-core/prop-mode.c
View File

@ -115,24 +115,6 @@
*/
#define RF_RADIO_OP_GET_STATUS(a) GET_FIELD_V(a, radioOp, status)
/*---------------------------------------------------------------------------*/
/* Special value returned by CMD_IEEE_CCA_REQ when an RSSI is not available */
#define RF_CMD_CCA_REQ_RSSI_UNKNOWN -128
/* Used for the return value of channel_clear */
#define RF_CCA_CLEAR 1
#define RF_CCA_BUSY 0
/* Used as an error return value for get_cca_info */
#define RF_GET_CCA_INFO_ERROR 0xFF
/*
* Values of the individual bits of the ccaInfo field in CMD_IEEE_CCA_REQ's
* status struct
*/
#define RF_CMD_CCA_REQ_CCA_STATE_IDLE 0 /* 00 */
#define RF_CMD_CCA_REQ_CCA_STATE_BUSY 1 /* 01 */
#define RF_CMD_CCA_REQ_CCA_STATE_INVALID 2 /* 10 */
#ifdef PROP_MODE_CONF_RSSI_THRESHOLD
#define PROP_MODE_RSSI_THRESHOLD PROP_MODE_CONF_RSSI_THRESHOLD
#else
@ -141,6 +123,8 @@
static int8_t rssi_threshold = PROP_MODE_RSSI_THRESHOLD;
/*---------------------------------------------------------------------------*/
static volatile uint8_t is_receiving_packet;
/*---------------------------------------------------------------------------*/
static int on(void);
static int off(void);
@ -170,12 +154,6 @@ static rfc_propRxOutput_t rx_stats;
#define DOT_4G_PHR_DW_BIT 0
#endif
/*---------------------------------------------------------------------------*/
/* How long to wait for an ongoing ACK TX to finish before starting frame TX */
#define TX_WAIT_TIMEOUT (RTIMER_SECOND >> 11)
/* How long to wait for the RF to enter RX in rf_cmd_ieee_rx */
#define ENTER_RX_WAIT_TIMEOUT (RTIMER_SECOND >> 10)
/*---------------------------------------------------------------------------*/
/* TX power table for the 431-527MHz band */
#ifdef PROP_MODE_CONF_TX_POWER_431_527
#define PROP_MODE_TX_POWER_431_527 PROP_MODE_CONF_TX_POWER_431_527
@ -222,12 +200,29 @@ static const prop_mode_tx_power_config_t *tx_power_current = &TX_POWER_DRIVER[1]
#define DATA_ENTRY_LENSZ_BYTE 1
#define DATA_ENTRY_LENSZ_WORD 2 /* 2 bytes */
/* The size of the metadata (excluding the packet length field) */
#define RX_BUF_METADATA_SIZE \
(CRC_LEN * RF_CORE_RX_BUF_INCLUDE_CRC \
+ RF_CORE_RX_BUF_INCLUDE_RSSI \
+ RF_CORE_RX_BUF_INCLUDE_CORR \
+ 4 * RF_CORE_RX_BUF_INCLUDE_TIMESTAMP)
/* The offset of the packet length in a rx buffer */
#define RX_BUF_LENGTH_OFFSET sizeof(rfc_dataEntry_t)
/* The offset of the packet data in a rx buffer */
#define RX_BUF_DATA_OFFSET (RX_BUF_LENGTH_OFFSET + DOT_4G_PHR_LEN)
#define ALIGN_TO_4(size) (((size) + 3) & ~3)
#define RX_BUF_SIZE ALIGN_TO_4(RX_BUF_DATA_OFFSET \
+ NETSTACK_RADIO_MAX_PAYLOAD_LEN \
+ RX_BUF_METADATA_SIZE)
/*
* RX buffers.
* PROP_MODE_RX_BUF_CNT buffers of RX_BUF_SIZE bytes each. The start of each
* buffer must be 4-byte aligned, therefore RX_BUF_SIZE must divide by 4
*/
#define RX_BUF_SIZE 140
static uint8_t rx_buf[PROP_MODE_RX_BUF_CNT][RX_BUF_SIZE] CC_ALIGN(4);
/* The RX Data Queue */
@ -236,6 +231,12 @@ static dataQueue_t rx_data_queue = { 0 };
/* Receive entry pointer to keep track of read items */
volatile static uint8_t *rx_read_entry;
/*---------------------------------------------------------------------------*/
/*
* Increasing this number causes unicast Tx immediately after broadcast Rx to have
* negative synchronization errors ("dr" in TSCH logs); decreasing it: the opposite.
*/
#define RAT_TIMESTAMP_OFFSET_SUB_GHZ USEC_TO_RADIO(160 * 6 - 240)
/*---------------------------------------------------------------------------*/
/* The outgoing frame buffer */
#define TX_BUF_PAYLOAD_LEN 180
#define TX_BUF_HDR_LEN 2
@ -272,13 +273,13 @@ get_rssi(void)
was_off = 1;
if(on() != RF_CORE_CMD_OK) {
PRINTF("get_rssi: on() failed\n");
return RF_CMD_CCA_REQ_RSSI_UNKNOWN;
return RF_CORE_CMD_CCA_REQ_RSSI_UNKNOWN;
}
}
rssi = RF_CMD_CCA_REQ_RSSI_UNKNOWN;
rssi = RF_CORE_CMD_CCA_REQ_RSSI_UNKNOWN;
while((rssi == RF_CMD_CCA_REQ_RSSI_UNKNOWN || rssi == 0) && ++attempts < 10) {
while((rssi == RF_CORE_CMD_CCA_REQ_RSSI_UNKNOWN || rssi == 0) && ++attempts < 10) {
memset(&cmd, 0x00, sizeof(cmd));
cmd.commandNo = CMD_GET_RSSI;
@ -420,13 +421,17 @@ static uint8_t
rf_cmd_prop_rx()
{
uint32_t cmd_status;
rtimer_clock_t t0;
volatile rfc_CMD_PROP_RX_ADV_t *cmd_rx_adv;
int ret;
cmd_rx_adv = (rfc_CMD_PROP_RX_ADV_t *)&smartrf_settings_cmd_prop_rx_adv;
cmd_rx_adv->status = RF_CORE_RADIO_OP_STATUS_IDLE;
cmd_rx_adv->rxConf.bIncludeCrc = RF_CORE_RX_BUF_INCLUDE_CRC;
cmd_rx_adv->rxConf.bAppendRssi = RF_CORE_RX_BUF_INCLUDE_RSSI;
cmd_rx_adv->rxConf.bAppendTimestamp = RF_CORE_RX_BUF_INCLUDE_TIMESTAMP;
cmd_rx_adv->rxConf.bAppendStatus = RF_CORE_RX_BUF_INCLUDE_CORR;
/*
* Set the max Packet length. This is for the payload only, therefore
* 2047 - length offset
@ -441,10 +446,8 @@ rf_cmd_prop_rx()
return RF_CORE_CMD_ERROR;
}
t0 = RTIMER_NOW();
while(cmd_rx_adv->status != RF_CORE_RADIO_OP_STATUS_ACTIVE &&
(RTIMER_CLOCK_LT(RTIMER_NOW(), t0 + ENTER_RX_WAIT_TIMEOUT)));
RTIMER_BUSYWAIT_UNTIL(cmd_rx_adv->status == RF_CORE_RADIO_OP_STATUS_ACTIVE,
RF_CORE_ENTER_RX_TIMEOUT);
/* Wait to enter RX */
if(cmd_rx_adv->status != RF_CORE_RADIO_OP_STATUS_ACTIVE) {
@ -506,13 +509,16 @@ rx_off_prop(void)
return RF_CORE_CMD_OK;
}
/* Wait for ongoing ACK TX to finish */
RTIMER_BUSYWAIT_UNTIL(!transmitting(), RF_CORE_TX_FINISH_TIMEOUT);
/* Send a CMD_ABORT command to RF Core */
if(rf_core_send_cmd(CMDR_DIR_CMD(CMD_ABORT), &cmd_status) != RF_CORE_CMD_OK) {
PRINTF("rx_off_prop: CMD_ABORT status=0x%08lx\n", cmd_status);
/* Continue nonetheless */
}
while(rf_is_on());
RTIMER_BUSYWAIT_UNTIL(!rf_is_on(), RF_CORE_TURN_OFF_TIMEOUT);
if(smartrf_settings_cmd_prop_rx_adv.status == PROP_DONE_STOPPED ||
smartrf_settings_cmd_prop_rx_adv.status == PROP_DONE_ABORT) {
@ -583,8 +589,8 @@ soft_off_prop(void)
return;
}
while((cmd->status & RF_CORE_RADIO_OP_MASKED_STATUS) ==
RF_CORE_RADIO_OP_MASKED_STATUS_RUNNING);
RTIMER_BUSYWAIT_UNTIL((cmd->status & RF_CORE_RADIO_OP_MASKED_STATUS) !=
RF_CORE_RADIO_OP_MASKED_STATUS_RUNNING, RF_CORE_TURN_OFF_TIMEOUT);
}
/*---------------------------------------------------------------------------*/
static uint8_t
@ -606,6 +612,8 @@ soft_on_prop(void)
static const rf_core_primary_mode_t mode_prop = {
soft_off_prop,
soft_on_prop,
rf_is_on,
RAT_TIMESTAMP_OFFSET_SUB_GHZ
};
/*---------------------------------------------------------------------------*/
static int
@ -637,10 +645,15 @@ init(void)
return RF_CORE_CMD_ERROR;
}
/* Enable the "sync word seen" interrupt */
ti_lib_rfc_hw_int_enable(RFC_DBELL_RFHWIEN_MDMSOFT);
ENERGEST_ON(ENERGEST_TYPE_LISTEN);
rf_core_primary_mode_register(&mode_prop);
rf_core_rat_init();
process_start(&rf_core_process, NULL);
return 1;
@ -701,7 +714,7 @@ transmit(unsigned short transmit_len)
rx_off_prop();
/* Enable the LAST_COMMAND_DONE interrupt to wake us up */
rf_core_cmd_done_en(false, false);
rf_core_cmd_done_en(false);
ret = rf_core_send_cmd((uint32_t)cmd_tx_adv, &cmd_status);
@ -714,7 +727,14 @@ transmit(unsigned short transmit_len)
/* Idle away while the command is running */
while((cmd_tx_adv->status & RF_CORE_RADIO_OP_MASKED_STATUS)
== RF_CORE_RADIO_OP_MASKED_STATUS_RUNNING) {
lpm_sleep();
/* Note: for now sleeping while Tx'ing in polling mode is disabled.
* To enable it:
* 1) make the `lpm_sleep()` call here unconditional;
* 2) change the radio ISR priority to allow radio ISR to interrupt rtimer ISR.
*/
if(!rf_core_poll_mode) {
lpm_sleep();
}
}
if(cmd_tx_adv->status == RF_CORE_RADIO_OP_STATUS_PROP_DONE_OK) {
@ -743,7 +763,7 @@ transmit(unsigned short transmit_len)
* Disable LAST_FG_COMMAND_DONE interrupt. We don't really care about it
* except when we are transmitting
*/
rf_core_cmd_done_dis(false);
rf_core_cmd_done_dis();
/* Workaround. Set status to IDLE */
cmd_tx_adv->status = RF_CORE_RADIO_OP_STATUS_IDLE;
@ -764,47 +784,98 @@ send(const void *payload, unsigned short payload_len)
return transmit(payload_len);
}
/*---------------------------------------------------------------------------*/
static int
read_frame(void *buf, unsigned short buf_len)
static void
release_data_entry(void)
{
int_master_status_t status;
rfc_dataEntryGeneral_t *entry = (rfc_dataEntryGeneral_t *)rx_read_entry;
uint8_t *data_ptr = &entry->data;
int len = 0;
int_master_status_t interrupt_status;
if(entry->status == DATA_ENTRY_STATUS_FINISHED) {
/* Clear the length field (2 bytes) */
data_ptr[0] = 0;
data_ptr[1] = 0;
/*
* First 2 bytes in the data entry are the length.
* Our data entry consists of: Payload + RSSI (1 byte) + Status (1 byte)
* This length includes all of those.
*/
len = (*(uint16_t *)data_ptr);
data_ptr += 2;
len -= 2;
/* Set status to 0 "Pending" in element */
entry->status = DATA_ENTRY_STATUS_PENDING;
rx_read_entry = entry->pNextEntry;
if(len > 0) {
if(len <= buf_len) {
memcpy(buf, data_ptr, len);
}
packetbuf_set_attr(PACKETBUF_ATTR_RSSI, (int8_t)data_ptr[len]);
packetbuf_set_attr(PACKETBUF_ATTR_LINK_QUALITY, 0x7F);
}
/* Move read entry pointer to next entry */
rx_read_entry = entry->pNextEntry;
entry->status = DATA_ENTRY_STATUS_PENDING;
}
status = critical_enter();
if(rx_is_full) {
rx_is_full = false;
interrupt_status = critical_enter();
if(rf_core_rx_is_full) {
rf_core_rx_is_full = false;
PRINTF("RXQ was full, re-enabling radio!\n");
rx_on_prop();
}
critical_exit(status);
critical_exit(interrupt_status);
}
/*---------------------------------------------------------------------------*/
static int
read_frame(void *buf, unsigned short buf_len)
{
rfc_dataEntryGeneral_t *entry = (rfc_dataEntryGeneral_t *)rx_read_entry;
uint8_t *data_ptr = &entry->data;
int len = 0;
uint32_t rat_timestamp;
/* wait for entry to become finished */
rtimer_clock_t t0 = RTIMER_NOW();
while(entry->status == DATA_ENTRY_STATUS_BUSY
&& RTIMER_CLOCK_LT(RTIMER_NOW(), t0 + (RTIMER_SECOND / 50)));
/* Make sure the flag is reset */
is_receiving_packet = 0;
if(entry->status != DATA_ENTRY_STATUS_FINISHED) {
/* No available data */
return 0;
}
/*
* First 2 bytes in the data entry are the length.
* Our data entry consists of:
* Payload + RSSI (1 byte) + Timestamp (4 bytes) + Status (1 byte)
* This length includes all of those.
*/
len = (*(uint16_t *)data_ptr);
if(len <= RX_BUF_METADATA_SIZE) {
PRINTF("RF: too short!");
release_data_entry();
return 0;
}
data_ptr += 2;
len -= RX_BUF_METADATA_SIZE;
if(len > buf_len) {
PRINTF("RF: too long\n");
release_data_entry();
return 0;
}
memcpy(buf, data_ptr, len);
/* get the RSSI and status */
rf_core_last_rssi = (int8_t)data_ptr[len];
rf_core_last_corr_lqi = data_ptr[len + 5];
/* get the timestamp */
memcpy(&rat_timestamp, data_ptr + len + 1, 4);
rf_core_last_packet_timestamp = rf_core_convert_rat_to_rtimer(rat_timestamp);
if(!rf_core_poll_mode) {
/* Not in poll mode: packetbuf should not be accessed in interrupt context.
* In poll mode, the last packet RSSI and link quality can be obtained through
* RADIO_PARAM_LAST_RSSI and RADIO_PARAM_LAST_LINK_QUALITY */
packetbuf_set_attr(PACKETBUF_ATTR_RSSI, rf_core_last_rssi);
packetbuf_set_attr(PACKETBUF_ATTR_LINK_QUALITY, rf_core_last_corr_lqi);
}
release_data_entry();
return len;
}
/*---------------------------------------------------------------------------*/
@ -813,14 +884,14 @@ channel_clear(void)
{
uint8_t was_off = 0;
uint32_t cmd_status;
int8_t rssi = RF_CMD_CCA_REQ_RSSI_UNKNOWN;
int8_t rssi = RF_CORE_CMD_CCA_REQ_RSSI_UNKNOWN;
/*
* If we are in the middle of a BLE operation, we got called by ContikiMAC
* from within an interrupt context. Indicate a clear channel
*/
if(rf_ble_is_active() == RF_BLE_ACTIVE) {
return RF_CCA_CLEAR;
return RF_CORE_CCA_CLEAR;
}
if(!rf_core_is_accessible()) {
@ -830,16 +901,16 @@ channel_clear(void)
if(was_off) {
off();
}
return RF_CCA_CLEAR;
return RF_CORE_CCA_CLEAR;
}
} else {
if(transmitting()) {
PRINTF("channel_clear: called while in TX\n");
return RF_CCA_CLEAR;
return RF_CORE_CCA_CLEAR;
}
}
while(rssi == RF_CMD_CCA_REQ_RSSI_UNKNOWN || rssi == 0) {
while(rssi == RF_CORE_CMD_CCA_REQ_RSSI_UNKNOWN || rssi == 0) {
if(rf_core_send_cmd(CMDR_DIR_CMD(CMD_GET_RSSI), &cmd_status)
!= RF_CORE_CMD_OK) {
break;
@ -853,10 +924,10 @@ channel_clear(void)
}
if(rssi >= rssi_threshold) {
return RF_CCA_BUSY;
return RF_CORE_CCA_BUSY;
}
return RF_CCA_CLEAR;
return RF_CORE_CCA_CLEAR;
}
/*---------------------------------------------------------------------------*/
static int
@ -866,11 +937,23 @@ receiving_packet(void)
return 0;
}
if(channel_clear() == RF_CCA_CLEAR) {
return 0;
if(!is_receiving_packet) {
/* Look for the modem synchronization word detection interrupt flag.
* This flag is raised when the synchronization word is received.
*/
if(HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFHWIFG) & RFC_DBELL_RFHWIFG_MDMSOFT) {
is_receiving_packet = 1;
}
} else {
/* After the start of the packet: reset the Rx flag once the channel gets clear */
is_receiving_packet = (channel_clear() == RF_CORE_CCA_BUSY);
if(!is_receiving_packet) {
/* Clear the modem sync flag */
ti_lib_rfc_hw_int_clear(RFC_DBELL_RFHWIFG_MDMSOFT);
}
}
return 1;
return is_receiving_packet;
}
/*---------------------------------------------------------------------------*/
static int
@ -881,9 +964,12 @@ pending_packet(void)
/* Go through all RX buffers and check their status */
do {
if(entry->status == DATA_ENTRY_STATUS_FINISHED) {
rv += 1;
process_poll(&rf_core_process);
if(entry->status == DATA_ENTRY_STATUS_FINISHED
|| entry->status == DATA_ENTRY_STATUS_BUSY) {
rv = 1;
if(!rf_core_poll_mode) {
process_poll(&rf_core_process);
}
}
entry = (rfc_dataEntry_t *)entry->pNextEntry;
@ -904,18 +990,18 @@ on(void)
return RF_CORE_CMD_OK;
}
/*
* Request the HF XOSC as the source for the HF clock. Needed before we can
* use the FS. This will only request, it will _not_ perform the switch.
*/
oscillators_request_hf_xosc();
if(rf_is_on()) {
PRINTF("on: We were on. PD=%u, RX=0x%04x \n", rf_core_is_accessible(),
smartrf_settings_cmd_prop_rx_adv.status);
return RF_CORE_CMD_OK;
}
/*
* Request the HF XOSC as the source for the HF clock. Needed before we can
* use the FS. This will only request, it will _not_ perform the switch.
*/
oscillators_request_hf_xosc();
if(!rf_core_is_accessible()) {
if(rf_core_power_up() != RF_CORE_CMD_OK) {
PRINTF("on: rf_core_power_up() failed\n");
@ -958,7 +1044,7 @@ on(void)
}
}
rf_core_setup_interrupts(false);
rf_core_setup_interrupts();
init_rx_buffers();
@ -985,6 +1071,9 @@ on(void)
static int
off(void)
{
int i;
rfc_dataEntry_t *entry;
/*
* If we are in the middle of a BLE operation, we got called by ContikiMAC
* from within an interrupt context. Abort, but pretend everything is OK.
@ -998,15 +1087,39 @@ off(void)
ENERGEST_OFF(ENERGEST_TYPE_LISTEN);
#if !CC2650_FAST_RADIO_STARTUP
/* Switch HF clock source to the RCOSC to preserve power */
oscillators_switch_to_hf_rc();
#endif
/* We pulled the plug, so we need to restore the status manually */
smartrf_settings_cmd_prop_rx_adv.status = RF_CORE_RADIO_OP_STATUS_IDLE;
/*
* Just in case there was an ongoing RX (which started after we begun the
* shutdown sequence), we don't want to leave the buffer in state == ongoing
*/
for(i = 0; i < PROP_MODE_RX_BUF_CNT; i++) {
entry = (rfc_dataEntry_t *)rx_buf[i];
if(entry->status == DATA_ENTRY_STATUS_BUSY) {
entry->status = DATA_ENTRY_STATUS_PENDING;
}
}
return RF_CORE_CMD_OK;
}
/*---------------------------------------------------------------------------*/
/* Enable or disable CCA before sending */
static radio_result_t
set_send_on_cca(uint8_t enable)
{
if(enable) {
/* this driver does not have support for CCA on Tx */
return RADIO_RESULT_NOT_SUPPORTED;
}
return RADIO_RESULT_OK;
}
/*---------------------------------------------------------------------------*/
static radio_result_t
get_value(radio_param_t param, radio_value_t *value)
{
@ -1022,6 +1135,15 @@ get_value(radio_param_t param, radio_value_t *value)
case RADIO_PARAM_CHANNEL:
*value = (radio_value_t)get_channel();
return RADIO_RESULT_OK;
case RADIO_PARAM_RX_MODE:
*value = 0;
if(rf_core_poll_mode) {
*value |= RADIO_RX_MODE_POLL_MODE;
}
return RADIO_RESULT_OK;
case RADIO_PARAM_TX_MODE:
*value = 0;
return RADIO_RESULT_OK;
case RADIO_PARAM_TXPOWER:
*value = get_tx_power();
return RADIO_RESULT_OK;
@ -1031,7 +1153,7 @@ get_value(radio_param_t param, radio_value_t *value)
case RADIO_PARAM_RSSI:
*value = get_rssi();
if(*value == RF_CMD_CCA_REQ_RSSI_UNKNOWN) {
if(*value == RF_CORE_CMD_CCA_REQ_RSSI_UNKNOWN) {
return RADIO_RESULT_ERROR;
} else {
return RADIO_RESULT_OK;
@ -1048,6 +1170,28 @@ get_value(radio_param_t param, radio_value_t *value)
case RADIO_CONST_TXPOWER_MAX:
*value = OUTPUT_POWER_MAX;
return RADIO_RESULT_OK;
case RADIO_PARAM_LAST_RSSI:
*value = rf_core_last_rssi;
return RADIO_RESULT_OK;
case RADIO_PARAM_LAST_LINK_QUALITY:
*value = rf_core_last_corr_lqi;
return RADIO_RESULT_OK;
case RADIO_CONST_PHY_OVERHEAD:
/* 2 header bytes, 2 or 4 bytes CRC */
*value = (radio_value_t)(DOT_4G_PHR_LEN + CRC_LEN);
return RADIO_RESULT_OK;
case RADIO_CONST_BYTE_AIR_TIME:
*value = (radio_value_t)RADIO_BYTE_AIR_TIME;
return RADIO_RESULT_OK;
case RADIO_CONST_DELAY_BEFORE_TX:
*value = (radio_value_t)RADIO_DELAY_BEFORE_TX;
return RADIO_RESULT_OK;
case RADIO_CONST_DELAY_BEFORE_RX:
*value = (radio_value_t)RADIO_DELAY_BEFORE_RX;
return RADIO_RESULT_OK;
case RADIO_CONST_DELAY_BEFORE_DETECT:
*value = (radio_value_t)RADIO_DELAY_BEFORE_DETECT;
return RADIO_RESULT_OK;
default:
return RADIO_RESULT_NOT_SUPPORTED;
}
@ -1056,8 +1200,8 @@ get_value(radio_param_t param, radio_value_t *value)
static radio_result_t
set_value(radio_param_t param, radio_value_t value)
{
uint8_t was_off = 0;
radio_result_t rv = RADIO_RESULT_OK;
uint8_t old_poll_mode;
switch(param) {
case RADIO_PARAM_POWER_MODE:
@ -1087,6 +1231,25 @@ set_value(radio_param_t param, radio_value_t value)
set_channel((uint8_t)value);
break;
case RADIO_PARAM_RX_MODE:
if(value & ~(RADIO_RX_MODE_POLL_MODE)) {
return RADIO_RESULT_INVALID_VALUE;
}
old_poll_mode = rf_core_poll_mode;
rf_core_poll_mode = (value & RADIO_RX_MODE_POLL_MODE) != 0;
if(rf_core_poll_mode == old_poll_mode) {
return RADIO_RESULT_OK;
}
break;
case RADIO_PARAM_TX_MODE:
if(value & ~(RADIO_TX_MODE_SEND_ON_CCA)) {
return RADIO_RESULT_INVALID_VALUE;
}
return set_send_on_cca((value & RADIO_TX_MODE_SEND_ON_CCA) != 0);
case RADIO_PARAM_TXPOWER:
if(value < TX_POWER_DRIVER[get_tx_power_array_last_element()].dbm ||
value > OUTPUT_POWER_MAX) {
@ -1103,8 +1266,7 @@ set_value(radio_param_t param, radio_value_t value)
}
return RADIO_RESULT_OK;
case RADIO_PARAM_RX_MODE:
return RADIO_RESULT_OK;
case RADIO_PARAM_CCA_THRESHOLD:
rssi_threshold = (int8_t)value;
break;
@ -1112,28 +1274,29 @@ set_value(radio_param_t param, radio_value_t value)
return RADIO_RESULT_NOT_SUPPORTED;
}
/* If we reach here we had no errors. Apply new settings */
/* If off, the new configuration will be applied the next time radio is started */
if(!rf_is_on()) {
was_off = 1;
if(on() != RF_CORE_CMD_OK) {
PRINTF("set_value: on() failed (2)\n");
return RADIO_RESULT_ERROR;
}
return RADIO_RESULT_OK;
}
/* If we reach here we had no errors. Apply new settings */
if(rx_off_prop() != RF_CORE_CMD_OK) {
PRINTF("set_value: rx_off_prop() failed\n");
rv = RADIO_RESULT_ERROR;
}
if(soft_on_prop() != RF_CORE_CMD_OK) {
PRINTF("set_value: rx_on_prop() failed\n");
rv = RADIO_RESULT_ERROR;
/* Restart the radio timer (RAT).
This causes resynchronization between RAT and RTC: useful for TSCH. */
if(rf_core_restart_rat() != RF_CORE_CMD_OK) {
PRINTF("set_value: rf_core_restart_rat() failed\n");
/* do not set the error */
} else {
rf_core_check_rat_overflow();
}
/* If we were off, turn back off */
if(was_off) {
off();
if(soft_on_prop() != RF_CORE_CMD_OK) {
PRINTF("set_value: soft_on_prop() failed\n");
rv = RADIO_RESULT_ERROR;
}
return rv;
@ -1142,6 +1305,15 @@ set_value(radio_param_t param, radio_value_t value)
static radio_result_t
get_object(radio_param_t param, void *dest, size_t size)
{
if(param == RADIO_PARAM_LAST_PACKET_TIMESTAMP) {
if(size != sizeof(rtimer_clock_t) || !dest) {
return RADIO_RESULT_INVALID_VALUE;
}
*(rtimer_clock_t *)dest = rf_core_last_packet_timestamp;
return RADIO_RESULT_OK;
}
return RADIO_RESULT_NOT_SUPPORTED;
}
/*---------------------------------------------------------------------------*/

0
arch/cpu/cc26xx-cc13xx/rf-core/prop-mode.h → arch/cpu/cc26x0-cc13x0/rf-core/prop-mode.h
View File

0
arch/cpu/cc26xx-cc13xx/rf-core/rf-ble.c → arch/cpu/cc26x0-cc13x0/rf-core/rf-ble.c
View File

0
arch/cpu/cc26xx-cc13xx/rf-core/rf-ble.h → arch/cpu/cc26x0-cc13x0/rf-core/rf-ble.h
View File

174
arch/cpu/cc26xx-cc13xx/rf-core/rf-core.c → arch/cpu/cc26x0-cc13x0/rf-core/rf-core.c
View File

@ -99,12 +99,37 @@ static rfc_radioOp_t *last_radio_op = NULL;
/* A struct holding pointers to the primary mode's abort() and restore() */
static const rf_core_primary_mode_t *primary_mode = NULL;
/*---------------------------------------------------------------------------*/
/* RAT has 32-bit register, overflows once 18 minutes */
#define RAT_RANGE 4294967296ull
/* approximate value */
#define RAT_OVERFLOW_PERIOD_SECONDS (60 * 18)
/* how often to check for the overflow, as a minimum */
#define RAT_OVERFLOW_TIMER_INTERVAL (CLOCK_SECOND * RAT_OVERFLOW_PERIOD_SECONDS / 3)
/* Radio timer (RAT) offset as compared to the rtimer counter (RTC) */
int32_t rat_offset = 0;
static bool rat_offset_known = false;
static int32_t rat_offset;
static bool rat_offset_known;
/* Value during the last read of the RAT register */
static uint32_t rat_last_value;
/* For RAT overflow handling */
static struct ctimer rat_overflow_timer;
static volatile uint32_t rat_overflow_counter;
static rtimer_clock_t rat_last_overflow;
static void rat_overflow_check_timer_cb(void *);
/*---------------------------------------------------------------------------*/
volatile int8_t rf_core_last_rssi = RF_CORE_CMD_CCA_REQ_RSSI_UNKNOWN;
volatile uint8_t rf_core_last_corr_lqi = 0;
volatile uint32_t rf_core_last_packet_timestamp = 0;
/*---------------------------------------------------------------------------*/
/* Are we currently in poll mode? */
uint8_t rf_core_poll_mode = 0;
/*---------------------------------------------------------------------------*/
/* Buffer full flag */
volatile bool rx_is_full = false;
volatile bool rf_core_rx_is_full = false;
/*---------------------------------------------------------------------------*/
PROCESS(rf_core_process, "CC13xx / CC26xx RF driver");
/*---------------------------------------------------------------------------*/
@ -399,8 +424,8 @@ rf_core_set_modesel()
} else if(chip_type == CHIP_TYPE_CC1350) {
HWREG(PRCM_BASE + PRCM_O_RFCMODESEL) = PRCM_RFCMODESEL_CURR_MODE5;
rv = RF_CORE_CMD_OK;
#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
} else if (chip_type == CHIP_TYPE_CC2640R2) {
#if CPU_FAMILY_CC26X0R2
} else if(chip_type == CHIP_TYPE_CC2640R2) {
HWREG(PRCM_BASE + PRCM_O_RFCMODESEL) = PRCM_RFCMODESEL_CURR_MODE1;
rv = RF_CORE_CMD_OK;
#endif
@ -451,10 +476,10 @@ rf_core_restart_rat(void)
}
/*---------------------------------------------------------------------------*/
void
rf_core_setup_interrupts(bool poll_mode)
rf_core_setup_interrupts(void)
{
bool interrupts_disabled;
const uint32_t enabled_irqs = poll_mode ? ENABLED_IRQS_POLL_MODE : ENABLED_IRQS;
const uint32_t enabled_irqs = rf_core_poll_mode ? ENABLED_IRQS_POLL_MODE : ENABLED_IRQS;
/* We are already turned on by the caller, so this should not happen */
if(!rf_core_is_accessible()) {
@ -485,19 +510,23 @@ rf_core_setup_interrupts(bool poll_mode)
}
/*---------------------------------------------------------------------------*/
void
rf_core_cmd_done_en(bool fg, bool poll_mode)
rf_core_cmd_done_en(bool fg)
{
uint32_t irq = fg ? IRQ_LAST_FG_COMMAND_DONE : IRQ_LAST_COMMAND_DONE;
const uint32_t enabled_irqs = poll_mode ? ENABLED_IRQS_POLL_MODE : ENABLED_IRQS;
uint32_t irq = 0;
const uint32_t enabled_irqs = rf_core_poll_mode ? ENABLED_IRQS_POLL_MODE : ENABLED_IRQS;
if(!rf_core_poll_mode) {
irq = fg ? IRQ_LAST_FG_COMMAND_DONE : IRQ_LAST_COMMAND_DONE;
}
HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) = enabled_irqs;
HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIEN) = enabled_irqs | irq;
}
/*---------------------------------------------------------------------------*/
void
rf_core_cmd_done_dis(bool poll_mode)
rf_core_cmd_done_dis(void)
{
const uint32_t enabled_irqs = poll_mode ? ENABLED_IRQS_POLL_MODE : ENABLED_IRQS;
const uint32_t enabled_irqs = rf_core_poll_mode ? ENABLED_IRQS_POLL_MODE : ENABLED_IRQS;
HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIEN) = enabled_irqs;
}
/*---------------------------------------------------------------------------*/
@ -544,6 +573,123 @@ rf_core_primary_mode_restore()
return RF_CORE_CMD_ERROR;
}
/*---------------------------------------------------------------------------*/
uint8_t
rf_core_rat_init(void)
{
rat_last_value = HWREG(RFC_RAT_BASE + RATCNT);
ctimer_set(&rat_overflow_timer, RAT_OVERFLOW_TIMER_INTERVAL,
rat_overflow_check_timer_cb, NULL);
return 1;
}
/*---------------------------------------------------------------------------*/
uint8_t
rf_core_check_rat_overflow(void)
{
uint32_t rat_current_value;
uint8_t interrupts_disabled;
/* Bail out if the RF is not on */
if(primary_mode == NULL || !primary_mode->is_on()) {
return 0;
}
interrupts_disabled = ti_lib_int_master_disable();
rat_current_value = HWREG(RFC_RAT_BASE + RATCNT);
if(rat_current_value + RAT_RANGE / 4 < rat_last_value) {
/* Overflow detected */
rat_last_overflow = RTIMER_NOW();
rat_overflow_counter++;
}
rat_last_value = rat_current_value;
if(!interrupts_disabled) {
ti_lib_int_master_enable();
}
return 1;
}
/*---------------------------------------------------------------------------*/
static void
rat_overflow_check_timer_cb(void *unused)
{
uint8_t success = 0;
uint8_t was_off = 0;
if(primary_mode != NULL) {
if(!primary_mode->is_on()) {
was_off = 1;
if(NETSTACK_RADIO.on() != RF_CORE_CMD_OK) {
PRINTF("overflow: on() failed\n");
ctimer_set(&rat_overflow_timer, CLOCK_SECOND,
rat_overflow_check_timer_cb, NULL);
return;
}
}
success = rf_core_check_rat_overflow();
if(was_off) {
NETSTACK_RADIO.off();
}
}
if(success) {
/* Retry after half of the interval */
ctimer_set(&rat_overflow_timer, RAT_OVERFLOW_TIMER_INTERVAL,
rat_overflow_check_timer_cb, NULL);
} else {
/* Retry sooner */
ctimer_set(&rat_overflow_timer, CLOCK_SECOND,
rat_overflow_check_timer_cb, NULL);
}
}
/*---------------------------------------------------------------------------*/
uint32_t
rf_core_convert_rat_to_rtimer(uint32_t rat_timestamp)
{
uint64_t rat_timestamp64;
uint32_t adjusted_overflow_counter;
uint8_t was_off = 0;
if(primary_mode == NULL) {
PRINTF("rf_core_convert_rat_to_rtimer: not initialized\n");
return 0;
}
if(!primary_mode->is_on()) {
was_off = 1;
NETSTACK_RADIO.on();
}
rf_core_check_rat_overflow();
if(was_off) {
NETSTACK_RADIO.off();
}
adjusted_overflow_counter = rat_overflow_counter;
/* if the timestamp is large and the last oveflow was recently,
assume that the timestamp refers to the time before the overflow */
if(rat_timestamp > (uint32_t)(RAT_RANGE * 3 / 4)) {
if(RTIMER_CLOCK_LT(RTIMER_NOW(),
rat_last_overflow + RAT_OVERFLOW_PERIOD_SECONDS * RTIMER_SECOND / 4)) {
adjusted_overflow_counter--;
}
}
/* add the overflowed time to the timestamp */
rat_timestamp64 = rat_timestamp + RAT_RANGE * adjusted_overflow_counter;
/* correct timestamp so that it refers to the end of the SFD */
rat_timestamp64 += primary_mode->sfd_timestamp_offset;
return RADIO_TO_RTIMER(rat_timestamp64 - rat_offset);
}
/*---------------------------------------------------------------------------*/
PROCESS_THREAD(rf_core_process, ev, data)
{
int len;
@ -582,11 +728,11 @@ cc26xx_rf_cpe1_isr(void)
return;
}
}
if(HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) & IRQ_RX_BUF_FULL) {
PRINTF("\nRF: BUF_FULL\n\n");
/* set a flag that the buffer is full*/
rx_is_full = true;
rf_core_rx_is_full = true;
/* make sure read_frame() will be called to make space in RX buffer */
process_poll(&rf_core_process);
/* Clear the IRQ_RX_BUF_FULL interrupt flag by writing zero to bit */

91
arch/cpu/cc26xx-cc13xx/rf-core/rf-core.h → arch/cpu/cc26x0-cc13x0/rf-core/rf-core.h
View File

@ -133,6 +133,17 @@ typedef struct rf_core_primary_mode_s {
* \return RF_CORE_CMD_OK or RF_CORE_CMD_ERROR
*/
uint8_t (*restore)(void);
/**
* \brief A pointer to a function that checks if the radio is on
* \return 1 or 0
*/
uint8_t (*is_on)(void);
/**
* \brief Offset of the end of SFD when compared to the radio HW-generated timestamp
*/
int16_t sfd_timestamp_offset;
} rf_core_primary_mode_t;
/*---------------------------------------------------------------------------*/
/* RF Command status constants - Correspond to values in the CMDSTA register */
@ -263,12 +274,65 @@ typedef struct rf_core_primary_mode_s {
/* Radio timer register */
#define RATCNT 0x00000004
/*---------------------------------------------------------------------------*/
/* Buffer full flag */
extern volatile bool rx_is_full;
/* Special value returned by CMD_IEEE_CCA_REQ when an RSSI is not available */
#define RF_CORE_CMD_CCA_REQ_RSSI_UNKNOWN -128
/* Used for the return value of channel_clear */
#define RF_CORE_CCA_CLEAR 1
#define RF_CORE_CCA_BUSY 0
/* Used as an error return value for get_cca_info */
#define RF_CORE_GET_CCA_INFO_ERROR 0xFF
/*
* Values of the individual bits of the ccaInfo field in CMD_IEEE_CCA_REQ's
* status struct
*/
#define RF_CORE_CMD_CCA_REQ_CCA_STATE_IDLE 0 /* 00 */
#define RF_CORE_CMD_CCA_REQ_CCA_STATE_BUSY 1 /* 01 */
#define RF_CORE_CMD_CCA_REQ_CCA_STATE_INVALID 2 /* 10 */
#define RF_CORE_CMD_CCA_REQ_CCA_CORR_IDLE (0 << 4)
#define RF_CORE_CMD_CCA_REQ_CCA_CORR_BUSY (1 << 4)
#define RF_CORE_CMD_CCA_REQ_CCA_CORR_INVALID (3 << 4)
#define RF_CORE_CMD_CCA_REQ_CCA_CORR_MASK (3 << 4)
#define RF_CORE_CMD_CCA_REQ_CCA_SYNC_BUSY (1 << 6)
/*---------------------------------------------------------------------------*/
#define RF_CORE_RX_BUF_INCLUDE_CRC 0
#define RF_CORE_RX_BUF_INCLUDE_RSSI 1
#define RF_CORE_RX_BUF_INCLUDE_CORR 1
#define RF_CORE_RX_BUF_INCLUDE_TIMESTAMP 1
/*---------------------------------------------------------------------------*/
/* How long to wait for an ongoing ACK TX to finish before starting frame TX */
#define RF_CORE_TX_TIMEOUT (RTIMER_SECOND >> 11)
/* How long to wait for the RF to enter RX in rf_cmd_ieee_rx */
#define RF_CORE_ENTER_RX_TIMEOUT (RTIMER_SECOND >> 10)
/* How long to wait for the RF to react on CMD_ABORT: around 1 msec */
#define RF_CORE_TURN_OFF_TIMEOUT (RTIMER_SECOND >> 10)
/* How long to wait for the RF to finish TX of a packet or an ACK */
#define RF_CORE_TX_FINISH_TIMEOUT (RTIMER_SECOND >> 7)
/*---------------------------------------------------------------------------*/
/* Make the main driver process visible to mode drivers */
PROCESS_NAME(rf_core_process);
/*---------------------------------------------------------------------------*/
/* Buffer full flag */
extern volatile bool rf_core_rx_is_full;
/*---------------------------------------------------------------------------*/
/* RSSI of the last read frame */
extern volatile int8_t rf_core_last_rssi;
/* Correlation/LQI of the last read frame */
extern volatile uint8_t rf_core_last_corr_lqi;
/* SFD timestamp of the last read frame, in rtimer ticks */
extern volatile uint32_t rf_core_last_packet_timestamp;
/*---------------------------------------------------------------------------*/
/* Are we currently in poll mode? */
extern uint8_t rf_core_poll_mode;
/*---------------------------------------------------------------------------*/
/**
* \brief Check whether the RF core is accessible
* \retval RF_CORE_ACCESSIBLE The core is powered and ready for access
@ -383,20 +447,19 @@ uint8_t rf_core_boot(void);
/**
* \brief Setup RF core interrupts
*/
void rf_core_setup_interrupts(bool poll_mode);
void rf_core_setup_interrupts(void);
/**
* \brief Enable interrupt on command done.
* \param fg set true to enable irq on foreground command done and false for
* background commands or if not in ieee mode.
* \param poll_mode true if the driver is in poll mode
*
* This is used within TX routines in order to be able to sleep the CM3 and
* wake up after TX has finished
*
* \sa rf_core_cmd_done_dis()
*/
void rf_core_cmd_done_en(bool fg, bool poll_mode);
void rf_core_cmd_done_en(bool fg);
/**
* \brief Disable the LAST_CMD_DONE and LAST_FG_CMD_DONE interrupts.
@ -405,7 +468,7 @@ void rf_core_cmd_done_en(bool fg, bool poll_mode);
*
* \sa rf_core_cmd_done_en()
*/
void rf_core_cmd_done_dis(bool poll_mode);
void rf_core_cmd_done_dis(void);
/**
* \brief Returns a pointer to the most recent proto-dependent Radio Op
@ -467,6 +530,22 @@ void rf_core_primary_mode_abort(void);
* \brief Abort the currently running primary radio op
*/
uint8_t rf_core_primary_mode_restore(void);
/**
* \brief Initialize the RAT to RTC conversion machinery
*/
uint8_t rf_core_rat_init(void);
/**
* \brief Check if RAT overflow has occured and increment the overflow counter if so
*/
uint8_t rf_core_check_rat_overflow(void);
/**
* \brief Convert from RAT timestamp to rtimer ticks
*/
uint32_t rf_core_convert_rat_to_rtimer(uint32_t rat_timestamp);
/*---------------------------------------------------------------------------*/
#endif /* RF_CORE_H_ */
/*---------------------------------------------------------------------------*/

0
arch/cpu/cc26xx-cc13xx/rf-core/rf-switch.h → arch/cpu/cc26x0-cc13x0/rf-core/rf-switch.h
View File

0
arch/cpu/cc26xx-cc13xx/rf-core/smartrf-settings.c → arch/cpu/cc26x0-cc13x0/rf-core/smartrf-settings.c
View File

0
arch/cpu/cc26xx-cc13xx/rf-core/smartrf-settings.h → arch/cpu/cc26x0-cc13x0/rf-core/smartrf-settings.h
View File

0
arch/cpu/cc26xx-cc13xx/rtimer-arch.c → arch/cpu/cc26x0-cc13x0/rtimer-arch.c
View File

0
arch/cpu/cc26xx-cc13xx/rtimer-arch.h → arch/cpu/cc26x0-cc13x0/rtimer-arch.h
View File

0
arch/cpu/cc26xx-cc13xx/slip-arch.c → arch/cpu/cc26x0-cc13x0/slip-arch.c
View File

35
arch/cpu/cc26xx-cc13xx/ti-lib.h → arch/cpu/cc26x0-cc13x0/ti-lib.h
View File

@ -52,9 +52,6 @@
#ifndef TI_LIB_H_
#define TI_LIB_H_
/*---------------------------------------------------------------------------*/
/* Include ROM API */
#include "ti-lib-rom.h"
/*---------------------------------------------------------------------------*/
/* aon_batmon.h */
#include "driverlib/aon_batmon.h"
@ -200,14 +197,16 @@
#define ti_lib_chipinfo_get_device_id_hw_rev_code(...) ChipInfo_GetDeviceIdHwRevCode(__VA_ARGS__)
#define ti_lib_chipinfo_get_chip_type(...) ChipInfo_GetChipType(__VA_ARGS__)
#define ti_lib_chipinfo_get_chip_family(...) ChipInfo_GetChipFamily(__VA_ARGS__)
#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
#if CPU_FAMILY_CC26X0R2
#define ti_lib_chipinfo_chip_family_is_cc26xx(...) ChipInfo_ChipFamilyIs_CC26x0(__VA_ARGS__)
#define ti_lib_chipinfo_chip_family_is_cc13xx(...) ChipInfo_ChipFamilyIs_CC13x0(__VA_ARGS__)
#define ti_lib_chipinfo_chip_family_is_cc26x0r2(...) ChipInfo_ChipFamilyIs_CC26x0R2(__VA_ARGS__)
#define ti_lib_chipinfo_chip_family_is_cc26x0r2(...) ChipInfo_ChipFamilyIs_CC26x0R2(__VA_ARGS__)
#else
#define ti_lib_chipinfo_chip_family_is_cc26xx(...) ChipInfo_ChipFamilyIsCC26xx(__VA_ARGS__)
#define ti_lib_chipinfo_chip_family_is_cc13xx(...) ChipInfo_ChipFamilyIsCC13xx(__VA_ARGS__)
#endif
#endif /* CPU_FAMILY_CC26X0R2 */
#define ti_lib_chipinfo_get_hw_revision(...) ChipInfo_GetHwRevision(__VA_ARGS__)
#define ti_lib_chipinfo_hw_revision_is_1_0(...) ChipInfo_HwRevisionIs_1_0(__VA_ARGS__)
#define ti_lib_chipinfo_hw_revision_is_gteq_2_0(...) ChipInfo_HwRevisionIs_GTEQ_2_0(__VA_ARGS__)
@ -394,16 +393,15 @@
#define ti_lib_pwr_ctrl_source_get(...) PowerCtrlSourceGet(__VA_ARGS__)
#define ti_lib_pwr_ctrl_reset_source_get(...) PowerCtrlResetSourceGet(__VA_ARGS__)
#define ti_lib_pwr_ctrl_reset_source_clear(...) PowerCtrlResetSourceClear(__VA_ARGS__)
#if !defined(ThisLibraryIsFor_CC26x0R2_HaltIfViolated)
#define ti_lib_pwr_ctrl_io_freeze_enable(...) PowerCtrlIOFreezeEnable(__VA_ARGS__)
#define ti_lib_pwr_ctrl_io_freeze_disable(...) PowerCtrlIOFreezeDisable(__VA_ARGS__)
#endif
/*---------------------------------------------------------------------------*/
/* rfc.h */
#include "driverlib/rfc.h"
#define ti_lib_rfc_rtrim(...) RFCRTrim(__VA_ARGS__)
#define ti_lib_rfc_adi3vco_ldo_voltage_mode(...) RFCAdi3VcoLdoVoltageMode(__VA_ARGS__)
#define ti_lib_rfc_hw_int_enable(...) RFCHwIntEnable(__VA_ARGS__)
#define ti_lib_rfc_hw_int_disable(...) RFCHwIntDisable(__VA_ARGS__)
#define ti_lib_rfc_hw_int_clear(...) RFCHwIntClear(__VA_ARGS__)
/*---------------------------------------------------------------------------*/
/* sys_ctrl.h */
#include "driverlib/sys_ctrl.h"
@ -416,7 +414,14 @@
#define ti_lib_sys_ctrl_aon_sync(...) SysCtrlAonSync(__VA_ARGS__)
#define ti_lib_sys_ctrl_aon_update(...) SysCtrlAonUpdate(__VA_ARGS__)
#define ti_lib_sys_ctrl_set_recharge_before_power_down(...) SysCtrlSetRechargeBeforePowerDown(__VA_ARGS__)
#define ti_lib_sys_ctrl_adjust_recharge_after_power_down(...) SysCtrlAdjustRechargeAfterPowerDown(__VA_ARGS__)
#if CPU_FAMILY_CC26X0R2
/* May need to change to XOSC_IN_LOW_POWER_MODE */
#define ti_lib_sys_ctrl_adjust_recharge_after_power_down() SysCtrlAdjustRechargeAfterPowerDown(XOSC_IN_HIGH_POWER_MODE)
#else
#define ti_lib_sys_ctrl_adjust_recharge_after_power_down() SysCtrlAdjustRechargeAfterPowerDown()
#endif /* CPU_FAMILY_CC26X0R2 */
#define ti_lib_sys_ctrl_dcdc_voltage_conditional_control(...) SysCtrl_DCDC_VoltageConditionalControl(__VA_ARGS__)
#define ti_lib_sys_ctrl_reset_source_get(...) SysCtrlResetSourceGet(__VA_ARGS__)
#define ti_lib_sys_ctrl_system_reset(...) SysCtrlSystemReset(__VA_ARGS__)
@ -567,6 +572,14 @@
#define ti_lib_watchdog_stall_enable(...) WatchdogStallEnable(__VA_ARGS__)
#define ti_lib_watchdog_stall_disable(...) WatchdogStallDisable(__VA_ARGS__)
/*---------------------------------------------------------------------------*/
/* crypto.h */
#include "driverlib/crypto.h"
#define ti_lib_crypto_aes_load_key(...) CRYPTOAesLoadKey(__VA_ARGS__)
#define ti_lib_crypto_aes_ecb(...) CRYPTOAesEcb(__VA_ARGS__)
#define ti_lib_crypto_aes_ecb_status(...) CRYPTOAesEcbStatus(__VA_ARGS__)
#define ti_lib_crypto_aes_ecb_finish(...) CRYPTOAesEcbFinish(__VA_ARGS__)
/*---------------------------------------------------------------------------*/
#endif /* TI_LIB_H_ */
/*---------------------------------------------------------------------------*/
/**

7
arch/cpu/cc26xx-cc13xx/Makefile.cc13xx
View File

@ -1,7 +0,0 @@
TI_XXWARE_PATH = lib/cc13xxware
CONTIKI_CPU_SOURCEFILES += smartrf-settings.c prop-mode.c prop-mode-tx-power.c
CFLAGS += -DCPU_FAMILY_CC13XX=1
include $(CONTIKI_CPU)/Makefile.cc26xx-cc13xx

3
arch/cpu/cc26xx-cc13xx/Makefile.cc26x0r2f
View File

@ -1,3 +0,0 @@
TI_XXWARE_PATH = lib/cc2640r2-sdk
include $(CONTIKI_CPU)/Makefile.cc26xx-cc13xx

3
arch/cpu/cc26xx-cc13xx/Makefile.cc26xx
View File

@ -1,3 +0,0 @@
TI_XXWARE_PATH = lib/cc26xxware
include $(CONTIKI_CPU)/Makefile.cc26xx-cc13xx

195
arch/cpu/cc26xx-cc13xx/ti-lib-rom.h
View File

@ -1,195 +0,0 @@
/*
* Copyright (c) 2016, Texas Instruments Incorporated - http://www.ti.com/
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*---------------------------------------------------------------------------*/
/**
* \addtogroup cc26xx-ti-lib
* @{
*
* \file
* Header file with CC13xxware/CC26xxware ROM API.
*/
/*---------------------------------------------------------------------------*/
#ifndef TI_LIB_ROM_H_
#define TI_LIB_ROM_H_
/*---------------------------------------------------------------------------*/
/* rom.h */
#include "driverlib/rom.h"
/* AON API */
#define ti_lib_rom_aon_event_mcu_wake_up_set ROM_AONEventMcuWakeUpSet
#define ti_lib_rom_aon_event_mcu_wake_up_get ROM_AONEventMcuWakeUpGet
#define ti_lib_rom_aon_event_aux_wake_up_set ROM_AONEventAuxWakeUpSet
#define ti_lib_rom_aon_event_aux_wake_up_get ROM_AONEventAuxWakeUpGet
#define ti_lib_rom_aon_event_mcu_set ROM_AONEventMcuSet
#define ti_lib_rom_aon_event_mcu_get ROM_AONEventMcuGet
/* AON_WUC API */
#define ti_lib_rom_aon_wuc_aux_reset ROM_AONWUCAuxReset
#define ti_lib_rom_aon_wuc_recharge_ctrl_config_set ROM_AONWUCRechargeCtrlConfigSet
#define ti_lib_rom_aon_wuc_osc_config ROM_AONWUCOscConfig
/* AUX_TDC API */
#define ti_lib_rom_aux_tdc_config_set ROM_AUXTDCConfigSet
#define ti_lib_rom_aux_tdc_measurement_done ROM_AUXTDCMeasurementDone
/* AUX_WUC API */
#define ti_lib_rom_aux_wuc_clock_enable ROM_AUXWUCClockEnable
#define ti_lib_rom_aux_wuc_clock_disable ROM_AUXWUCClockDisable
#define ti_lib_rom_aux_wuc_clock_status ROM_AUXWUCClockStatus
#define ti_lib_rom_aux_wuc_power_ctrl ROM_AUXWUCPowerCtrl
/* FLASH API */
#define ti_lib_rom_flash_power_mode_get ROM_FlashPowerModeGet
#define ti_lib_rom_flash_protection_set ROM_FlashProtectionSet
#define ti_lib_rom_flash_protection_get ROM_FlashProtectionGet
#define ti_lib_rom_flash_protection_save ROM_FlashProtectionSave
#define ti_lib_rom_flash_efuse_read_row ROM_FlashEfuseReadRow
#define ti_lib_rom_flash_disable_sectors_for_write ROM_FlashDisableSectorsForWrite
/* I2C API */
#define ti_lib_rom_i2c_master_init_exp_clk ROM_I2CMasterInitExpClk
#define ti_lib_rom_i2c_master_err ROM_I2CMasterErr
/* INTERRUPT API */
#define ti_lib_rom_int_priority_grouping_set ROM_IntPriorityGroupingSet
#define ti_lib_rom_int_priority_grouping_get ROM_IntPriorityGroupingGet
#define ti_lib_rom_int_priority_set ROM_IntPrioritySet
#define ti_lib_rom_int_priority_get ROM_IntPriorityGet
#define ti_lib_rom_int_enable ROM_IntEnable
#define ti_lib_rom_int_disable ROM_IntDisable
#define ti_lib_rom_int_pend_set ROM_IntPendSet
#define ti_lib_rom_int_pend_get ROM_IntPendGet
#define ti_lib_rom_int_pend_clear ROM_IntPendClear
/* IOC API */
#define ti_lib_rom_ioc_port_configure_set ROM_IOCPortConfigureSet
#if !defined(ThisLibraryIsFor_CC26x0R2_HaltIfViolated)
#define ti_lib_rom_ioc_port_configure_get ROM_IOCPortConfigureGet
#define ti_lib_rom_ioc_io_shutdown_set ROM_IOCIOShutdownSet
#define ti_lib_rom_ioc_io_mode_set ROM_IOCIOModeSet
#define ti_lib_rom_ioc_io_int_set ROM_IOCIOIntSet
#define ti_lib_rom_ioc_io_port_pull_set ROM_IOCIOPortPullSet
#define ti_lib_rom_ioc_io_hyst_set ROM_IOCIOHystSet
#define ti_lib_rom_ioc_io_input_set ROM_IOCIOInputSet
#define ti_lib_rom_ioc_io_slew_ctrl_set ROM_IOCIOSlewCtrlSet
#define ti_lib_rom_ioc_io_drv_strength_set ROM_IOCIODrvStrengthSet
#define ti_lib_rom_ioc_io_port_id_set ROM_IOCIOPortIdSet
#define ti_lib_rom_ioc_int_enable ROM_IOCIntEnable
#define ti_lib_rom_ioc_int_disable ROM_IOCIntDisable
#define ti_lib_rom_ioc_pin_type_gpio_input ROM_IOCPinTypeGpioInput
#define ti_lib_rom_ioc_pin_type_gpio_output ROM_IOCPinTypeGpioOutput
#define ti_lib_rom_ioc_pin_type_uart ROM_IOCPinTypeUart
#define ti_lib_rom_ioc_pin_type_ssi_master ROM_IOCPinTypeSsiMaster
#define ti_lib_rom_ioc_pin_type_ssi_slave ROM_IOCPinTypeSsiSlave
#define ti_lib_rom_ioc_pin_type_i2c ROM_IOCPinTypeI2c
#define ti_lib_rom_ioc_pin_type_aux ROM_IOCPinTypeAux
#endif
/* PRCM API */
#define ti_lib_rom_prcm_inf_clock_configure_set ROM_PRCMInfClockConfigureSet
#define ti_lib_rom_prcm_inf_clock_configure_get ROM_PRCMInfClockConfigureGet
#define ti_lib_rom_prcm_audio_clock_config_set ROM_PRCMAudioClockConfigSet
#define ti_lib_rom_prcm_power_domain_on ROM_PRCMPowerDomainOn
#define ti_lib_rom_prcm_power_domain_off ROM_PRCMPowerDomainOff
#define ti_lib_rom_prcm_peripheral_run_enable ROM_PRCMPeripheralRunEnable
#define ti_lib_rom_prcm_peripheral_run_disable ROM_PRCMPeripheralRunDisable
#define ti_lib_rom_prcm_peripheral_sleep_enable ROM_PRCMPeripheralSleepEnable
#define ti_lib_rom_prcm_peripheral_sleep_disable ROM_PRCMPeripheralSleepDisable
#define ti_lib_rom_prcm_peripheral_deep_sleep_enable ROM_PRCMPeripheralDeepSleepEnable
#define ti_lib_rom_prcm_peripheral_deep_sleep_disable ROM_PRCMPeripheralDeepSleepDisable
#define ti_lib_rom_prcm_power_domain_status ROM_PRCMPowerDomainStatus
#define ti_lib_rom_prcm_deep_sleep ROM_PRCMDeepSleep
/* SMPH API */
#define ti_lib_rom_smph_acquire ROM_SMPHAcquire
/* SSI API */
#define ti_lib_rom_ssi_config_set_exp_clk ROM_SSIConfigSetExpClk
#define ti_lib_rom_ssi_data_put ROM_SSIDataPut
#define ti_lib_rom_ssi_data_put_non_blocking ROM_SSIDataPutNonBlocking
#define ti_lib_rom_ssi_data_get ROM_SSIDataGet
#define ti_lib_rom_ssi_data_get_non_blocking ROM_SSIDataGetNonBlocking
/* TIMER API */
#define ti_lib_rom_timer_configure ROM_TimerConfigure
#define ti_lib_rom_timer_level_control ROM_TimerLevelControl
#define ti_lib_rom_timer_stall_control ROM_TimerStallControl
#define ti_lib_rom_timer_wait_on_trigger_control ROM_TimerWaitOnTriggerControl
/* TRNG API */
#define ti_lib_rom_trng_number_get ROM_TRNGNumberGet
/* UART API */
#define ti_lib_rom_uart_fifo_level_get ROM_UARTFIFOLevelGet
#define ti_lib_rom_uart_config_set_exp_clk ROM_UARTConfigSetExpClk
#define ti_lib_rom_uart_config_get_exp_clk ROM_UARTConfigGetExpClk
#define ti_lib_rom_uart_disable ROM_UARTDisable
#define ti_lib_rom_uart_char_get_non_blocking ROM_UARTCharGetNonBlocking
#define ti_lib_rom_uart_char_get ROM_UARTCharGet
#define ti_lib_rom_uart_char_put_non_blocking ROM_UARTCharPutNonBlocking
#define ti_lib_rom_uart_char_put ROM_UARTCharPut
/* UDMA API */
#define ti_lib_rom_udma_channel_attribute_enable ROM_uDMAChannelAttributeEnable
#define ti_lib_rom_udma_channel_attribute_disable ROM_uDMAChannelAttributeDisable
#define ti_lib_rom_udma_channel_attribute_get ROM_uDMAChannelAttributeGet
#define ti_lib_rom_udma_channel_control_set ROM_uDMAChannelControlSet
#define ti_lib_rom_udma_channel_transfer_set ROM_uDMAChannelTransferSet
#define ti_lib_rom_udma_channel_scatter_gather_set ROM_uDMAChannelScatterGatherSet
#define ti_lib_rom_udma_channel_size_get ROM_uDMAChannelSizeGet
#define ti_lib_rom_udma_channel_mode_get ROM_uDMAChannelModeGet
/* VIMS API */
#define ti_lib_rom_vims_configure ROM_VIMSConfigure
#define ti_lib_rom_vims_mode_set ROM_VIMSModeSet
/* HAPI */
#define ti_lib_hapi_crc32(a, b, c) HapiCrc32(a, b, c)
#define ti_lib_hapi_get_flash_size() HapiGetFlashSize()
#define ti_lib_hapi_get_chip_id() HapiGetChipId()
#define ti_lib_hapi_sector_erase(a) HapiSectorErase(a)
#define ti_lib_hapi_program_flash(a, b, c) HapiProgramFlash(a, b, c)
#define ti_lib_hapi_reset_device() HapiResetDevice()
#define ti_lib_hapi_fletcher32(a, b, c) HapiFletcher32(a, b, c)
#define ti_lib_hapi_min_value(a, b) HapiMinValue(a,b)
#define ti_lib_hapi_max_value(a, b) HapiMaxValue(a,b)
#define ti_lib_hapi_mean_value(a, b) HapiMeanValue(a,b)
#define ti_lib_hapi_stand_deviation_value(a, b) HapiStandDeviationValue(a,b)
#define ti_lib_hapi_hf_source_safe_switch() HapiHFSourceSafeSwitch()
#define ti_lib_hapi_select_comp_a_input(a) HapiSelectCompAInput(a)
#define ti_lib_hapi_select_comp_a_ref(a) HapiSelectCompARef(a)
#define ti_lib_hapi_select_adc_comp_b_input(a) HapiSelectADCCompBInput(a)
#define ti_lib_hapi_select_comp_b_ref(a) HapiSelectCompBRef(a)
/*---------------------------------------------------------------------------*/
#endif /* TI_LIB_ROM_H_ */
/*---------------------------------------------------------------------------*/
/**
* @}
*/

2
arch/cpu/msp430/Makefile.msp430
View File

@ -11,7 +11,7 @@ CFLAGS += -gstabs+
.SUFFIXES:
### Define the CPU directory
CONTIKI_CPU=$(CONTIKI)/arch/cpu/msp430
CONTIKI_CPU=$(ARCH_PATH)/cpu/msp430
### Define the source files we have in the MSP430 port

2
arch/cpu/msp430/uip-ipchksum.c
View File

@ -51,7 +51,7 @@ uint16_t
uip_ipchksum(void)
{
/* Assumes proper alignement of uip_buf. */
uint16_t *p = (uint16_t *)&uip_buf[UIP_LLH_LEN];
uint16_t *p = (uint16_t *)UIP_IP_BUF;
register uint16_t sum;
sum = p[0];

24
arch/cpu/native/Makefile.native
View File

@ -20,6 +20,30 @@ endif
CFLAGSNO = -Wall -g -I/usr/local/include $(CFLAGSWERROR)
CFLAGS += $(CFLAGSNO)
### Are we building with code size optimisations?
SMALL ?= 0
# The optimizations on native platform cannot be enabled in GCC (not Clang) versions less than 7.2
GCC_IS_CLANG := $(shell gcc --version 2> /dev/null | grep clang)
ifneq ($(GCC_IS_CLANG),)
NATIVE_CAN_OPTIIMIZE = 1
else
GCC_VERSION := $(shell gcc -dumpfullversion -dumpversion | cut -b1-3)
ifeq ($(shell expr $(GCC_VERSION) \>= 7.2), 1)
NATIVE_CAN_OPTIIMIZE = 1
else
NATIVE_CAN_OPTIIMIZE = 0
endif
endif
ifeq ($(NATIVE_CAN_OPTIIMIZE),1)
ifeq ($(SMALL),1)
CFLAGS += -Os
else
CFLAGS += -O2
endif
endif
ifeq ($(HOST_OS),Darwin)
AROPTS = -rc
LDFLAGS_WERROR := -Wl,-fatal_warnings

4
arch/cpu/native/net/tun6-net.c
View File

@ -263,7 +263,7 @@ output(const linkaddr_t *localdest)
{
LOG_DBG("SUT: %u\n", uip_len);
if(uip_len > 0) {
return tun_output(&uip_buf[UIP_LLH_LEN], uip_len);
return tun_output(uip_buf, uip_len);
}
return 0;
}
@ -297,7 +297,7 @@ handle_fd(fd_set *rset, fd_set *wset)
LOG_INFO("Tun6-handle FD\n");
if(FD_ISSET(tunfd, rset)) {
size = tun_input(&uip_buf[UIP_LLH_LEN], sizeof(uip_buf));
size = tun_input(uip_buf, sizeof(uip_buf));
LOG_DBG("TUN data incoming read:%d\n", size);
uip_len = size;
tcpip_input();

20
arch/cpu/nrf52832/Makefile.nrf52832
View File

@ -25,9 +25,9 @@ ifneq ($(NRF52_WITHOUT_SOFTDEVICE),1)
NRF52_SOFTDEVICE := $(shell find $(NRF52_SDK_ROOT) -name *iot*_softdevice.hex | head -n 1)
endif
$(info SoftDevice: $(NRF52_SOFTDEVICE))
LDSCRIPT := $(CONTIKI_CPU)/ld/nrf52-$(NRF52_DK_REVISION)-sd.ld
LDSCRIPT ?= $(CONTIKI_CPU)/ld/nrf52-$(NRF52_DK_REVISION)-sd.ld
else
LDSCRIPT := $(CONTIKI_CPU)/ld/nrf52.ld
LDSCRIPT ?= $(CONTIKI_CPU)/ld/nrf52.ld
endif
OUTPUT_FILENAME := $(CONTIKI_PROJECT)
@ -172,11 +172,11 @@ vpath %.s $(ASM_PATHS)
OBJECTS = $(C_OBJECTS) $(ASM_OBJECTS)
CLEAN += nrf52832.a
NRFLIB = $(BUILD_DIR_BOARD)/nrf52832.a
TARGET_LIBS = nrf52832.a $(NRF52_SDK_ROOT)/components/iot/ble_6lowpan/lib/ble_6lowpan.a
TARGET_LIBS = $(NRFLIB) $(NRF52_SDK_ROOT)/components/iot/ble_6lowpan/lib/ble_6lowpan.a
nrf52832.a: $(OBJECTS)
$(NRFLIB): $(OBJECTS)
$(TRACE_AR)
$(Q)$(AR) $(AROPTS) $@ $^
@ -185,10 +185,12 @@ $(OBJECT_DIRECTORY)/%.o: %.s
$(TRACE_CC)
$(Q)$(CC) $(ASMFLAGS) $(addprefix -I$(NRF52_SDK_ROOT)/, $(INC_PATHS)) -c -o $@ $<
%.jlink:
sed -e 's/#OUTPUT_FILENAME#/$*.hex/' $(CONTIKI_CPU)/flash.jlink > $@
include $(ARCH_PATH)/cpu/arm/cortex-m/cm4/Makefile.cm4
%.flash: %.hex %.jlink
%.jlink: $(OUT_HEX)
sed -e 's,#OUTPUT_FILENAME#,$<,' $(CONTIKI_CPU)/flash.jlink > $@
%.flash: %.jlink
@echo Flashing: $^
$(JLINK) $(JLINK_OPTS) -CommanderScript $*.jlink
@ -203,5 +205,3 @@ erase:
$(JLINK) $(JLINK_OPTS) -CommanderScript $(CONTIKI_CPU)/erase.jlink
.PHONY: softdevice.jlink
include $(CONTIKI)/arch/cpu/arm/cortex-m/cm4/Makefile.cm4

9
arch/cpu/nrf52832/ble/ble-mac.c
View File

@ -347,6 +347,12 @@ off(void)
return 1;
}
/*---------------------------------------------------------------------------*/
static int
max_payload(void)
{
return PACKETBUF_SIZE;
}
/*---------------------------------------------------------------------------*/
static void
init(void)
{
@ -371,7 +377,8 @@ const struct mac_driver ble_ipsp_mac_driver = {
send_packet,
NULL,
on,
off
off,
max_payload
};
/*---------------------------------------------------------------------------*/
/**

2
arch/cpu/nrf52832/ld/nrf52-pca10036-sd.ld
View File

@ -14,3 +14,5 @@ INCLUDE "nrf5x_common.ld"
/* These symbols are used by the stack check library. */
_stack = end;
_stack_origin = ORIGIN(RAM) + LENGTH(RAM);
_heap = _stack;
_eheap = _stack_origin;

2
arch/cpu/nrf52832/ld/nrf52-pca10040-sd.ld
View File

@ -14,3 +14,5 @@ INCLUDE "nrf5x_common.ld"
/* These symbols are used by the stack check library. */
_stack = end;
_stack_origin = ORIGIN(RAM) + LENGTH(RAM);
_heap = _stack;
_eheap = _stack_origin;

2
arch/cpu/nrf52832/ld/nrf52.ld
View File

@ -14,3 +14,5 @@ INCLUDE "nrf5x_common.ld"
/* These symbols are used by the stack check library. */
_stack = end;
_stack_origin = ORIGIN(RAM) + LENGTH(RAM);
_heap = _stack;
_eheap = _stack_origin;

4
arch/cpu/simplelink-cc13xx-cc26xx/Makefile.cc13xx-cc26xx
View File

@ -3,7 +3,7 @@
CC13x2_CC26x2_PRE_RTM ?= 1
# Core SDK is placed as a submodule under arch/cpu/cc13xx-cc26xx/lib.
# Core SDK is placed as a submodule under arch/cpu/simplelink-cc13xx-cc26xx/lib.
# Do a sanity check that Core SDK submodule has been initialized.
ifndef CORE_SDK
CORE_SDK := $(CONTIKI_CPU)/lib/coresdk_cc13xx_cc26xx
@ -120,7 +120,7 @@ LDFLAGS += -nostartfiles
LDFLAGS += -static
# Linker script
LDSCRIPT := $(CONTIKI_CPU)/$(SUBFAMILY)/$(SUBFAMILY).lds
LDSCRIPT ?= $(CONTIKI_CPU)/$(SUBFAMILY)/$(SUBFAMILY).lds
# Globally linked libraries
TARGET_LIBFILES += -lc -lgcc -lnosys -lm

2
arch/cpu/simplelink-cc13xx-cc26xx/cc13x0-cc26x0/Makefile.cc13x0-cc26x0
View File

@ -8,4 +8,4 @@ TARGET_LIBFILES += $(SDK_DRIVERS)/lib/drivers_$(SDK_LIB_NAME).am3g
TARGET_LIBFILES += $(SDK_DEVICES)/driverlib/bin/gcc/driverlib.lib
# CC13x0/CC26x0 is a Cortex-M3 architecture
include $(CONTIKI)/arch/cpu/arm/cortex-m/cm3/Makefile.cm3
include $(ARCH_PATH)/cpu/arm/cortex-m/cm3/Makefile.cm3

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