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3 Commits
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Simon Duquennoy
7c3108bf3b
jn516x: flush only uart Tx FIFO in main loop, leaving Rx FIFO intact
2016-02-01 13:36:18 +01:00
Simon Duquennoy
3ff44f77b9
jn516x: added sleep modes, support for 32kHz rtimer, and tickless clock
2015-12-03 13:57:19 +01:00
Simon Duquennoy
bd7d45080d
Added NXP JN516x platform
2015-09-23 14:38:31 +02:00