1291 lines
32 KiB
C
1291 lines
32 KiB
C
/*
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* Copyright (c) 2012, Philippe Retornaz
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* Copyright (c) 2012, EPFL STI IMT LSRO1 -- Mobots group
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* \addtogroup cc2538-usb
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* @{
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*
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* \file
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* Arch-specific routines for the cc2538 USB controller. Heavily based on
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* the cc2530 driver written by Philippe Retornaz
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*/
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#include "contiki.h"
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#include "usb-arch.h"
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#include "usb-api.h"
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#include "dev/usb-regs.h"
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#include "dev/nvic.h"
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#include "dev/gpio.h"
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#include "dev/ioc.h"
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#include "dev/udma.h"
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#include "sys/clock.h"
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#include "lpm.h"
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#include "reg.h"
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#include "dev/watchdog.h"
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#include <stdbool.h>
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#include <stdint.h>
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/*---------------------------------------------------------------------------*/
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#ifdef USB_PULLUP_PORT
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#define USB_PULLUP_PORT_BASE GPIO_PORT_TO_BASE(USB_PULLUP_PORT)
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#endif
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#ifdef USB_PULLUP_PIN
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#define USB_PULLUP_PIN_MASK GPIO_PIN_MASK(USB_PULLUP_PIN)
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#endif
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/*---------------------------------------------------------------------------*/
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/* EP max FIFO sizes without double buffering */
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#if CTRL_EP_SIZE > 32
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#error Control endpoint size too big
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#endif
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#if USB_EP1_SIZE > 32
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#error Endpoint 1 size too big
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#endif
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#if USB_EP2_SIZE > 64
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#error Endpoint 2 size too big
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#endif
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#if USB_EP3_SIZE > 128
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#error Endpoint 3 size too big
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#endif
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#if USB_EP4_SIZE > 256
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#error Endpoint 4 size too big
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#endif
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#if USB_EP5_SIZE > 512
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#error Endpoint 5 size too big
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#endif
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/*---------------------------------------------------------------------------*/
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/* uDMA transfer threshold. Use DMA only for data size higher than this */
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#define UDMA_SIZE_THRESHOLD 8
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/* uDMA channel control persistent flags */
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#define UDMA_TX_FLAGS (UDMA_CHCTL_ARBSIZE_128 | UDMA_CHCTL_XFERMODE_AUTO \
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| UDMA_CHCTL_SRCSIZE_8 | UDMA_CHCTL_DSTSIZE_8 \
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| UDMA_CHCTL_SRCINC_8 | UDMA_CHCTL_DSTINC_NONE)
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#define UDMA_RX_FLAGS (UDMA_CHCTL_ARBSIZE_128 | UDMA_CHCTL_XFERMODE_AUTO \
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| UDMA_CHCTL_SRCSIZE_8 | UDMA_CHCTL_DSTSIZE_8 \
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| UDMA_CHCTL_SRCINC_NONE | UDMA_CHCTL_DSTINC_8)
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/*---------------------------------------------------------------------------*/
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static const uint16_t ep_xfer_size[] = {
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CTRL_EP_SIZE,
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USB_EP1_SIZE,
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USB_EP2_SIZE,
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USB_EP3_SIZE,
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USB_EP4_SIZE,
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USB_EP5_SIZE,
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};
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/*---------------------------------------------------------------------------*/
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typedef struct _USBBuffer usb_buffer;
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/*---------------------------------------------------------------------------*/
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struct usb_endpoint {
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uint8_t halted;
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uint8_t addr;
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uint8_t flags;
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usb_buffer *buffer;
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struct process *event_process;
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unsigned int events;
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uint16_t xfer_size;
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};
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typedef struct usb_endpoint usb_endpoint_t;
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/*---------------------------------------------------------------------------*/
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#define EP_STATUS_IDLE 0
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#define EP_STATUS_RX 1
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#define EP_STATUS_TX 2
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#define USB_EP_FLAGS_TYPE_MASK 0x03
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#define USB_EP_FLAGS_TYPE_BULK 0x00
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#define USB_EP_FLAGS_TYPE_CONTROL 0x01
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#define USB_EP_FLAGS_TYPE_ISO 0x02
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#define USB_EP_FLAGS_TYPE_INTERRUPT 0x03
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#define USB_EP_FLAGS_ENABLED 0x04
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#define EP_TYPE(ep) ((ep)->flags & USB_EP_FLAGS_TYPE_MASK)
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#define IS_EP_TYPE(ep, type) (EP_TYPE(ep) == (type))
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#define IS_CONTROL_EP(ep) IS_EP_TYPE(ep, USB_EP_FLAGS_TYPE_CONTROL)
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#define IS_BULK_EP(ep) IS_EP_TYPE(ep, USB_EP_FLAGS_TYPE_BULK)
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#define IS_INTERRUPT_EP(ep) IS_EP_TYPE(ep, USB_EP_FLAGS_TYPE_INTERRUPT)
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#define IS_ISO_EP(ep) IS_EP_TYPE(ep, USB_EP_FLAGS_TYPE_ISO)
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#define USBIIE_INEPxIE(x) (1 << x)
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#define USBOIE_OUEPxIE(x) (1 << x)
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#define EPxIF(x) (1 << x)
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#define USB_READ_BLOCK 0x01
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#define USB_WRITE_NOTIFY 0x02
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#define USB_READ_NOTIFY 0x02
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#define USB_READ_FAIL 0x04
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/* Index in endpoint array */
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#define EP_INDEX(addr) ((addr) & 0x7f)
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/* Get address of endpoint struct */
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#define EP_STRUCT(addr) &usb_endpoints[EP_INDEX(addr)];
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/* Number of hardware endpoint */
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#define EP_HW_NUM(addr) ((addr) & 0x7f)
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/*---------------------------------------------------------------------------*/
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static usb_endpoint_t usb_endpoints[USB_MAX_ENDPOINTS];
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struct process *event_process = 0;
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volatile static unsigned int events = 0;
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static uint8_t ep0status;
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/*---------------------------------------------------------------------------*/
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static uint8_t ep0_tx(void);
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static uint8_t ep_tx(uint8_t ep_hw);
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static void in_ep_interrupt_handler(uint8_t ep_hw);
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static void out_ep_interrupt_handler(uint8_t ep_hw);
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static void ep0_interrupt_handler(void);
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/*---------------------------------------------------------------------------*/
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static uint8_t
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disable_irq(void)
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{
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uint8_t enabled = NVIC_IsIRQEnabled(USB_IRQn);
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if(enabled) {
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NVIC_DisableIRQ(USB_IRQn);
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}
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return enabled;
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}
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/*---------------------------------------------------------------------------*/
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static void
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restore_irq(uint8_t enabled)
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{
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if(enabled) {
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NVIC_EnableIRQ(USB_IRQn);
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}
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}
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/*---------------------------------------------------------------------------*/
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static void
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notify_process(unsigned int e)
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{
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events |= e;
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if(event_process) {
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process_poll(event_process);
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}
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}
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/*---------------------------------------------------------------------------*/
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static void
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notify_ep_process(usb_endpoint_t *ep, unsigned int e)
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{
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ep->events |= e;
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if(ep->event_process) {
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process_poll(ep->event_process);
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}
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}
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/*---------------------------------------------------------------------------*/
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void
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usb_set_ep_event_process(unsigned char addr, struct process *p)
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{
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usb_endpoint_t *ep = EP_STRUCT(addr);
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ep->event_process = p;
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}
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/*---------------------------------------------------------------------------*/
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void
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usb_arch_set_global_event_process(struct process *p)
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{
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event_process = p;
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}
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/*---------------------------------------------------------------------------*/
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unsigned int
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usb_arch_get_global_events(void)
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{
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uint8_t flag;
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volatile unsigned int e;
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flag = disable_irq();
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e = events;
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events = 0;
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restore_irq(flag);
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return e;
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}
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/*---------------------------------------------------------------------------*/
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unsigned int
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usb_get_ep_events(uint8_t addr)
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{
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volatile unsigned int e;
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uint8_t flag;
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usb_endpoint_t *ep = EP_STRUCT(addr);
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flag = disable_irq();
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e = ep->events;
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ep->events = 0;
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restore_irq(flag);
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return e;
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}
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/*---------------------------------------------------------------------------*/
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static void
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read_hw_buffer(uint8_t *to, uint8_t hw_ep, unsigned int len)
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{
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uint32_t fifo_addr = USB_F0 + (hw_ep << 3);
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if(USB_ARCH_CONF_DMA && len > UDMA_SIZE_THRESHOLD) {
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/* Set the transfer source and destination addresses */
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udma_set_channel_src(USB_ARCH_CONF_RX_DMA_CHAN, fifo_addr);
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udma_set_channel_dst(USB_ARCH_CONF_RX_DMA_CHAN,
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(uint32_t)(to) + len - 1);
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/* Configure the control word */
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udma_set_channel_control_word(USB_ARCH_CONF_RX_DMA_CHAN,
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UDMA_RX_FLAGS | udma_xfer_size(len));
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/* Enabled the RF RX uDMA channel */
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udma_channel_enable(USB_ARCH_CONF_RX_DMA_CHAN);
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/* Trigger the uDMA transfer */
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udma_channel_sw_request(USB_ARCH_CONF_RX_DMA_CHAN);
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/* Wait for the transfer to complete. */
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while(udma_channel_get_mode(USB_ARCH_CONF_RX_DMA_CHAN));
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} else {
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while(len--) {
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*to++ = REG(fifo_addr);
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}
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}
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}
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/*---------------------------------------------------------------------------*/
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static void
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write_hw_buffer(uint8_t hw_ep, uint8_t *from, unsigned int len)
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{
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uint32_t fifo_addr = USB_F0 + (hw_ep << 3);
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if(USB_ARCH_CONF_DMA && len > UDMA_SIZE_THRESHOLD) {
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/* Set the transfer source and destination addresses */
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udma_set_channel_src(USB_ARCH_CONF_TX_DMA_CHAN,
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(uint32_t)(from) + len - 1);
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udma_set_channel_dst(USB_ARCH_CONF_TX_DMA_CHAN, fifo_addr);
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/* Configure the control word */
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udma_set_channel_control_word(USB_ARCH_CONF_TX_DMA_CHAN,
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UDMA_TX_FLAGS | udma_xfer_size(len));
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/* Enabled the RF RX uDMA channel */
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udma_channel_enable(USB_ARCH_CONF_TX_DMA_CHAN);
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/* Trigger the uDMA transfer */
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udma_channel_sw_request(USB_ARCH_CONF_TX_DMA_CHAN);
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/* Wait for the transfer to complete. */
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while(udma_channel_get_mode(USB_ARCH_CONF_TX_DMA_CHAN));
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} else {
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while(len--) {
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REG(fifo_addr) = *from++;
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}
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}
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}
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/*---------------------------------------------------------------------------*/
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static void
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reset(void)
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{
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uint8_t e;
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for(e = 0; e < USB_MAX_ENDPOINTS; e++) {
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if(usb_endpoints[e].flags & USB_EP_FLAGS_ENABLED) {
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usb_buffer *buffer = usb_endpoints[e].buffer;
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usb_endpoints[e].flags = 0;
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usb_disable_endpoint(e);
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while(buffer) {
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buffer->flags &= ~USB_BUFFER_SUBMITTED;
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buffer = buffer->next;
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}
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}
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}
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usb_arch_setup_control_endpoint(0);
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}
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/*---------------------------------------------------------------------------*/
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static bool
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permit_pm1(void)
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{
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/*
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* Note: USB Suspend/Resume/Remote Wake-Up are not supported. Once the PLL is
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* on, it stays on.
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*/
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return REG(USB_CTRL) == 0;
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}
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/*---------------------------------------------------------------------------*/
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/* Init USB */
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void
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usb_arch_setup(void)
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{
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uint8_t i;
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lpm_register_peripheral(permit_pm1);
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/* Switch on USB PLL & USB module */
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REG(USB_CTRL) = USB_CTRL_USB_EN | USB_CTRL_PLL_EN;
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/* Wait until USB PLL is stable */
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while(!(REG(USB_CTRL) & USB_CTRL_PLL_LOCKED));
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/* Enable pull-up on usb port if driven by GPIO */
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#if defined(USB_PULLUP_PORT_BASE) && defined(USB_PULLUP_PIN_MASK)
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GPIO_SET_OUTPUT(USB_PULLUP_PORT_BASE, USB_PULLUP_PIN_MASK);
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GPIO_SET_PIN(USB_PULLUP_PORT_BASE, USB_PULLUP_PIN_MASK);
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#endif
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for(i = 0; i < USB_MAX_ENDPOINTS; i++) {
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usb_endpoints[i].flags = 0;
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usb_endpoints[i].event_process = 0;
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}
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reset();
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/* Disable all EP interrupts, EP0 interrupt will be enabled later */
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REG(USB_IIE) = 0;
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REG(USB_OIE) = 0;
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/* Initialise the USB control structures */
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if(USB_ARCH_CONF_DMA) {
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/* Disable peripheral triggers for our channels */
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udma_channel_mask_set(USB_ARCH_CONF_RX_DMA_CHAN);
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udma_channel_mask_set(USB_ARCH_CONF_TX_DMA_CHAN);
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}
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NVIC_EnableIRQ(USB_IRQn);
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}
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/*---------------------------------------------------------------------------*/
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void
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usb_submit_recv_buffer(uint8_t addr, usb_buffer *buffer)
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{
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usb_buffer **tailp;
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uint8_t flag;
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usb_endpoint_t *ep = EP_STRUCT(addr);
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if(!(ep->flags & USB_EP_FLAGS_ENABLED)) {
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return;
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}
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if(buffer->data == NULL && EP_HW_NUM(addr) == 0) {
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if(buffer->flags & USB_BUFFER_NOTIFY) {
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notify_ep_process(ep, USB_EP_EVENT_NOTIFICATION);
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}
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return;
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}
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flag = disable_irq();
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tailp = &ep->buffer;
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while(*tailp) {
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tailp = &(*tailp)->next;
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}
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*tailp = buffer;
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while(buffer) {
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buffer->flags |= USB_BUFFER_SUBMITTED;
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buffer = buffer->next;
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}
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REG(USB_INDEX) = EP_HW_NUM(addr);
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if(!EP_HW_NUM(ep->addr)) {
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if(REG(USB_CS0) & USB_CS0_OUTPKT_RDY) {
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ep0_interrupt_handler();
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}
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} else {
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if(REG(USB_CSOL) & USB_CSOL_OUTPKT_RDY) {
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out_ep_interrupt_handler(EP_HW_NUM(ep->addr));
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}
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}
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restore_irq(flag);
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}
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/*---------------------------------------------------------------------------*/
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void
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usb_submit_xmit_buffer(uint8_t addr, usb_buffer *buffer)
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{
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usb_buffer **tailp;
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uint8_t flag;
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uint8_t res;
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usb_endpoint_t *ep = EP_STRUCT(addr);
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if(!(ep->flags & USB_EP_FLAGS_ENABLED)) {
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return;
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}
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flag = disable_irq();
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if(EP_HW_NUM(addr) == 0) {
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if(buffer->data == NULL) {
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/* We are asked to send a STATUS packet.
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* But the USB hardware will do this automatically
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* as soon as we release the HW FIFO. */
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REG(USB_INDEX) = 0;
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REG(USB_CS0) = USB_CS0_CLR_OUTPKT_RDY | USB_CS0_DATA_END;
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notify_ep_process(ep, USB_EP_EVENT_NOTIFICATION);
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restore_irq(flag);
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return;
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} else {
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/* Release the HW FIFO */
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REG(USB_INDEX) = 0;
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REG(USB_CS0) = USB_CS0_CLR_OUTPKT_RDY;
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}
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}
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tailp = &ep->buffer;
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while(*tailp) {
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tailp = &(*tailp)->next;
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}
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*tailp = buffer;
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while(buffer) {
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buffer->flags |= USB_BUFFER_SUBMITTED | USB_BUFFER_IN;
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buffer = buffer->next;
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}
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REG(USB_INDEX) = EP_HW_NUM(ep->addr);
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if(EP_HW_NUM(ep->addr)) {
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res = ep_tx(EP_HW_NUM(ep->addr));
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} else {
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res = ep0_tx();
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}
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restore_irq(flag);
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if(res & USB_WRITE_NOTIFY) {
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notify_ep_process(ep, USB_EP_EVENT_NOTIFICATION);
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}
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}
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/*---------------------------------------------------------------------------*/
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static void
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ep0_setup(void)
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{
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REG(USB_IIE) |= USB_IIE_EP0IE;
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}
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/*---------------------------------------------------------------------------*/
|
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static void
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in_ep_setup(uint8_t addr)
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{
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uint8_t ei = EP_HW_NUM(addr);
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usb_endpoint_t *ep = EP_STRUCT(addr);
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/* Enable IN EP interrupt */
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REG(USB_IIE) |= USBIIE_INEPxIE(ei);
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/* Set internal FIFO size */
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REG(USB_MAXI) = ep->xfer_size / 8;
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if(IS_ISO_EP(ep)) {
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REG(USB_CSIH) |= USB_CSOH_ISO;
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} else {
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REG(USB_CSIH) &= ~USB_CSOH_ISO;
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}
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}
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|
/*---------------------------------------------------------------------------*/
|
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static void
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out_ep_setup(uint8_t addr)
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{
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uint8_t ei = EP_HW_NUM(addr);
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usb_endpoint_t *ep = EP_STRUCT(addr);
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|
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/* Enable OUT EP interrupt */
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REG(USB_OIE) |= USBOIE_OUEPxIE(ei);
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|
|
/* Set internal FIFO size */
|
|
REG(USB_MAXO) = ep->xfer_size / 8;
|
|
|
|
if(IS_ISO_EP(ep)) {
|
|
REG(USB_CSOH) |= USB_CSOH_ISO;
|
|
} else {
|
|
REG(USB_CSOH) &= ~USB_CSOH_ISO;
|
|
}
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
static void
|
|
ep_setup(uint8_t addr)
|
|
{
|
|
uint8_t ei = EP_HW_NUM(addr);
|
|
uint8_t flag;
|
|
usb_endpoint_t *ep = EP_STRUCT(addr);
|
|
|
|
ep->halted = 0;
|
|
ep->flags |= USB_EP_FLAGS_ENABLED;
|
|
ep->buffer = 0;
|
|
ep->addr = addr;
|
|
ep->events = 0;
|
|
ep->xfer_size = ep_xfer_size[ei];
|
|
|
|
flag = disable_irq();
|
|
|
|
/* Select endpoint register */
|
|
REG(USB_INDEX) = ei;
|
|
|
|
/* EP0 requires special handing */
|
|
if(ei == 0) {
|
|
ep0_setup();
|
|
} else {
|
|
if(addr & 0x80) {
|
|
in_ep_setup(addr);
|
|
} else {
|
|
out_ep_setup(addr);
|
|
}
|
|
}
|
|
|
|
restore_irq(flag);
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
void
|
|
usb_arch_setup_iso_endpoint(uint8_t addr)
|
|
{
|
|
usb_endpoint_t *ep = EP_STRUCT(addr);
|
|
|
|
ep->flags = USB_EP_FLAGS_TYPE_ISO;
|
|
|
|
ep_setup(addr);
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
void
|
|
usb_arch_setup_control_endpoint(uint8_t addr)
|
|
{
|
|
usb_endpoint_t *ep = EP_STRUCT(addr);
|
|
|
|
ep->flags = USB_EP_FLAGS_TYPE_CONTROL;
|
|
|
|
ep_setup(addr);
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
void
|
|
usb_arch_setup_bulk_endpoint(uint8_t addr)
|
|
{
|
|
usb_endpoint_t *ep = EP_STRUCT(addr);
|
|
|
|
ep->flags = USB_EP_FLAGS_TYPE_BULK;
|
|
|
|
ep_setup(addr);
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
void
|
|
usb_arch_setup_interrupt_endpoint(uint8_t addr)
|
|
{
|
|
usb_endpoint_t *ep = EP_STRUCT(addr);
|
|
|
|
ep->flags = USB_EP_FLAGS_TYPE_INTERRUPT;
|
|
|
|
ep_setup(addr);
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
static void
|
|
ep0_dis(void)
|
|
{
|
|
REG(USB_IIE) &= ~USB_IIE_EP0IE;
|
|
/* Clear any pending status flags */
|
|
REG(USB_CS0) = 0xC0;
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
static void
|
|
in_ep_dis(uint8_t addr)
|
|
{
|
|
REG(USB_MAXI) = 0;
|
|
REG(USB_IIE) &= ~USBIIE_INEPxIE(EP_HW_NUM(addr));
|
|
|
|
/* Flush pending */
|
|
REG(USB_CSIL) = USB_CSIL_FLUSH_PACKET;
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
static void
|
|
out_ep_dis(uint8_t addr)
|
|
{
|
|
REG(USB_MAXO) = 0;
|
|
REG(USB_OIE) &= ~USBOIE_OUEPxIE(EP_HW_NUM(addr));
|
|
|
|
/* Flush pending */
|
|
REG(USB_CSOL) = USB_CSIL_FLUSH_PACKET;
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
void
|
|
usb_arch_disable_endpoint(uint8_t addr)
|
|
{
|
|
uint8_t ei = EP_HW_NUM(addr);
|
|
uint8_t flag;
|
|
usb_endpoint_t *ep = EP_STRUCT(addr);
|
|
|
|
ep->flags &= ~USB_EP_FLAGS_ENABLED;
|
|
|
|
flag = disable_irq();
|
|
|
|
REG(USB_INDEX) = ei;
|
|
if(ei == 0) {
|
|
ep0_dis();
|
|
} else {
|
|
if(addr & 0x80) {
|
|
in_ep_dis(addr);
|
|
} else {
|
|
out_ep_dis(addr);
|
|
}
|
|
}
|
|
restore_irq(flag);
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
void
|
|
usb_arch_discard_all_buffers(uint8_t addr)
|
|
{
|
|
usb_buffer *buffer;
|
|
uint8_t flag;
|
|
volatile usb_endpoint_t *ep = EP_STRUCT(addr);
|
|
|
|
flag = disable_irq();
|
|
|
|
buffer = ep->buffer;
|
|
ep->buffer = NULL;
|
|
restore_irq(flag);
|
|
|
|
while(buffer) {
|
|
buffer->flags &= ~USB_BUFFER_SUBMITTED;
|
|
buffer = buffer->next;
|
|
}
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
static void
|
|
set_stall(uint8_t addr, uint8_t stall)
|
|
{
|
|
uint8_t ei = EP_HW_NUM(addr);
|
|
|
|
REG(USB_INDEX) = ei;
|
|
if(ei == 0) {
|
|
/* Stall is automatically deasserted on EP0 */
|
|
if(stall) {
|
|
ep0status = EP_STATUS_IDLE;
|
|
REG(USB_CS0) |= USB_CS0_SEND_STALL | USB_CS0_OUTPKT_RDY;
|
|
}
|
|
} else {
|
|
if(addr & 0x80) {
|
|
if(stall) {
|
|
REG(USB_CSIL) |= USB_CSIL_SEND_STALL;
|
|
} else {
|
|
REG(USB_CSIL) &= ~USB_CSIL_SEND_STALL;
|
|
}
|
|
} else {
|
|
if(stall) {
|
|
REG(USB_CSOL) |= USB_CSOL_SEND_STALL;
|
|
} else {
|
|
REG(USB_CSOL) &= ~USB_CSOL_SEND_STALL;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
void
|
|
usb_arch_control_stall(uint8_t addr)
|
|
{
|
|
uint8_t ei = EP_HW_NUM(addr);
|
|
uint8_t flag;
|
|
|
|
if(ei > USB_MAX_ENDPOINTS) {
|
|
return;
|
|
}
|
|
|
|
flag = disable_irq();
|
|
|
|
set_stall(addr, 1);
|
|
|
|
restore_irq(flag);
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
void
|
|
usb_arch_halt_endpoint(uint8_t addr, int halt)
|
|
{
|
|
uint8_t ei = EP_HW_NUM(addr);
|
|
uint8_t flag;
|
|
usb_endpoint_t *ep = EP_STRUCT(addr);
|
|
|
|
if(ei > USB_MAX_ENDPOINTS) {
|
|
return;
|
|
}
|
|
|
|
if(!(ep->flags & USB_EP_FLAGS_ENABLED)) {
|
|
return;
|
|
}
|
|
|
|
flag = disable_irq();
|
|
|
|
if(halt) {
|
|
ep->halted = 0x1;
|
|
set_stall(addr, 1);
|
|
} else {
|
|
ep->halted = 0;
|
|
set_stall(addr, 0);
|
|
|
|
if(ep->buffer && (ep->buffer->flags & USB_BUFFER_HALT)) {
|
|
ep->buffer->flags &= ~USB_BUFFER_SUBMITTED;
|
|
if(ep->buffer->flags & USB_BUFFER_NOTIFY) {
|
|
notify_ep_process(ep, USB_EP_EVENT_NOTIFICATION);
|
|
}
|
|
ep->buffer = ep->buffer->next;
|
|
}
|
|
if(ei) {
|
|
out_ep_interrupt_handler(EP_HW_NUM(addr));
|
|
}
|
|
}
|
|
|
|
restore_irq(flag);
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
void
|
|
usb_arch_set_configuration(uint8_t usb_configuration_value)
|
|
{
|
|
return;
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
uint16_t
|
|
usb_arch_get_ep_status(uint8_t addr)
|
|
{
|
|
uint8_t ei = EP_INDEX(addr);
|
|
usb_endpoint_t *ep = EP_STRUCT(addr);
|
|
|
|
if(ei > USB_MAX_ENDPOINTS) {
|
|
return 0;
|
|
}
|
|
|
|
return ep->halted;
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
void
|
|
usb_arch_set_address(uint8_t addr)
|
|
{
|
|
REG(USB_ADDR) = addr;
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
int
|
|
usb_arch_send_pending(uint8_t addr)
|
|
{
|
|
uint8_t flag;
|
|
uint8_t ret;
|
|
uint8_t ei = EP_INDEX(addr);
|
|
|
|
flag = disable_irq();
|
|
|
|
REG(USB_INDEX) = ei;
|
|
if(ei == 0) {
|
|
ret = REG(USB_CS0) & USB_CS0_INPKT_RDY;
|
|
} else {
|
|
ret = REG(USB_CSIL) & USB_CSIL_INPKT_RDY;
|
|
}
|
|
|
|
restore_irq(flag);
|
|
|
|
return ret;
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
static unsigned int
|
|
get_receive_capacity(usb_buffer *buffer)
|
|
{
|
|
unsigned int capacity = 0;
|
|
|
|
while(buffer &&
|
|
!(buffer->flags & (USB_BUFFER_IN | USB_BUFFER_SETUP | USB_BUFFER_HALT))) {
|
|
capacity += buffer->left;
|
|
buffer = buffer->next;
|
|
}
|
|
return capacity;
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
static usb_buffer *
|
|
skip_buffers_until(usb_buffer *buffer, unsigned int mask, unsigned int flags,
|
|
uint8_t *resp)
|
|
{
|
|
while(buffer && !((buffer->flags & mask) == flags)) {
|
|
buffer->flags &= ~USB_BUFFER_SUBMITTED;
|
|
buffer->flags |= USB_BUFFER_FAILED;
|
|
if(buffer->flags & USB_BUFFER_NOTIFY) {
|
|
*resp |= USB_READ_NOTIFY;
|
|
}
|
|
buffer = buffer->next;
|
|
}
|
|
return buffer;
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
static uint8_t
|
|
fill_buffers(usb_buffer *buffer, uint8_t hw_ep, unsigned int len,
|
|
uint8_t short_packet)
|
|
{
|
|
unsigned int t;
|
|
uint8_t res = 0;
|
|
|
|
do {
|
|
if(buffer->left < len) {
|
|
t = buffer->left;
|
|
} else {
|
|
t = len;
|
|
}
|
|
len -= t;
|
|
buffer->left -= t;
|
|
|
|
read_hw_buffer(buffer->data, hw_ep, t);
|
|
|
|
buffer->data += t;
|
|
|
|
if(len == 0) {
|
|
break;
|
|
}
|
|
|
|
buffer->flags &= ~(USB_BUFFER_SUBMITTED | USB_BUFFER_SHORT_PACKET);
|
|
if(buffer->flags & USB_BUFFER_NOTIFY) {
|
|
res |= USB_READ_NOTIFY;
|
|
}
|
|
buffer = buffer->next;
|
|
} while(1);
|
|
|
|
if(short_packet) {
|
|
buffer->flags |= USB_BUFFER_SHORT_PACKET;
|
|
}
|
|
|
|
if((buffer->left == 0) || (buffer->flags & USB_BUFFER_PACKET_END)) {
|
|
buffer->flags &= ~USB_BUFFER_SUBMITTED;
|
|
if(buffer->flags & USB_BUFFER_NOTIFY) {
|
|
res |= USB_READ_NOTIFY;
|
|
}
|
|
buffer = buffer->next;
|
|
} else {
|
|
if(short_packet) {
|
|
if(buffer->left && !(buffer->flags & USB_BUFFER_SHORT_END)) {
|
|
buffer->flags |= USB_BUFFER_FAILED;
|
|
res |= USB_READ_FAIL;
|
|
}
|
|
buffer->flags &= ~USB_BUFFER_SUBMITTED;
|
|
if(buffer->flags & USB_BUFFER_NOTIFY) {
|
|
res |= USB_READ_NOTIFY;
|
|
}
|
|
buffer = buffer->next;
|
|
}
|
|
}
|
|
|
|
usb_endpoints[hw_ep].buffer = buffer;
|
|
|
|
return res;
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
static uint8_t
|
|
ep0_get_setup_pkt(void)
|
|
{
|
|
uint8_t res = 0;
|
|
usb_buffer *buffer =
|
|
skip_buffers_until(usb_endpoints[0].buffer, USB_BUFFER_SETUP,
|
|
USB_BUFFER_SETUP, &res);
|
|
|
|
usb_endpoints[0].buffer = buffer;
|
|
|
|
if(!buffer || buffer->left < 8) {
|
|
return USB_READ_BLOCK;
|
|
}
|
|
|
|
read_hw_buffer(buffer->data, 0, 8);
|
|
buffer->left -= 8;
|
|
|
|
buffer->flags &= ~USB_BUFFER_SUBMITTED;
|
|
if(buffer->flags & USB_BUFFER_NOTIFY) {
|
|
res |= USB_READ_NOTIFY;
|
|
}
|
|
|
|
if(buffer->data[6] || buffer->data[7]) {
|
|
REG(USB_CS0) |= USB_CS0_CLR_OUTPKT_RDY;
|
|
ep0status = buffer->data[0] & 0x80 ? EP_STATUS_TX : EP_STATUS_RX;
|
|
}
|
|
|
|
buffer->data += 8;
|
|
|
|
usb_endpoints[0].buffer = buffer->next;
|
|
|
|
return res;
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
static uint8_t
|
|
ep0_get_data_pkt(void)
|
|
{
|
|
uint8_t res = 0;
|
|
uint8_t short_packet = 0;
|
|
usb_buffer *buffer = usb_endpoints[0].buffer;
|
|
uint8_t len = REG(USB_CNT0);
|
|
|
|
if(!buffer) {
|
|
return USB_READ_BLOCK;
|
|
}
|
|
|
|
if(buffer->flags & (USB_BUFFER_SETUP | USB_BUFFER_IN)) {
|
|
buffer->flags |= USB_BUFFER_FAILED;
|
|
buffer->flags &= ~USB_BUFFER_SUBMITTED;
|
|
if(buffer->flags & USB_BUFFER_NOTIFY) {
|
|
res |= USB_READ_NOTIFY;
|
|
}
|
|
/* Flush the fifo */
|
|
while(len--) {
|
|
REG(USB_F0);
|
|
}
|
|
usb_endpoints[0].buffer = buffer->next;
|
|
/* Force data stage end */
|
|
REG(USB_CS0) |= USB_CS0_CLR_OUTPKT_RDY | USB_CS0_DATA_END;
|
|
|
|
ep0status = EP_STATUS_IDLE;
|
|
return res;
|
|
}
|
|
|
|
if(get_receive_capacity(buffer) < len) {
|
|
/* Wait until we queue more buffers */
|
|
return USB_READ_BLOCK;
|
|
}
|
|
|
|
if(len < usb_endpoints[0].xfer_size) {
|
|
short_packet = 1;
|
|
}
|
|
|
|
res = fill_buffers(buffer, 0, len, short_packet);
|
|
|
|
if(short_packet) {
|
|
/* The usb-core will send a status packet, we will release the fifo at this stage */
|
|
ep0status = EP_STATUS_IDLE;
|
|
} else {
|
|
REG(USB_CS0) |= USB_CS0_CLR_OUTPKT_RDY;
|
|
}
|
|
return res;
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
static uint8_t
|
|
ep0_tx(void)
|
|
{
|
|
usb_buffer *buffer = usb_endpoints[0].buffer;
|
|
unsigned int len = usb_endpoints[0].xfer_size;
|
|
uint8_t data_end = 0;
|
|
uint8_t res = 0;
|
|
|
|
/* If TX Fifo still busy or ep0 not in TX data stage don't do anything */
|
|
if((REG(USB_CS0) & USB_CS0_INPKT_RDY) || (ep0status != EP_STATUS_TX)) {
|
|
return 0;
|
|
}
|
|
|
|
if(!buffer) {
|
|
return 0;
|
|
}
|
|
|
|
if(!(buffer->flags & USB_BUFFER_IN)) {
|
|
/* We should TX but queued buffer is in RX */
|
|
return 0;
|
|
}
|
|
|
|
while(buffer) {
|
|
unsigned int copy;
|
|
|
|
if(buffer->left < len) {
|
|
copy = buffer->left;
|
|
} else {
|
|
copy = len;
|
|
}
|
|
|
|
len -= copy;
|
|
buffer->left -= copy;
|
|
write_hw_buffer(0, buffer->data, copy);
|
|
buffer->data += copy;
|
|
if(buffer->left == 0) {
|
|
if(buffer->flags & USB_BUFFER_SHORT_END) {
|
|
if(len == 0) {
|
|
break; // We keep the buffer in queue so we will send a ZLP next time.
|
|
} else {
|
|
data_end = 1;
|
|
len = 0; // Stop looking for more data to send
|
|
}
|
|
}
|
|
buffer->flags &= ~USB_BUFFER_SUBMITTED;
|
|
if(buffer->flags & USB_BUFFER_NOTIFY) {
|
|
res |= USB_WRITE_NOTIFY;
|
|
}
|
|
buffer = buffer->next;
|
|
}
|
|
if(len == 0) {
|
|
break; // FIFO is full, send packet.
|
|
}
|
|
}
|
|
if(len) {
|
|
data_end = 1;
|
|
}
|
|
usb_endpoints[0].buffer = buffer;
|
|
|
|
/*
|
|
* Workaround the fact that the usb controller do not like to have DATA_END
|
|
* set after INPKT_RDY for the last packet. Thus if no more is in the queue
|
|
* set DATA_END
|
|
*/
|
|
if(data_end || !buffer) {
|
|
ep0status = EP_STATUS_IDLE;
|
|
REG(USB_CS0) |= USB_CS0_INPKT_RDY | USB_CS0_DATA_END;
|
|
} else {
|
|
REG(USB_CS0) |= USB_CS0_INPKT_RDY;
|
|
}
|
|
|
|
return res;
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
static void
|
|
ep0_interrupt_handler(void)
|
|
{
|
|
uint8_t cs0;
|
|
uint8_t res;
|
|
|
|
REG(USB_INDEX) = 0;
|
|
cs0 = REG(USB_CS0);
|
|
if(cs0 & USB_CS0_SENT_STALL) {
|
|
/* Ack the stall */
|
|
REG(USB_CS0) = 0;
|
|
ep0status = EP_STATUS_IDLE;
|
|
}
|
|
if(cs0 & USB_CS0_SETUP_END) {
|
|
/* Clear it */
|
|
REG(USB_CS0) = USB_CS0_CLR_SETUP_END;
|
|
ep0status = EP_STATUS_IDLE;
|
|
}
|
|
|
|
if(cs0 & USB_CS0_OUTPKT_RDY) {
|
|
if(ep0status == EP_STATUS_IDLE) {
|
|
res = ep0_get_setup_pkt();
|
|
} else {
|
|
res = ep0_get_data_pkt();
|
|
}
|
|
|
|
if(res & USB_READ_NOTIFY) {
|
|
notify_ep_process(&usb_endpoints[0], USB_EP_EVENT_NOTIFICATION);
|
|
}
|
|
if(res & USB_READ_BLOCK) {
|
|
return;
|
|
}
|
|
}
|
|
|
|
res = ep0_tx();
|
|
|
|
if(res & USB_WRITE_NOTIFY) {
|
|
notify_ep_process(&usb_endpoints[0], USB_EP_EVENT_NOTIFICATION);
|
|
}
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
static uint8_t
|
|
ep_tx(uint8_t ep_hw)
|
|
{
|
|
unsigned int len;
|
|
uint8_t res = 0;
|
|
usb_endpoint_t *ep = EP_STRUCT(ep_hw);
|
|
|
|
len = ep->xfer_size;
|
|
|
|
if(ep->halted) {
|
|
return 0;
|
|
}
|
|
|
|
if(!ep->buffer || !(ep->buffer->flags & USB_BUFFER_IN)) {
|
|
return 0;
|
|
}
|
|
|
|
while(ep->buffer) {
|
|
unsigned int copy;
|
|
|
|
if(ep->buffer->left < len) {
|
|
copy = ep->buffer->left;
|
|
} else {
|
|
copy = len;
|
|
}
|
|
|
|
len -= copy;
|
|
ep->buffer->left -= copy;
|
|
|
|
/*
|
|
* Delay somewhat if the previous packet has not yet left the IN FIFO,
|
|
* making sure the dog doesn't bark while we're waiting
|
|
*/
|
|
while(REG(USB_CSIL) & USB_CSIL_INPKT_RDY) {
|
|
watchdog_periodic();
|
|
}
|
|
|
|
write_hw_buffer(EP_INDEX(ep_hw), ep->buffer->data, copy);
|
|
ep->buffer->data += copy;
|
|
|
|
if(ep->buffer->left == 0) {
|
|
if(ep->buffer->flags & USB_BUFFER_SHORT_END) {
|
|
if(len == 0) {
|
|
/* We keep the buffer in queue so we will send a ZLP next */
|
|
break;
|
|
} else {
|
|
/* Stop looking for more data to send */
|
|
len = 0;
|
|
}
|
|
}
|
|
ep->buffer->flags &= ~USB_BUFFER_SUBMITTED;
|
|
if(ep->buffer->flags & USB_BUFFER_NOTIFY) {
|
|
res |= USB_WRITE_NOTIFY;
|
|
}
|
|
ep->buffer = ep->buffer->next;
|
|
}
|
|
if(len == 0) {
|
|
/* FIFO full, send */
|
|
break;
|
|
}
|
|
}
|
|
|
|
REG(USB_CSIL) |= USB_CSIL_INPKT_RDY;
|
|
|
|
return res;
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
static uint8_t
|
|
ep_get_data_pkt(uint8_t ep_hw)
|
|
{
|
|
uint16_t pkt_len;
|
|
uint8_t res;
|
|
uint8_t short_packet = 0;
|
|
usb_endpoint_t *ep = EP_STRUCT(ep_hw);
|
|
|
|
if(!ep->buffer) {
|
|
return USB_READ_BLOCK;
|
|
}
|
|
|
|
if(ep->buffer->flags & USB_BUFFER_HALT) {
|
|
ep->halted = 1;
|
|
if(!(REG(USB_CSOL) & USB_CSOL_SEND_STALL)) {
|
|
REG(USB_CSOL) |= USB_CSOL_SEND_STALL;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
/* Disambiguate UG CNTL bits */
|
|
pkt_len = REG(USB_CNTL) | (REG(USB_CNTH) << 8);
|
|
if(get_receive_capacity(ep->buffer) < pkt_len) {
|
|
return USB_READ_BLOCK;
|
|
}
|
|
|
|
if(pkt_len < ep->xfer_size) {
|
|
short_packet = 1;
|
|
}
|
|
|
|
res = fill_buffers(ep->buffer, ep_hw, pkt_len, short_packet);
|
|
|
|
REG(USB_CSOL) &= ~USB_CSOL_OUTPKT_RDY;
|
|
|
|
return res;
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
static void
|
|
out_ep_interrupt_handler(uint8_t ep_hw)
|
|
{
|
|
uint8_t csl;
|
|
uint8_t res;
|
|
usb_endpoint_t *ep = EP_STRUCT(ep_hw);
|
|
|
|
|
|
REG(USB_INDEX) = ep_hw;
|
|
csl = REG(USB_CSOL);
|
|
|
|
if(csl & USB_CSOL_SENT_STALL) {
|
|
REG(USB_CSOL) &= ~USB_CSOL_SENT_STALL;
|
|
}
|
|
|
|
if(csl & USB_CSOL_OVERRUN) {
|
|
/* We lost one isochronous packet */
|
|
REG(USB_CSOL) &= ~USB_CSOL_OVERRUN;
|
|
}
|
|
|
|
if(csl & USB_CSOL_OUTPKT_RDY) {
|
|
res = ep_get_data_pkt(ep_hw);
|
|
|
|
if(res & USB_READ_NOTIFY) {
|
|
notify_ep_process(ep, USB_EP_EVENT_NOTIFICATION);
|
|
}
|
|
}
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
static void
|
|
in_ep_interrupt_handler(uint8_t ep_hw)
|
|
{
|
|
uint8_t csl;
|
|
#if USB_ARCH_WRITE_NOTIFY
|
|
uint8_t res;
|
|
usb_endpoint_t *ep = EP_STRUCT(ep_hw);
|
|
#endif
|
|
|
|
REG(USB_INDEX) = ep_hw;
|
|
csl = REG(USB_CSIL);
|
|
|
|
if(csl & USB_CSIL_SENT_STALL) {
|
|
REG(USB_CSIL) &= ~USB_CSIL_SENT_STALL;
|
|
}
|
|
|
|
if(csl & USB_CSIL_UNDERRUN) {
|
|
REG(USB_CSIL) &= ~USB_CSIL_UNDERRUN;
|
|
}
|
|
|
|
#if USB_ARCH_WRITE_NOTIFY
|
|
if(!(csl & USB_CSIL_INPKT_RDY)) {
|
|
res = ep_tx(ep_hw);
|
|
if(res & USB_WRITE_NOTIFY) {
|
|
notify_ep_process(ep, USB_EP_EVENT_NOTIFICATION);
|
|
}
|
|
}
|
|
#endif
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
void
|
|
usb_isr(void)
|
|
{
|
|
uint8_t ep_in_if = REG(USB_IIF) & REG(USB_IIE);
|
|
uint8_t ep_out_if = REG(USB_OIF) & REG(USB_OIE);
|
|
uint8_t common_if = REG(USB_CIF) & REG(USB_CIE);
|
|
uint8_t i;
|
|
|
|
if(ep_in_if) {
|
|
/* EP0 flag is in the IN Interrupt Flags register */
|
|
if(ep_in_if & USB_IIF_EP0IF) {
|
|
ep0_interrupt_handler();
|
|
}
|
|
for(i = 1; i < 6; i++) {
|
|
if(ep_in_if & EPxIF(i)) {
|
|
in_ep_interrupt_handler(i);
|
|
}
|
|
}
|
|
}
|
|
if(ep_out_if) {
|
|
for(i = 1; i < 6; i++) {
|
|
if(ep_out_if & EPxIF(i)) {
|
|
out_ep_interrupt_handler(i);
|
|
}
|
|
}
|
|
}
|
|
if(common_if & USB_CIF_RSTIF) {
|
|
reset();
|
|
notify_process(USB_EVENT_RESET);
|
|
}
|
|
if(common_if & USB_CIF_RESUMEIF) {
|
|
notify_process(USB_EVENT_RESUME);
|
|
}
|
|
if(common_if & USB_CIF_SUSPENDIF) {
|
|
notify_process(USB_EVENT_SUSPEND);
|
|
}
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
|
|
/** @} */
|