25c07613c2
The Intel Quark X1000 SoC includes a message bus that is accessible via PCI configuration registers. It communicates to various SoC components such as the Isolated Memory Region (IMR) registers and the Remote Management Unit. This patch adds a driver for accessing the message bus.
51 lines
2.3 KiB
C
51 lines
2.3 KiB
C
/*
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* Copyright (C) 2015-2016, Intel Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef CPU_X86_DRIVERS_QUARKX1000_MSG_BUS_H_
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#define CPU_X86_DRIVERS_QUARKX1000_MSG_BUS_H_
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#include <stdint.h>
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/* Routines for accessing the message bus.
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*
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* The Intel Quark X1000 SoC includes a message bus that is accessible
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* via PCI configuration registers. It communicates to various SoC
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* components such as the Isolated Memory Region (IMR) registers and the
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* Remote Management Unit.
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*
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* Refer to Intel Quark SoC X1000 Datasheet, Section 12.5 for more details on
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* the message bus.
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*/
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void quarkX1000_msg_bus_read(uint8_t port, uint32_t reg_off, uint32_t *val);
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void quarkX1000_msg_bus_write(uint8_t port, uint32_t reg_off, uint32_t val);
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#endif /* CPU_X86_DRIVERS_QUARKX1000_MSG_BUS_H_ */
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