627 lines
20 KiB
C
627 lines
20 KiB
C
/*
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* Copyright (c) 2015, Texas Instruments Incorporated - http://www.ti.com/
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*---------------------------------------------------------------------------*/
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/**
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* \addtogroup rf-core
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* @{
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*
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* \file
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* Implementation of the CC13xx/CC26xx RF core driver
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*/
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/*---------------------------------------------------------------------------*/
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#include "contiki-conf.h"
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#include "dev/watchdog.h"
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#include "sys/process.h"
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#include "sys/energest.h"
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#include "sys/cc.h"
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#include "net/netstack.h"
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#include "net/packetbuf.h"
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#include "rf-core/rf-core.h"
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#include "rf-core/rf-switch.h"
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#include "ti-lib.h"
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/*---------------------------------------------------------------------------*/
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/* RF core and RF HAL API */
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#include "hw_rfc_dbell.h"
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#include "hw_rfc_pwr.h"
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/*---------------------------------------------------------------------------*/
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/* RF Core Mailbox API */
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#include "driverlib/rf_mailbox.h"
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#include "driverlib/rf_common_cmd.h"
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#include "driverlib/rf_data_entry.h"
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/*---------------------------------------------------------------------------*/
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#include <stdint.h>
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#include <stdbool.h>
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#include <stdio.h>
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#include <string.h>
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/*---------------------------------------------------------------------------*/
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#define DEBUG 0
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#if DEBUG
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#define PRINTF(...) printf(__VA_ARGS__)
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#else
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#define PRINTF(...)
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#endif
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/*---------------------------------------------------------------------------*/
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#ifdef RF_CORE_CONF_DEBUG_CRC
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#define RF_CORE_DEBUG_CRC RF_CORE_CONF_DEBUG_CRC
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#else
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#define RF_CORE_DEBUG_CRC DEBUG
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#endif
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/*---------------------------------------------------------------------------*/
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/* RF interrupts */
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#define RX_FRAME_IRQ IRQ_RX_ENTRY_DONE
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#define ERROR_IRQ IRQ_INTERNAL_ERROR
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#define RX_NOK_IRQ IRQ_RX_NOK
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/* Those IRQs are enabled all the time */
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#if RF_CORE_DEBUG_CRC
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#define ENABLED_IRQS (RX_FRAME_IRQ | ERROR_IRQ | RX_NOK_IRQ)
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#else
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#define ENABLED_IRQS (RX_FRAME_IRQ | ERROR_IRQ)
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#endif
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#define ENABLED_IRQS_POLL_MODE (ENABLED_IRQS & ~(RX_FRAME_IRQ | ERROR_IRQ))
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#define cc26xx_rf_cpe0_isr RFCCPE0IntHandler
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#define cc26xx_rf_cpe1_isr RFCCPE1IntHandler
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/*---------------------------------------------------------------------------*/
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typedef ChipType_t chip_type_t;
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/*---------------------------------------------------------------------------*/
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/* Remember the last Radio Op issued to the radio */
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static rfc_radioOp_t *last_radio_op = NULL;
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/*---------------------------------------------------------------------------*/
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/* A struct holding pointers to the primary mode's abort() and restore() */
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static const rf_core_primary_mode_t *primary_mode = NULL;
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/*---------------------------------------------------------------------------*/
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/* Radio timer (RAT) offset as compared to the rtimer counter (RTC) */
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int32_t rat_offset = 0;
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static bool rat_offset_known = false;
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/*---------------------------------------------------------------------------*/
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PROCESS(rf_core_process, "CC13xx / CC26xx RF driver");
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/*---------------------------------------------------------------------------*/
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#define RF_CORE_CLOCKS_MASK (RFC_PWR_PWMCLKEN_RFC_M | RFC_PWR_PWMCLKEN_CPE_M \
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| RFC_PWR_PWMCLKEN_CPERAM_M | RFC_PWR_PWMCLKEN_FSCA_M \
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| RFC_PWR_PWMCLKEN_PHA_M | RFC_PWR_PWMCLKEN_RAT_M \
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| RFC_PWR_PWMCLKEN_RFERAM_M | RFC_PWR_PWMCLKEN_RFE_M \
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| RFC_PWR_PWMCLKEN_MDMRAM_M | RFC_PWR_PWMCLKEN_MDM_M)
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/*---------------------------------------------------------------------------*/
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#define RF_CMD0 0x0607
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/*---------------------------------------------------------------------------*/
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uint8_t
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rf_core_is_accessible()
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{
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if(ti_lib_prcm_rf_ready()) {
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return RF_CORE_ACCESSIBLE;
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}
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return RF_CORE_NOT_ACCESSIBLE;
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}
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/*---------------------------------------------------------------------------*/
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uint_fast8_t
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rf_core_send_cmd(uint32_t cmd, uint32_t *status)
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{
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uint32_t timeout_count = 0;
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bool interrupts_disabled;
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bool is_radio_op = false;
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/*
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* If cmd is 4-byte aligned, then it's either a radio OP or an immediate
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* command. Clear the status field if it's a radio OP
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*/
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if((cmd & 0x03) == 0) {
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uint32_t cmd_type;
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cmd_type = ((rfc_command_t *)cmd)->commandNo & RF_CORE_COMMAND_TYPE_MASK;
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if(cmd_type == RF_CORE_COMMAND_TYPE_IEEE_FG_RADIO_OP ||
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cmd_type == RF_CORE_COMMAND_TYPE_RADIO_OP) {
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is_radio_op = true;
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((rfc_radioOp_t *)cmd)->status = RF_CORE_RADIO_OP_STATUS_IDLE;
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}
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}
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/*
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* Make sure ContikiMAC doesn't turn us off from within an interrupt while
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* we are accessing RF Core registers
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*/
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interrupts_disabled = ti_lib_int_master_disable();
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if(!rf_core_is_accessible()) {
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PRINTF("rf_core_send_cmd: RF was off\n");
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if(!interrupts_disabled) {
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ti_lib_int_master_enable();
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}
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return RF_CORE_CMD_ERROR;
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}
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if(is_radio_op) {
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uint16_t command_no = ((rfc_radioOp_t *)cmd)->commandNo;
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if((command_no & RF_CORE_COMMAND_PROTOCOL_MASK) != RF_CORE_COMMAND_PROTOCOL_COMMON &&
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(command_no & RF_CORE_COMMAND_TYPE_MASK) == RF_CORE_COMMAND_TYPE_RADIO_OP) {
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last_radio_op = (rfc_radioOp_t *)cmd;
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}
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}
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HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDR) = cmd;
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do {
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*status = HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDSTA);
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if(++timeout_count > 50000) {
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PRINTF("rf_core_send_cmd: 0x%08lx Timeout\n", cmd);
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if(!interrupts_disabled) {
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ti_lib_int_master_enable();
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}
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return RF_CORE_CMD_ERROR;
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}
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} while((*status & RF_CORE_CMDSTA_RESULT_MASK) == RF_CORE_CMDSTA_PENDING);
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if(!interrupts_disabled) {
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ti_lib_int_master_enable();
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}
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/*
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* If we reach here the command is no longer pending. It is either completed
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* successfully or with error
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*/
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return (*status & RF_CORE_CMDSTA_RESULT_MASK) == RF_CORE_CMDSTA_DONE;
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}
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/*---------------------------------------------------------------------------*/
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uint_fast8_t
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rf_core_wait_cmd_done(void *cmd)
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{
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volatile rfc_radioOp_t *command = (rfc_radioOp_t *)cmd;
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uint32_t timeout_cnt = 0;
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/*
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* 0xn4nn=DONE, 0x0400=DONE_OK while all other "DONE" values means done
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* but with some kind of error (ref. "Common radio operation status codes")
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*/
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do {
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if(++timeout_cnt > 500000) {
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return RF_CORE_CMD_ERROR;
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}
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} while((command->status & RF_CORE_RADIO_OP_MASKED_STATUS)
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!= RF_CORE_RADIO_OP_MASKED_STATUS_DONE);
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return (command->status & RF_CORE_RADIO_OP_MASKED_STATUS)
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== RF_CORE_RADIO_OP_STATUS_DONE_OK;
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}
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/*---------------------------------------------------------------------------*/
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static int
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fs_powerdown(void)
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{
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rfc_CMD_FS_POWERDOWN_t cmd;
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uint32_t cmd_status;
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rf_core_init_radio_op((rfc_radioOp_t *)&cmd, sizeof(cmd), CMD_FS_POWERDOWN);
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if(rf_core_send_cmd((uint32_t)&cmd, &cmd_status) != RF_CORE_CMD_OK) {
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PRINTF("fs_powerdown: CMDSTA=0x%08lx\n", cmd_status);
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return RF_CORE_CMD_ERROR;
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}
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if(rf_core_wait_cmd_done(&cmd) != RF_CORE_CMD_OK) {
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PRINTF("fs_powerdown: CMDSTA=0x%08lx, status=0x%04x\n",
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cmd_status, cmd.status);
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return RF_CORE_CMD_ERROR;
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}
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return RF_CORE_CMD_OK;
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}
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/*---------------------------------------------------------------------------*/
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int
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rf_core_power_up()
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{
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uint32_t cmd_status;
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bool interrupts_disabled = ti_lib_int_master_disable();
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ti_lib_int_pend_clear(INT_RFC_CPE_0);
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ti_lib_int_pend_clear(INT_RFC_CPE_1);
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ti_lib_int_disable(INT_RFC_CPE_0);
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ti_lib_int_disable(INT_RFC_CPE_1);
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/* Enable RF Core power domain */
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ti_lib_prcm_power_domain_on(PRCM_DOMAIN_RFCORE);
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while(ti_lib_prcm_power_domain_status(PRCM_DOMAIN_RFCORE)
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!= PRCM_DOMAIN_POWER_ON);
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ti_lib_prcm_domain_enable(PRCM_DOMAIN_RFCORE);
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ti_lib_prcm_load_set();
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while(!ti_lib_prcm_load_get());
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HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) = 0x0;
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HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIEN) = 0x0;
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ti_lib_int_enable(INT_RFC_CPE_0);
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ti_lib_int_enable(INT_RFC_CPE_1);
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if(!interrupts_disabled) {
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ti_lib_int_master_enable();
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}
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rf_switch_power_up();
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/* Let CPE boot */
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HWREG(RFC_PWR_NONBUF_BASE + RFC_PWR_O_PWMCLKEN) = RF_CORE_CLOCKS_MASK;
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/* Turn on additional clocks on boot */
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HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFACKIFG) = 0;
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HWREG(RFC_DBELL_BASE+RFC_DBELL_O_CMDR) =
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CMDR_DIR_CMD_2BYTE(RF_CMD0,
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RFC_PWR_PWMCLKEN_MDMRAM | RFC_PWR_PWMCLKEN_RFERAM);
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/* Send ping (to verify RFCore is ready and alive) */
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if(rf_core_send_cmd(CMDR_DIR_CMD(CMD_PING), &cmd_status) != RF_CORE_CMD_OK) {
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PRINTF("rf_core_power_up: CMD_PING fail, CMDSTA=0x%08lx\n", cmd_status);
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return RF_CORE_CMD_ERROR;
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}
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return RF_CORE_CMD_OK;
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}
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/*---------------------------------------------------------------------------*/
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uint8_t
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rf_core_start_rat(void)
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{
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uint32_t cmd_status;
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rfc_CMD_SYNC_START_RAT_t cmd_start;
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/* Start radio timer (RAT) */
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rf_core_init_radio_op((rfc_radioOp_t *)&cmd_start, sizeof(cmd_start), CMD_SYNC_START_RAT);
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/* copy the value and send back */
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cmd_start.rat0 = rat_offset;
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if(rf_core_send_cmd((uint32_t)&cmd_start, &cmd_status) != RF_CORE_CMD_OK) {
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PRINTF("rf_core_get_rat_rtc_offset: SYNC_START_RAT fail, CMDSTA=0x%08lx\n",
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cmd_status);
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return RF_CORE_CMD_ERROR;
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}
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/* Wait until done (?) */
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if(rf_core_wait_cmd_done(&cmd_start) != RF_CORE_CMD_OK) {
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PRINTF("rf_core_cmd_ok: SYNC_START_RAT wait, CMDSTA=0x%08lx, status=0x%04x\n",
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cmd_status, cmd_start.status);
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return RF_CORE_CMD_ERROR;
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}
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return RF_CORE_CMD_OK;
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}
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/*---------------------------------------------------------------------------*/
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uint8_t
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rf_core_stop_rat(void)
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{
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rfc_CMD_SYNC_STOP_RAT_t cmd_stop;
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uint32_t cmd_status;
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rf_core_init_radio_op((rfc_radioOp_t *)&cmd_stop, sizeof(cmd_stop), CMD_SYNC_STOP_RAT);
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int ret = rf_core_send_cmd((uint32_t)&cmd_stop, &cmd_status);
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if(ret != RF_CORE_CMD_OK) {
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PRINTF("rf_core_get_rat_rtc_offset: SYNC_STOP_RAT fail, ret %d CMDSTA=0x%08lx\n",
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ret, cmd_status);
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return ret;
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}
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/* Wait until done */
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ret = rf_core_wait_cmd_done(&cmd_stop);
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if(ret != RF_CORE_CMD_OK) {
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PRINTF("rf_core_cmd_ok: SYNC_STOP_RAT wait, CMDSTA=0x%08lx, status=0x%04x\n",
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cmd_status, cmd_stop.status);
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return ret;
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}
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if(!rat_offset_known) {
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/* save the offset, but only if this is the first time */
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rat_offset_known = true;
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rat_offset = cmd_stop.rat0;
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}
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return RF_CORE_CMD_OK;
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}
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/*---------------------------------------------------------------------------*/
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void
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rf_core_power_down()
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{
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bool interrupts_disabled = ti_lib_int_master_disable();
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ti_lib_int_disable(INT_RFC_CPE_0);
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ti_lib_int_disable(INT_RFC_CPE_1);
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if(rf_core_is_accessible()) {
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HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) = 0x0;
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HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIEN) = 0x0;
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/* need to send FS_POWERDOWN or analog components will use power */
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fs_powerdown();
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}
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rf_core_stop_rat();
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/* Shut down the RFCORE clock domain in the MCU VD */
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ti_lib_prcm_domain_disable(PRCM_DOMAIN_RFCORE);
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ti_lib_prcm_load_set();
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while(!ti_lib_prcm_load_get());
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/* Turn off RFCORE PD */
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ti_lib_prcm_power_domain_off(PRCM_DOMAIN_RFCORE);
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while(ti_lib_prcm_power_domain_status(PRCM_DOMAIN_RFCORE)
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!= PRCM_DOMAIN_POWER_OFF);
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rf_switch_power_down();
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ti_lib_int_pend_clear(INT_RFC_CPE_0);
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ti_lib_int_pend_clear(INT_RFC_CPE_1);
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ti_lib_int_enable(INT_RFC_CPE_0);
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ti_lib_int_enable(INT_RFC_CPE_1);
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if(!interrupts_disabled) {
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ti_lib_int_master_enable();
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}
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}
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/*---------------------------------------------------------------------------*/
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uint8_t
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rf_core_set_modesel()
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{
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uint8_t rv = RF_CORE_CMD_ERROR;
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chip_type_t chip_type = ti_lib_chipinfo_get_chip_type();
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if(chip_type == CHIP_TYPE_CC2650) {
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HWREG(PRCM_BASE + PRCM_O_RFCMODESEL) = PRCM_RFCMODESEL_CURR_MODE5;
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rv = RF_CORE_CMD_OK;
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} else if(chip_type == CHIP_TYPE_CC2630) {
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HWREG(PRCM_BASE + PRCM_O_RFCMODESEL) = PRCM_RFCMODESEL_CURR_MODE2;
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rv = RF_CORE_CMD_OK;
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} else if(chip_type == CHIP_TYPE_CC1310) {
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HWREG(PRCM_BASE + PRCM_O_RFCMODESEL) = PRCM_RFCMODESEL_CURR_MODE3;
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rv = RF_CORE_CMD_OK;
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} else if(chip_type == CHIP_TYPE_CC1350) {
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HWREG(PRCM_BASE + PRCM_O_RFCMODESEL) = PRCM_RFCMODESEL_CURR_MODE5;
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rv = RF_CORE_CMD_OK;
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}
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return rv;
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}
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/*---------------------------------------------------------------------------*/
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uint8_t
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rf_core_boot()
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{
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if(rf_core_power_up() != RF_CORE_CMD_OK) {
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PRINTF("rf_core_boot: rf_core_power_up() failed\n");
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rf_core_power_down();
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return RF_CORE_CMD_ERROR;
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}
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if(rf_core_start_rat() != RF_CORE_CMD_OK) {
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PRINTF("rf_core_boot: rf_core_start_rat() failed\n");
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rf_core_power_down();
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return RF_CORE_CMD_ERROR;
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}
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return RF_CORE_CMD_OK;
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}
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/*---------------------------------------------------------------------------*/
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uint8_t
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rf_core_restart_rat(void)
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{
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if(rf_core_stop_rat() != RF_CORE_CMD_OK) {
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PRINTF("rf_core_restart_rat: rf_core_stop_rat() failed\n");
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/* Don't bail out here, still try to start it */
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}
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if(rf_core_start_rat() != RF_CORE_CMD_OK) {
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PRINTF("rf_core_restart_rat: rf_core_start_rat() failed\n");
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rf_core_power_down();
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return RF_CORE_CMD_ERROR;
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}
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return RF_CORE_CMD_OK;
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}
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/*---------------------------------------------------------------------------*/
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void
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rf_core_setup_interrupts(bool poll_mode)
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{
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bool interrupts_disabled;
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const uint32_t enabled_irqs = poll_mode ? ENABLED_IRQS_POLL_MODE : ENABLED_IRQS;
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/* We are already turned on by the caller, so this should not happen */
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if(!rf_core_is_accessible()) {
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PRINTF("setup_interrupts: No access\n");
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return;
|
|
}
|
|
|
|
/* Disable interrupts */
|
|
interrupts_disabled = ti_lib_int_master_disable();
|
|
|
|
/* Set all interrupt channels to CPE0 channel, error to CPE1 */
|
|
HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEISL) = ERROR_IRQ;
|
|
|
|
/* Acknowledge configured interrupts */
|
|
HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIEN) = enabled_irqs;
|
|
|
|
/* Clear interrupt flags, active low clear(?) */
|
|
HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) = 0x0;
|
|
|
|
ti_lib_int_pend_clear(INT_RFC_CPE_0);
|
|
ti_lib_int_pend_clear(INT_RFC_CPE_1);
|
|
ti_lib_int_enable(INT_RFC_CPE_0);
|
|
ti_lib_int_enable(INT_RFC_CPE_1);
|
|
|
|
if(!interrupts_disabled) {
|
|
ti_lib_int_master_enable();
|
|
}
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
void
|
|
rf_core_cmd_done_en(bool fg, bool poll_mode)
|
|
{
|
|
uint32_t irq = fg ? IRQ_LAST_FG_COMMAND_DONE : IRQ_LAST_COMMAND_DONE;
|
|
const uint32_t enabled_irqs = poll_mode ? ENABLED_IRQS_POLL_MODE : ENABLED_IRQS;
|
|
|
|
HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) = enabled_irqs;
|
|
HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIEN) = enabled_irqs | irq;
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
void
|
|
rf_core_cmd_done_dis(bool poll_mode)
|
|
{
|
|
const uint32_t enabled_irqs = poll_mode ? ENABLED_IRQS_POLL_MODE : ENABLED_IRQS;
|
|
HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIEN) = enabled_irqs;
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
rfc_radioOp_t *
|
|
rf_core_get_last_radio_op()
|
|
{
|
|
return last_radio_op;
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
void
|
|
rf_core_init_radio_op(rfc_radioOp_t *op, uint16_t len, uint16_t command)
|
|
{
|
|
memset(op, 0, len);
|
|
|
|
op->commandNo = command;
|
|
op->condition.rule = COND_NEVER;
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
void
|
|
rf_core_primary_mode_register(const rf_core_primary_mode_t *mode)
|
|
{
|
|
primary_mode = mode;
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
void
|
|
rf_core_primary_mode_abort()
|
|
{
|
|
if(primary_mode) {
|
|
if(primary_mode->abort) {
|
|
primary_mode->abort();
|
|
}
|
|
}
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
uint8_t
|
|
rf_core_primary_mode_restore()
|
|
{
|
|
if(primary_mode) {
|
|
if(primary_mode->restore) {
|
|
return primary_mode->restore();
|
|
}
|
|
}
|
|
|
|
return RF_CORE_CMD_ERROR;
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
PROCESS_THREAD(rf_core_process, ev, data)
|
|
{
|
|
int len;
|
|
|
|
PROCESS_BEGIN();
|
|
|
|
while(1) {
|
|
PROCESS_YIELD_UNTIL(ev == PROCESS_EVENT_POLL);
|
|
do {
|
|
watchdog_periodic();
|
|
packetbuf_clear();
|
|
len = NETSTACK_RADIO.read(packetbuf_dataptr(), PACKETBUF_SIZE);
|
|
|
|
if(len > 0) {
|
|
packetbuf_set_datalen(len);
|
|
|
|
NETSTACK_MAC.input();
|
|
}
|
|
} while(len > 0);
|
|
}
|
|
PROCESS_END();
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
static void
|
|
rx_nok_isr(void)
|
|
{
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
void
|
|
cc26xx_rf_cpe1_isr(void)
|
|
{
|
|
ENERGEST_ON(ENERGEST_TYPE_IRQ);
|
|
|
|
PRINTF("RF Error\n");
|
|
|
|
if(!rf_core_is_accessible()) {
|
|
if(rf_core_power_up() != RF_CORE_CMD_OK) {
|
|
return;
|
|
}
|
|
}
|
|
|
|
/* Clear INTERNAL_ERROR interrupt flag */
|
|
HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) = 0x7FFFFFFF;
|
|
|
|
ENERGEST_OFF(ENERGEST_TYPE_IRQ);
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
void
|
|
cc26xx_rf_cpe0_isr(void)
|
|
{
|
|
ENERGEST_ON(ENERGEST_TYPE_IRQ);
|
|
|
|
if(!rf_core_is_accessible()) {
|
|
printf("RF ISR called but RF not ready... PANIC!!\n");
|
|
if(rf_core_power_up() != RF_CORE_CMD_OK) {
|
|
PRINTF("rf_core_power_up() failed\n");
|
|
return;
|
|
}
|
|
}
|
|
|
|
ti_lib_int_master_disable();
|
|
|
|
if(HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) & RX_FRAME_IRQ) {
|
|
/* Clear the RX_ENTRY_DONE interrupt flag */
|
|
HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) = 0xFF7FFFFF;
|
|
process_poll(&rf_core_process);
|
|
}
|
|
|
|
if(RF_CORE_DEBUG_CRC) {
|
|
if(HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) & RX_NOK_IRQ) {
|
|
/* Clear the RX_NOK interrupt flag */
|
|
HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) = 0xFFFDFFFF;
|
|
rx_nok_isr();
|
|
}
|
|
}
|
|
|
|
if(HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) &
|
|
(IRQ_LAST_FG_COMMAND_DONE | IRQ_LAST_COMMAND_DONE)) {
|
|
/* Clear the two TX-related interrupt flags */
|
|
HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) = 0xFFFFFFF5;
|
|
}
|
|
|
|
ti_lib_int_master_enable();
|
|
|
|
ENERGEST_OFF(ENERGEST_TYPE_IRQ);
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
/** @} */
|