c6ec22c4c8
This was oringinally contributed/reported/discussed/patched by Philippe Retornaz (EPFL) but it's implemented in a more configurable fashion here.
120 lines
4.0 KiB
C
120 lines
4.0 KiB
C
/*
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* Copyright (c) 2010, Loughborough University - Computer Science
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of the Contiki operating system.
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*
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*/
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/**
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* \file
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* Hardware-dependent functions used to support the
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* contiki rtimer module.
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*
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* clock_init() has set our tick speed prescaler already, so we
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* are ticking with 500 kHz freq.
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*
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* Contiki typedefs rtimer_clock_t as unsigned short (16bit)
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* It thus makes sense to use the 16bit timer (Timer 1)
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*
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* This file contains an ISR and must reside in the HOME bank
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*
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* \author
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* George Oikonomou - <oikonomou@users.sourceforge.net>
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*/
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#include "sys/rtimer.h"
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#include "sfr-bits.h"
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#include "cc253x.h"
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#include "sys/energest.h"
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#include "debug.h"
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#include <stdio.h>
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#define RT_MODE_COMPARE() do { T1CCTL1 |= T1CCTL_MODE; } while(0)
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#define RT_MODE_CAPTURE() do { T1CCTL1 &= ~T1CCTL_MODE; } while(0)
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/*---------------------------------------------------------------------------*/
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void
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rtimer_arch_init(void)
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{
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/*
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* - Free running mode
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* - Prescale by 32:
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* Tick Speed has been prescaled to 500 kHz already in clock_init()
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* We further prescale by 32 resulting in 15625 Hz for this timer.
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*/
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T1CTL = (T1CTL_DIV1 | T1CTL_MODE0);
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T1STAT = 0;
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/* Timer 1, Channel 1. Compare Mode (0x04), Interrupt mask on (0x40) */
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T1CCTL1 = T1CCTL_MODE | T1CCTL_IM;
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/* Interrupt Mask Flags: No interrupt on overflow */
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OVFIM = 0;
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/* Acknowledge Timer 1 Interrupts */
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T1IE = 1;
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}
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/*---------------------------------------------------------------------------*/
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void
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rtimer_arch_schedule(rtimer_clock_t t)
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{
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/* Switch to capture mode before writing T1CC1x and
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* set the compare mode values so we can get an interrupt after t */
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RT_MODE_CAPTURE();
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T1CC1L = (unsigned char) t;
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T1CC1H = (unsigned char) (t >> 8);
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RT_MODE_COMPARE();
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/* Turn on compare mode interrupt */
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T1STAT = 0;
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T1CCTL1 |= T1CCTL_IM;
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}
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/*---------------------------------------------------------------------------*/
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/* avoid referencing bits, we don't call code which use them */
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#pragma save
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#if CC_CONF_OPTIMIZE_STACK_SIZE
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#pragma exclude bits
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#endif
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void
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rtimer_isr(void) __interrupt(T1_VECTOR)
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{
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T1IE = 0; /* Ignore Timer 1 Interrupts */
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ENERGEST_ON(ENERGEST_TYPE_IRQ);
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/* No more interrupts from Channel 1 till next rtimer_arch_schedule() call */
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T1STAT &= ~T1STAT_CH1IF;
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T1CCTL1 &= ~T1CCTL_IM;
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rtimer_run_next();
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ENERGEST_OFF(ENERGEST_TYPE_IRQ);
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T1IE = 1; /* Acknowledge Timer 1 Interrupts */
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}
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#pragma restore
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