727 lines
16 KiB
C
727 lines
16 KiB
C
/*
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Copyright 2006, Freie Universitaet Berlin. All rights reserved.
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These sources were developed at the Freie Universität Berlin, Computer
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Systems and Telematics group.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are
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met:
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- Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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- Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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- Neither the name of Freie Universitaet Berlin (FUB) nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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This software is provided by FUB and the contributors on an "as is"
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basis, without any representations or warranties of any kind, express
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or implied including, but not limited to, representations or
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warranties of non-infringement, merchantability or fitness for a
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particular purpose. In no event shall FUB or contributors be liable
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for any direct, indirect, incidental, special, exemplary, or
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consequential damages (including, but not limited to, procurement of
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substitute goods or services; loss of use, data, or profits; or
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business interruption) however caused and on any theory of liability,
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whether in contract, strict liability, or tort (including negligence
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or otherwise) arising in any way out of the use of this software, even
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if advised of the possibility of such damage.
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This implementation was developed by the CST group at the FUB.
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For documentation and questions please use the web site
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http://scatterweb.mi.fu-berlin.de and the mailinglist
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scatterweb@lists.spline.inf.fu-berlin.de (subscription via the Website).
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Berlin, 2006
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*/
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/**
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* @file cc1020.c
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* @author FUB ScatterWeb Developers, Michael Baar, Nicolas Tsiftes
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*
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* Taken from ScatterWeb² 1.1 and modified/reformatted for Contiki 2.0
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**/
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#include <stdio.h>
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#include <string.h>
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#include <signal.h>
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#include "contiki-msb430.h"
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#include "cc1020-internal.h"
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#include "cc1020.h"
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#include "lib/random.h"
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#include "net/rime/rimestats.h"
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#include "dev/irq.h"
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#include "dev/dma.h"
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static int cc1020_calibrate(void);
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static int cc1020_setupTX(int);
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static int cc1020_setupRX(int);
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static void cc1020_setupPD(void);
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static void cc1020_wakeupTX(int);
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static void cc1020_wakeupRX(int);
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static uint8_t cc1020_read_reg(uint8_t addr);
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static void cc1020_write_reg(uint8_t addr, uint8_t adata);
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static void cc1020_load_config(const uint8_t *);
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static void cc1020_reset(void);
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// current mode of cc1020 chip
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static enum cc1020_state cc1020_state = CC1020_OFF;
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static volatile uint8_t cc1020_rxbuf[HDRSIZE + CC1020_BUFFERSIZE];
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static uint8_t cc1020_txbuf[PREAMBLESIZE + HDRSIZE + CC1020_BUFFERSIZE +
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TAILSIZE];
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static volatile enum cc1020_rxstate cc1020_rxstate = CC1020_RX_SEARCHING;
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/// number of bytes in receive and transmit buffers respectively.
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static uint16_t cc1020_rxlen;
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static uint16_t cc1020_txlen;
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/// received signal strength indicator reading for last received packet
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static volatile uint8_t rssi;
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/// callback when a packet has been received
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static uint8_t cc1020_pa_power = PA_POWER;
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static void (*receiver_callback)(const struct radio_driver *);
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const struct radio_driver cc1020_driver =
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{
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cc1020_send,
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cc1020_read,
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cc1020_set_receiver,
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cc1020_on,
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cc1020_off
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};
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PROCESS(cc1020_sender_process, "CC1020 sender");
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void
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cc1020_init(const uint8_t *config)
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{
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cc1020_setupPD();
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cc1020_reset();
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cc1020_load_config(config);
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// init tx buffer with preamble + syncword
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memset(cc1020_txbuf, PREAMBLE, PREAMBLESIZE);
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memcpy((char *)cc1020_txbuf + PREAMBLESIZE, &syncword, SYNCWDSIZE);
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// calibrate receiver
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cc1020_wakeupRX(RX_CURRENT);
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if (!cc1020_calibrate())
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printf("rx calibration failed\n");
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// calibrate transmitter
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cc1020_wakeupTX(TX_CURRENT);
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if (!cc1020_calibrate())
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printf("tx calibration failed\n");
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// power down
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cc1020_setupPD();
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process_start(&cc1020_sender_process, NULL);
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}
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void
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cc1020_set_rx(void)
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{
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int s;
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s = splhigh();
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// Reset SEL for P3[1-3] (CC DIO, DIO, DCLK) and P3[4-5] (Camera Rx+Tx)
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P3SEL &= ~0x3E;
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IFG1 &= ~(UTXIE0 | URXIE0); // Clear interrupt flags
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ME1 &= ~(UTXE0 | URXE0); // Disable Uart0 Tx + Rx
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UCTL0 = SWRST; // U0 into reset state.
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UCTL0 |= CHAR | SYNC; // 8-bit character, SPI, Slave mode
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// CKPH works also, but not CKPH+CKPL or none of them!!
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UTCTL0 = CKPL | STC;
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URCTL0 = 0x00;
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UBR00 = 0x00; // No baudrate divider
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UBR10 = 0x00; // settings for a spi
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UMCTL0 = 0x00; // slave.
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ME1 |= USPIE0; // Enable USART0 TXD/RXD, disabling does not yield any powersavings
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P3SEL |= 0x0A; // Select rx line and clk
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UCTL0 &= ~SWRST; // Clear reset bit
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splx(s);
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// configure driver
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cc1020_rxlen = 0; // receive buffer position to start
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cc1020_rxstate = CC1020_RX_SEARCHING; // rx state machine to searching mode
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cc1020_state = CC1020_RX; // driver state to receive mode
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// configure radio
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cc1020_wakeupRX(RX_CURRENT);
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cc1020_setupRX(RX_CURRENT);
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LNA_POWER_ON(); // enable amplifier
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// activate
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IE1 |= URXIE0; // enable interrupt
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}
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void
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cc1020_set_tx(void)
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{
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int s;
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// configure radio rx
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LNA_POWER_OFF(); // power down LNA
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s = splhigh();
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DISABLE_RX_IRQ();
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P3SEL &= ~0x02; // Ensure Rx line is off
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splx(s);
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// configure radio tx
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cc1020_wakeupTX(TX_CURRENT);
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cc1020_setupTX(TX_CURRENT);
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P3SEL |= 0x0C; // select Tx line and clk
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U0CTL |= SWRST; // UART to reset mode
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IFG1 &= ~UTXIFG0; // Reset IFG.
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// configure driver
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cc1020_state = CC1020_TX;
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}
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void
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cc1020_set_power(uint8_t pa_power)
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{
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cc1020_pa_power = pa_power;
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}
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int
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cc1020_sending(void)
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{
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return !!cc1020_txlen;
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}
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int
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cc1020_send(const void *buf, unsigned len)
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{
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if (cc1020_state == CC1020_OFF)
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return -2;
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if (len > CC1020_BUFFERSIZE)
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return -1;
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/* Previous data hasn't been sent yet. */
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if (cc1020_txlen > 0)
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return -1;
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/* The preamble and the sync word are already in buffer. */
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cc1020_txlen = PREAMBLESIZE + SYNCWDSIZE;
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// header
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cc1020_txbuf[cc1020_txlen++] = HDRSIZE + len;
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// data to send
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memcpy((char *)cc1020_txbuf + cc1020_txlen, buf, len);
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cc1020_txlen += len;
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// suffix
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cc1020_txbuf[cc1020_txlen++] = TAIL;
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cc1020_txbuf[cc1020_txlen++] = TAIL;
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process_poll(&cc1020_sender_process);
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return len;
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}
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int
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cc1020_read(void *buf, unsigned size)
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{
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unsigned len;
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if (cc1020_rxlen <= HDRSIZE)
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return 0;
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len = cc1020_rxlen - HDRSIZE;
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if (len > size) {
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RIMESTATS_ADD(toolong);
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return -1;
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}
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memcpy(buf, (char *)cc1020_rxbuf + HDRSIZE, len);
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RIMESTATS_ADD(llrx);
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return len;
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}
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void
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cc1020_set_receiver(void (*recv)(const struct radio_driver *))
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{
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receiver_callback = recv;
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}
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int
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cc1020_on(void)
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{
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// Switch to receive mode
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cc1020_set_rx();
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return 1;
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}
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int
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cc1020_off(void)
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{
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int s;
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// Discard the current read buffer when the radio is shutting down.
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cc1020_rxlen = 0;
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LNA_POWER_OFF(); // power down lna
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s = splhigh();
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cc1020_rxstate = CC1020_OFF;
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DISABLE_RX_IRQ();
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cc1020_state = CC1020_OFF;
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splx(s);
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cc1020_setupPD(); // power down radio
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cc1020_state = CC1020_OFF;
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return 1;
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}
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uint8_t
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cc1020_get_rssi(void)
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{
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rssi = cc1020_read_reg(CC1020_RSS);
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return rssi;
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}
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int
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cc1020_carrier_sense(void)
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{
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int carrier_sense;
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return !!(cc1020_read_reg(CC1020_STATUS) & CARRIER_SENSE);
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}
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interrupt(UART0RX_VECTOR) cc1020_rxhandler(void)
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{
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static signed char syncbs;
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static union {
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struct {
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uint8_t b2;
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uint8_t b1;
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uint8_t b4;
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uint8_t b3;
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};
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struct {
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uint16_t i1;
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uint16_t i2;
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};
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} shiftbuf;
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static unsigned char pktlen;
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switch (cc1020_rxstate) {
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case CC1020_RX_SEARCHING:
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shiftbuf.b1 = shiftbuf.b2;
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shiftbuf.b2 = shiftbuf.b3;
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shiftbuf.b3 = shiftbuf.b4;
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shiftbuf.b4 = RXBUF0;
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if (shiftbuf.i1 == 0xAAD3 && shiftbuf.i2 == 0x9100) {
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// 0 AA D3 91 00 | FF 00 |
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syncbs = 0;
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cc1020_rxbuf[cc1020_rxlen++] = shiftbuf.b4;
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} else if (shiftbuf.i1 == 0x5569 && shiftbuf.i2 == 0xC880) {
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// 1 55 69 C8 80 | 7F 80 |
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syncbs = -1;
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} else if (shiftbuf.i1 == 0xAAB4 && shiftbuf.i2 == 0xE440) {
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// 2 AA B4 E4 40 | 3F C0 |
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syncbs = -2;
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} else if (shiftbuf.i1 == 0x555A && shiftbuf.i2 == 0x7220) {
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// 3 55 5A 72 20 | 1F E0 |
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syncbs = -3;
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} else if (shiftbuf.i1 == 0xAAAD && shiftbuf.i2 == 0x3910) {
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// 4 AA AD 39 10 | 0F F0 |
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syncbs = -4;
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} else if (shiftbuf.i1 == 0x5556 && shiftbuf.i2 == 0x9C88) {
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// 5 55 56 9C 88 | 07 F8 |
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syncbs = +3;
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} else if (shiftbuf.i1 == 0xAAAB && shiftbuf.i2 == 0x4E44) {
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// 6 AA AB 4E 44 | 03 FC |
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syncbs = +2;
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} else if (shiftbuf.i1 == 0x5555 && shiftbuf.i2 == 0xA722) {
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// 7 55 55 A7 22 | 01 FE |
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syncbs = +1;
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} else {
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return;
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}
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// Update RSSI.
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rssi = cc1020_read_reg(CC1020_RSS);
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cc1020_rxstate = CC1020_RX_RECEIVING;
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break;
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case CC1020_RX_RECEIVING:
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if (syncbs == 0) {
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cc1020_rxbuf[cc1020_rxlen] = RXBUF0;
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} else {
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shiftbuf.b3 = shiftbuf.b4;
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shiftbuf.b4 = RXBUF0;
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if (syncbs < 0) {
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shiftbuf.i1 = shiftbuf.i2 << -syncbs;
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cc1020_rxbuf[cc1020_rxlen] = shiftbuf.b1;
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} else {
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shiftbuf.i1 = shiftbuf.i2 >> syncbs;
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cc1020_rxbuf[cc1020_rxlen] = shiftbuf.b2;
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}
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}
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cc1020_rxlen++;
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if (cc1020_rxlen == HDRSIZE) {
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pktlen = ((struct cc1020_header *)cc1020_rxbuf)->length;
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if (pktlen == 0 || pktlen > sizeof (cc1020_rxbuf)) {
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cc1020_rxlen = 0;
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cc1020_rxstate = CC1020_RX_SEARCHING;
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}
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} else if (cc1020_rxlen > HDRSIZE) {
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if (cc1020_rxlen == pktlen) {
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// disable receiver
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DISABLE_RX_IRQ();
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cc1020_rxstate = CC1020_RX_PROCESSING;
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// call receiver to copy from buffer
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if (receiver_callback != NULL) {
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receiver_callback(&cc1020_driver);
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}
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// reset receiver
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cc1020_rxlen = 0;
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cc1020_rxstate = CC1020_RX_SEARCHING;
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ENABLE_RX_IRQ();
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}
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}
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break;
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default:
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break;
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}
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}
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PROCESS_THREAD(cc1020_sender_process, ev, data)
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{
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PROCESS_BEGIN();
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dma_subscribe(0, &cc1020_sender_process);
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while (1) {
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PROCESS_WAIT_UNTIL(cc1020_txlen > 0 && cc1020_state != CC1020_OFF);
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cc1020_set_rx();
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if (cc1020_rxstate != CC1020_RX_SEARCHING) {
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// Wait until the receiver is idle.
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PROCESS_WAIT_UNTIL(cc1020_rxstate == CC1020_RX_SEARCHING);
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// Wait for the medium to become idle.
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while (cc1020_carrier_sense());
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// Then wait for a short pseudo-random time before sending.
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clock_delay(1 + 10 * (random_rand() & 0xff));
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}
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// Switch to transceive mode.
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cc1020_set_tx();
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// Initiate radio transfer.
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dma_transfer(&TXBUF0, cc1020_txbuf, cc1020_txlen);
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// wait for DMA0 to finish
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PROCESS_WAIT_UNTIL(ev == dma_event);
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RIMESTATS_ADD(lltx);
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// clean up
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cc1020_txlen = 0;
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cc1020_set_rx();
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}
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PROCESS_END();
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}
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static void
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cc1020_write_reg(uint8_t addr, uint8_t adata)
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{
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unsigned i;
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unsigned char data;
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PSEL_OFF;
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data = addr << 1;
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PSEL_ON;
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// Send address bits
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for (i = 0; i < 7; i++) {
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nop();
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PCLK_LOW;
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nop();
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if (data & 0x80)
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PDI_HIGH;
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else
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PDI_LOW;
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data = data << 1;
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PCLK_HIGH;
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}
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// Send read/write bit
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// Ignore bit in data, always use 1
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nop();
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PCLK_LOW;
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PDI_HIGH;
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nop();
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PCLK_HIGH;
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nop();
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PCLK_LOW;
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data = adata;
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// Send data bits
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for (i = 0; i < 8; i++) {
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nop();
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PCLK_LOW;
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nop();
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if (data & 0x80)
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PDI_HIGH;
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else
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PDI_LOW;
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data = data << 1;
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PCLK_HIGH;
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}
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nop();
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PCLK_LOW;
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nop();
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PSEL_OFF;
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}
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static uint8_t
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cc1020_read_reg(uint8_t addr)
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{
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unsigned i;
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unsigned char data = 0;
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PSEL_OFF;
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data = addr << 1;
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PSEL_ON;
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nop();
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// Send address bits
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for (i = 0; i < 7; i++) {
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nop();
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PCLK_LOW;
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nop();
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if (data & 0x80)
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PDI_HIGH;
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else
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PDI_LOW;
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data = data << 1;
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PCLK_HIGH;
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}
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// Send read/write bit
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// Ignore bit in data, always use 0
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nop();
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PCLK_LOW;
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PDI_LOW;
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nop();
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PCLK_HIGH;
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nop();
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PCLK_LOW;
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// Receive data bits
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for (i = 0; i < 8; i++) {
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nop();
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PCLK_HIGH;
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nop();
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data = data << 1;
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if (PDO)
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data++;
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nop();
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PCLK_LOW;
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}
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|
|
|
nop();
|
|
PSEL_OFF;
|
|
|
|
return data;
|
|
}
|
|
|
|
static void
|
|
cc1020_load_config(const uint8_t * config)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < 0x28; i++)
|
|
cc1020_write_reg(i, config[i]);
|
|
}
|
|
|
|
static void
|
|
cc1020_reset(void)
|
|
{
|
|
|
|
// Reset CC1020
|
|
cc1020_write_reg(CC1020_MAIN, 0x0FU & ~0x01U);
|
|
|
|
// Bring CC1020 out of reset
|
|
cc1020_write_reg(CC1020_MAIN, 0x1F);
|
|
}
|
|
|
|
static int
|
|
cc1020_calibrate(void)
|
|
{
|
|
unsigned int timeout_cnt;
|
|
|
|
// Turn off PA to avoid spurs during calibration in TX mode
|
|
cc1020_write_reg(CC1020_PA_POWER, 0x00);
|
|
|
|
// Start calibration
|
|
cc1020_write_reg(CC1020_CALIBRATE, 0xB5);
|
|
clock_delay(1200);
|
|
while ((cc1020_read_reg(CC1020_STATUS) & CAL_COMPLETE) == 0);
|
|
clock_delay(800);
|
|
|
|
// Monitor lock
|
|
for (timeout_cnt = LOCK_TIMEOUT; timeout_cnt > 0; timeout_cnt--) {
|
|
if (cc1020_read_reg(CC1020_STATUS) & LOCK_CONTINUOUS)
|
|
break;
|
|
}
|
|
|
|
// Restore PA_POWER
|
|
cc1020_write_reg(CC1020_PA_POWER, cc1020_pa_power);
|
|
|
|
// Return state of LOCK_CONTINUOUS bit
|
|
return (cc1020_read_reg(CC1020_STATUS) & LOCK_CONTINUOUS) == LOCK_CONTINUOUS;
|
|
}
|
|
|
|
static int
|
|
cc1020_lock(void)
|
|
{
|
|
char lock_status;
|
|
int i;
|
|
|
|
// Monitor LOCK, lasts 420 - 510 cycles @ 4505600 = 93 us - 113 us
|
|
for (i = LOCK_TIMEOUT; i > 0; i--) {
|
|
lock_status = cc1020_read_reg(CC1020_STATUS) & LOCK_CONTINUOUS;
|
|
if (lock_status)
|
|
break;
|
|
}
|
|
|
|
if (lock_status == LOCK_CONTINUOUS) {
|
|
return LOCK_OK;
|
|
} else {
|
|
// If recalibration ok
|
|
if (cc1020_calibrate())
|
|
return LOCK_RECAL_OK; // Indicate PLL in LOCK
|
|
else
|
|
return LOCK_NOK; // Indicate PLL out of LOCK
|
|
}
|
|
}
|
|
static int
|
|
cc1020_setupRX(int analog)
|
|
{
|
|
char lock_status;
|
|
|
|
// Switch into RX, switch to freq. reg A
|
|
cc1020_write_reg(CC1020_MAIN, 0x11);
|
|
|
|
// Setup bias current adjustment
|
|
cc1020_write_reg(CC1020_ANALOG, analog);
|
|
clock_delay(400); // Wait for 1 msec
|
|
lock_status = cc1020_lock();
|
|
|
|
// Switch RX part of CC1020 on
|
|
cc1020_write_reg(CC1020_MAIN, 0x01);
|
|
cc1020_write_reg(CC1020_INTERFACE, 0x02);
|
|
|
|
// Return LOCK status to application
|
|
return lock_status;
|
|
}
|
|
|
|
static int
|
|
cc1020_setupTX(int analog)
|
|
{
|
|
char lock_status;
|
|
|
|
// Setup bias current adjustment
|
|
cc1020_write_reg(CC1020_ANALOG, analog);
|
|
|
|
// Switch into TX, switch to freq. reg B
|
|
cc1020_write_reg(CC1020_MAIN, 0xC1);
|
|
clock_delay(400); // Wait for 1 msec
|
|
lock_status = cc1020_lock();
|
|
|
|
// Restore PA_POWER
|
|
cc1020_write_reg(CC1020_PA_POWER, cc1020_pa_power);
|
|
|
|
// Turn OFF DCLK squelch in TX
|
|
cc1020_write_reg(CC1020_INTERFACE, 0x01);
|
|
|
|
// Return LOCK status to application
|
|
return lock_status;
|
|
}
|
|
|
|
static void
|
|
cc1020_setupPD(void)
|
|
{
|
|
/*
|
|
* Power down components an reset all registers except MAIN
|
|
* to their default values.
|
|
*/
|
|
cc1020_write_reg(CC1020_MAIN,
|
|
RESET_N | BIAS_PD | FS_PD | XOSC_PD | PD_MODE_1);
|
|
|
|
/* Turn off the power amplifier. */
|
|
cc1020_write_reg(CC1020_PA_POWER, 0x00);
|
|
|
|
cc1020_write_reg(CC1020_POWERDOWN, 0x1F);
|
|
}
|
|
|
|
static void
|
|
cc1020_wakeupRX(int analog)
|
|
{
|
|
// Turn on crystal oscillator core.
|
|
cc1020_write_reg(CC1020_MAIN, 0x1B);
|
|
|
|
// Setup bias current adjustment.
|
|
cc1020_write_reg(CC1020_ANALOG, analog);
|
|
|
|
// Insert wait routine here, must wait for xtal oscillator to stabilise,
|
|
// typically takes 2-5ms.
|
|
clock_delay(1200); // DelayMs(5);
|
|
|
|
// Turn on bias generator.
|
|
cc1020_write_reg(CC1020_MAIN, 0x19);
|
|
clock_delay(400); // NOT NEEDED?
|
|
|
|
// Turn on frequency synthesizer.
|
|
cc1020_write_reg(CC1020_MAIN, 0x11);
|
|
}
|
|
|
|
static void
|
|
cc1020_wakeupTX(int analog)
|
|
{
|
|
// Turn on crystal oscillator core.
|
|
cc1020_write_reg(CC1020_MAIN, 0xDB);
|
|
|
|
// Setup bias current adjustment.
|
|
cc1020_write_reg(CC1020_ANALOG, analog);
|
|
|
|
// Insert wait routine here, must wait for xtal oscillator to stabilise,
|
|
// typically takes 2-5ms.
|
|
clock_delay(1200); // DelayMs(5);
|
|
|
|
// Turn on bias generator.
|
|
cc1020_write_reg(CC1020_MAIN, 0xD9);
|
|
clock_delay(400); // NOT NEEDED?
|
|
|
|
// Turn on frequency synthesizer.
|
|
clock_delay(400);
|
|
cc1020_write_reg(CC1020_MAIN, 0xD1);
|
|
}
|