9cfe29612a
Also add adc init code and bank header files.
134 lines
3.2 KiB
C
134 lines
3.2 KiB
C
/**
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* \file
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*
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* uart initialization routines
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*
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* \author
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*
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* Anthony "Asterisk" Ambuehl
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*
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* non-interrupt routines typically only called once, stored in any bank.
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*
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*/
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#include <stdlib.h>
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#include <string.h>
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#include "banked.h"
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#include "cc2430_sfr.h"
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#include "dev/leds.h"
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#include "dev/uart.h"
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/*---------------------------------------------------------------------------*/
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void
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uart0_init(uint32_t speed) __banked
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{
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if(speed == 115200) {
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U0BAUD=216; /*115200*/
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U0GCR =11; /*LSB first and 115200*/
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}
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else if(speed == 38400) {
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U0BAUD=59; /*38400*/
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U0GCR =10; /*LSB first and 38400*/
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}
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else if(speed == 9600) {
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U0BAUD= 59; /* 9600 */
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U0GCR = 8; /*LSB first and 9600*/
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}
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else { return; }
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#ifdef UART0_ALTERNATIVE_2
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PERCFG |= U0CFG; /*alternative port 2 = P1.5-2*/
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#ifdef UART0_RTSCTS
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P1SEL |= 0x3C; /*peripheral select for TX and RX, RTS, CTS*/
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#else
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P1SEL |= 0x30; /*peripheral select for TX and RX*/
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P1 &= ~0x08; /*RTS down*/
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#endif
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P1DIR |= 0x28; /*RTS, TX out*/
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P1DIR &= ~0x14; /*CTS & RX in*/
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#else
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PERCFG &= ~U0CFG; /*alternative port 1 = P0.5-2*/
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#ifdef UART0_RTSCTS
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P0SEL |= 0x3C; /*peripheral select for TX and RX, RTS, CTS*/
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#else
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P0SEL |= 0x0C; /*peripheral select for TX and RX*/
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P0 &= ~0x20; /*RTS down*/
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#endif
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P0DIR |= 0x28; /*RTS & TX out*/
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P0DIR &= ~0x14; /*CTS & RX in*/
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#endif
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#ifdef UART0_RTSCTS
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U0UCR = 0x42; /*defaults: 8N1, RTS/CTS, high stop bit*/
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#else
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U0UCR = 0x02; /*defaults: 8N1, no flow control, high stop bit*/
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#endif
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U0CSR = U_MODE | U_RE | U_TXB; /*UART mode, receiver enable, TX done*/
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/*set priority group of group 3 to highest, so the UART won't miss bytes*/
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IP1 |= IP1_3;
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IP0 |= IP0_3;
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IEN0_URX0IE = 1;
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}
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/*---------------------------------------------------------------------------*/
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/* UART1 initialization */
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void
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uart1_init(uint32_t speed) __banked
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{
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#ifdef UART1_ALTERNATIVE_1
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PERCFG &= ~U1CFG; /*alternative port 1 = P0.5-2*/
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#ifdef UART1_RTSCTS
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P0SEL |= 0x3C; /*peripheral select for TX and RX, RTS, CTS*/
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#else
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P0SEL |= 0x30; /*peripheral select for TX and RX*/
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P0 &= ~0x08; /*RTS down*/
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#endif
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P0DIR |= 0x18; /*RTS, TX out*/
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P0DIR &= ~0x24; /*CTS, RX in*/
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#else
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PERCFG |= U1CFG; /*alternative port 2 = P1.7-4*/
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#ifdef UART1_RTSCTS
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P1SEL |= 0xF0; /*peripheral select for TX and RX*/
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#else
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P1SEL |= 0xC0; /*peripheral select for TX and RX*/
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P1 &= ~0x20; /*RTS down*/
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#endif
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P1DIR |= 0x60; /*RTS, TX out*/
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P1DIR &= ~0x90; /*CTS, RX in*/
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#endif
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if(speed == 115200) {
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U1BAUD=216; /*115200*/
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U1GCR =11; /*LSB first and 115200*/
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}
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if(speed == 38400) {
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U1BAUD=59; /*38400*/
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U1GCR =10; /*LSB first and 38400*/
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}
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if(speed == 9600) {
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U1BAUD= 59; /* 9600 */
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U1GCR = 8; /*LSB first and 9600*/
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}
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#ifdef UART1_RTSCTS
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U1UCR = 0x42; /*defaults: 8N1, RTS/CTS, high stop bit*/
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#else
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U1UCR = 0x02; /*defaults: 8N1, no flow control, high stop bit*/
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#endif
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U1CSR = U_MODE | U_RE | U_TXB; /*UART mode, receiver enable, TX done*/
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/*set priority group of group 3 to highest, so the UART won't miss bytes*/
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IP1 |= IP1_3;
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IP0 |= IP0_3;
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IEN0_URX1IE = 1; /* Enable the RX interrupt */
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}
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/*---------------------------------------------------------------------------*/
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