76 lines
2.6 KiB
C
76 lines
2.6 KiB
C
/*
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* Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
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* to the MC1322x project (http://mc1322x.devl.org)
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of libmc1322x: see http://mc1322x.devl.org
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* for details.
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*
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*
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*/
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#ifndef CONFIG_H
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#define CONFIG_H
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/* Baud rate */
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#define MOD 9999
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/* 230400 bps, INC=767, MOD=9999, 24Mhz 16x samp */
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/* 115200 bps, INC=767, MOD=9999, 24Mhz 8x samp */
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#define INC 767
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/* 921600 bps, MOD=9999, 24Mhz 16x samp */
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//#define INC 3071
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#define SAMP UCON_SAMP_8X
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//#define SAMP UCON_SAMP_16X
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/* use uart1 for console */
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#define uart_init uart1_init
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/* nvm-read */
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#define READ_ADDR 0x1f000
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#define READ_NBYTES 1024
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/* nvm-write */
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#define WRITE_NBYTES 8
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#define WRITE_ADDR 0x1e000
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#define WRITEVAL0 0xdeadbeef
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#define WRITEVAL1 0xdeadbeef
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/* romimg */
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#define DUMP_BASE 0x00000000
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#define DUMP_LEN 0x00014000
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/* flasher */
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/* if both BOOT_OK and BOOT_SECURE are 0 then flash image will not be bootable */
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/* if both are 1 then flash image will be secure */
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#define BOOT_OK 1
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#define BOOT_SECURE 0
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/* sleep */
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#undef USE_32KHZ /* board should have a HAS_32KHZ define */
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#endif
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